On Wed, Oct 15, 2014 at 10:25 AM, Ran Shalit ransha...@gmail.com wrote:
Hello,
Is there anyone who can please explain the relation between SW sleep
(such as udelay), to change of C-state as done by cpuidle ?
These are two different things, Ran.
udelay is a way to put simple delay between two
From: Pramod Gurav pramod.gu...@ti.com
The patch has the changes to calculate the dpll3 clock stabilization
delay dynamically. The SRAM delay is calibrated during bootup using the
gptimers and used while calculating the stabilization delay. By using
the dynamic method the dependency on the type
for safety.
This works fine for omap3.
Signed-off-by: Teerth Reddy tee...@ti.com
Signed-off-by: Romit Dasgupta ro...@ti.com
Signed-off-by: Pramod Gurav pramod.gu...@ti.com
Signed-off-by: Vishwanath Sripathy vishwanath...@ti.com
Signed-off-by: Ambresh K ambr...@ti.com
---
arch/arm/mach-omap2
of 3430 a 2usec and 3630 1usec buffer time is added for safety.
Signed-off-by: Pramod Gurav pramod.gu...@ti.com
Signed-off-by: Vishwanath Sripathy vishwanath...@ti.com
Signed-off-by: Ambresh K ambr...@ti.com
---
arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 27 +--
1 files changed
):
OMAP3: SDRC: Dynamic Calculation of SDRC stall latency during DVFS
Pramod Gurav (2):
OMAP3630 SDRC: Change in DVFS Latency Formula for OMAP3630
arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 80
arch/arm/mach-omap2/clock34xx.h|2 +
arch/arm/mach-omap2
-by: Teerth Reddy tee...@ti.com
Signed-off-by: Pramod Gurav pramod.gu...@ti.com
Signed-off-by: Vishwanath Sripathy vishwanath...@ti.com
---
arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 54 +++-
arch/arm/mach-omap2/clock34xx.h|2 +
arch/arm/mach-omap2/clock3xxx.c
This patch uses new formula to derive the dpll3 clock Stabilization
delay during DVFS for OMAP3630. The formula used is :
Latency = 2 * SYS_CLK + 10 * CLKOUTX2
1usec buffer time is added for safety.
Signed-off-by: Vishwanath Sripathy vishwanath...@ti.com
Signed-off-by: Pramod Gurav pramod.gu
. Adding new implementation for DVFS latency for 3630.
Teerth Reddy (1):
OMAP3: SDRC: Dynamic Calculation of SDRC stall latency during DVFS
Pramod Gurav (2):
OMAP3630: SDRC: Change in DVFS Latency Formula for OMAP3630
arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 83
-by: Teerth Reddy tee...@ti.com
Signed-off-by: Romit Dasgupta ro...@ti.com
Signed-off-by: Pramod Gurav pramod.gu...@ti.com
Signed-off-by: Vishwanath Sripathy vishwanath...@ti.com
---
arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 52 +++
arch/arm/mach-omap2/clock34xx.h
This patch uses new formula to derive the dpll3 clock Stabilization
delay during DVFS for OMAP3630. The formula used is :
Latency = 2 * SYS_CLK + 10 * CLKOUTX2
Signed-off-by: Vishwanath Sripathy vishwanath...@ti.com
Signed-off-by: Pramod Gurav pramod.gu...@ti.com
---
arch/arm/mach-omap2
hi gregoire,
i did not mention about charge current. the sysfs entry charge_current
always returns 360.
--
Best Regards
Pramod
On Fri, Sep 11, 2009 at 7:21 PM, pramod gurav pramodfo...@gmail.com wrote:
Hello gregoire,
Really sorry I could not reply to your mail as I was busy with some
Hi All,
I was trying to get the USB battery charging working over TPS65950 BCI
on the OMAP3430 custom board. I am working with linux-omap-2.6
v2.6.28-omap1 tag. I enabled the TWL4030 MADC and TWL4030 BCI drivers.
I passed interrupt details to these drivers from platform_device
structure from my
Hi all,
I am working on omap3430 custom board with linux-omap-2.6
(2.6.28-omap1 tag) on it.
I am using twl4030 power buttom. Whenever I press the power key I get
i2c controller timed out.
I am seeing following logs and the keypad stops responding and I have
to remove the board supply completely.
Hi Nishant,
I am facing the same problem to allocate a chunk of 4MB on omap3evm
using dma_alloc_coherent. I used the test driver mentioned here
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg11074.html
I applied the patch for
ioremap(24f11ec001920f1cfaeeed8e8b55725d900bbb56) suggested
for such usecases.
-Original Message-
From: linux-omap-ow...@vger.kernel.org
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of pramod gurav
Sent: Wednesday, April 22, 2009 1:17 PM
To: Menon, Nishanth
Cc: linux-omap@vger.kernel.org
Subject: Re: dma_alloc_coherent fragmentation
Hi Nishant,
I
Hi Ramesh,
This worked. Thanks a lot.
--
Best Regards
Pramod
On Wed, Apr 22, 2009 at 2:44 PM, Gupta, Ramesh grgu...@ti.com wrote:
Hi Pramod,
-Original Message-
From: linux-omap-ow...@vger.kernel.org
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of pramod gurav
Sent
Hi All
I am trying to port the i2c client drivers from linux-omap-2.6.26 to 2.6.28.
The i2c client drivers are old styled. The i2c-probe function called by
attach_adapter function returns -EOPNOTSUPP.
This states adapter does not support SMBUS_QUICK command.
Same driver on linux-omap-2.6.26 works
Hi,
I am using current linux-omap git sources. Can you please post the patch to fix
this timeout issue.
On Sat, Dec 20, 2008 at 7:39 PM, Felipe Balbi m...@felipebalbi.com wrote:
On Sat, Dec 20, 2008 at 03:34:00PM +0530, pramod gurav wrote:
Hi,
I am working on OMAP3430 board. The kernel
at 10:44 AM, pramod gurav pramodfo...@gmail.com wrote:
Hi,
I am using current linux-omap git sources. Can you please post the patch to
fix
this timeout issue.
On Sat, Dec 20, 2008 at 7:39 PM, Felipe Balbi m...@felipebalbi.com wrote:
On Sat, Dec 20, 2008 at 03:34:00PM +0530, pramod gurav
Hi All
I have a omap3430 logic zoom board.
I want to configure bluetooth on it(BRF6300) which will interfaced to UART2.
I gone through the schematics and could find that the BT_SHUTDOWN is
controlled through GPIO.8 coming from TWL4030.
Is that wright? I tried using that GPIO but the hci interface
Hi All
I have a omap3430 logic zoom board.
I want to configure bluetooth on it(BRF6300) which will interfaced to UART2.
I gone through the schematics and could find that the BT_SHUTDOWN is
controlled through GPIO.8 coming from TWL4030.
Is that wright? I tried using that GPIO but the hci interface
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