Re: [PATCH C 08/13] OMAP3 clock: put DPLL into bypass if bypass rate = clk-rate, not hardware rate

On Wed, Jan 28, 2009 at 12:08:32PM -0700, Paul Walmsley wrote: When a non-CORE DPLL is enabled via omap3_noncore_dpll_enable(), use the user's desired rate in clk-rate to determine whether to put the DPLL into bypass or lock mode, rather than reading the DPLL's current idle state from its

[PATCH C 08/13] OMAP3 clock: put DPLL into bypass if bypass rate = clk-rate, not hardware rate

When a non-CORE DPLL is enabled via omap3_noncore_dpll_enable(), use the user's desired rate in clk-rate to determine whether to put the DPLL into bypass or lock mode, rather than reading the DPLL's current idle state from its hardware registers. This fixes a bug observed when leaving retention.