Re: [PATCHv3 0/3] OMAP: HSMMC: cleanup and runtime pm

[T Krishnamoorthy, Balaji]

On Fri, Jul 1, 2011 at 1:06 AM, Cousson, Benoit b-cous...@ti.com wrote:
 Hi Balaji,

 On 6/30/2011 9:04 PM, Krishnamoorthy, Balaji T wrote:

 Removing the custom state machine - lazy disable framework in omap_hsmmc
 to make way for runtime pm to handle host controller
 power states.
 This allows mmc_host_enable/mmc_host_disable to be replaced by
 runtime get_sync and put_sync at host controller driver.

 Enable runtime PM in omap_hsmmc

 Rebased to 3.0-rc5
 Tested on OMAP4430SDP, OMAP3430SDP, OMAP2430SDP

 MMC runtime patch has dependency on
 [PATCH 0/6] OMAP2+: hwmod framework fixes [1]
 for MMC1/MMC2 clock to get ungated after idle in OMAP4.

 Without [1] patches, MMC1/MMC2 fails to get detected on OMAP4.

 Mmm, that's weird, which one exactly is fixing the issue?

http://www.mail-archive.com/linux-omap@vger.kernel.org/msg51458.html
[PATCH 1/6] OMAP2+: hwmod: Fix smart-standby + wakeup support

http://www.mail-archive.com/linux-omap@vger.kernel.org/msg51461.html
[PATCH 2/6] OMAP4: hwmod data: Add MSTANDBY_SMART_WKUP flag


 BTW, what is the issue exactly?

with SIDLE_SMART_WKUP flag set in omap44xx_mmc_sysc,
module got stuck after second clock enable.
It got resolved after adding MSTANDBY_SMART_WKUP fixes
.
Removing SIDLE_SMART_WKUP also solves the issue..


 Benoit


 [1] http://www.mail-archive.com/linux-omap@vger.kernel.org/msg51457.html

 Balaji T K (3):
   MMC: OMAP: HSMMC: Remove lazy_disable
   MMC: OMAP: HSMMC: add runtime pm support
   MMC: OMAP: HSMMC: Remove unused iclk

  drivers/mmc/host/omap_hsmmc.c |  365
 +++--
  1 files changed, 57 insertions(+), 308 deletions(-)



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Re: [PATCH 1/7] OMAP: ID: introduce chip detection for OMAP4460

[Tony Lindgren]

* Rajendra Nayak rna...@ti.com [110630 19:03]:
 --- a/arch/arm/mach-omap2/id.c
 +++ b/arch/arm/mach-omap2/id.c
 @@ -331,8 +331,8 @@ static void __init omap3_check_revision(void)
  static void __init omap4_check_revision(void)
  {
   u32 idcode;
 - u16 hawkeye;
   u8 rev;
 + u16 hawkeye;
  
   /*
* The IC rev detection is done with hawkeye and rev.

Please leave out this change, there's no need for it.

Tony
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Re: [PATCH 7/7] 4460sdp/blaze/panda: hwmod: Prevent gpio1 reset during hwmod init

[Tony Lindgren]

* Rajendra Nayak rna...@ti.com [110630 19:03]:
 For 4460sdp/blaze/panda, GPIO-7 of bank1 is used for controlling
 the TPS modes, hence GPIO1 should not be reset
 during init as reset will cause the TPS voltage to
 drop to 0.9 V preventing the system from continuing the boot.

NAK for this patch. We don't want any of this in init_early.

The problem is with hwmod core code that wrongly assumes it
can just reset all devices.

We should fix the hwmod code to lazily only reset devices as they
are enabled, and only reset unused devices with late_initcall
when we have decent debug output. And the reset of unused devices
should be possible to turn off with some kernel cmdline option.

Regards,

Tony


 --- a/arch/arm/mach-omap2/board-4430sdp.c
 +++ b/arch/arm/mach-omap2/board-4430sdp.c
 @@ -36,6 +36,7 @@
  #include plat/usb.h
  #include plat/mmc.h
  #include plat/omap4-keypad.h
 +#include plat/omap_hwmod.h
  #include video/omapdss.h
  
  #include mux.h
 @@ -298,6 +299,19 @@ static void __init omap_4430sdp_init_early(void)
  #ifdef CONFIG_OMAP_32K_TIMER
   omap2_gp_clockevent_set_gptimer(1);
  #endif
 + /*
 +  * For 4460sdp/blaze, GPIO-7 of bank1 is used for controlling
 +  * the TPS modes, hence GPIO1 should not be reset
 +  * during init as reset will cause the TPS voltage to
 +  * drop to 0.9 V  preventing the system from continuing the boot.
 +  */
 + if (cpu_is_omap446x()) {
 + struct omap_hwmod *gpio1 = omap_hwmod_lookup(gpio1);
 + if (gpio1)
 + omap_hwmod_no_setup_reset(gpio1);
 + else
 + pr_err(%s: gpio1 hwmod lookup failed\n, __func__);
 + }
  }
  
  static struct omap_musb_board_data musb_board_data = {
 diff --git a/arch/arm/mach-omap2/board-omap4panda.c 
 b/arch/arm/mach-omap2/board-omap4panda.c
 index 0cfe200..75a847c 100644
 --- a/arch/arm/mach-omap2/board-omap4panda.c
 +++ b/arch/arm/mach-omap2/board-omap4panda.c
 @@ -40,6 +40,7 @@
  #include plat/common.h
  #include plat/usb.h
  #include plat/mmc.h
 +#include plat/omap_hwmod.h
  #include video/omap-panel-generic-dpi.h
  #include timer-gp.h
  
 @@ -100,6 +101,19 @@ static void __init omap4_panda_init_early(void)
  {
   omap2_init_common_infrastructure();
   omap2_init_common_devices(NULL, NULL);
 + /*
 +  * For 4460panda, GPIO-7 of bank1 is used for controling
 +  * the TPS modes, hence GPIO1 should not be reset
 +  * during init as reset will cause the TPS voltage to
 +  * drop to 0.9 V preventing the system from continuing the boot.
 +  */
 + if (cpu_is_omap446x()) {
 + struct omap_hwmod *gpio1 = omap_hwmod_lookup(gpio1);
 + if (gpio1)
 + omap_hwmod_no_setup_reset(gpio1);
 + else
 + pr_err(%s: gpio1 hwmod lookup failed\n, __func__);
 + }
  }
  
  static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
 -- 
 1.7.4.1
 
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[GIT PULL] omap iommu fixes for v3.0-rc

[Ohad Ben-Cohen]

Hi Tony,

Please pull from:

git://github.com/ohadbc/omap-iommu.git for-tony

To receive trivial iommu/iovmm fixes (iommu clk name fix, pte fix and
a fix for iovmm's erroneous
usage of sg_dma_len as reported by Russell).

All three patches were submitted to linux-omap and linux-arm-kernel for review,
and are also attached below for convenience.

Thanks,
Ohad.

The following changes since commit c017d0d1351f916c0ced3f358afc491fdcf490b4:

  Merge branch 'kvm-updates/3.0' of
git://git.kernel.org/pub/scm/virt/kvm/kvm (2011-06-29 11:07:20 -0700)

are available in the git repository at:

  git://github.com/ohadbc/omap-iommu.git for-tony

Ohad Ben-Cohen (2):
  OMAP4: iommu: fix clock name
  omap: iovmm: s/sg_dma_len(sg)/sg-length/

Suman Anna (1):
  omap: iommu: fix pte attributes for super section

 arch/arm/mach-omap2/iommu2.c |4 ++--
 arch/arm/mach-omap2/omap-iommu.c |2 +-
 arch/arm/plat-omap/iovmm.c   |6 +++---
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c
index adb083e..f286012 100644
--- a/arch/arm/mach-omap2/iommu2.c
+++ b/arch/arm/mach-omap2/iommu2.c
@@ -225,8 +225,8 @@ static u32 omap2_get_pte_attr(struct iotlb_entry *e)
attr = e-mixed  5;
attr |= e-endian;
attr |= e-elsz  3;
-   attr = ((e-pgsz  MMU_CAM_PGSZ_4K) ? 0 : 6);
-
+   attr = (((e-pgsz == MMU_CAM_PGSZ_4K) ||
+   (e-pgsz == MMU_CAM_PGSZ_64K)) ? 0 : 6);
return attr;
 }

diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c
index 3fc5dc7..e61fead 100644
--- a/arch/arm/mach-omap2/omap-iommu.c
+++ b/arch/arm/mach-omap2/omap-iommu.c
@@ -67,7 +67,7 @@ static struct iommu_device omap4_devices[] = {
.pdata = {
.name = ducati,
.nr_tlb_entries = 32,
-   .clk_name = ducati_ick,
+   .clk_name = ipu_fck,
.da_start = 0x0,
.da_end = 0xF000,
},
diff --git a/arch/arm/plat-omap/iovmm.c b/arch/arm/plat-omap/iovmm.c
index 83a37c5..c60737c 100644
--- a/arch/arm/plat-omap/iovmm.c
+++ b/arch/arm/plat-omap/iovmm.c
@@ -72,7 +72,7 @@ static size_t sgtable_len(const struct sg_table *sgt)
for_each_sg(sgt-sgl, sg, sgt-nents, i) {
size_t bytes;

-   bytes = sg_dma_len(sg);
+   bytes = sg-length;

if (!iopgsz_ok(bytes)) {
pr_err(%s: sg[%d] not iommu pagesize(%x)\n,
@@ -198,7 +198,7 @@ static void *vmap_sg(const struct sg_table *sgt)
int err;

pa = sg_phys(sg);
-   bytes = sg_dma_len(sg);
+   bytes = sg-length;

BUG_ON(bytes != PAGE_SIZE);

@@ -476,7 +476,7 @@ static int map_iovm_area(struct iommu *obj, struct
iovm_struct *new,
struct iotlb_entry e;

pa = sg_phys(sg);
-   bytes = sg_dma_len(sg);
+   bytes = sg-length;

flags = ~IOVMF_PGSZ_MASK;
pgsz = bytes_to_iopgsz(bytes);
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Re: [GIT PULL] omap iommu fixes for v3.0-rc

[Tony Lindgren]

* Ohad Ben-Cohen o...@wizery.com [110630 23:47]:
 Hi Tony,
 
 Please pull from:
 
 git://github.com/ohadbc/omap-iommu.git for-tony
 
 To receive trivial iommu/iovmm fixes (iommu clk name fix, pte fix and
 a fix for iovmm's erroneous
 usage of sg_dma_len as reported by Russell).
 
 All three patches were submitted to linux-omap and linux-arm-kernel for 
 review,
 and are also attached below for convenience.

These look like real fixes, but can you please update the commits
with something like This fixes an issue with foo when doing bar.

Otherwise it's easy to claim that these are fixes for features that
never worked and it might be hard to justify them this late into
the -rc cycle.

Tony
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Re: [PATCH 9/10] arch/arm/mach-omap2/clock.c: add missing clk_put

[Tony Lindgren]

* Paul Walmsley p...@pwsan.com [110602 14:22]:
 On Wed, 1 Jun 2011, Julia Lawall wrote:
 
  From: Julia Lawall ju...@diku.dk
  
  Add missing call to clk_put.
  
  A simplified version of the semantic match that finds this problem is as
  follows: (http://coccinelle.lip6.fr/)
  
  // smpl
  @r exists@
  expression e1,e2;
  statement S;
  @@
  
  e1 = clk_get@p1(...);
  ... when != e1 = e2
  when != clk_put(e1)
  when any
  if (...) { ... when != clk_put(e1)
 when != if (...) { ... clk_put(e1) ... }
  * return@p3 ...;
   } else S
  // /smpl
  
  Signed-off-by: Julia Lawall ju...@diku.dk
 
 Acked-by: Paul Walmsley p...@pwsan.com

Adding this into devel-fixes branch.

Tony
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Re: [PATCH] DMA: OMAP: Remove extra looping from omap_request_dma

[Tony Lindgren]

* Scott Ellis sc...@jumpnowtek.com [110629 20:58]:
 Break from dma channel search when a free one is found.

Care to describe how the current code is not finding a
free channel currently?

Tony

 
 Signed-off-by: Scott Ellis sc...@jumpnowtek.com
 ---
  arch/arm/plat-omap/dma.c |5 ++---
  1 files changed, 2 insertions(+), 3 deletions(-)
 
 diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
 index c22217c..3d36fcf 100644
 --- a/arch/arm/plat-omap/dma.c
 +++ b/arch/arm/plat-omap/dma.c
 @@ -678,10 +678,9 @@ int omap_request_dma(int dev_id, const char *dev_name,
  
   spin_lock_irqsave(dma_chan_lock, flags);
   for (ch = 0; ch  dma_chan_count; ch++) {
 - if (free_ch == -1  dma_chan[ch].dev_id == -1) {
 + if (dma_chan[ch].dev_id == -1) {
   free_ch = ch;
 - if (dev_id == 0)
 - break;
 + break;
   }
   }
   if (free_ch == -1) {
 
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Re: [PATCH] OMAP4: DMTIMER: enable autoidle mode

[Tony Lindgren]

* K, Ambresh ambr...@ti.com [110615 21:41]:
 On Wed, Jun 15, 2011 at 9:39 PM, DebBarma, Tarun Kanti
 tarun.ka...@ti.comwrote:
  
   Currently autoidle is only enabled for OMAP2/3; by enabling autoidle,
   the automatic L4 clock gating strategy is applied based on L4 activity,
   otherwise L4 clock to module will be a free running.

Applying this into devel-fixes.

   - /* Enable autoidle on OMAP2 / OMAP3 */
   - if (cpu_is_omap24xx() || cpu_is_omap34xx())
   + /* Enable autoidle on OMAP2 CPUs. */
   + if (cpu_class_is_omap2())
 l |= 0x1  0;
  BTW, in the hwmod adaptation series this is taken care by the framework.
 
 
 Ok!

That should be a trivial update. Let's first merge this fix so L4 can
autoidle on omap4.

Tony
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Re: [PATCH] ARM: OMAP: Overo: remove duplicate call to overo_ads7846_init()

[Tony Lindgren]

* Kevin Hilman khil...@ti.com [110617 13:54]:
 Daniel Mack zon...@gmail.com writes:
 
  overo_ads7846_init() is already called from overo_spi_init(), and
  calling it twice is not only unnecessary but causes a warning as
  reg-fixed-voltage.1 is already added to the device tree.
 
 Excellent, thanks!
 
  Signed-off-by: Daniel Mack zon...@gmail.com
 
 Tested-by: Kevin Hilman khil...@ti.com
 

Applying into devel-fixes.

Tony
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Re: [PATCH 2/3] Add tps65921 chip

[Tony Lindgren]

Samuel,

* gr...@linuxhacker.ru gr...@linuxhacker.ru [110614 08:42]:
 From: Oleg Drokin gr...@linuxhacker.ru
 
 Very similar to TPS65920
 List of differences: http://www.ti.com/litv/pdf/swcu066b
 
 CC: sa...@linux.intel.com
 Signed-off-by: Oleg Drokin gr...@linuxhacker.ru

Looks like this one can be merged independently of the rest of the
Nook patches via your mfd tree. Care to queue this?

Regards,

Tony


 ---
  drivers/mfd/twl-core.c |2 ++
  1 files changed, 2 insertions(+), 0 deletions(-)
 
 diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
 index b8f2a4e..756f3eb 100644
 --- a/drivers/mfd/twl-core.c
 +++ b/drivers/mfd/twl-core.c
 @@ -1284,6 +1284,8 @@ static const struct i2c_device_id twl_ids[] = {
   { tps65950, 0 },  /* catalog version of twl5030 */
   { tps65930, TPS_SUBSET }, /* fewer LDOs and DACs; no charger */
   { tps65920, TPS_SUBSET }, /* fewer LDOs; no codec or charger */
 + { tps65921, TPS_SUBSET }, /* fewer LDOs; no codec, no LED
 +and vibrator. Charger in USB module*/
   { twl6030, TWL6030_CLASS },   /* Phoenix power chip */
   { twl6025, TWL6030_CLASS | TWL6025_SUBCLASS }, /* Phoenix lite */
   { /* end of list */ },
 -- 
 1.7.4.4
 
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Re: [PATCH v2 1/1] omap: blaze: add mmc5/wl1283 device support

[Tony Lindgren]

* Vishal Mahaveer vish...@ti.com [110624 12:43]:
 Add MMC5 support on BLAZE, which has the wl1283 device hardwired to.
 
 The wl1283 is a 4-wire, 1.8V, embedded SDIO WLAN device with an external IRQ 
 line,
 and power-controlled by a GPIO-based fixed regulator.

Applying into devel-board branch.

 +static struct fixed_voltage_config sdp4430_vwlan = {
 + .supply_name = vwl1271,
 + .microvolts = 180, /* 1.8V */
 + .gpio = GPIO_WIFI_PMENA,
 + .startup_delay = 7, /* 70msec */
 + .enable_high = 1,
 + .enabled_at_boot = 0,
 + .init_data = sdp4430_vmmc5,
 +};

Tabified this struct for better formatting.

Tony
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Re: [PATCH] OMAP4: Keyboard: Mux changes in the board file

[Tony Lindgren]

* Shubhrajyoti D shubhrajy...@ti.com [110623 05:10]:
 The mux settings for keypad  are done for omap4430sdp in
 board file.

Applying into devel-board branch.

 +static struct omap_board_data keypad_data = {
 + .id = 1,
 + .pads= keypad_pads,
 + .pads_cnt   = ARRAY_SIZE(keypad_pads),
 +};

Aligned this struct better.

Tony
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Re: [GIT PULL] omap iommu fixes for v3.0-rc

[Ohad Ben-Cohen]

On Fri, Jul 1, 2011 at 10:00 AM, Tony Lindgren t...@atomide.com wrote:
 These look like real fixes, but can you please update the commits
 with something like This fixes an issue with foo when doing bar.

Done, please tell me if it's OK now.

 Otherwise it's easy to claim that these are fixes for features that
 never worked and it might be hard to justify them this late into
 the -rc cycle.

It seems we did have these issues for quite some time, and these are not
explicit 3.0 regressions. So they might vaguely fall into the fixes
for features that never worked definition too in a sense.

If you prefer to take them into 3.1, that's OK too.

Thanks,
Ohad.
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Re: [PATCH 0/2] RETU meets Sparse IRQ

[Tony Lindgren]

* Leigh Brown le...@solinno.co.uk [110629 14:14]:
 On Wed, 29 Jun 2011 14:46:49 +0300, Felipe Balbi wrote:
 now with Sparse IRQ numbering, we don't need
 to add a bunch of defines in plat/irqs.h
 
 Compile tested with omap2plus_defconfig (+cbus)
 and omap1_defconfig (+cbus).
 
 Felipe Balbi (2):
   cbus: retu: use sparse IRQ numbering
   cbus: retu: stop polluting plat/irqs.h
 
  arch/arm/mach-omap1/board-nokia770.c   |2 --
  arch/arm/mach-omap2/board-n8x0.c   |2 --
  arch/arm/plat-omap/include/plat/irqs.h |   10 +-
  drivers/cbus/retu.c|   25
 -
  include/linux/platform_data/cbus.h |2 --
  5 files changed, 17 insertions(+), 24 deletions(-)
 
 Tested-by: Leigh Brown le...@solinno.co.uk
 
 Booted fine on my N810.

Thanks for testing, applying both into cbus branch.

Tony
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Re: [PATCH 0/6] OMAP2+: hwmod framework fixes

[Paul Walmsley]

Hi Benoît,

On Thu, 23 Jun 2011, Benoit Cousson wrote:

 Here are the latest bug fixes done on the hwmod framework.
 There are mainly around wakeup capability added in OMAP4.

These look good to me too.  These need to be cc'ed to lakml also, of 
course...


- Paul

Re: [PATCH 6/6] OMAP2+: hwmod: Fix the HW reset management

[Paul Walmsley]

One quick comment here:

On Thu, 23 Jun 2011, Benoit Cousson wrote:

 The HW reset must be de-assert after the clocks are enabled
 but before waiting for the target to be ready. Otherwise the
 reset might not work properly since the clock is not running
 to proceed the reset.
 
 De-assert the reset after _enable_clocks and before
 _wait_target_ready.
 Re-assert it only when the clocks are disabled.
 
 Signed-off-by: Benoit Cousson b-cous...@ti.com
 Cc: Paul Walmsley p...@pwsan.com
 ---
  arch/arm/mach-omap2/omap_hwmod.c |   32 
  1 files changed, 16 insertions(+), 16 deletions(-)
 
 diff --git a/arch/arm/mach-omap2/omap_hwmod.c 
 b/arch/arm/mach-omap2/omap_hwmod.c
 index f401417..55ad6a5 100644
 --- a/arch/arm/mach-omap2/omap_hwmod.c
 +++ b/arch/arm/mach-omap2/omap_hwmod.c
 @@ -1250,15 +1250,6 @@ static int _enable(struct omap_hwmod *oh)
  
   pr_debug(omap_hwmod: %s: enabling\n, oh-name);
  
 - /*
 -  * If an IP contains only one HW reset line, then de-assert it in order
 -  * to allow to enable the clocks. Otherwise the PRCM will return
 -  * Intransition status, and the init will failed.
 -  */
 - if ((oh-_state == _HWMOD_STATE_INITIALIZED ||
 -  oh-_state == _HWMOD_STATE_DISABLED)  oh-rst_lines_cnt == 1)
 - _deassert_hardreset(oh, oh-rst_lines[0].name);
 -
   /* Mux pins for device runtime if populated */
   if (oh-mux  (!oh-mux-enabled ||
   ((oh-_state == _HWMOD_STATE_IDLE) 
 @@ -1268,6 +1259,15 @@ static int _enable(struct omap_hwmod *oh)
   _add_initiator_dep(oh, mpu_oh);
   _enable_clocks(oh);
  
 + /*
 +  * If an IP contains only one HW reset line, then de-assert it in order
 +  * to allow to enable the clocks. Otherwise the PRCM will return
 +  * Intransition status, and the init will failed.
 +  */

Please update this comment, this doesn't make sense any more...

 + if ((oh-_state == _HWMOD_STATE_INITIALIZED ||
 +  oh-_state == _HWMOD_STATE_DISABLED)  oh-rst_lines_cnt == 1)
 + _deassert_hardreset(oh, oh-rst_lines[0].name);
 +
   r = _wait_target_ready(oh);
   if (!r) {
   oh-_state = _HWMOD_STATE_ENABLED;
 @@ -1396,13 +1396,6 @@ static int _shutdown(struct omap_hwmod *oh)
   _shutdown_sysc(oh);
   }
  
 - /*
 -  * If an IP contains only one HW reset line, then assert it
 -  * before disabling the clocks and shutting down the IP.
 -  */
 - if (oh-rst_lines_cnt == 1)
 - _assert_hardreset(oh, oh-rst_lines[0].name);
 -
   /* clocks and deps are already disabled in idle */
   if (oh-_state == _HWMOD_STATE_ENABLED) {
   _del_initiator_dep(oh, mpu_oh);
 @@ -1411,6 +1404,13 @@ static int _shutdown(struct omap_hwmod *oh)
   }
   /* XXX Should this code also force-disable the optional clocks? */
  
 + /*
 +  * If an IP contains only one HW reset line, then assert it
 +  * before disabling the clocks and shutting down the IP.
 +  */

And this one too.

 + if (oh-rst_lines_cnt == 1)
 + _assert_hardreset(oh, oh-rst_lines[0].name);
 +
   /* Mux pins to safe mode or use populated off mode values */
   if (oh-mux)
   omap_hwmod_mux(oh-mux, _HWMOD_STATE_DISABLED);
 -- 
 1.7.0.4
 


- Paul
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Re: [PATCH 6/6] OMAP2+: hwmod: Fix the HW reset management

[Cousson, Benoit]

On 7/1/2011 10:44 AM, Paul Walmsley wrote:

One quick comment here:

On Thu, 23 Jun 2011, Benoit Cousson wrote:


The HW reset must be de-assert after the clocks are enabled
but before waiting for the target to be ready. Otherwise the
reset might not work properly since the clock is not running
to proceed the reset.

De-assert the reset after _enable_clocks and before
_wait_target_ready.
Re-assert it only when the clocks are disabled.

Signed-off-by: Benoit Coussonb-cous...@ti.com
Cc: Paul Walmsleyp...@pwsan.com
---
  arch/arm/mach-omap2/omap_hwmod.c |   32 
  1 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index f401417..55ad6a5 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1250,15 +1250,6 @@ static int _enable(struct omap_hwmod *oh)

pr_debug(omap_hwmod: %s: enabling\n, oh-name);

-   /*
-* If an IP contains only one HW reset line, then de-assert it in order
-* to allow to enable the clocks. Otherwise the PRCM will return
-* Intransition status, and the init will failed.
-*/
-   if ((oh-_state == _HWMOD_STATE_INITIALIZED ||
-oh-_state == _HWMOD_STATE_DISABLED)  oh-rst_lines_cnt == 1)
-   _deassert_hardreset(oh, oh-rst_lines[0].name);
-
/* Mux pins for device runtime if populated */
if (oh-mux  (!oh-mux-enabled ||
((oh-_state == _HWMOD_STATE_IDLE)
@@ -1268,6 +1259,15 @@ static int _enable(struct omap_hwmod *oh)
_add_initiator_dep(oh, mpu_oh);
_enable_clocks(oh);

+   /*
+* If an IP contains only one HW reset line, then de-assert it in order
+* to allow to enable the clocks. Otherwise the PRCM will return
+* Intransition status, and the init will failed.
+*/


Please update this comment, this doesn't make sense any more...


Good point, I'll fix that.




+   if ((oh-_state == _HWMOD_STATE_INITIALIZED ||
+oh-_state == _HWMOD_STATE_DISABLED)  oh-rst_lines_cnt == 1)
+   _deassert_hardreset(oh, oh-rst_lines[0].name);
+
r = _wait_target_ready(oh);
if (!r) {
oh-_state = _HWMOD_STATE_ENABLED;
@@ -1396,13 +1396,6 @@ static int _shutdown(struct omap_hwmod *oh)
_shutdown_sysc(oh);
}

-   /*
-* If an IP contains only one HW reset line, then assert it
-* before disabling the clocks and shutting down the IP.
-*/
-   if (oh-rst_lines_cnt == 1)
-   _assert_hardreset(oh, oh-rst_lines[0].name);
-
/* clocks and deps are already disabled in idle */
if (oh-_state == _HWMOD_STATE_ENABLED) {
_del_initiator_dep(oh, mpu_oh);
@@ -1411,6 +1404,13 @@ static int _shutdown(struct omap_hwmod *oh)
}
/* XXX Should this code also force-disable the optional clocks? */

+   /*
+* If an IP contains only one HW reset line, then assert it
+* before disabling the clocks and shutting down the IP.
+*/


And this one too.


OK.

Benoit
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Re: [PATCH 0/8] HDMI: Split hdmi.c to seperate HDMI IP dependant code from DSS.

[Tomi Valkeinen]

On Thu, 2011-06-30 at 23:16 +0530, K, Mythri P wrote:
 Hi Tomi,
 
 On Wed, Jun 29, 2011 at 9:51 PM, Tomi Valkeinen tomi.valkei...@ti.com wrote:
  Hi,
 
  On Wed, 2011-06-29 at 19:08 +0530, K, Mythri P wrote:
  Hi Tomi,
 
  As the HDMI PLL , PHY and video blocks are logical blocks it would
  make sense to have the API's for all and the DSS HDMI (interface
  driver - user driver) would make a call to configure this in a
  particular sequence to enable HDMI , in case you the call to be
  generic across OMAPS in future then we should i either have a funtion
  in hdmi.c which will do this sequence and will be  aware of underlying
  IP , Which doesnt appear to be the solution you prefer but then there
  would be a need to have an intermediate file which would take the
  common API call(function pointer) and then arbitrate between different
  IP's based on the make , Is that what you are suggesting ?
 
  I agree that they are separate blocks, and at some level they need to be
  separate with own functions for each. But I don't see why the user needs
  to know about it.
 
  For example, consider OMAP DSI. DSI has protocol, PLL and PHY blocks,
  and the driver has functions to initialize them, use them etc. But the
  user of DSI, in this case panel drivers, do not need to know about it,
  and the API exported to the panel drivers does not contain any functions
  related to PLL or PHY. The panel drivers just enable the DSI driver and
  use it.
 
  So I'm still asking: what benefit does it give to the user that the API
  has functions to handle the blocks separately? There has to be a reason
  for the functions in the API.
 
 It doesnt give any additional benefit but flexibility to change the
 blocks (PHY / PLL) indivudally to use a different one.

Right. But this API is not the right place to implement that
flexibility. If there's no benefit for the user of the API to know about
the details of the HW, it's better hidden. The user just wants to use
the functionality, not know what lies below.

   And it just occurred to me that perhaps our views of the API are a bit
   different, and that's why we have differing opinions. I see this API as
   something that could be used by OMAP DSS (and equivalent components on
   other SoCs) to use the HDMI HW on OMAP4 and any future OMAPs. And
   perhaps you see this API more as an API to use the current HDMI HW in
   the OMAP4.
 
  Tomi , Yes my Idea of this API is for OMAP and Netra series only , I
  am unable to envision a common HDMI API library , in that case it
  would make more sense to have an intermediate file and have function
  pointer , which would take common API calls like hdmi_enable ,
  hdmi_avi_confg etc and then arbitrate based on the build. Please let
  me know if you have anything else in mind.
 
  I didn't mean a generic HDMI API either. I meant a TI HDMI API,
  currently for OMAP and Netra. But my comments would be valid even if the
  API would be only OMAP DSS internal.
 
 Neither the HDMI DSS driver should be concerned about these PHY/PLL
 internal API's nor should the configuration be done in the  IP driver
 as the IP driver shpuld only provide functionality and should be
 flexible enough as across OMAP4 and netra itself there is a

What configuration are you referring to? I don't think the user of the
API (i.e. omapdss) should do any configuration that requires knowledge
of the underlying HDMI HW.

 possibility of the PHY block being different , so  Now the only
 solution i see is to have a intermediate file , whose job is to
 provide common API function and based on the CPU switch would be aware
 of the IP inside and make appropriate call to IP driver , Does this
 sound like a good approach ?

I don't see a need for a separate file right now. We have the
hdmi_ti_4xxx_ip.c file which contains code for the HDMI block as a
whole, and could well contain the code that implements the API.

 Tomi


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[RFC 0/12] McBSP cleanup and generalization

[Jarkko Nikula]

Hi

Some cleanups to McBSP code and attempts to make it more generic. I'll be out
of office in coming days but I'm happy to hear how does this set work on
OMAP1 Amstrad Delta as there are changes around register definitions and
access. I've tested this on 2420 and 3430 and build tested with omap1_defconfig
and omap2plus_defconfig.

I added Paul's build fix first as it seems to got lost in l-o master during
recent devel branch merges and my patches are made on top of it. Paul's
patch can be found from commit 7150dfee80a1e7ed5064730994b704495a8c6b99.

For is_omap removal I didn't invent any other new than reg_size and reg_step
to platform data but in the future I think mcbsp_config_type is better to
replace with some feature flags that come from hwmod so that there is no
need to modify code for any new omap version.

Long term plan is still bit open. If we go to merge McBSP with ASoC omap-mcbsp
we can drop quite much of special API here as well as omap-mcbsp-dai
platform devices.

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[RFC 01/12] ASoC: OMAP: McBSP: fix build breakage on OMAP1

[Jarkko Nikula]

From: Paul Walmsley p...@pwsan.com

After commits d13586574d373ef40acd4725c9a269daa355e412 (OMAP: McBSP:
implement functional clock switching via clock framework) and
cf4c87abe238ec17cd0255b4e21abd949d7f811e (OMAP: McBSP: implement
McBSP CLKR and FSR signal muxing via mach-omap2/mcbsp.c), any OMAP1
board (such as the AMS Delta) that uses the ASoC McBSP driver will no
longer build:

sound/built-in.o: In function `omap_mcbsp_dai_set_dai_sysclk':
last.c:(.text+0x24ff8): undefined reference to `omap2_mcbsp1_mux_clkr_src'
last.c:(.text+0x2500c): undefined reference to `omap2_mcbsp1_mux_fsr_src'
make: *** [vmlinux] Error 1

Fix by defining three OMAP1-only dummy functions for
omap2_mcbsp1_mux_clkr_src(), omap2_mcbsp1_mux_fsr_src(), and
omap2_mcbsp_set_clks_src().

Normally, code that is OMAP SoC-revision-specific like this should go
under the arch/arm/*omap* directories, and get abstracted away from
drivers via struct platform_data function pointers.  This doesn't work
in this case since there doesn't appear to be any convenient way to access
struct platform_data (or something like it) in the current design of
the sound/soc/omap/omap-mcbsp.c driver.

Reported by Janusz Krzysztofik jkrzy...@tis.icnet.pl and Tony Lindgren
t...@atomide.com.  Janusz also posted a patch to fix this at:

   http://www.spinics.net/lists/linux-omap/msg39560.html

(among other places), but the following approach seems less dependent
on compiler behavior.

This patch passes build tests for ams_delta_defconfig and omap2plus_defconfig,
but since I don't have an AMS Delta here, I can't boot test it on that
platform.

Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Janusz Krzysztofik jkrzy...@tis.icnet.pl
Cc: Tony Lindgren t...@atomide.com
Cc: Jarkko Nikula jhnik...@gmail.com
Cc: Peter Ujfalusi peter.ujfal...@nokia.com
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Liam Girdwood l...@slimlogic.co.uk
---
 arch/arm/plat-omap/mcbsp.c |   27 +++
 1 files changed, 27 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 455eadc..2a3587e 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -969,6 +969,33 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
 }
 EXPORT_SYMBOL(omap_mcbsp_stop);
 
+/*
+ * The following functions are only required on an OMAP1-only build.
+ * mach-omap2/mcbsp.c contains the real functions
+ */
+#ifndef CONFIG_ARCH_OMAP2PLUS
+int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
+{
+   WARN(1, %s: should never be called on an OMAP1-only kernel\n,
+__func__);
+   return -EINVAL;
+}
+
+void omap2_mcbsp1_mux_clkr_src(u8 mux)
+{
+   WARN(1, %s: should never be called on an OMAP1-only kernel\n,
+__func__);
+   return;
+}
+
+void omap2_mcbsp1_mux_fsr_src(u8 mux)
+{
+   WARN(1, %s: should never be called on an OMAP1-only kernel\n,
+__func__);
+   return;
+}
+#endif
+
 #ifdef CONFIG_ARCH_OMAP3
 #define max_thres(m)   (mcbsp-pdata-buffer_size)
 #define valid_threshold(m, val)((val) = max_thres(m))
-- 
1.7.0.4

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[RFC 02/12] omap: mcbsp: Remove rx_/tx_word_length variables

[Jarkko Nikula]

These variables got unused after (omap: mcbsp: Drop in-driver transfer
support) but was noticed only afterwards.

Signed-off-by: Jarkko Nikula jhnik...@gmail.com
---
 arch/arm/plat-omap/include/plat/mcbsp.h |2 --
 arch/arm/plat-omap/mcbsp.c  |3 ---
 2 files changed, 0 insertions(+), 5 deletions(-)

diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h 
b/arch/arm/plat-omap/include/plat/mcbsp.h
index 6c53508..63464ad 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -385,8 +385,6 @@ struct omap_mcbsp {
void __iomem *io_base;
u8 id;
u8 free;
-   omap_mcbsp_word_length rx_word_length;
-   omap_mcbsp_word_length tx_word_length;
 
int rx_irq;
int tx_irq;
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 2a3587e..6c62af1 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -869,9 +869,6 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
if (cpu_is_omap34xx())
omap_st_start(mcbsp);
 
-   mcbsp-rx_word_length = (MCBSP_READ_CACHE(mcbsp, RCR1)  5)  0x7;
-   mcbsp-tx_word_length = (MCBSP_READ_CACHE(mcbsp, XCR1)  5)  0x7;
-
/* Only enable SRG, if McBSP is master */
w = MCBSP_READ_CACHE(mcbsp, PCR0);
if (w  (FSXM | FSRM | CLKXM | CLKRM))
-- 
1.7.0.4

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[RFC 03/12] omap: mcbsp: Remove port number enums

[Jarkko Nikula]

These McBSP port number enums are used only in two places in the McBSP code
so we may remove then and just use numeric values like rest of the code does.

Signed-off-by: Jarkko Nikula jhnik...@gmail.com
---
 arch/arm/mach-omap1/mcbsp.c |4 ++--
 arch/arm/plat-omap/include/plat/mcbsp.h |   10 +-
 2 files changed, 3 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index d9af981..ab7395d 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -38,7 +38,7 @@ static void omap1_mcbsp_request(unsigned int id)
 * On 1510, 1610 and 1710, McBSP1 and McBSP3
 * are DSP public peripherals.
 */
-   if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
+   if (id == 0 || id == 2) {
if (dsp_use++ == 0) {
api_clk = clk_get(NULL, api_ck);
dsp_clk = clk_get(NULL, dsp_ck);
@@ -59,7 +59,7 @@ static void omap1_mcbsp_request(unsigned int id)
 
 static void omap1_mcbsp_free(unsigned int id)
 {
-   if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
+   if (id == 0 || id == 2) {
if (--dsp_use == 0) {
if (!IS_ERR(api_clk)) {
clk_disable(api_clk);
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h 
b/arch/arm/plat-omap/include/plat/mcbsp.h
index 63464ad..9882c65 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -33,7 +33,7 @@
 #define OMAP_MCBSP_PLATFORM_DEVICE(port_nr)\
 static struct platform_device omap_mcbsp##port_nr = {  \
.name   = omap-mcbsp-dai, \
-   .id = OMAP_MCBSP##port_nr,  \
+   .id = port_nr - 1,  \
 }
 
 #define MCBSP_CONFIG_TYPE2 0x2
@@ -332,14 +332,6 @@ struct omap_mcbsp_reg_cfg {
 };
 
 typedef enum {
-   OMAP_MCBSP1 = 0,
-   OMAP_MCBSP2,
-   OMAP_MCBSP3,
-   OMAP_MCBSP4,
-   OMAP_MCBSP5
-} omap_mcbsp_id;
-
-typedef enum {
OMAP_MCBSP_WORD_8 = 0,
OMAP_MCBSP_WORD_12,
OMAP_MCBSP_WORD_16,
-- 
1.7.0.4

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[RFC 04/12] omap: mcbsp: Merge OMAP1 and OMAP2+ McBSP register definitions

[Jarkko Nikula]

There is no need to have separate register definitions for OMAP1 since they
are ordered similarly than in OMAP2+ and thus register address offsets can
be calculated from OMAP2+ register address offsets.

Signed-off-by: Jarkko Nikula jhnik...@gmail.com
---
 arch/arm/plat-omap/include/plat/mcbsp.h |   50 ---
 arch/arm/plat-omap/mcbsp.c  |2 +
 2 files changed, 8 insertions(+), 44 deletions(-)

diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h 
b/arch/arm/plat-omap/include/plat/mcbsp.h
index 9882c65..6db02b3 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -51,54 +51,16 @@ static struct platform_device omap_mcbsp##port_nr = {   
\
 #define OMAP1610_MCBSP2_BASE   0xfffb1000
 #define OMAP1610_MCBSP3_BASE   0xe1017000
 
-#ifdef CONFIG_ARCH_OMAP1
-
-#define OMAP_MCBSP_REG_DRR20x00
-#define OMAP_MCBSP_REG_DRR10x02
-#define OMAP_MCBSP_REG_DXR20x04
-#define OMAP_MCBSP_REG_DXR10x06
-#define OMAP_MCBSP_REG_DRR 0x02
-#define OMAP_MCBSP_REG_DXR 0x06
-#define OMAP_MCBSP_REG_SPCR2   0x08
-#define OMAP_MCBSP_REG_SPCR1   0x0a
-#define OMAP_MCBSP_REG_RCR20x0c
-#define OMAP_MCBSP_REG_RCR10x0e
-#define OMAP_MCBSP_REG_XCR20x10
-#define OMAP_MCBSP_REG_XCR10x12
-#define OMAP_MCBSP_REG_SRGR2   0x14
-#define OMAP_MCBSP_REG_SRGR1   0x16
-#define OMAP_MCBSP_REG_MCR20x18
-#define OMAP_MCBSP_REG_MCR10x1a
-#define OMAP_MCBSP_REG_RCERA   0x1c
-#define OMAP_MCBSP_REG_RCERB   0x1e
-#define OMAP_MCBSP_REG_XCERA   0x20
-#define OMAP_MCBSP_REG_XCERB   0x22
-#define OMAP_MCBSP_REG_PCR00x24
-#define OMAP_MCBSP_REG_RCERC   0x26
-#define OMAP_MCBSP_REG_RCERD   0x28
-#define OMAP_MCBSP_REG_XCERC   0x2A
-#define OMAP_MCBSP_REG_XCERD   0x2C
-#define OMAP_MCBSP_REG_RCERE   0x2E
-#define OMAP_MCBSP_REG_RCERF   0x30
-#define OMAP_MCBSP_REG_XCERE   0x32
-#define OMAP_MCBSP_REG_XCERF   0x34
-#define OMAP_MCBSP_REG_RCERG   0x36
-#define OMAP_MCBSP_REG_RCERH   0x38
-#define OMAP_MCBSP_REG_XCERG   0x3A
-#define OMAP_MCBSP_REG_XCERH   0x3C
-
-/* Dummy defines, these are not available on omap1 */
-#define OMAP_MCBSP_REG_XCCR0x00
-#define OMAP_MCBSP_REG_RCCR0x00
-
-#else
-
+/* McBSP register addresses. OMAP1 address = address definition / 2 */
+/* OMAP1-OMAP2420 registers */
 #define OMAP_MCBSP_REG_DRR20x00
 #define OMAP_MCBSP_REG_DRR10x04
 #define OMAP_MCBSP_REG_DXR20x08
 #define OMAP_MCBSP_REG_DXR10x0C
+/* OMAP2430 and onwards */
 #define OMAP_MCBSP_REG_DRR 0x00
 #define OMAP_MCBSP_REG_DXR 0x08
+/* Common registers */
 #define OMAP_MCBSP_REG_SPCR2   0x10
 #define OMAP_MCBSP_REG_SPCR1   0x14
 #define OMAP_MCBSP_REG_RCR20x18
@@ -126,6 +88,7 @@ static struct platform_device omap_mcbsp##port_nr = {
\
 #define OMAP_MCBSP_REG_RCERH   0x70
 #define OMAP_MCBSP_REG_XCERG   0x74
 #define OMAP_MCBSP_REG_XCERH   0x78
+/* OMAP2430 and onwards */
 #define OMAP_MCBSP_REG_SYSCON  0x8C
 #define OMAP_MCBSP_REG_THRSH2  0x90
 #define OMAP_MCBSP_REG_THRSH1  0x94
@@ -138,6 +101,7 @@ static struct platform_device omap_mcbsp##port_nr = {   
\
 #define OMAP_MCBSP_REG_RBUFFSTAT   0xB8
 #define OMAP_MCBSP_REG_SSELCR  0xBC
 
+/* OMAP3 sidetone control registers */
 #define OMAP_ST_REG_REV0x00
 #define OMAP_ST_REG_SYSCONFIG  0x10
 #define OMAP_ST_REG_IRQSTATUS  0x18
@@ -146,8 +110,6 @@ static struct platform_device omap_mcbsp##port_nr = {   
\
 #define OMAP_ST_REG_SFIRCR 0x28
 #define OMAP_ST_REG_SSELCR 0x2C
 
-#endif
-
 /** McBSP SPCR1 bit definitions 
***/
 #define RRST   0x0001
 #define RRDY   0x0002
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 6c62af1..a7ced1b 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -37,6 +37,7 @@ int omap_mcbsp_count, omap_mcbsp_cache_size;
 static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
 {
if (cpu_class_is_omap1()) {
+   reg /= 2;
((u16 *)mcbsp-reg_cache)[reg / sizeof(u16)] = (u16)val;
__raw_writew((u16)val, mcbsp-io_base + reg);
} else if (cpu_is_omap2420()) {
@@ -51,6 +52,7 @@ static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 
reg, u32 val)
 static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache)
 {
if (cpu_class_is_omap1()) {
+   reg /= 2;
return !from_cache ? __raw_readw(mcbsp-io_base + reg) :
((u16 *)mcbsp-reg_cache)[reg / sizeof(u16)];
} else if (cpu_is_omap2420()) {
-- 
1.7.0.4

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[RFC 05/12] omap: mcbsp: Move out omap_mcbsp_register_board_cfg from plat-omap/devices.c

[Jarkko Nikula]

Only OMAP1s are using omap_mcbsp_register_board_cfg after OMAP2+ hwmod
conversion so it can be moved to mach-omap1/mcbsp.c.

Signed-off-by: Jarkko Nikula jhnik...@gmail.com
---
 arch/arm/mach-omap1/mcbsp.c |   32 +
 arch/arm/plat-omap/devices.c|   46 ---
 arch/arm/plat-omap/include/plat/mcbsp.h |2 -
 3 files changed, 32 insertions(+), 48 deletions(-)

diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index ab7395d..3c985ac 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -31,6 +31,7 @@
 static int dsp_use;
 static struct clk *api_clk;
 static struct clk *dsp_clk;
+static struct platform_device **omap_mcbsp_devices;
 
 static void omap1_mcbsp_request(unsigned int id)
 {
@@ -369,6 +370,37 @@ static struct omap_mcbsp_platform_data 
omap16xx_mcbsp_pdata[] = {
 #define OMAP16XX_MCBSP_COUNT   0
 #endif
 
+static void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
+   struct omap_mcbsp_platform_data *config, int size)
+{
+   int i;
+
+   omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *),
+GFP_KERNEL);
+   if (!omap_mcbsp_devices) {
+   printk(KERN_ERR Could not register McBSP devices\n);
+   return;
+   }
+
+   for (i = 0; i  size; i++) {
+   struct platform_device *new_mcbsp;
+   int ret;
+
+   new_mcbsp = platform_device_alloc(omap-mcbsp, i + 1);
+   if (!new_mcbsp)
+   continue;
+   platform_device_add_resources(new_mcbsp, res[i * res_count],
+   res_count);
+   new_mcbsp-dev.platform_data = config[i];
+   ret = platform_device_add(new_mcbsp);
+   if (ret) {
+   platform_device_put(new_mcbsp);
+   continue;
+   }
+   omap_mcbsp_devices[i] = new_mcbsp;
+   }
+}
+
 static int __init omap1_mcbsp_init(void)
 {
if (!cpu_class_is_omap1())
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index ea28f98..bd9a06b 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -26,54 +26,8 @@
 #include plat/mmc.h
 #include mach/gpio.h
 #include plat/menelaus.h
-#include plat/mcbsp.h
 #include plat/omap44xx.h
 
-/*-*/
-
-#if defined(CONFIG_OMAP_MCBSP) || defined(CONFIG_OMAP_MCBSP_MODULE)
-
-static struct platform_device **omap_mcbsp_devices;
-
-void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
-   struct omap_mcbsp_platform_data *config, int size)
-{
-   int i;
-
-   omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *),
-GFP_KERNEL);
-   if (!omap_mcbsp_devices) {
-   printk(KERN_ERR Could not register McBSP devices\n);
-   return;
-   }
-
-   for (i = 0; i  size; i++) {
-   struct platform_device *new_mcbsp;
-   int ret;
-
-   new_mcbsp = platform_device_alloc(omap-mcbsp, i + 1);
-   if (!new_mcbsp)
-   continue;
-   platform_device_add_resources(new_mcbsp, res[i * res_count],
-   res_count);
-   new_mcbsp-dev.platform_data = config[i];
-   ret = platform_device_add(new_mcbsp);
-   if (ret) {
-   platform_device_put(new_mcbsp);
-   continue;
-   }
-   omap_mcbsp_devices[i] = new_mcbsp;
-   }
-}
-
-#else
-void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
-   struct omap_mcbsp_platform_data *config, int size)
-{  }
-#endif
-
-/*-*/
-
 #if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
 
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h 
b/arch/arm/plat-omap/include/plat/mcbsp.h
index 6db02b3..2202457 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -376,8 +376,6 @@ extern int omap_mcbsp_count, omap_mcbsp_cache_size;
 #define id_to_mcbsp_ptr(id)mcbsp_ptr[id];
 
 int omap_mcbsp_init(void);
-void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
-   struct omap_mcbsp_platform_data *config, int size);
 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * 
config);
 #ifdef CONFIG_ARCH_OMAP3
 void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold);
-- 
1.7.0.4

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[RFC 06/12] omap: mcbsp: Implement generic register and cache access

[Jarkko Nikula]

Get rid of is_omap tests in omap_mcbsp_write and omap_mcbsp_read by using
register size and register step variables that are passed via platform data

Signed-off-by: Jarkko Nikula jhnik...@gmail.com
---
 arch/arm/mach-omap1/mcbsp.c |2 +
 arch/arm/mach-omap2/mcbsp.c |7 ++
 arch/arm/plat-omap/include/plat/mcbsp.h |2 +
 arch/arm/plat-omap/mcbsp.c  |   32 +-
 4 files changed, 29 insertions(+), 14 deletions(-)

diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index 3c985ac..36ab5d8 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -391,6 +391,8 @@ static void omap_mcbsp_register_board_cfg(struct resource 
*res, int res_count,
continue;
platform_device_add_resources(new_mcbsp, res[i * res_count],
res_count);
+   config[i].reg_size = 2;
+   config[i].reg_step = 2;
new_mcbsp-dev.platform_data = config[i];
ret = platform_device_add(new_mcbsp);
if (ret) {
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 4a6ef6a..1408156 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -137,6 +137,13 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void 
*unused)
pdata-buffer_size = 0x80;
}
 
+   pdata-reg_step = 4;
+   if (oh-class-rev  MCBSP_CONFIG_TYPE2)
+   pdata-reg_size = 2;
+   else
+   pdata-reg_size = 4;
+
+
oh_device[0] = oh;
 
if (oh-dev_attr) {
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h 
b/arch/arm/plat-omap/include/plat/mcbsp.h
index 2202457..31b24c9 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -320,6 +320,8 @@ struct omap_mcbsp_platform_data {
 #endif
u16 buffer_size;
unsigned int mcbsp_config_type;
+   u8 reg_size;
+   u8 reg_step;
 };
 
 struct omap_mcbsp_st_data {
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index a7ced1b..92d6d4f 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -36,31 +36,35 @@ int omap_mcbsp_count, omap_mcbsp_cache_size;
 
 static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
 {
-   if (cpu_class_is_omap1()) {
-   reg /= 2;
-   ((u16 *)mcbsp-reg_cache)[reg / sizeof(u16)] = (u16)val;
-   __raw_writew((u16)val, mcbsp-io_base + reg);
-   } else if (cpu_is_omap2420()) {
-   ((u16 *)mcbsp-reg_cache)[reg / sizeof(u32)] = (u16)val;
+   int index;
+
+   if (mcbsp-pdata-reg_size == 2  mcbsp-pdata-reg_step == 2)
+   reg /= 2; /* Calculate OMAP1 register offset */
+
+   index = reg / mcbsp-pdata-reg_step;
+   if (mcbsp-pdata-reg_size == 2) {
+   ((u16 *)mcbsp-reg_cache)[index] = (u16)val;
__raw_writew((u16)val, mcbsp-io_base + reg);
} else {
-   ((u32 *)mcbsp-reg_cache)[reg / sizeof(u32)] = val;
+   ((u32 *)mcbsp-reg_cache)[index] = val;
__raw_writel(val, mcbsp-io_base + reg);
}
 }
 
 static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache)
 {
-   if (cpu_class_is_omap1()) {
-   reg /= 2;
-   return !from_cache ? __raw_readw(mcbsp-io_base + reg) :
-   ((u16 *)mcbsp-reg_cache)[reg / sizeof(u16)];
-   } else if (cpu_is_omap2420()) {
+   int index;
+
+   if (mcbsp-pdata-reg_size == 2  mcbsp-pdata-reg_step == 2)
+   reg /= 2; /* Calculate OMAP1 register offset */
+
+   index = reg / mcbsp-pdata-reg_step;
+   if (mcbsp-pdata-reg_size == 2) {
return !from_cache ? __raw_readw(mcbsp-io_base + reg) :
-   ((u16 *)mcbsp-reg_cache)[reg / sizeof(u32)];
+((u16 *)mcbsp-reg_cache)[index];
} else {
return !from_cache ? __raw_readl(mcbsp-io_base + reg) :
-   ((u32 *)mcbsp-reg_cache)[reg / sizeof(u32)];
+((u32 *)mcbsp-reg_cache)[index];
}
 }
 
-- 
1.7.0.4

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[RFC 07/12] omap: mcbsp: Get rid of remaining is_omap tests

[Jarkko Nikula]

We can get rid of remaining is_omap tests in the driver by using
mcbsp_config_type that is set in omap hwmod data for 2430, 34xx and 44xx.

Signed-off-by: Jarkko Nikula jhnik...@gmail.com
---
 arch/arm/plat-omap/mcbsp.c |   30 ++
 1 files changed, 14 insertions(+), 16 deletions(-)

diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 92d6d4f..47720b1 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -193,7 +193,7 @@ void omap_mcbsp_config(unsigned int id, const struct 
omap_mcbsp_reg_cfg *config)
MCBSP_WRITE(mcbsp, MCR2, config-mcr2);
MCBSP_WRITE(mcbsp, MCR1, config-mcr1);
MCBSP_WRITE(mcbsp, PCR0, config-pcr0);
-   if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+   if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE2) {
MCBSP_WRITE(mcbsp, XCCR, config-xccr);
MCBSP_WRITE(mcbsp, RCCR, config-rccr);
}
@@ -531,14 +531,13 @@ void omap_mcbsp_set_tx_threshold(unsigned int id, u16 
threshold)
 {
struct omap_mcbsp *mcbsp;
 
-   if (!cpu_is_omap34xx()  !cpu_is_omap44xx())
-   return;
-
if (!omap_mcbsp_check_valid_id(id)) {
printk(KERN_ERR %s: Invalid id (%d)\n, __func__, id + 1);
return;
}
mcbsp = id_to_mcbsp_ptr(id);
+   if (mcbsp-mcbsp_config_type  MCBSP_CONFIG_TYPE3)
+   return;
 
if (threshold  threshold = mcbsp-max_tx_thres)
MCBSP_WRITE(mcbsp, THRSH2, threshold - 1);
@@ -554,14 +553,13 @@ void omap_mcbsp_set_rx_threshold(unsigned int id, u16 
threshold)
 {
struct omap_mcbsp *mcbsp;
 
-   if (!cpu_is_omap34xx()  !cpu_is_omap44xx())
-   return;
-
if (!omap_mcbsp_check_valid_id(id)) {
printk(KERN_ERR %s: Invalid id (%d)\n, __func__, id + 1);
return;
}
mcbsp = id_to_mcbsp_ptr(id);
+   if (mcbsp-mcbsp_config_type  MCBSP_CONFIG_TYPE3)
+   return;
 
if (threshold  threshold = mcbsp-max_rx_thres)
MCBSP_WRITE(mcbsp, THRSH1, threshold - 1);
@@ -698,7 +696,7 @@ static inline void omap34xx_mcbsp_request(struct omap_mcbsp 
*mcbsp)
 * Enable wakup behavior, smart idle and all wakeups
 * REVISIT: some wakeups may be unnecessary
 */
-   if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+   if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE3) {
MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
}
 }
@@ -712,7 +710,7 @@ static inline void omap34xx_mcbsp_free(struct omap_mcbsp 
*mcbsp)
/*
 * Disable wakup behavior, smart idle and all wakeups
 */
-   if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+   if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE3) {
/*
 * HW bug workaround - If no_idle mode is taken, we need to
 * go to smart_idle before going to always_idle, or the
@@ -872,7 +870,7 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
}
mcbsp = id_to_mcbsp_ptr(id);
 
-   if (cpu_is_omap34xx())
+   if (mcbsp-mcbsp_config_type == MCBSP_CONFIG_TYPE3)
omap_st_start(mcbsp);
 
/* Only enable SRG, if McBSP is master */
@@ -910,7 +908,7 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
MCBSP_WRITE(mcbsp, SPCR2, w | (1  7));
}
 
-   if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+   if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE2) {
/* Release the transmitter and receiver */
w = MCBSP_READ_CACHE(mcbsp, XCCR);
w = ~(tx ? XDISABLE : 0);
@@ -940,7 +938,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
 
/* Reset transmitter */
tx = 1;
-   if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+   if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE2) {
w = MCBSP_READ_CACHE(mcbsp, XCCR);
w |= (tx ? XDISABLE : 0);
MCBSP_WRITE(mcbsp, XCCR, w);
@@ -950,7 +948,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
 
/* Reset receiver */
rx = 1;
-   if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+   if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE2) {
w = MCBSP_READ_CACHE(mcbsp, RCCR);
w |= (rx ? RDISABLE : 0);
MCBSP_WRITE(mcbsp, RCCR, w);
@@ -967,7 +965,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
MCBSP_WRITE(mcbsp, SPCR2, w  ~(1  6));
}
 
-   if (cpu_is_omap34xx())
+   if (mcbsp-mcbsp_config_type == MCBSP_CONFIG_TYPE3)
omap_st_stop(mcbsp);
 }
 EXPORT_SYMBOL(omap_mcbsp_stop);
@@ -1230,7 +1228,7 @@ static void __devexit omap_st_remove(struct omap_mcbsp 
*mcbsp)
 static inline void __devinit omap34xx_device_init(struct omap_mcbsp 

[RFC 08/12] omap: mcbsp: Remove omap device API

[Jarkko Nikula]

struct omap_device *od is only set with find_omap_device_by_dev but not used
otherwise so remove them and references to omap device API.

Signed-off-by: Jarkko Nikula jhnik...@gmail.com
---
 arch/arm/plat-omap/mcbsp.c |   27 ---
 1 files changed, 0 insertions(+), 27 deletions(-)

diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 47720b1..7511287 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -24,7 +24,6 @@
 #include linux/slab.h
 
 #include plat/mcbsp.h
-#include plat/omap_device.h
 #include linux/pm_runtime.h
 
 /* XXX These sideways includes are a sign that something is wrong */
@@ -264,19 +263,9 @@ int omap_mcbsp_dma_reg_params(unsigned int id, unsigned 
int stream)
 EXPORT_SYMBOL(omap_mcbsp_dma_reg_params);
 
 #ifdef CONFIG_ARCH_OMAP3
-static struct omap_device *find_omap_device_by_dev(struct device *dev)
-{
-   struct platform_device *pdev = container_of(dev,
-   struct platform_device, dev);
-   return container_of(pdev, struct omap_device, pdev);
-}
-
 static void omap_st_on(struct omap_mcbsp *mcbsp)
 {
unsigned int w;
-   struct omap_device *od;
-
-   od = find_omap_device_by_dev(mcbsp-dev);
 
/*
 * Sidetone uses McBSP ICLK - which must not idle when sidetones
@@ -298,9 +287,6 @@ static void omap_st_on(struct omap_mcbsp *mcbsp)
 static void omap_st_off(struct omap_mcbsp *mcbsp)
 {
unsigned int w;
-   struct omap_device *od;
-
-   od = find_omap_device_by_dev(mcbsp-dev);
 
w = MCBSP_ST_READ(mcbsp, SSELCR);
MCBSP_ST_WRITE(mcbsp, SSELCR, w  ~(ST_SIDETONEEN));
@@ -316,9 +302,6 @@ static void omap_st_off(struct omap_mcbsp *mcbsp)
 static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir)
 {
u16 val, i;
-   struct omap_device *od;
-
-   od = find_omap_device_by_dev(mcbsp-dev);
 
val = MCBSP_ST_READ(mcbsp, SSELCR);
 
@@ -346,9 +329,6 @@ static void omap_st_chgain(struct omap_mcbsp *mcbsp)
 {
u16 w;
struct omap_mcbsp_st_data *st_data = mcbsp-st_data;
-   struct omap_device *od;
-
-   od = find_omap_device_by_dev(mcbsp-dev);
 
w = MCBSP_ST_READ(mcbsp, SSELCR);
 
@@ -689,9 +669,6 @@ EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode);
 
 static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
 {
-   struct omap_device *od;
-
-   od = find_omap_device_by_dev(mcbsp-dev);
/*
 * Enable wakup behavior, smart idle and all wakeups
 * REVISIT: some wakeups may be unnecessary
@@ -703,10 +680,6 @@ static inline void omap34xx_mcbsp_request(struct 
omap_mcbsp *mcbsp)
 
 static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp)
 {
-   struct omap_device *od;
-
-   od = find_omap_device_by_dev(mcbsp-dev);
-
/*
 * Disable wakup behavior, smart idle and all wakeups
 */
-- 
1.7.0.4

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[RFC 09/12] omap: mcbsp: Move OMAP3+ wakeup enable/disable to omap_mcbsp_request/_free

[Jarkko Nikula]

There are only enable/disable wakeup behavior code left in
omap34xx_mcbsp_request/_free after hwmod conversion so it can be well moved
to generic omap_mcbsp_request/_free.

Remove also old comments about idle mode settings and HW bug workarounds
that were not updated during hwmod conversion.

Signed-off-by: Jarkko Nikula jhnik...@gmail.com
---
 arch/arm/plat-omap/mcbsp.c |   43 +--
 1 files changed, 9 insertions(+), 34 deletions(-)

diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 7511287..202292a 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -667,35 +667,7 @@ int omap_mcbsp_get_dma_op_mode(unsigned int id)
 }
 EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode);
 
-static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
-{
-   /*
-* Enable wakup behavior, smart idle and all wakeups
-* REVISIT: some wakeups may be unnecessary
-*/
-   if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE3) {
-   MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
-   }
-}
-
-static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp)
-{
-   /*
-* Disable wakup behavior, smart idle and all wakeups
-*/
-   if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE3) {
-   /*
-* HW bug workaround - If no_idle mode is taken, we need to
-* go to smart_idle before going to always_idle, or the
-* device will not hit retention anymore.
-*/
-
-   MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
-   }
-}
 #else
-static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) {}
-static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp) {}
 static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
 static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
 #endif
@@ -734,8 +706,9 @@ int omap_mcbsp_request(unsigned int id)
 
pm_runtime_get_sync(mcbsp-dev);
 
-   /* Do procedure specific to omap34xx arch, if applicable */
-   omap34xx_mcbsp_request(mcbsp);
+   /* Enable wakup behavior */
+   if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE3)
+   MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
 
/*
 * Make sure that transmitter, receiver and sample-rate generator are
@@ -772,8 +745,9 @@ err_clk_disable:
if (mcbsp-pdata  mcbsp-pdata-ops  mcbsp-pdata-ops-free)
mcbsp-pdata-ops-free(id);
 
-   /* Do procedure specific to omap34xx arch, if applicable */
-   omap34xx_mcbsp_free(mcbsp);
+   /* Disable wakup behavior */
+   if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE3)
+   MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
 
pm_runtime_put_sync(mcbsp-dev);
 
@@ -802,8 +776,9 @@ void omap_mcbsp_free(unsigned int id)
if (mcbsp-pdata  mcbsp-pdata-ops  mcbsp-pdata-ops-free)
mcbsp-pdata-ops-free(id);
 
-   /* Do procedure specific to omap34xx arch, if applicable */
-   omap34xx_mcbsp_free(mcbsp);
+   /* Disable wakup behavior */
+   if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE3)
+   MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
 
pm_runtime_put_sync(mcbsp-dev);
 
-- 
1.7.0.4

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[RFC 10/12] omap: mcbsp: Move sidetone clock management to mach-omap2/mcbsp.c

[Jarkko Nikula]

Active sidetone requires that McBSP interface clock doesn't idle and there
is no mechanism in hwmod to turn autoidling on/off in runtime. McBSP2 and 3
in OMAP34xx share their interface clock with McBSP sidetone module and
that interface clock must be active when the sidetone is operating.

Sidetone has its own autoidle bit which should keep the interface clock
active but it is broken. Putting the McBSP core to no-idle mode when the
sidetone is active is no good either since it results to higher power
consumption when using the threshold based DMA transfers.

For making the McBSP code more generic, move this sidetone clock management
with fixme comments to mach-omap2/mcbsp.c and pass pointer to it via
platform data.

Signed-off-by: Jarkko Nikula jhnik...@gmail.com
Cc: Paul Wamsley p...@pwsan.com
---
 arch/arm/mach-omap2/mcbsp.c |   26 ++
 arch/arm/plat-omap/include/plat/mcbsp.h |1 +
 arch/arm/plat-omap/mcbsp.c  |   18 --
 3 files changed, 31 insertions(+), 14 deletions(-)

diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 1408156..88ee00f 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -27,6 +27,13 @@
 
 #include control.h
 
+/*
+ * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
+ * Sidetone needs non-gated ICLK and sidetone autoidle is broken.
+ */
+#include cm2xxx_3xxx.h
+#include cm-regbits-34xx.h
+
 /* McBSP internal signal muxing functions */
 
 void omap2_mcbsp1_mux_clkr_src(u8 mux)
@@ -102,6 +109,24 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
 }
 EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
 
+static int omap3_enable_st_clock(unsigned int id, bool enable)
+{
+   unsigned int w;
+
+   /*
+* Sidetone uses McBSP ICLK - which must not idle when sidetones
+* are enabled or sidetones start sounding ugly.
+*/
+   w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
+   if (enable)
+   w = ~(1  (id - 2));
+   else
+   w |= 1  (id - 2);
+   omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
+
+   return 0;
+}
+
 struct omap_device_pm_latency omap2_mcbsp_latency[] = {
{
.deactivate_func = omap_device_idle_hwmods,
@@ -149,6 +174,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void 
*unused)
if (oh-dev_attr) {
oh_device[1] = omap_hwmod_lookup((
(struct omap_mcbsp_dev_attr *)(oh-dev_attr))-sidetone);
+   pdata-enable_st_clock = omap3_enable_st_clock;
count++;
}
od = omap_device_build_ss(name, id, oh_device, count, pdata,
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h 
b/arch/arm/plat-omap/include/plat/mcbsp.h
index 31b24c9..2a7e8d5 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -317,6 +317,7 @@ struct omap_mcbsp_platform_data {
 #ifdef CONFIG_ARCH_OMAP3
/* Sidetone block for McBSP 2 and 3 */
unsigned long phys_base_st;
+   int (*enable_st_clock)(unsigned int, bool);
 #endif
u16 buffer_size;
unsigned int mcbsp_config_type;
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 202292a..1a7cfb3 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -26,10 +26,6 @@
 #include plat/mcbsp.h
 #include linux/pm_runtime.h
 
-/* XXX These sideways includes are a sign that something is wrong */
-#include ../mach-omap2/cm2xxx_3xxx.h
-#include ../mach-omap2/cm-regbits-34xx.h
-
 struct omap_mcbsp **mcbsp_ptr;
 int omap_mcbsp_count, omap_mcbsp_cache_size;
 
@@ -267,13 +263,8 @@ static void omap_st_on(struct omap_mcbsp *mcbsp)
 {
unsigned int w;
 
-   /*
-* Sidetone uses McBSP ICLK - which must not idle when sidetones
-* are enabled or sidetones start sounding ugly.
-*/
-   w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
-   w = ~(1  (mcbsp-id - 2));
-   omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
+   if (mcbsp-pdata-enable_st_clock)
+   mcbsp-pdata-enable_st_clock(mcbsp-id, 1);
 
/* Enable McBSP Sidetone */
w = MCBSP_READ(mcbsp, SSELCR);
@@ -294,9 +285,8 @@ static void omap_st_off(struct omap_mcbsp *mcbsp)
w = MCBSP_READ(mcbsp, SSELCR);
MCBSP_WRITE(mcbsp, SSELCR, w  ~(SIDETONEEN));
 
-   w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
-   w |= 1  (mcbsp-id - 2);
-   omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
+   if (mcbsp-pdata-enable_st_clock)
+   mcbsp-pdata-enable_st_clock(mcbsp-id, 0);
 }
 
 static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir)
-- 
1.7.0.4

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[RFC 11/12] omap: mcbsp: Remove conditional compilation for OMAP3

[Jarkko Nikula]

Although this increases the build size a little for !OMAP3 builds it makes
the code one step more generic. For instance the threshold based DMA
transfers seems to be possible with OMAP4 too from quick look of the TRM.

Signed-off-by: Jarkko Nikula jhnik...@gmail.com
---
 arch/arm/plat-omap/include/plat/mcbsp.h |   35 --
 arch/arm/plat-omap/mcbsp.c  |   13 ---
 2 files changed, 5 insertions(+), 43 deletions(-)

diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h 
b/arch/arm/plat-omap/include/plat/mcbsp.h
index 2a7e8d5..720461c 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -26,9 +26,6 @@
 
 #include linux/spinlock.h
 
-#include mach/hardware.h
-#include plat/clock.h
-
 /* macro for building platform_device for McBSP ports */
 #define OMAP_MCBSP_PLATFORM_DEVICE(port_nr)\
 static struct platform_device omap_mcbsp##port_nr = {  \
@@ -314,11 +311,11 @@ struct omap_mcbsp_platform_data {
u8 dma_rx_sync, dma_tx_sync;
u16 rx_irq, tx_irq;
struct omap_mcbsp_ops *ops;
-#ifdef CONFIG_ARCH_OMAP3
+
/* Sidetone block for McBSP 2 and 3 */
unsigned long phys_base_st;
int (*enable_st_clock)(unsigned int, bool);
-#endif
+
u16 buffer_size;
unsigned int mcbsp_config_type;
u8 reg_size;
@@ -354,12 +351,12 @@ struct omap_mcbsp {
spinlock_t lock;
struct omap_mcbsp_platform_data *pdata;
struct clk *fclk;
-#ifdef CONFIG_ARCH_OMAP3
+
struct omap_mcbsp_st_data *st_data;
int dma_op_mode;
u16 max_tx_thres;
u16 max_rx_thres;
-#endif
+
void *reg_cache;
unsigned int mcbsp_config_type;
 };
@@ -380,7 +377,6 @@ extern int omap_mcbsp_count, omap_mcbsp_cache_size;
 
 int omap_mcbsp_init(void);
 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * 
config);
-#ifdef CONFIG_ARCH_OMAP3
 void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold);
 void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold);
 u16 omap_mcbsp_get_max_tx_threshold(unsigned int id);
@@ -389,18 +385,7 @@ u16 omap_mcbsp_get_fifo_size(unsigned int id);
 u16 omap_mcbsp_get_tx_delay(unsigned int id);
 u16 omap_mcbsp_get_rx_delay(unsigned int id);
 int omap_mcbsp_get_dma_op_mode(unsigned int id);
-#else
-static inline void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
-{ }
-static inline void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
-{ }
-static inline u16 omap_mcbsp_get_max_tx_threshold(unsigned int id) { return 0; 
}
-static inline u16 omap_mcbsp_get_max_rx_threshold(unsigned int id) { return 0; 
}
-static inline u16 omap_mcbsp_get_fifo_size(unsigned int id) { return 0; }
-static inline u16 omap_mcbsp_get_tx_delay(unsigned int id) { return 0; }
-static inline u16 omap_mcbsp_get_rx_delay(unsigned int id) { return 0; }
-static inline int omap_mcbsp_get_dma_op_mode(unsigned int id) { return 0; }
-#endif
+
 int omap_mcbsp_request(unsigned int id);
 void omap_mcbsp_free(unsigned int id);
 void omap_mcbsp_start(unsigned int id, int tx, int rx);
@@ -416,21 +401,11 @@ void omap2_mcbsp1_mux_fsr_src(u8 mux);
 int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream);
 int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream);
 
-#ifdef CONFIG_ARCH_OMAP3
 /* Sidetone specific API */
 int omap_st_set_chgain(unsigned int id, int channel, s16 chgain);
 int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain);
 int omap_st_enable(unsigned int id);
 int omap_st_disable(unsigned int id);
 int omap_st_is_enabled(unsigned int id);
-#else
-static inline int omap_st_set_chgain(unsigned int id, int channel,
-s16 chgain) { return 0; }
-static inline int omap_st_get_chgain(unsigned int id, int channel,
-s16 *chgain) { return 0; }
-static inline int omap_st_enable(unsigned int id) { return 0; }
-static inline int omap_st_disable(unsigned int id) { return 0; }
-static inline int omap_st_is_enabled(unsigned int id) {  return 0; }
-#endif
 
 #endif
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 1a7cfb3..d565b36 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -63,7 +63,6 @@ static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, 
bool from_cache)
}
 }
 
-#ifdef CONFIG_ARCH_OMAP3
 static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
 {
__raw_writel(val, mcbsp-st_data-io_base_st + reg);
@@ -73,7 +72,6 @@ static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 
reg)
 {
return __raw_readl(mcbsp-st_data-io_base_st + reg);
 }
-#endif
 
 #define MCBSP_READ(mcbsp, reg) \
omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 0)
@@ -258,7 +256,6 @@ int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int 
stream)
 }
 EXPORT_SYMBOL(omap_mcbsp_dma_reg_params);
 
-#ifdef 

[RFC 12/12] omap: mcbsp: Reorganize DMA operating mode and sidetone init/exit code

[Jarkko Nikula]

Reorganize DMA operating mode and sidetone initialization/ext code so that
they are not tied together and can be extended over OMAP3.

Currently DMA operating mode control is added only on OMAP3 but can be
extended in the future. Sidetone initialization is alredy platform
independed based on if the sidetone resource is registered for a device.

Signed-off-by: Jarkko Nikula jhnik...@gmail.com
---
 arch/arm/plat-omap/mcbsp.c |  116 
 1 files changed, 52 insertions(+), 64 deletions(-)

diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index d565b36..dd6a19e 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -1086,16 +1086,6 @@ static const struct attribute_group 
additional_attr_group = {
.attrs = (struct attribute **)additional_attrs,
 };
 
-static inline int __devinit omap_additional_add(struct device *dev)
-{
-   return sysfs_create_group(dev-kobj, additional_attr_group);
-}
-
-static inline void __devexit omap_additional_remove(struct device *dev)
-{
-   sysfs_remove_group(dev-kobj, additional_attr_group);
-}
-
 static const struct attribute *sidetone_attrs[] = {
dev_attr_st_taps.attr,
NULL,
@@ -1105,10 +1095,9 @@ static const struct attribute_group sidetone_attr_group 
= {
.attrs = (struct attribute **)sidetone_attrs,
 };
 
-static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
+static int __devinit omap_mcbsp_st_add(struct omap_mcbsp *mcbsp,
+  struct resource *res)
 {
-   struct platform_device *pdev;
-   struct resource *res;
struct omap_mcbsp_st_data *st_data;
int err;
 
@@ -1118,9 +1107,6 @@ static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
goto err1;
}
 
-   pdev = container_of(mcbsp-dev, struct platform_device, dev);
-
-   res = platform_get_resource_byname(pdev, IORESOURCE_MEM, sidetone);
st_data-io_base_st = ioremap(res-start, resource_size(res));
if (!st_data-io_base_st) {
err = -ENOMEM;
@@ -1140,61 +1126,42 @@ err2:
kfree(st_data);
 err1:
return err;
-
 }
 
-static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp)
+static void __devexit omap_mcbsp_st_free(struct omap_mcbsp *mcbsp)
 {
struct omap_mcbsp_st_data *st_data = mcbsp-st_data;
 
-   if (st_data) {
-   sysfs_remove_group(mcbsp-dev-kobj, sidetone_attr_group);
-   iounmap(st_data-io_base_st);
-   kfree(st_data);
-   }
+   sysfs_remove_group(mcbsp-dev-kobj, sidetone_attr_group);
+   iounmap(st_data-io_base_st);
+   kfree(st_data);
 }
 
-static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp)
+static inline int __devinit omap_mcbsp_dmactrl_add(struct omap_mcbsp *mcbsp)
 {
-   mcbsp-dma_op_mode = MCBSP_DMA_MODE_ELEMENT;
-   if (mcbsp-mcbsp_config_type == MCBSP_CONFIG_TYPE3) {
-   /*
-* Initially configure the maximum thresholds to a safe value.
-* The McBSP FIFO usage with these values should not go under
-* 16 locations.
-* If the whole FIFO without safety buffer is used, than there
-* is a possibility that the DMA will be not able to push the
-* new data on time, causing channel shifts in runtime.
-*/
-   mcbsp-max_tx_thres = max_thres(mcbsp) - 0x10;
-   mcbsp-max_rx_thres = max_thres(mcbsp) - 0x10;
-   /*
-* REVISIT: Set dmap_op_mode to THRESHOLD as default
-* for mcbsp2 instances.
-*/
-   if (omap_additional_add(mcbsp-dev))
-   dev_warn(mcbsp-dev,
-   Unable to create additional controls\n);
-
-   if (mcbsp-id == 2 || mcbsp-id == 3)
-   if (omap_st_add(mcbsp))
-   dev_warn(mcbsp-dev,
-Unable to create sidetone controls\n);
+   int err;
 
-   } else {
-   mcbsp-max_tx_thres = -EINVAL;
-   mcbsp-max_rx_thres = -EINVAL;
-   }
+   /*
+* Initially configure the maximum thresholds to a safe value.
+* The McBSP FIFO usage with these values should not go under
+* 16 locations.
+* If the whole FIFO without safety buffer is used, than there
+* is a possibility that the DMA will be not able to push the
+* new data on time, causing channel shifts in runtime.
+*/
+   mcbsp-max_tx_thres = max_thres(mcbsp) - 0x10;
+   mcbsp-max_rx_thres = max_thres(mcbsp) - 0x10;
+
+   err = sysfs_create_group(mcbsp-dev-kobj, additional_attr_group);
+   if (err)
+   dev_warn(mcbsp-dev, Unable to create additional controls\n);
+
+   return err;
 }
 
-static inline void __devexit omap34xx_device_exit(struct omap_mcbsp 

Re: [PATCH 0/8] HDMI: Split hdmi.c to seperate HDMI IP dependant code from DSS.

[K, Mythri P]

Hi Tomi,

On Fri, Jul 1, 2011 at 2:21 PM, Tomi Valkeinen tomi.valkei...@ti.com wrote:
 On Thu, 2011-06-30 at 23:16 +0530, K, Mythri P wrote:
 Hi Tomi,

 On Wed, Jun 29, 2011 at 9:51 PM, Tomi Valkeinen tomi.valkei...@ti.com 
 wrote:
  Hi,
 
  On Wed, 2011-06-29 at 19:08 +0530, K, Mythri P wrote:
  Hi Tomi,
 
  As the HDMI PLL , PHY and video blocks are logical blocks it would
  make sense to have the API's for all and the DSS HDMI (interface
  driver - user driver) would make a call to configure this in a
  particular sequence to enable HDMI , in case you the call to be
  generic across OMAPS in future then we should i either have a funtion
  in hdmi.c which will do this sequence and will be  aware of underlying
  IP , Which doesnt appear to be the solution you prefer but then there
  would be a need to have an intermediate file which would take the
  common API call(function pointer) and then arbitrate between different
  IP's based on the make , Is that what you are suggesting ?
 
  I agree that they are separate blocks, and at some level they need to be
  separate with own functions for each. But I don't see why the user needs
  to know about it.
 
  For example, consider OMAP DSI. DSI has protocol, PLL and PHY blocks,
  and the driver has functions to initialize them, use them etc. But the
  user of DSI, in this case panel drivers, do not need to know about it,
  and the API exported to the panel drivers does not contain any functions
  related to PLL or PHY. The panel drivers just enable the DSI driver and
  use it.
 
  So I'm still asking: what benefit does it give to the user that the API
  has functions to handle the blocks separately? There has to be a reason
  for the functions in the API.
 
 It doesnt give any additional benefit but flexibility to change the
 blocks (PHY / PLL) indivudally to use a different one.

 Right. But this API is not the right place to implement that
 flexibility. If there's no benefit for the user of the API to know about
 the details of the HW, it's better hidden. The user just wants to use
 the functionality, not know what lies below.

   And it just occurred to me that perhaps our views of the API are a bit
   different, and that's why we have differing opinions. I see this API as
   something that could be used by OMAP DSS (and equivalent components on
   other SoCs) to use the HDMI HW on OMAP4 and any future OMAPs. And
   perhaps you see this API more as an API to use the current HDMI HW in
   the OMAP4.
 
  Tomi , Yes my Idea of this API is for OMAP and Netra series only , I
  am unable to envision a common HDMI API library , in that case it
  would make more sense to have an intermediate file and have function
  pointer , which would take common API calls like hdmi_enable ,
  hdmi_avi_confg etc and then arbitrate based on the build. Please let
  me know if you have anything else in mind.
 
  I didn't mean a generic HDMI API either. I meant a TI HDMI API,
  currently for OMAP and Netra. But my comments would be valid even if the
  API would be only OMAP DSS internal.
 
 Neither the HDMI DSS driver should be concerned about these PHY/PLL
 internal API's nor should the configuration be done in the  IP driver
 as the IP driver shpuld only provide functionality and should be
 flexible enough as across OMAP4 and netra itself there is a

 What configuration are you referring to? I don't think the user of the
 API (i.e. omapdss) should do any configuration that requires knowledge
 of the underlying HDMI HW.

 possibility of the PHY block being different , so  Now the only
 solution i see is to have a intermediate file , whose job is to
 provide common API function and based on the CPU switch would be aware
 of the IP inside and make appropriate call to IP driver , Does this
 sound like a good approach ?

 I don't see a need for a separate file right now. We have the
 hdmi_ti_4xxx_ip.c file which contains code for the HDMI block as a
 whole, and could well contain the code that implements the API.

if the hdmi_ti_4xxx_ip.c  is handling the configuration then how are
we going to handle a scenario where netra uses a different PHY block ,
you suggest to have a #if in the programming sequence within
hdmi_ti_4xxx_ip.c function ?
Also in future OMAP's when are using the PHY and PLL block from
hdmi_ti_4xxx_ip.c , but a different core/video block from
hdmi_ti_5xxx_ip.c then how  would hdmi_ti_5xxx_ip.c hdmi_enable be
able to call the PHY and PLL configuration functions  from
hdmi_ti_4xxx_ip.c ??

  Tomi






-- 
Thanks and regards,
Mythri.
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Re: [RFC 10/12] omap: mcbsp: Move sidetone clock management to mach-omap2/mcbsp.c

[Paul Walmsley]

+ Benoît

Hello Jarkko

On Fri, 1 Jul 2011, Jarkko Nikula wrote:

 Active sidetone requires that McBSP interface clock doesn't idle and there
 is no mechanism in hwmod to turn autoidling on/off in runtime. McBSP2 and 3
 in OMAP34xx share their interface clock with McBSP sidetone module and
 that interface clock must be active when the sidetone is operating.
 
 Sidetone has its own autoidle bit which should keep the interface clock
 active but it is broken. Putting the McBSP core to no-idle mode when the
 sidetone is active is no good either since it results to higher power
 consumption when using the threshold based DMA transfers.

In the hwmod code/data, we've got the OCPIF_SWSUP_IDLE flag that can be 
set on a struct omap_hwmod_ocp_if.  I think this is probably what's needed 
here.  The only problem is that we haven't linked that to the clock code 
to deny idle on the interface clock yet (see omap_hwmod.c:_setup()).  
Adding that code in, plus adding that OCPIF_SWSUP_IDLE flag to the 
McBSP2/3 data, seems like the right approach here.

I guess we also will need some basic usecounting for denying idle in the 
clock code.

Otherwise these direct register manipulations of clock registers, outside 
the clock code, could turn into a mess :-(

At least it makes sense to move those out of the driver and into the 
arch/arm/*omap* code...


- Paul

Re: [RFC 10/12] omap: mcbsp: Move sidetone clock management to mach-omap2/mcbsp.c

[Cousson, Benoit]

On 7/1/2011 11:23 AM, Paul Walmsley wrote:

+ Benoît

Hello Jarkko

On Fri, 1 Jul 2011, Jarkko Nikula wrote:


Active sidetone requires that McBSP interface clock doesn't idle and there
is no mechanism in hwmod to turn autoidling on/off in runtime. McBSP2 and 3
in OMAP34xx share their interface clock with McBSP sidetone module and
that interface clock must be active when the sidetone is operating.

Sidetone has its own autoidle bit which should keep the interface clock
active but it is broken. Putting the McBSP core to no-idle mode when the
sidetone is active is no good either since it results to higher power
consumption when using the threshold based DMA transfers.


In the hwmod code/data, we've got the OCPIF_SWSUP_IDLE flag that can be
set on a struct omap_hwmod_ocp_if.  I think this is probably what's needed
here.  The only problem is that we haven't linked that to the clock code
to deny idle on the interface clock yet (see omap_hwmod.c:_setup()).
Adding that code in, plus adding that OCPIF_SWSUP_IDLE flag to the
McBSP2/3 data, seems like the right approach here.

I guess we also will need some basic usecounting for denying idle in the
clock code.

Otherwise these direct register manipulations of clock registers, outside
the clock code, could turn into a mess :-(


AFAIR Kishon did submit some patches to expose this feature to the 
driver through omap_device API. The point is that other broken IP like 
SDMA of USB will require such feature.


Didn't we pull them?

Benoit

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Re: [RFC 10/12] omap: mcbsp: Move sidetone clock management to mach-omap2/mcbsp.c

[Paul Walmsley]

cc'ing Kishon 

On Fri, 1 Jul 2011, Cousson, Benoit wrote:

 On 7/1/2011 11:23 AM, Paul Walmsley wrote:
  On Fri, 1 Jul 2011, Jarkko Nikula wrote:
  
   Active sidetone requires that McBSP interface clock doesn't idle and there
   is no mechanism in hwmod to turn autoidling on/off in runtime. McBSP2 and
   3
   in OMAP34xx share their interface clock with McBSP sidetone module and
   that interface clock must be active when the sidetone is operating.
   
   Sidetone has its own autoidle bit which should keep the interface clock
   active but it is broken. Putting the McBSP core to no-idle mode when the
   sidetone is active is no good either since it results to higher power
   consumption when using the threshold based DMA transfers.
  
  In the hwmod code/data, we've got the OCPIF_SWSUP_IDLE flag that can be
  set on a struct omap_hwmod_ocp_if.  I think this is probably what's needed
  here.  The only problem is that we haven't linked that to the clock code
  to deny idle on the interface clock yet (see omap_hwmod.c:_setup()).
  Adding that code in, plus adding that OCPIF_SWSUP_IDLE flag to the
  McBSP2/3 data, seems like the right approach here.
  
  I guess we also will need some basic usecounting for denying idle in the
  clock code.
  
  Otherwise these direct register manipulations of clock registers, outside
  the clock code, could turn into a mess :-(
 
 AFAIR Kishon did submit some patches to expose this feature to the driver
 through omap_device API. The point is that other broken IP like SDMA of USB
 will require such feature.
 
 Didn't we pull them?

You sent him some comments on March 1 but it looks like the series never 
got updated and reposted, at least not that I can find in my mail 
archive.  Kishon?

Anyway, those patches won't help in this case if the sidetone AUTOIDLE bit 
is broken - looks like the interface clock autoidle bit is what needs to 
change.


- Paul
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Re: [PATCH v2 03/13] OMAP4: hwmod: Replace CLKCTRL absolute address with offset macros

[Paul Walmsley]

Hi

On Mon, 27 Jun 2011, Benoit Cousson wrote:

 The CLKCTRL register was accessed using an absolute address.
 The usage of hardcoded macros to calculate virtual address from physical
 one should be avoided as much as possible.
 The usage of a offset will allow future improvement like migration from
 the current architecture code toward a module driver.

one minor comment below:

 
 Update cm_xxx accessor, move definition to the proper header file and
 update copyrights.
 
 Signed-off-by: Benoit Cousson b-cous...@ti.com
 Cc: Paul Walmsley p...@pwsan.com
 Cc: Rajendra Nayak rna...@ti.com
 ---
  arch/arm/mach-omap2/cm44xx.h |3 +-
  arch/arm/mach-omap2/cminst44xx.c |   23 +++-
  arch/arm/mach-omap2/cminst44xx.h |4 +-
  arch/arm/mach-omap2/omap_hwmod.c |   10 +-
  arch/arm/mach-omap2/omap_hwmod_44xx_data.c   |  182 -
  arch/arm/plat-omap/include/plat/omap_hwmod.h |2 +-
  6 files changed, 145 insertions(+), 79 deletions(-)
 
 diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h
 index 0b87ec8..cdda756 100644
 --- a/arch/arm/mach-omap2/cm44xx.h
 +++ b/arch/arm/mach-omap2/cm44xx.h
 @@ -1,7 +1,7 @@
  /*
   * OMAP4 Clock Management (CM) definitions
   *
 - * Copyright (C) 2007-2009 Texas Instruments, Inc.
 + * Copyright (C) 2007-2011 Texas Instruments, Inc.
   * Copyright (C) 2007-2009 Nokia Corporation
   *
   * Written by Paul Walmsley
 @@ -26,7 +26,6 @@
  /* Function prototypes */
  # ifndef __ASSEMBLER__
  
 -extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg);
  
  # endif
  #endif
 diff --git a/arch/arm/mach-omap2/cminst44xx.c 
 b/arch/arm/mach-omap2/cminst44xx.c
 index a482bfa..1df740e 100644
 --- a/arch/arm/mach-omap2/cminst44xx.c
 +++ b/arch/arm/mach-omap2/cminst44xx.c
 @@ -2,6 +2,7 @@
   * OMAP4 CM instance functions
   *
   * Copyright (C) 2009 Nokia Corporation
 + * Copyright (C) 2011 Texas Instruments, Inc.
   * Paul Walmsley
   *
   * This program is free software; you can redistribute it and/or modify
 @@ -199,9 +200,20 @@ void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, 
 u16 cdoffs)
   *
   */
  
 +static u32 _clkctrl_idlest(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs)

Maybe call this _read_clkctrl_idlest() to identify what it's doing?


- Paul
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[PATCH v3 00/20] GPIO: OMAP: driver cleanup and fixes

[Tarun Kanti DebBarma]

This series is continuation of cleanup of OMAP GPIO driver and fixes.
The cleanup include getting rid of cpu_is_* checks wherever possible,
use of gpio_bank list instead of static array, use of unique platform
specific value associated data member to OMAP platforms to avoid
cpu_is_* checks. The series also include PM runtime support.

Baseline: 
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git
Branch: wip/gpio-cleanup

Test Details:
- Compile tested for omap1_defconfig and omap2plus_defconfig.
- OMAP1710-H3: Bootup test.
- OMAP2430-SDP, OMAP3430-SDP, OMAP4430-SDP: Functional testing. 
- PM Testing on OMAP3430-SDP: retention, off_mode, system_wide
  suspend and gpio wakeup.

Following patch is required for testing retention and off-mode:
https://patchwork.kernel.org/patch/834372/
OMAP: PM: omap_device: fix device power domain callbacks

v3:
- Avoid use of wkup_set and wkup_clear registers. Instead use wkup_status
  register for all platforms. This is because on OMAP4 it is recommended
  not to use them.

- Remove duplicate code in omap_gpio_mod_init() for handling the same for
  32-bit and 16-bit GPIO bank widths. This is accomplished by having two
  functions to handle each case while assiging a common function pointer
  during initialization.
  
- Remove OMAP16xx specific one time initialization from omap_gpio_mod_init().
  Move it inside omap16xx_gpio_init().

- Avoid usage of USHRT_MAX to indicate undefined values. Use 0 instead.

- In omap_gpio_suspend()/resume() functions remove code that checks
  if the feature is supported. Instead, assign these functions to
  struct platform_driver's suspend  resume function pointers for those
  OMAP platforms whcih support this feature.

- Remove 'suspend_support' flag because it is redundant. Instead use
  wkup_* registers to decode the same information.

- Restore context also when we don't know if the context is lost.

- Make omap_gpio_save_context() and omap_gpio_restore_context()
  static.

v2:
- Do special handling of non-wakeup GPIOs only on OMAP2420. Avoid this
  handling on OMAP3430.
- Isolate cleanups and fixes into separate set of patches. Keep the cleanup
  first followed by the fixes.
- Avoid calling omap_gpio_get_context_loss() directly and instead call it
  through function pointer in pdata initialized during init.
- workaround_enabled flag is not longer needed and is removed.
- Call pwrdm_post_transition() before calling omap_gpio_resume_after_idle().
- In omap2_gpio_resume_after_idle() do context restore before handling
  workaround.
- Use PM runtime framework.
- Modify register offset names to : wkup_status, wkup_clear, wkup_set.
  Also use 'base + offset' for readibility in all relevant places.
- Remove unwanted messages from commit section like TODO, etc.


Charulatha V (15):
  GPIO: OMAP: Remove dependency on gpio_bank_count
  GPIO: OMAP2+: Use flag to identify wakeup domain
  GPIO: OMAP: Make gpio_context part of gpio_bank structure
  GPIO: OMAP: Fix pwrdm_post_transition call sequence
  GPIO: OMAP: Handle save/restore ctx in GPIO driver
  GPIO: OMAP2+: Make non-wakeup GPIO part of pdata
  GPIO: OMAP: Avoid cpu checks during module ena/disable
  GPIO: OMAP: Use wkup regs off/suspend support flag
  GPIO: OMAP: Use level/edge detect reg offsets
  GPIO: OMAP: Clean set_gpio_triggering function
  GPIO: OMAP15xx: Use pinctrl offset instead of macro
  GPIO: OMAP: Use readl in irq_handler for all access
  GPIO: OMAP: Remove bank-method  METHOD_* macros
  GPIO: OMAP: Fix bankwidth for OMAP7xx MPUIO
  GPIO: OMAP: Use PM runtime framework

Tarun Kanti DebBarma (5):
  GPIO: OMAP: Remove hardcoded offsets in ctxt save/restore
  GPIO: OMAP: Use wkup_status for all SoCs
  GPIO: OMAP: Clean omap_gpio_mod_init function
  GPIO: OMAP: optimize suspend and resume functions
  GPIO: OMAP2+: Clean prepare_for_idle and resume_after_idle

 arch/arm/mach-omap1/gpio15xx.c |7 +-
 arch/arm/mach-omap1/gpio16xx.c |   31 +-
 arch/arm/mach-omap1/gpio7xx.c  |   14 +-
 arch/arm/mach-omap2/gpio.c |   47 ++-
 arch/arm/mach-omap2/pm34xx.c   |   21 +-
 arch/arm/plat-omap/include/plat/gpio.h |   31 +-
 drivers/gpio/gpio-omap.c   | 1070 +---
 7 files changed, 533 insertions(+), 688 deletions(-)

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[PATCH v3 01/20] GPIO: OMAP: Remove dependency on gpio_bank_count

[Tarun Kanti DebBarma]

From: Charulatha V ch...@ti.com

The gpio_bank_count is the count of number of GPIO devices in a SoC. Remove this
dependency from the driver by using list. Also remove the dependency on array of
pointers to gpio_bank struct of all GPIO devices.

Signed-off-by: Charulatha V ch...@ti.com
---
 arch/arm/mach-omap1/gpio15xx.c |1 -
 arch/arm/mach-omap1/gpio16xx.c |2 -
 arch/arm/mach-omap1/gpio7xx.c  |2 -
 arch/arm/mach-omap2/gpio.c |1 -
 arch/arm/plat-omap/include/plat/gpio.h |3 -
 drivers/gpio/gpio-omap.c   |  163 
 6 files changed, 80 insertions(+), 92 deletions(-)

diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index f79c6ae..e8a3bd9 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -115,7 +115,6 @@ static int __init omap15xx_gpio_init(void)
platform_device_register(omap15xx_mpu_gpio);
platform_device_register(omap15xx_gpio);
 
-   gpio_bank_count = 2;
return 0;
 }
 postcore_initcall(omap15xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index c69b3b1..9a97e60 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -221,8 +221,6 @@ static int __init omap16xx_gpio_init(void)
for (i = 0; i  ARRAY_SIZE(omap16xx_gpio_dev); i++)
platform_device_register(omap16xx_gpio_dev[i]);
 
-   gpio_bank_count = ARRAY_SIZE(omap16xx_gpio_dev);
-
return 0;
 }
 postcore_initcall(omap16xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index d7f2ad3..f5d5572 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -282,8 +282,6 @@ static int __init omap7xx_gpio_init(void)
for (i = 0; i  ARRAY_SIZE(omap7xx_gpio_dev); i++)
platform_device_register(omap7xx_gpio_dev[i]);
 
-   gpio_bank_count = ARRAY_SIZE(omap7xx_gpio_dev);
-
return 0;
 }
 postcore_initcall(omap7xx_gpio_init);
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 9a46d77..f805cda 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -119,7 +119,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void 
*unused)
return PTR_ERR(od);
}
 
-   gpio_bank_count++;
return 0;
 }
 
diff --git a/arch/arm/plat-omap/include/plat/gpio.h 
b/arch/arm/plat-omap/include/plat/gpio.h
index 91e8de3..dd330ed 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -202,9 +202,6 @@ struct omap_gpio_platform_data {
struct omap_gpio_reg_offs *regs;
 };
 
-/* TODO: Analyze removing gpio_bank_count usage from driver code */
-extern int gpio_bank_count;
-
 extern void omap2_gpio_prepare_for_idle(int off_mode);
 extern void omap2_gpio_resume_after_idle(void);
 extern void omap_set_gpio_debounce(int gpio, int enable);
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 501ca3d..28b70eb 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -28,7 +28,10 @@
 #include mach/gpio.h
 #include asm/mach/irq.h
 
+static LIST_HEAD(omap_gpio_list);
+
 struct gpio_bank {
+   struct list_head node;
unsigned long pbase;
void __iomem *base;
u16 irq;
@@ -55,6 +58,7 @@ struct gpio_bank {
bool dbck_flag;
int stride;
u32 width;
+   u16 id;
 
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
 
@@ -78,15 +82,6 @@ struct omap3_gpio_regs {
 static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
 #endif
 
-/*
- * TODO: Cleanup gpio_bank usage as it is having information
- * related to all instances of the device
- */
-static struct gpio_bank *gpio_bank;
-
-/* TODO: Analyze removing gpio_bank_count usage from driver code */
-int gpio_bank_count;
-
 #define GPIO_INDEX(bank, gpio) (gpio % bank-width)
 #define GPIO_BIT(bank, gpio) (1  GPIO_INDEX(bank, gpio))
 
@@ -864,9 +859,8 @@ static struct platform_device omap_mpuio_device = {
/* could list the /proc/iomem resources */
 };
 
-static inline void mpuio_init(void)
+static inline void mpuio_init(struct gpio_bank *bank)
 {
-   struct gpio_bank *bank = gpio_bank[0];
platform_set_drvdata(omap_mpuio_device, bank);
 
if (platform_driver_register(omap_mpuio_driver) == 0)
@@ -874,13 +868,13 @@ static inline void mpuio_init(void)
 }
 
 #else
-static inline void mpuio_init(void) {}
+static inline void mpuio_init(struct gpio_bank *bank) {}
 #endif /* 16xx */
 
 #else
 
 #define bank_is_mpuio(bank)0
-static inline void mpuio_init(void) {}
+static inline void mpuio_init(struct gpio_bank *bank) {}
 
 #endif
 
@@ -1002,20 +996,8 @@ static void __init omap_gpio_show_rev(struct gpio_bank 
*bank)
  */
 static struct lock_class_key gpio_lock_class;
 
-static inline int init_gpio_info(struct platform_device *pdev)

[PATCH v3 02/20] GPIO: OMAP2+: Use flag to identify wakeup domain

[Tarun Kanti DebBarma]

From: Charulatha V ch...@ti.com

In omap3, save/restore context is implemented for GPIO banks 2-6 as GPIO bank1
is in wakeup domain. Instead of identifying bank's power domain by bank id,
use 'loses_context' flag which is filled by pwrdm_can_ever_lose_context()
during dev_init.

For getting the powerdomain pointer, omap_hwmod_get_pwrdm() is used.
omap_device_get_pwrdm() could not be used as the pwrdm information needs to be
filled in pdata, whereas omap_device_get_pwrdm() could be used only after
omap_device_build() call.

Signed-off-by: Charulatha V ch...@ti.com
---
 arch/arm/mach-omap2/gpio.c |6 ++
 arch/arm/plat-omap/include/plat/gpio.h |1 +
 drivers/gpio/gpio-omap.c   |   13 ++---
 3 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index f805cda..95195a8 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -24,6 +24,8 @@
 #include plat/omap_hwmod.h
 #include plat/omap_device.h
 
+#include powerdomain.h
+
 static struct omap_device_pm_latency omap_gpio_latency[] = {
[0] = {
.deactivate_func = omap_device_idle_hwmods,
@@ -39,6 +41,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void 
*unused)
struct omap_gpio_dev_attr *dev_attr;
char *name = omap_gpio;
int id;
+   struct powerdomain *pwrdm;
 
/*
 * extract the device id from name field available in the
@@ -107,6 +110,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void 
*unused)
return -EINVAL;
}
 
+   pwrdm = omap_hwmod_get_pwrdm(oh);
+   pdata-loses_context = pwrdm_can_ever_lose_context(pwrdm);
+
od = omap_device_build(name, id - 1, oh, pdata,
sizeof(*pdata), omap_gpio_latency,
ARRAY_SIZE(omap_gpio_latency),
diff --git a/arch/arm/plat-omap/include/plat/gpio.h 
b/arch/arm/plat-omap/include/plat/gpio.h
index dd330ed..58d0bf2 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -198,6 +198,7 @@ struct omap_gpio_platform_data {
int bank_width; /* GPIO bank width */
int bank_stride;/* Only needed for omap1 MPUIO */
bool dbck_flag; /* dbck required or not - True for OMAP34 */
+   bool loses_context; /* whether the bank would ever lose context */
 
struct omap_gpio_reg_offs *regs;
 };
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 28b70eb..460bcb9 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -56,6 +56,7 @@ struct gpio_bank {
u32 dbck_enable_mask;
struct device *dev;
bool dbck_flag;
+   bool loses_context;
int stride;
u32 width;
u16 id;
@@ -1171,7 +1172,7 @@ static int __devinit omap_gpio_probe(struct 
platform_device *pdev)
bank-dbck_flag = pdata-dbck_flag;
bank-stride = pdata-bank_stride;
bank-width = pdata-bank_width;
-
+   bank-loses_context = pdata-loses_context;
bank-regs = pdata-regs;
 
if (bank-regs-set_dataout  bank-regs-clr_dataout)
@@ -1327,8 +1328,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
u32 l1 = 0, l2 = 0;
int j;
 
-   /* TODO: Do not use cpu_is_omap34xx */
-   if ((cpu_is_omap34xx())  (bank-id == 0))
+   if (!bank-loses_context)
continue;
 
for (j = 0; j  hweight_long(bank-dbck_enable_mask); j++)
@@ -1395,8 +1395,7 @@ void omap2_gpio_resume_after_idle(void)
u32 l = 0, gen, gen0, gen1;
int j;
 
-   /* TODO: Do not use cpu_is_omap34xx */
-   if ((cpu_is_omap34xx())  (bank-id == 0))
+   if (!bank-loses_context)
continue;
 
for (j = 0; j  hweight_long(bank-dbck_enable_mask); j++)
@@ -1495,7 +1494,7 @@ void omap_gpio_save_context(void)
list_for_each_entry(bank, omap_gpio_list, node) {
i++;
 
-   if (bank-id == 0)
+   if (!bank-loses_context)
continue;
 
gpio_context[i].irqenable1 =
@@ -1529,7 +1528,7 @@ void omap_gpio_restore_context(void)
list_for_each_entry(bank, omap_gpio_list, node) {
i++;
 
-   if (bank-id == 0)
+   if (!bank-loses_context)
continue;
 
__raw_writel(gpio_context[i].irqenable1,
-- 
1.6.0.4

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[PATCH v3 03/20] GPIO: OMAP: Make gpio_context part of gpio_bank structure

[Tarun Kanti DebBarma]

From: Charulatha V ch...@ti.com

Currently gpio_context array used to save gpio bank's context, is used only for
OMAP3 architecture. Move gpio_context as part of gpio_bank structure so that it
can be specific to each gpio bank and can be used for any OMAP architecture

Signed-off-by: Charulatha V ch...@ti.com
---
 drivers/gpio/gpio-omap.c |   76 -
 1 files changed, 34 insertions(+), 42 deletions(-)

diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 460bcb9..c01863c 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -30,6 +30,19 @@
 
 static LIST_HEAD(omap_gpio_list);
 
+struct gpio_regs {
+   u32 irqenable1;
+   u32 irqenable2;
+   u32 wake_en;
+   u32 ctrl;
+   u32 oe;
+   u32 leveldetect0;
+   u32 leveldetect1;
+   u32 risingdetect;
+   u32 fallingdetect;
+   u32 dataout;
+};
+
 struct gpio_bank {
struct list_head node;
unsigned long pbase;
@@ -43,7 +56,7 @@ struct gpio_bank {
 #endif
u32 non_wakeup_gpios;
u32 enabled_non_wakeup_gpios;
-
+   struct gpio_regs context;
u32 saved_datain;
u32 saved_fallingdetect;
u32 saved_risingdetect;
@@ -66,23 +79,6 @@ struct gpio_bank {
struct omap_gpio_reg_offs *regs;
 };
 
-#ifdef CONFIG_ARCH_OMAP3
-struct omap3_gpio_regs {
-   u32 irqenable1;
-   u32 irqenable2;
-   u32 wake_en;
-   u32 ctrl;
-   u32 oe;
-   u32 leveldetect0;
-   u32 leveldetect1;
-   u32 risingdetect;
-   u32 fallingdetect;
-   u32 dataout;
-};
-
-static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
-#endif
-
 #define GPIO_INDEX(bank, gpio) (gpio % bank-width)
 #define GPIO_BIT(bank, gpio) (1  GPIO_INDEX(bank, gpio))
 
@@ -1489,33 +1485,31 @@ void omap2_gpio_resume_after_idle(void)
 void omap_gpio_save_context(void)
 {
struct gpio_bank *bank;
-   int i = 0;
 
list_for_each_entry(bank, omap_gpio_list, node) {
-   i++;
 
if (!bank-loses_context)
continue;
 
-   gpio_context[i].irqenable1 =
+   bank-context.irqenable1 =
__raw_readl(bank-base + OMAP24XX_GPIO_IRQENABLE1);
-   gpio_context[i].irqenable2 =
+   bank-context.irqenable2 =
__raw_readl(bank-base + OMAP24XX_GPIO_IRQENABLE2);
-   gpio_context[i].wake_en =
+   bank-context.wake_en =
__raw_readl(bank-base + OMAP24XX_GPIO_WAKE_EN);
-   gpio_context[i].ctrl =
+   bank-context.ctrl =
__raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
-   gpio_context[i].oe =
+   bank-context.oe =
__raw_readl(bank-base + OMAP24XX_GPIO_OE);
-   gpio_context[i].leveldetect0 =
+   bank-context.leveldetect0 =
__raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT0);
-   gpio_context[i].leveldetect1 =
+   bank-context.leveldetect1 =
__raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT1);
-   gpio_context[i].risingdetect =
+   bank-context.risingdetect =
__raw_readl(bank-base + OMAP24XX_GPIO_RISINGDETECT);
-   gpio_context[i].fallingdetect =
+   bank-context.fallingdetect =
__raw_readl(bank-base + OMAP24XX_GPIO_FALLINGDETECT);
-   gpio_context[i].dataout =
+   bank-context.dataout =
__raw_readl(bank-base + OMAP24XX_GPIO_DATAOUT);
}
 }
@@ -1523,33 +1517,31 @@ void omap_gpio_save_context(void)
 void omap_gpio_restore_context(void)
 {
struct gpio_bank *bank;
-   int i = 0;
 
list_for_each_entry(bank, omap_gpio_list, node) {
-   i++;
 
if (!bank-loses_context)
continue;
 
-   __raw_writel(gpio_context[i].irqenable1,
+   __raw_writel(bank-context.irqenable1,
bank-base + OMAP24XX_GPIO_IRQENABLE1);
-   __raw_writel(gpio_context[i].irqenable2,
+   __raw_writel(bank-context.irqenable2,
bank-base + OMAP24XX_GPIO_IRQENABLE2);
-   __raw_writel(gpio_context[i].wake_en,
+   __raw_writel(bank-context.wake_en,
bank-base + OMAP24XX_GPIO_WAKE_EN);
-   __raw_writel(gpio_context[i].ctrl,
+   __raw_writel(bank-context.ctrl,
bank-base + OMAP24XX_GPIO_CTRL);
-   __raw_writel(gpio_context[i].oe,
+   __raw_writel(bank-context.oe,
bank-base + OMAP24XX_GPIO_OE);
-   __raw_writel(gpio_context[i].leveldetect0,
+   __raw_writel(bank-context.leveldetect0,
   

[PATCH v3 04/20] GPIO: OMAP: Fix pwrdm_post_transition call sequence

[Tarun Kanti DebBarma]

From: Charulatha V ch...@ti.com

The context lost count is modified in omap_sram_idle() path when
pwrdm_post_transition() is called. But pwrdm_post_transition() is called
only after omap_gpio_resume_after_idle() is called. Correct this so that
context lost count is modified before calling omap_gpio_resume_after_idle().

This would be useful when OMAP GPIO save/restore context is called by
the OMAP GPIO driver itself.

Signed-off-by: Charulatha V ch...@ti.com
---
 arch/arm/mach-omap2/pm34xx.c |7 ---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index c155c9d..51d5a5c 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -375,7 +375,6 @@ void omap_sram_idle(void)
printk(KERN_ERR Invalid mpu state in sram_idle\n);
return;
}
-   pwrdm_pre_transition();
 
/* NEON control */
if (pwrdm_read_pwrst(neon_pwrdm) == PWRDM_POWER_ON)
@@ -398,6 +397,8 @@ void omap_sram_idle(void)
if (!console_trylock())
goto console_still_active;
 
+   pwrdm_pre_transition();
+
/* PER */
if (per_next_state  PWRDM_POWER_ON) {
per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
@@ -467,6 +468,8 @@ void omap_sram_idle(void)
}
omap3_intc_resume_idle();
 
+   pwrdm_post_transition();
+
/* PER */
if (per_next_state  PWRDM_POWER_ON) {
per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
@@ -490,8 +493,6 @@ console_still_active:
omap3_disable_io_chain();
}
 
-   pwrdm_post_transition();
-
clkdm_allow_idle(mpu_pwrdm-pwrdm_clkdms[0]);
 }
 
-- 
1.6.0.4

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[PATCH v3 05/20] GPIO: OMAP: Handle save/restore ctx in GPIO driver

[Tarun Kanti DebBarma]

From: Charulatha V ch...@ti.com

Modify omap_gpio_prepare_for_idle()  omap_gpio_resume_after_idle() functions
to handle save context  restore context respectively in the OMAP GPIO driver
itself instead of calling these functions from pm specific files.
For this, in gpio_prepare_for_idle(), call *_get_context_loss_count() and in
gpio_resume_after_idle() call it again. If the count is different, do restore
context. The workaround_enabled flag is no more required and is removed.

Signed-off-by: Charulatha V ch...@ti.com
---
 arch/arm/mach-omap2/gpio.c |   12 +++
 arch/arm/mach-omap2/pm34xx.c   |   14 
 arch/arm/plat-omap/include/plat/gpio.h |5 +-
 drivers/gpio/gpio-omap.c   |  131 ++--
 4 files changed, 73 insertions(+), 89 deletions(-)

diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 95195a8..2e65377 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -23,6 +23,7 @@
 
 #include plat/omap_hwmod.h
 #include plat/omap_device.h
+#include plat/omap-pm.h
 
 #include powerdomain.h
 
@@ -34,6 +35,16 @@ static struct omap_device_pm_latency omap_gpio_latency[] = {
},
 };
 
+#ifdef CONFIG_PM
+static int omap_gpio_get_context_loss(struct device *dev)
+{
+   return omap_pm_get_dev_context_loss_count(dev);
+}
+
+#else
+#define omap_gpio_get_context_loss NULL
+#endif
+
 static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
 {
struct omap_device *od;
@@ -63,6 +74,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void 
*unused)
pdata-bank_width = dev_attr-bank_width;
pdata-dbck_flag = dev_attr-dbck_flag;
pdata-virtual_irq_start = IH_GPIO_BASE + 32 * (id - 1);
+   pdata-get_context_loss_count = omap_gpio_get_context_loss;
 
pdata-regs = kzalloc(sizeof(struct omap_gpio_reg_offs), GFP_KERNEL);
if (!pdata) {
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 51d5a5c..0aaa32c 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -91,16 +91,6 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
 static struct powerdomain *core_pwrdm, *per_pwrdm;
 static struct powerdomain *cam_pwrdm;
 
-static inline void omap3_per_save_context(void)
-{
-   omap_gpio_save_context();
-}
-
-static inline void omap3_per_restore_context(void)
-{
-   omap_gpio_restore_context();
-}
-
 static void omap3_enable_io_chain(void)
 {
int timeout = 0;
@@ -405,8 +395,6 @@ void omap_sram_idle(void)
omap_uart_prepare_idle(2);
omap_uart_prepare_idle(3);
omap2_gpio_prepare_for_idle(per_going_off);
-   if (per_next_state == PWRDM_POWER_OFF)
-   omap3_per_save_context();
}
 
/* CORE */
@@ -474,8 +462,6 @@ void omap_sram_idle(void)
if (per_next_state  PWRDM_POWER_ON) {
per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
omap2_gpio_resume_after_idle();
-   if (per_prev_state == PWRDM_POWER_OFF)
-   omap3_per_restore_context();
omap_uart_resume_idle(2);
omap_uart_resume_idle(3);
}
diff --git a/arch/arm/plat-omap/include/plat/gpio.h 
b/arch/arm/plat-omap/include/plat/gpio.h
index 58d0bf2..f7798b5 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -201,14 +201,15 @@ struct omap_gpio_platform_data {
bool loses_context; /* whether the bank would ever lose context */
 
struct omap_gpio_reg_offs *regs;
+
+   /* Return context loss count due to PM states changing */
+   int (*get_context_loss_count)(struct device *dev);
 };
 
 extern void omap2_gpio_prepare_for_idle(int off_mode);
 extern void omap2_gpio_resume_after_idle(void);
 extern void omap_set_gpio_debounce(int gpio, int enable);
 extern void omap_set_gpio_debounce_time(int gpio, int enable);
-extern void omap_gpio_save_context(void);
-extern void omap_gpio_restore_context(void);
 /*-*/
 
 /* Wrappers for new style GPIO calls, using the new infrastructure
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index c01863c..9a6bf8e 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -72,9 +72,11 @@ struct gpio_bank {
bool loses_context;
int stride;
u32 width;
+   u32 ctx_loss_count;
u16 id;
 
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
+   int (*get_context_loss_count)(struct device *dev);
 
struct omap_gpio_reg_offs *regs;
 };
@@ -1169,6 +1171,7 @@ static int __devinit omap_gpio_probe(struct 
platform_device *pdev)
bank-stride = pdata-bank_stride;
bank-width = pdata-bank_width;
bank-loses_context = pdata-loses_context;
+   bank-get_context_loss_count = 

[PATCH v3 06/20] GPIO: OMAP2+: Make non-wakeup GPIO part of pdata

[Tarun Kanti DebBarma]

From: Charulatha V ch...@ti.com

Non-wakeup GPIOs are available only in OMAP2. Avoid cpu_is checks by making
non_wakeup_gpios as part of pdata.

Signed-off-by: Charulatha V ch...@ti.com
---
 arch/arm/mach-omap2/gpio.c |8 
 arch/arm/plat-omap/include/plat/gpio.h |1 +
 drivers/gpio/gpio-omap.c   |8 +---
 3 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 2e65377..4952a9d 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -84,6 +84,14 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void 
*unused)
 
switch (oh-class-rev) {
case 0:
+   if (id == 1)
+   /* non-wakeup GPIO pins for OMAP2 Bank1 */
+   pdata-non_wakeup_gpios = 0xe203ffc0;
+   else if (id == 2)
+   /* non-wakeup GPIO pins for OMAP2 Bank2 */
+   pdata-non_wakeup_gpios = 0x08700040;
+   /* fall through */
+
case 1:
pdata-bank_type = METHOD_GPIO_24XX;
pdata-regs-revision = OMAP24XX_GPIO_REVISION;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h 
b/arch/arm/plat-omap/include/plat/gpio.h
index f7798b5..ce417cd 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -199,6 +199,7 @@ struct omap_gpio_platform_data {
int bank_stride;/* Only needed for omap1 MPUIO */
bool dbck_flag; /* dbck required or not - True for OMAP34 */
bool loses_context; /* whether the bank would ever lose context */
+   u32 non_wakeup_gpios;
 
struct omap_gpio_reg_offs *regs;
 
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 9a6bf8e..76553f8 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1016,13 +1016,6 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)
 
/* Initialize interface clk ungated, module enabled */
__raw_writel(0, bank-base + OMAP24XX_GPIO_CTRL);
-   } else if (cpu_is_omap24xx()) {
-   static const u32 non_wakeup_gpios[] = {
-   0xe203ffc0, 0x08700040
-   };
-   if (bank-id  ARRAY_SIZE(non_wakeup_gpios))
-   bank-non_wakeup_gpios =
-   non_wakeup_gpios[bank-id];
}
} else if (cpu_class_is_omap1()) {
if (bank_is_mpuio(bank)) {
@@ -1170,6 +1163,7 @@ static int __devinit omap_gpio_probe(struct 
platform_device *pdev)
bank-dbck_flag = pdata-dbck_flag;
bank-stride = pdata-bank_stride;
bank-width = pdata-bank_width;
+   bank-non_wakeup_gpios = pdata-non_wakeup_gpios;
bank-loses_context = pdata-loses_context;
bank-get_context_loss_count = pdata-get_context_loss_count;
bank-regs = pdata-regs;
-- 
1.6.0.4

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[PATCH v3 08/20] GPIO: OMAP: Use wkup regs off/suspend support flag

[Tarun Kanti DebBarma]

From: Charulatha V ch...@ti.com

Wakeup register offsets are initialized according to OMAP versions
during device registration. These explicit checks are no longer needed.

mpuio_init() function is defined under #ifdefs. It is required only in case
of MPUIO bank type and only when PM operations are supported by it.
This is applicable only in case of OMAP16xx SoC's MPUIO GPIO bank type.
For all the other cases it is a dummy function. Hence clean up the same
and remove all the OMAP SoC specific #ifdefs.

bank_is_mpuio() is defined as a check to identify if the bank type is MPUIO.
It is not required to define it separately as zero for OMAP2plus. Remove this.

Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Charulatha V ch...@ti.com
---
 arch/arm/mach-omap1/gpio16xx.c |3 +
 arch/arm/mach-omap2/gpio.c |6 ++
 arch/arm/plat-omap/include/plat/gpio.h |3 +
 drivers/gpio/gpio-omap.c   |  120 +---
 4 files changed, 31 insertions(+), 101 deletions(-)

diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 9a97e60..d81c1e5 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -89,6 +89,9 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.irqenable  = OMAP1610_GPIO_IRQENABLE1,
.set_irqenable  = OMAP1610_GPIO_SET_IRQENABLE1,
.clr_irqenable  = OMAP1610_GPIO_CLEAR_IRQENABLE1,
+   .wkup_status= OMAP1610_GPIO_WAKEUPENABLE,
+   .wkup_clear = OMAP1610_GPIO_CLEAR_WAKEUPENA,
+   .wkup_set   = OMAP1610_GPIO_SET_WAKEUPENA,
 };
 
 static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index cdbc728..9387496 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -108,6 +108,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void 
*unused)
pdata-regs-debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
pdata-regs-debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
pdata-regs-ctrl = OMAP24XX_GPIO_CTRL;
+   pdata-regs-wkup_status = OMAP24XX_GPIO_WAKE_EN;
+   pdata-regs-wkup_clear = OMAP24XX_GPIO_CLEARWKUENA;
+   pdata-regs-wkup_set = OMAP24XX_GPIO_SETWKUENA;
break;
case 2:
pdata-bank_type = METHOD_GPIO_44XX;
@@ -125,6 +128,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void 
*unused)
pdata-regs-debounce = OMAP4_GPIO_DEBOUNCINGTIME;
pdata-regs-debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
pdata-regs-ctrl = OMAP4_GPIO_CTRL;
+   pdata-regs-wkup_status = OMAP4_GPIO_IRQWAKEN0;
+   pdata-regs-wkup_clear = OMAP4_GPIO_IRQWAKEN0;
+   pdata-regs-wkup_set = OMAP4_GPIO_IRQWAKEN0;
break;
default:
WARN(1, Invalid gpio bank_type\n);
diff --git a/arch/arm/plat-omap/include/plat/gpio.h 
b/arch/arm/plat-omap/include/plat/gpio.h
index cf41743..d941d92 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -189,6 +189,9 @@ struct omap_gpio_reg_offs {
u16 debounce;
u16 debounce_en;
u16 ctrl;
+   u16 wkup_status;
+   u16 wkup_clear;
+   u16 wkup_set;
 
bool irqenable_inv;
 };
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 621c4f0..abb85df 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -50,10 +50,8 @@ struct gpio_bank {
u16 irq;
u16 virtual_irq_start;
int method;
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
u32 suspend_wakeup;
u32 saved_wakeup;
-#endif
u32 non_wakeup_gpios;
u32 enabled_non_wakeup_gpios;
struct gpio_regs context;
@@ -596,27 +594,11 @@ static void omap_gpio_free(struct gpio_chip *chip, 
unsigned offset)
unsigned long flags;
 
spin_lock_irqsave(bank-lock, flags);
-#ifdef CONFIG_ARCH_OMAP16XX
-   if (bank-method == METHOD_GPIO_1610) {
-   /* Disable wake-up during idle for dynamic tick */
-   void __iomem *reg = bank-base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
-   __raw_writel(1  offset, reg);
-   }
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-   if (bank-method == METHOD_GPIO_24XX) {
-   /* Disable wake-up during idle for dynamic tick */
-   void __iomem *reg = bank-base + OMAP24XX_GPIO_CLEARWKUENA;
-   __raw_writel(1  offset, reg);
-   }
-#endif
-#ifdef CONFIG_ARCH_OMAP4
-   if (bank-method == METHOD_GPIO_44XX) {
+
+   if (bank-regs-wkup_clear)
/* Disable wake-up during idle for dynamic tick */
-   void __iomem *reg = bank-base + OMAP4_GPIO_IRQWAKEN0;
-   __raw_writel(1  offset, reg);
-   }
-#endif
+ 

[PATCH v3 09/20] GPIO: OMAP: Use level/edge detect reg offsets

[Tarun Kanti DebBarma]

From: Charulatha V ch...@ti.com

By adding level and edge detection register offsets and then initializing them
correctly according to OMAP versions during device registrations we can now 
remove
lot of revision checks in these functions.

Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Charulatha V ch...@ti.com
---
 arch/arm/mach-omap2/gpio.c |8 ++
 arch/arm/plat-omap/include/plat/gpio.h |4 +
 drivers/gpio/gpio-omap.c   |  118 ++--
 3 files changed, 48 insertions(+), 82 deletions(-)

diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 9387496..0c7e403 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -111,6 +111,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void 
*unused)
pdata-regs-wkup_status = OMAP24XX_GPIO_WAKE_EN;
pdata-regs-wkup_clear = OMAP24XX_GPIO_CLEARWKUENA;
pdata-regs-wkup_set = OMAP24XX_GPIO_SETWKUENA;
+   pdata-regs-leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0;
+   pdata-regs-leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1;
+   pdata-regs-risingdetect = OMAP24XX_GPIO_RISINGDETECT;
+   pdata-regs-fallingdetect = OMAP24XX_GPIO_FALLINGDETECT;
break;
case 2:
pdata-bank_type = METHOD_GPIO_44XX;
@@ -131,6 +135,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void 
*unused)
pdata-regs-wkup_status = OMAP4_GPIO_IRQWAKEN0;
pdata-regs-wkup_clear = OMAP4_GPIO_IRQWAKEN0;
pdata-regs-wkup_set = OMAP4_GPIO_IRQWAKEN0;
+   pdata-regs-leveldetect0 = OMAP4_GPIO_LEVELDETECT0;
+   pdata-regs-leveldetect1 = OMAP4_GPIO_LEVELDETECT1;
+   pdata-regs-risingdetect = OMAP4_GPIO_RISINGDETECT;
+   pdata-regs-fallingdetect = OMAP4_GPIO_FALLINGDETECT;
break;
default:
WARN(1, Invalid gpio bank_type\n);
diff --git a/arch/arm/plat-omap/include/plat/gpio.h 
b/arch/arm/plat-omap/include/plat/gpio.h
index d941d92..a843669 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -192,6 +192,10 @@ struct omap_gpio_reg_offs {
u16 wkup_status;
u16 wkup_clear;
u16 wkup_set;
+   u16 leveldetect0;
+   u16 leveldetect1;
+   u16 risingdetect;
+   u16 fallingdetect;
 
bool irqenable_inv;
 };
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index abb85df..66c837f 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -252,15 +252,9 @@ static inline void set_24xx_gpio_triggering(struct 
gpio_bank *bank, int gpio,
bank-enabled_non_wakeup_gpios = ~gpio_bit;
}
 
-   if (cpu_is_omap44xx()) {
-   bank-level_mask =
-   __raw_readl(bank-base + OMAP4_GPIO_LEVELDETECT0) |
-   __raw_readl(bank-base + OMAP4_GPIO_LEVELDETECT1);
-   } else {
-   bank-level_mask =
-   __raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT0) |
-   __raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT1);
-   }
+   bank-level_mask =
+   __raw_readl(bank-base + bank-regs-leveldetect0) |
+   __raw_readl(bank-base + bank-regs-leveldetect1);
 }
 #endif
 
@@ -400,12 +394,12 @@ static int gpio_irq_type(struct irq_data *d, unsigned 
type)
if (type  ~IRQ_TYPE_SENSE_MASK)
return -EINVAL;
 
-   /* OMAP1 allows only only edge triggering */
-   if (!cpu_class_is_omap2()
-(type  (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
+   bank = irq_data_get_irq_chip_data(d);
+
+   if (bank-regs-leveldetect0  (type 
+   (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
return -EINVAL;
 
-   bank = irq_data_get_irq_chip_data(d);
spin_lock_irqsave(bank-lock, flags);
retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type);
spin_unlock_irqrestore(bank-lock, flags);
@@ -652,9 +646,8 @@ static void gpio_irq_handler(unsigned int irq, struct 
irq_desc *desc)
if (cpu_is_omap15xx()  (bank-method == METHOD_MPUIO))
isr = 0x;
 
-   if (cpu_class_is_omap2()) {
+   if (bank-level_mask)
level_mask = bank-level_mask  enabled;
-   }
 
/* clear edge sensitive interrupts before handler(s) are
called so that we don't miss any interrupt occurred while
@@ -1247,40 +1240,18 @@ void omap2_gpio_prepare_for_idle(int off_mode)
if (!(bank-enabled_non_wakeup_gpios))
goto save_gpio_ctx;
 
-   if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
-   bank-saved_datain = __raw_readl(bank-base +
- 

[PATCH v3 07/20] GPIO: OMAP: Avoid cpu checks during module ena/disable

[Tarun Kanti DebBarma]

From: Charulatha V ch...@ti.com

Remove cpu-is checks while enabling/disabling OMAP GPIO module during a gpio
request/free.

Signed-off-by: Charulatha V ch...@ti.com
---
 arch/arm/mach-omap2/gpio.c |2 +
 arch/arm/plat-omap/include/plat/gpio.h |1 +
 drivers/gpio/gpio-omap.c   |   53 ++--
 3 files changed, 26 insertions(+), 30 deletions(-)

diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 4952a9d..cdbc728 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -107,6 +107,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void 
*unused)
pdata-regs-clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
pdata-regs-debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
pdata-regs-debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
+   pdata-regs-ctrl = OMAP24XX_GPIO_CTRL;
break;
case 2:
pdata-bank_type = METHOD_GPIO_44XX;
@@ -123,6 +124,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void 
*unused)
pdata-regs-clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
pdata-regs-debounce = OMAP4_GPIO_DEBOUNCINGTIME;
pdata-regs-debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
+   pdata-regs-ctrl = OMAP4_GPIO_CTRL;
break;
default:
WARN(1, Invalid gpio bank_type\n);
diff --git a/arch/arm/plat-omap/include/plat/gpio.h 
b/arch/arm/plat-omap/include/plat/gpio.h
index ce417cd..cf41743 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -188,6 +188,7 @@ struct omap_gpio_reg_offs {
u16 clr_irqenable;
u16 debounce;
u16 debounce_en;
+   u16 ctrl;
 
bool irqenable_inv;
 };
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 76553f8..621c4f0 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -83,6 +83,7 @@ struct gpio_bank {
 
 #define GPIO_INDEX(bank, gpio) (gpio % bank-width)
 #define GPIO_BIT(bank, gpio) (1  GPIO_INDEX(bank, gpio))
+#define GPIO_MOD_CTRL_BIT  BIT(0)
 
 static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
 {
@@ -572,22 +573,18 @@ static int omap_gpio_request(struct gpio_chip *chip, 
unsigned offset)
__raw_writel(__raw_readl(reg) | (1  offset), reg);
}
 #endif
-   if (!cpu_class_is_omap1()) {
-   if (!bank-mod_usage) {
-   void __iomem *reg = bank-base;
-   u32 ctrl;
-
-   if (cpu_is_omap24xx() || cpu_is_omap34xx())
-   reg += OMAP24XX_GPIO_CTRL;
-   else if (cpu_is_omap44xx())
-   reg += OMAP4_GPIO_CTRL;
-   ctrl = __raw_readl(reg);
-   /* Module is enabled, clocks are not gated */
-   ctrl = 0xFFFE;
-   __raw_writel(ctrl, reg);
-   }
-   bank-mod_usage |= 1  offset;
+   if (bank-regs-ctrl  !bank-mod_usage) {
+   void __iomem *reg = bank-base + bank-regs-ctrl;
+   u32 ctrl;
+
+   ctrl = __raw_readl(reg);
+   /* Module is enabled, clocks are not gated */
+   ctrl = ~GPIO_MOD_CTRL_BIT;
+   __raw_writel(ctrl, reg);
}
+
+   bank-mod_usage |= 1  offset;
+
spin_unlock_irqrestore(bank-lock, flags);
 
return 0;
@@ -620,22 +617,18 @@ static void omap_gpio_free(struct gpio_chip *chip, 
unsigned offset)
__raw_writel(1  offset, reg);
}
 #endif
-   if (!cpu_class_is_omap1()) {
-   bank-mod_usage = ~(1  offset);
-   if (!bank-mod_usage) {
-   void __iomem *reg = bank-base;
-   u32 ctrl;
-
-   if (cpu_is_omap24xx() || cpu_is_omap34xx())
-   reg += OMAP24XX_GPIO_CTRL;
-   else if (cpu_is_omap44xx())
-   reg += OMAP4_GPIO_CTRL;
-   ctrl = __raw_readl(reg);
-   /* Module is disabled, clocks are gated */
-   ctrl |= 1;
-   __raw_writel(ctrl, reg);
-   }
+   bank-mod_usage = ~(1  offset);
+
+   if (bank-regs-ctrl  !bank-mod_usage) {
+   void __iomem *reg = bank-base + bank-regs-ctrl;
+   u32 ctrl;
+
+   ctrl = __raw_readl(reg);
+   /* Module is disabled, clocks are gated */
+   ctrl |= GPIO_MOD_CTRL_BIT;
+   __raw_writel(ctrl, reg);
}
+
_reset_gpio(bank, bank-chip.base + offset);
spin_unlock_irqrestore(bank-lock, flags);
 }
-- 
1.6.0.4

--
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the body of a message to 

[PATCH v3 10/20] GPIO: OMAP: Remove hardcoded offsets in ctxt save/restore

[Tarun Kanti DebBarma]

It is not required to use hard-coded offsets any more in context save and
restore functions and instead use the generic offsets which have been correctly
initialized during device registration.

Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Charulatha V ch...@ti.com
---
 arch/arm/mach-omap2/gpio.c |2 +
 arch/arm/plat-omap/include/plat/gpio.h |1 +
 drivers/gpio/gpio-omap.c   |   42 +++
 3 files changed, 23 insertions(+), 22 deletions(-)

diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 0c7e403..54c8328 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -103,6 +103,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void 
*unused)
pdata-regs-irqstatus = OMAP24XX_GPIO_IRQSTATUS1;
pdata-regs-irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2;
pdata-regs-irqenable = OMAP24XX_GPIO_IRQENABLE1;
+   pdata-regs-irqenable2 = OMAP24XX_GPIO_IRQENABLE2;
pdata-regs-set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1;
pdata-regs-clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
pdata-regs-debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
@@ -127,6 +128,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void 
*unused)
pdata-regs-irqstatus = OMAP4_GPIO_IRQSTATUS0;
pdata-regs-irqstatus2 = OMAP4_GPIO_IRQSTATUS1;
pdata-regs-irqenable = OMAP4_GPIO_IRQSTATUSSET0;
+   pdata-regs-irqenable2 = OMAP4_GPIO_IRQSTATUSSET1;
pdata-regs-set_irqenable = OMAP4_GPIO_IRQSTATUSSET0;
pdata-regs-clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
pdata-regs-debounce = OMAP4_GPIO_DEBOUNCINGTIME;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h 
b/arch/arm/plat-omap/include/plat/gpio.h
index a843669..1cf13a2 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -184,6 +184,7 @@ struct omap_gpio_reg_offs {
u16 irqstatus;
u16 irqstatus2;
u16 irqenable;
+   u16 irqenable2;
u16 set_irqenable;
u16 clr_irqenable;
u16 debounce;
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 66c837f..2339c29 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1349,45 +1349,43 @@ void omap2_gpio_resume_after_idle(void)
 static void omap_gpio_save_context(struct gpio_bank *bank)
 {
bank-context.irqenable1 =
-   __raw_readl(bank-base + OMAP24XX_GPIO_IRQENABLE1);
+   __raw_readl(bank-base + bank-regs-irqenable);
bank-context.irqenable2 =
-   __raw_readl(bank-base + OMAP24XX_GPIO_IRQENABLE2);
+   __raw_readl(bank-base + bank-regs-irqenable2);
bank-context.wake_en =
-   __raw_readl(bank-base + OMAP24XX_GPIO_WAKE_EN);
-   bank-context.ctrl = __raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
-   bank-context.oe = __raw_readl(bank-base + OMAP24XX_GPIO_OE);
+   __raw_readl(bank-base + bank-regs-wkup_status);
+   bank-context.ctrl = __raw_readl(bank-base + bank-regs-ctrl);
+   bank-context.oe = __raw_readl(bank-base + bank-regs-direction);
bank-context.leveldetect0 =
-   __raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT0);
+   __raw_readl(bank-base + bank-regs-leveldetect0);
bank-context.leveldetect1 =
-   __raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT1);
+   __raw_readl(bank-base + bank-regs-leveldetect1);
bank-context.risingdetect =
-   __raw_readl(bank-base + OMAP24XX_GPIO_RISINGDETECT);
+   __raw_readl(bank-base + bank-regs-risingdetect);
bank-context.fallingdetect =
-   __raw_readl(bank-base + OMAP24XX_GPIO_FALLINGDETECT);
-   bank-context.dataout =
-   __raw_readl(bank-base + OMAP24XX_GPIO_DATAOUT);
+   __raw_readl(bank-base + bank-regs-fallingdetect);
+   bank-context.dataout = __raw_readl(bank-base + bank-regs-dataout);
 }
 
 static void omap_gpio_restore_context(struct gpio_bank *bank)
 {
__raw_writel(bank-context.irqenable1,
-   bank-base + OMAP24XX_GPIO_IRQENABLE1);
+   bank-base + bank-regs-irqenable);
__raw_writel(bank-context.irqenable2,
-   bank-base + OMAP24XX_GPIO_IRQENABLE2);
+   bank-base + bank-regs-irqenable2);
__raw_writel(bank-context.wake_en,
-   bank-base + OMAP24XX_GPIO_WAKE_EN);
-   __raw_writel(bank-context.ctrl, bank-base + OMAP24XX_GPIO_CTRL);
-   __raw_writel(bank-context.oe, bank-base + OMAP24XX_GPIO_OE);
+   bank-base + bank-regs-wkup_status);
+   __raw_writel(bank-context.ctrl, bank-base + bank-regs-ctrl);

[PATCH v3 11/20] GPIO: OMAP: Clean set_gpio_triggering function

[Tarun Kanti DebBarma]

From: Charulatha V ch...@ti.com

Getting rid of ifdefs within the function by adding register offset intctrl
and associating OMAP_GPIO_INT_CONTROL in respective SoC specific files.

Signed-off-by: Charulatha V ch...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
---
 arch/arm/mach-omap1/gpio15xx.c |2 +
 arch/arm/mach-omap1/gpio16xx.c |3 +
 arch/arm/mach-omap1/gpio7xx.c  |2 +
 arch/arm/mach-omap2/gpio.c |4 +
 arch/arm/plat-omap/include/plat/gpio.h |3 +
 drivers/gpio/gpio-omap.c   |  144 
 6 files changed, 50 insertions(+), 108 deletions(-)

diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index e8a3bd9..fd2fe8f 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -42,6 +42,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
.irqstatus  = OMAP_MPUIO_GPIO_INT,
.irqenable  = OMAP_MPUIO_GPIO_MASKIT,
.irqenable_inv  = true,
+   .irqctrl= OMAP_MPUIO_GPIO_INT_EDGE,
 };
 
 static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
@@ -83,6 +84,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
.irqstatus  = OMAP1510_GPIO_INT_STATUS,
.irqenable  = OMAP1510_GPIO_INT_MASK,
.irqenable_inv  = true,
+   .irqctrl= OMAP1510_GPIO_INT_CONTROL,
 };
 
 static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index d81c1e5..abde9e9 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -45,6 +45,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
.irqstatus  = OMAP_MPUIO_GPIO_INT,
.irqenable  = OMAP_MPUIO_GPIO_MASKIT,
.irqenable_inv  = true,
+   .irqctrl= OMAP_MPUIO_GPIO_INT_EDGE,
 };
 
 static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
@@ -92,6 +93,8 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.wkup_status= OMAP1610_GPIO_WAKEUPENABLE,
.wkup_clear = OMAP1610_GPIO_CLEAR_WAKEUPENA,
.wkup_set   = OMAP1610_GPIO_SET_WAKEUPENA,
+   .edgectrl1  = OMAP1610_GPIO_EDGE_CTRL1,
+   .edgectrl2  = OMAP1610_GPIO_EDGE_CTRL2,
 };
 
 static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index f5d5572..6e439ff 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -47,6 +47,7 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
.irqstatus  = OMAP_MPUIO_GPIO_INT / 2,
.irqenable  = OMAP_MPUIO_GPIO_MASKIT / 2,
.irqenable_inv  = true,
+   .irqctrl= OMAP_MPUIO_GPIO_INT_EDGE / 2,
 };
 
 static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
@@ -88,6 +89,7 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
.irqstatus  = OMAP7XX_GPIO_INT_STATUS,
.irqenable  = OMAP7XX_GPIO_INT_MASK,
.irqenable_inv  = true,
+   .irqctrl= OMAP7XX_GPIO_INT_CONTROL,
 };
 
 static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 54c8328..be5a906 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -82,6 +82,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void 
*unused)
return -ENOMEM;
}
 
+   pdata-regs-irqctrl = 0;
+   pdata-regs-edgectrl1 = 0;
+   pdata-regs-edgectrl2 = 0;
+
switch (oh-class-rev) {
case 0:
if (id == 1)
diff --git a/arch/arm/plat-omap/include/plat/gpio.h 
b/arch/arm/plat-omap/include/plat/gpio.h
index 1cf13a2..6dcbe7d 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -197,6 +197,9 @@ struct omap_gpio_reg_offs {
u16 leveldetect1;
u16 risingdetect;
u16 fallingdetect;
+   u16 irqctrl;
+   u16 edgectrl1;
+   u16 edgectrl2;
 
bool irqenable_inv;
 };
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 2339c29..42f0411 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -195,49 +195,24 @@ static void _set_gpio_debounce(struct gpio_bank *bank, 
unsigned gpio,
__raw_writel(val, reg);
 }
 
-#ifdef CONFIG_ARCH_OMAP2PLUS
-static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
+static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
int trigger)
 {
void __iomem *base = bank-base;
u32 gpio_bit = 1  gpio;
 
-   if (cpu_is_omap44xx()) {
-   MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
+   

[PATCH v3 12/20] GPIO: OMAP: Use wkup_status for all SoCs

[Tarun Kanti DebBarma]

On OMAP4 we are not allowed to access wakeup_set/clear registers.
So instead of having additional check and separate logics for
manipulating the status register use wakup_status regisre consistently
for all SoCs wherever applicable. Use the MOD_REG_BIT macro to read,
modify and write the status register.

Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
---
 arch/arm/mach-omap1/gpio16xx.c |2 -
 arch/arm/mach-omap2/gpio.c |4 ---
 arch/arm/plat-omap/include/plat/gpio.h |2 -
 drivers/gpio/gpio-omap.c   |   35 +++-
 4 files changed, 12 insertions(+), 31 deletions(-)

diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index abde9e9..08dda3c 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -91,8 +91,6 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.set_irqenable  = OMAP1610_GPIO_SET_IRQENABLE1,
.clr_irqenable  = OMAP1610_GPIO_CLEAR_IRQENABLE1,
.wkup_status= OMAP1610_GPIO_WAKEUPENABLE,
-   .wkup_clear = OMAP1610_GPIO_CLEAR_WAKEUPENA,
-   .wkup_set   = OMAP1610_GPIO_SET_WAKEUPENA,
.edgectrl1  = OMAP1610_GPIO_EDGE_CTRL1,
.edgectrl2  = OMAP1610_GPIO_EDGE_CTRL2,
 };
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index be5a906..c99eea4 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -114,8 +114,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void 
*unused)
pdata-regs-debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
pdata-regs-ctrl = OMAP24XX_GPIO_CTRL;
pdata-regs-wkup_status = OMAP24XX_GPIO_WAKE_EN;
-   pdata-regs-wkup_clear = OMAP24XX_GPIO_CLEARWKUENA;
-   pdata-regs-wkup_set = OMAP24XX_GPIO_SETWKUENA;
pdata-regs-leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0;
pdata-regs-leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1;
pdata-regs-risingdetect = OMAP24XX_GPIO_RISINGDETECT;
@@ -139,8 +137,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void 
*unused)
pdata-regs-debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
pdata-regs-ctrl = OMAP4_GPIO_CTRL;
pdata-regs-wkup_status = OMAP4_GPIO_IRQWAKEN0;
-   pdata-regs-wkup_clear = OMAP4_GPIO_IRQWAKEN0;
-   pdata-regs-wkup_set = OMAP4_GPIO_IRQWAKEN0;
pdata-regs-leveldetect0 = OMAP4_GPIO_LEVELDETECT0;
pdata-regs-leveldetect1 = OMAP4_GPIO_LEVELDETECT1;
pdata-regs-risingdetect = OMAP4_GPIO_RISINGDETECT;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h 
b/arch/arm/plat-omap/include/plat/gpio.h
index 6dcbe7d..4f584de 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -191,8 +191,6 @@ struct omap_gpio_reg_offs {
u16 debounce_en;
u16 ctrl;
u16 wkup_status;
-   u16 wkup_clear;
-   u16 wkup_set;
u16 leveldetect0;
u16 leveldetect1;
u16 risingdetect;
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 42f0411..769fae7 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -261,10 +261,11 @@ static void _toggle_gpio_edge_triggering(struct gpio_bank 
*bank, int gpio) {}
 
 static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
 {
+   void __iomem *base = bank-base;
void __iomem *reg = bank-base;
u32 l = 0;
 
-   if (bank-regs-leveldetect0  bank-regs-wkup_status) {
+   if (bank-regs-leveldetect0) {
set_gpio_trigger(bank, gpio, trigger);
} else if (bank-regs-irqctrl) {
reg += bank-regs-irqctrl;
@@ -295,13 +296,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, 
int gpio, int trigger)
if (trigger  IRQ_TYPE_EDGE_FALLING)
l |= 1  (gpio  1);
 
-   if (trigger)
-   /* Enable wake-up during idle for dynamic tick */
-   __raw_writel(1  gpio, bank-base
-   + bank-regs-wkup_set);
-   else
-   __raw_writel(1  gpio, bank-base
-   + bank-regs-wkup_clear);
+   MOD_REG_BIT(bank-regs-wkup_status, 1  gpio, trigger != 0);
 
__raw_writel(l, reg);
}
@@ -515,13 +510,14 @@ static int omap_gpio_request(struct gpio_chip *chip, 
unsigned offset)
 static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
 {
struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
+   void __iomem *base = bank-base;
unsigned long flags;
 
spin_lock_irqsave(bank-lock, flags);
 
-   if (bank-regs-wkup_clear)
+   if (bank-regs-wkup_status)
/* Disable wake-up during idle for dynamic tick */
-  

[PATCH v3 13/20] GPIO: OMAP: Clean omap_gpio_mod_init function

[Tarun Kanti DebBarma]

With register offsets now defined for respective OMAP versions we can get rid
of cpu_class_* checks. This function now has common initialization code for
all OMAP versions. Initialization specific to OMAP16xx has been moved within
omap16xx_gpio_init().

Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Charulatha V ch...@ti.com
---
 arch/arm/mach-omap1/gpio16xx.c |   19 ++-
 arch/arm/plat-omap/include/plat/gpio.h |2 +
 drivers/gpio/gpio-omap.c   |   96 +++-
 3 files changed, 64 insertions(+), 53 deletions(-)

diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 08dda3c..cfd86b9 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -93,6 +93,7 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.wkup_status= OMAP1610_GPIO_WAKEUPENABLE,
.edgectrl1  = OMAP1610_GPIO_EDGE_CTRL1,
.edgectrl2  = OMAP1610_GPIO_EDGE_CTRL2,
+   .sysconfig  = OMAP1610_GPIO_SYSCONFIG,
 };
 
 static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
@@ -218,12 +219,28 @@ static struct __initdata platform_device * 
omap16xx_gpio_dev[] = {
 static int __init omap16xx_gpio_init(void)
 {
int i;
+   void __iomem *base;
+   struct resource *res;
+   struct platform_device *pdev;
+   struct omap_gpio_platform_data *pdata;
 
if (!cpu_is_omap16xx())
return -EINVAL;
 
-   for (i = 0; i  ARRAY_SIZE(omap16xx_gpio_dev); i++)
+   for (i = 0; i  ARRAY_SIZE(omap16xx_gpio_dev); i++) {
+   pdev = omap16xx_gpio_dev[i];
+   pdata = pdev-dev.platform_data;
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   base = ioremap(res-start, resource_size(res));
+
+   if (pdata-regs-sysconfig)
+   __raw_writew(0x0014, base + OMAP1610_GPIO_SYSCONFIG);
+
+   omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
+   ULPD_CAM_CLK_CTRL);
+
platform_device_register(omap16xx_gpio_dev[i]);
+   }
 
return 0;
 }
diff --git a/arch/arm/plat-omap/include/plat/gpio.h 
b/arch/arm/plat-omap/include/plat/gpio.h
index 4f584de..3f7b028 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -198,6 +198,8 @@ struct omap_gpio_reg_offs {
u16 irqctrl;
u16 edgectrl1;
u16 edgectrl2;
+   /* Not applicable for OMAP2+ as hwmod layer takes care of sysconfig */
+   u16 sysconfig;
 
bool irqenable_inv;
 };
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 769fae7..3acbaa9 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -75,6 +75,7 @@ struct gpio_bank {
 
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
int (*get_context_loss_count)(struct device *dev);
+   void (*do_raw_write)(void __iomem *reg, int set);
 
struct omap_gpio_reg_offs *regs;
 };
@@ -864,67 +865,53 @@ static void __init omap_gpio_show_rev(struct gpio_bank 
*bank)
called = true;
 }
 
+static void __do_raw_writel(void __iomem *reg, int set)
+{
+   if (set)
+   __raw_writel(0x, reg);
+   else
+   __raw_writel(0x, reg);
+
+}
+
+static void __do_raw_writew(void __iomem *reg, int set)
+{
+   if (set)
+   __raw_writew(0x, reg);
+   else
+   __raw_writew(0x, reg);
+}
+
 /* This lock class tells lockdep that GPIO irqs are in a different
  * category than their parents, so it won't report false recursion.
  */
 static struct lock_class_key gpio_lock_class;
 
-/* TODO: Cleanup cpu_is_* checks */
 static void omap_gpio_mod_init(struct gpio_bank *bank)
 {
-   if (cpu_class_is_omap2()) {
-   if (cpu_is_omap44xx()) {
-   __raw_writel(0x, bank-base +
-   OMAP4_GPIO_IRQSTATUSCLR0);
-   __raw_writel(0x, bank-base +
-OMAP4_GPIO_DEBOUNCENABLE);
-   /* Initialize interface clk ungated, module enabled */
-   __raw_writel(0, bank-base + OMAP4_GPIO_CTRL);
-   } else if (cpu_is_omap34xx()) {
-   __raw_writel(0x, bank-base +
-   OMAP24XX_GPIO_IRQENABLE1);
-   __raw_writel(0x, bank-base +
-   OMAP24XX_GPIO_IRQSTATUS1);
-   __raw_writel(0x, bank-base +
-   OMAP24XX_GPIO_DEBOUNCE_EN);
-
-   /* Initialize interface clk ungated, module enabled */
-   __raw_writel(0, bank-base + OMAP24XX_GPIO_CTRL);
-   }
-   } else if (cpu_class_is_omap1()) {

[PATCH v3 14/20] GPIO: OMAP15xx: Use pinctrl offset instead of macro

[Tarun Kanti DebBarma]

From: Charulatha V ch...@ti.com

Use regs-pinctrl field instead of using the macro OMAP1510_GPIO_PIN_CONTROL

Signed-off-by: Charulatha V ch...@ti.com
---
 arch/arm/mach-omap1/gpio15xx.c |1 +
 arch/arm/plat-omap/include/plat/gpio.h |1 +
 drivers/gpio/gpio-omap.c   |8 +++-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index fd2fe8f..020725f 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -85,6 +85,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
.irqenable  = OMAP1510_GPIO_INT_MASK,
.irqenable_inv  = true,
.irqctrl= OMAP1510_GPIO_INT_CONTROL,
+   .pinctrl= OMAP1510_GPIO_PIN_CONTROL,
 };
 
 static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
diff --git a/arch/arm/plat-omap/include/plat/gpio.h 
b/arch/arm/plat-omap/include/plat/gpio.h
index 3f7b028..e1ef4e4 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -200,6 +200,7 @@ struct omap_gpio_reg_offs {
u16 edgectrl2;
/* Not applicable for OMAP2+ as hwmod layer takes care of sysconfig */
u16 sysconfig;
+   u16 pinctrl;
 
bool irqenable_inv;
 };
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 3acbaa9..7f32f7b 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -482,15 +482,13 @@ static int omap_gpio_request(struct gpio_chip *chip, 
unsigned offset)
 */
_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
 
-#ifdef CONFIG_ARCH_OMAP15XX
-   if (bank-method == METHOD_GPIO_1510) {
-   void __iomem *reg;
+   if (bank-regs-pinctrl) {
+   void __iomem *reg = bank-base + bank-regs-pinctrl;
 
/* Claim the pin for MPU */
-   reg = bank-base + OMAP1510_GPIO_PIN_CONTROL;
__raw_writel(__raw_readl(reg) | (1  offset), reg);
}
-#endif
+
if (bank-regs-ctrl  !bank-mod_usage) {
void __iomem *reg = bank-base + bank-regs-ctrl;
u32 ctrl;
-- 
1.6.0.4

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[PATCH v3 15/20] GPIO: OMAP: Use readl in irq_handler for all access

[Tarun Kanti DebBarma]

From: Charulatha V ch...@ti.com

Even when bank-width is 16, all the OMAP1 registers are 4-byte aligned, so just
use a 4-byte read.  The 'enabled' mask is already taking care to mask for bank 
width.

Signed-off-by: Charulatha V ch...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
---
 drivers/gpio/gpio-omap.c |2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 7f32f7b..25675a6 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -568,8 +568,6 @@ static void gpio_irq_handler(unsigned int irq, struct 
irq_desc *desc)
enabled = _get_gpio_irqbank_mask(bank);
isr_saved = isr = __raw_readl(isr_reg)  enabled;
 
-   if (cpu_is_omap15xx()  (bank-method == METHOD_MPUIO))
-   isr = 0x;
 
if (bank-level_mask)
level_mask = bank-level_mask  enabled;
-- 
1.6.0.4

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[PATCH v3 16/20] GPIO: OMAP: Remove bank-method METHOD_* macros

[Tarun Kanti DebBarma]

From: Charulatha V ch...@ti.com

The only bank-type (method) used in the OMAP GPIO driver is MPUIO type as they
need to be handled separately. Identify the same using a flag and remove all
METHOD_* macros.

Signed-off-by: Charulatha V ch...@ti.com
---
 arch/arm/mach-omap1/gpio15xx.c |3 +--
 arch/arm/mach-omap1/gpio16xx.c |6 +-
 arch/arm/mach-omap1/gpio7xx.c  |8 +---
 arch/arm/mach-omap2/gpio.c |2 --
 arch/arm/plat-omap/include/plat/gpio.h |8 +---
 drivers/gpio/gpio-omap.c   |   16 +---
 6 files changed, 9 insertions(+), 34 deletions(-)

diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 020725f..c51593c 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -47,7 +47,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
 
 static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
.virtual_irq_start  = IH_MPUIO_BASE,
-   .bank_type  = METHOD_MPUIO,
+   .is_mpuio   = true,
.bank_width = 16,
.bank_stride= 1,
.regs   = omap15xx_mpuio_regs,
@@ -90,7 +90,6 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
 
 static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
.virtual_irq_start  = IH_GPIO_BASE,
-   .bank_type  = METHOD_GPIO_1510,
.bank_width = 16,
.regs   = omap15xx_gpio_regs,
 };
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index cfd86b9..8509155 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -50,7 +50,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
 
 static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
.virtual_irq_start  = IH_MPUIO_BASE,
-   .bank_type  = METHOD_MPUIO,
+   .is_mpuio   = true,
.bank_width = 16,
.bank_stride= 1,
.regs   = omap16xx_mpuio_regs,
@@ -98,7 +98,6 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
 
 static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
.virtual_irq_start  = IH_GPIO_BASE,
-   .bank_type  = METHOD_GPIO_1610,
.bank_width = 16,
.regs   = omap16xx_gpio_regs,
 };
@@ -128,7 +127,6 @@ static struct __initdata resource 
omap16xx_gpio2_resources[] = {
 
 static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = {
.virtual_irq_start  = IH_GPIO_BASE + 16,
-   .bank_type  = METHOD_GPIO_1610,
.bank_width = 16,
.regs   = omap16xx_gpio_regs,
 };
@@ -158,7 +156,6 @@ static struct __initdata resource 
omap16xx_gpio3_resources[] = {
 
 static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = {
.virtual_irq_start  = IH_GPIO_BASE + 32,
-   .bank_type  = METHOD_GPIO_1610,
.bank_width = 16,
.regs   = omap16xx_gpio_regs,
 };
@@ -188,7 +185,6 @@ static struct __initdata resource 
omap16xx_gpio4_resources[] = {
 
 static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = {
.virtual_irq_start  = IH_GPIO_BASE + 48,
-   .bank_type  = METHOD_GPIO_1610,
.bank_width = 16,
.regs   = omap16xx_gpio_regs,
 };
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 6e439ff..91a7691 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -52,8 +52,8 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
 
 static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
.virtual_irq_start  = IH_MPUIO_BASE,
-   .bank_type  = METHOD_MPUIO,
.bank_width = 32,
+   .is_mpuio   = true,
.bank_stride= 2,
.regs   = omap7xx_mpuio_regs,
 };
@@ -94,7 +94,6 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
 
 static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
.virtual_irq_start  = IH_GPIO_BASE,
-   .bank_type  = METHOD_GPIO_7XX,
.bank_width = 32,
.regs   = omap7xx_gpio_regs,
 };
@@ -124,7 +123,6 @@ static struct __initdata resource omap7xx_gpio2_resources[] 
= {
 
 static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = {
.virtual_irq_start  = IH_GPIO_BASE + 32,
-   .bank_type  = METHOD_GPIO_7XX,
.bank_width = 32,
.regs   = omap7xx_gpio_regs,
 };
@@ -154,7 +152,6 @@ static struct __initdata resource 

[PATCH v3 17/20] GPIO: OMAP: Fix bankwidth for OMAP7xx MPUIO

[Tarun Kanti DebBarma]

From: Charulatha V ch...@ti.com

In all OMAP1 SoCs, the MPUIO bank width is 16 bits. But, in OMAP7xx,
it is wrongly initialised to 32. Fix this.

Signed-off-by: Charulatha V ch...@ti.com
---
 arch/arm/mach-omap1/gpio7xx.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 91a7691..65949c8 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -52,8 +52,8 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
 
 static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
.virtual_irq_start  = IH_MPUIO_BASE,
-   .bank_width = 32,
.is_mpuio   = true,
+   .bank_width = 16,
.bank_stride= 2,
.regs   = omap7xx_mpuio_regs,
 };
-- 
1.6.0.4

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[PATCH v3 18/20] GPIO: OMAP: Use PM runtime framework

[Tarun Kanti DebBarma]

From: Charulatha V ch...@ti.com

Call runtime pm APIs pm_runtime_get_sync() and pm_runtime_put_sync()
for enabling/disabling clocks appropriately. Remove syscore_ops and
instead use dev_pm_ops now.

Signed-off-by: Charulatha V ch...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
---
 drivers/gpio/gpio-omap.c |   99 --
 1 files changed, 78 insertions(+), 21 deletions(-)

diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index f1e346b..66eff1d 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -80,6 +80,8 @@ struct gpio_bank {
struct omap_gpio_reg_offs *regs;
 };
 
+static void omap_gpio_mod_init(struct gpio_bank *bank);
+
 #define GPIO_INDEX(bank, gpio) (gpio % bank-width)
 #define GPIO_BIT(bank, gpio) (1  GPIO_INDEX(bank, gpio))
 #define GPIO_MOD_CTRL_BIT  BIT(0)
@@ -475,6 +477,22 @@ static int omap_gpio_request(struct gpio_chip *chip, 
unsigned offset)
struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
unsigned long flags;
 
+   /*
+* If this is the first gpio_request for the bank,
+* enable the bank module.
+*/
+   if (!bank-mod_usage) {
+   if (IS_ERR_VALUE(pm_runtime_get_sync(bank-dev)  0)) {
+   dev_err(bank-dev, %s: GPIO bank %d 
+   pm_runtime_get_sync failed\n,
+   __func__, bank-id);
+   return -EINVAL;
+   }
+
+   /* Initialize the gpio bank registers to init time value */
+   omap_gpio_mod_init(bank);
+   }
+
spin_lock_irqsave(bank-lock, flags);
 
/* Set trigger to none. You need to enable the desired trigger with
@@ -532,6 +550,18 @@ static void omap_gpio_free(struct gpio_chip *chip, 
unsigned offset)
 
_reset_gpio(bank, bank-chip.base + offset);
spin_unlock_irqrestore(bank-lock, flags);
+
+   /*
+* If this is the last gpio to be freed in the bank,
+* disable the bank module.
+*/
+   if (!bank-mod_usage) {
+   if (IS_ERR_VALUE(pm_runtime_put_sync(bank-dev)  0)) {
+   dev_err(bank-dev, %s: GPIO bank %d 
+   pm_runtime_put_sync failed\n,
+   __func__, bank-id);
+   }
+   }
 }
 
 /*
@@ -556,6 +586,9 @@ static void gpio_irq_handler(unsigned int irq, struct 
irq_desc *desc)
chained_irq_enter(chip, desc);
 
bank = irq_get_handler_data(irq);
+
+   pm_runtime_get_sync(bank-dev);
+
isr_reg = bank-base + bank-regs-irqstatus;
 
if (WARN_ON(!isr_reg))
@@ -618,6 +651,8 @@ static void gpio_irq_handler(unsigned int irq, struct 
irq_desc *desc)
 exit:
if (!unmasked)
chained_irq_exit(chip, desc);
+
+   pm_runtime_put_sync(bank-dev);
 }
 
 static void gpio_irq_shutdown(struct irq_data *d)
@@ -1048,12 +1083,25 @@ static int __devinit omap_gpio_probe(struct 
platform_device *pdev)
}
 
pm_runtime_enable(bank-dev);
-   pm_runtime_get_sync(bank-dev);
+   pm_runtime_irq_safe(bank-dev);
+   if (IS_ERR_VALUE(pm_runtime_get_sync(bank-dev)  0)) {
+   dev_err(bank-dev, %s: GPIO bank %d pm_runtime_get_sync 
+   failed\n, __func__, bank-id);
+   iounmap(bank-base);
+   return -EINVAL;
+   }
 
omap_gpio_mod_init(bank);
omap_gpio_chip_init(bank);
omap_gpio_show_rev(bank);
 
+   if (IS_ERR_VALUE(pm_runtime_put_sync(bank-dev)  0)) {
+   dev_err(bank-dev, %s: GPIO bank %d pm_runtime_put_sync 
+   failed\n, __func__, bank-id);
+   iounmap(bank-base);
+   return -EINVAL;
+   }
+
list_add_tail(bank-node, omap_gpio_list);
 
return ret;
@@ -1064,10 +1112,12 @@ err_exit:
return ret;
 }
 
-static int omap_gpio_suspend(void)
+static int omap_gpio_suspend(struct device *dev)
 {
struct gpio_bank *bank;
 
+   pm_runtime_get_sync(dev);
+
list_for_each_entry(bank, omap_gpio_list, node) {
void __iomem *base = bank-base;
void __iomem *wake_status;
@@ -1085,31 +1135,34 @@ static int omap_gpio_suspend(void)
spin_unlock_irqrestore(bank-lock, flags);
}
 
+   pm_runtime_put_sync(dev);
+
return 0;
 }
 
-static void omap_gpio_resume(void)
+static int omap_gpio_resume(struct device *dev)
 {
struct gpio_bank *bank;
 
+   pm_runtime_get_sync(dev);
+
list_for_each_entry(bank, omap_gpio_list, node) {
void __iomem *base = bank-base;
unsigned long flags;
 
if (!bank-regs-wkup_status)
-   return;
+   return 0;
 
spin_lock_irqsave(bank-lock, flags);

[PATCH v3 19/20] GPIO: OMAP: optimize suspend and resume functions

[Tarun Kanti DebBarma]

There is no need to operate on all the banks every time the function is called.
Just operate on the current bank passed by the framework.

Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
---
 drivers/gpio/gpio-omap.c |   56 ++---
 1 files changed, 27 insertions(+), 29 deletions(-)

diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 66eff1d..e9d2e1e 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1082,6 +1082,8 @@ static int __devinit omap_gpio_probe(struct 
platform_device *pdev)
goto err_free;
}
 
+   platform_set_drvdata(pdev, bank);
+
pm_runtime_enable(bank-dev);
pm_runtime_irq_safe(bank-dev);
if (IS_ERR_VALUE(pm_runtime_get_sync(bank-dev)  0)) {
@@ -1114,26 +1116,24 @@ err_exit:
 
 static int omap_gpio_suspend(struct device *dev)
 {
-   struct gpio_bank *bank;
-
-   pm_runtime_get_sync(dev);
+   struct platform_device *pdev = to_platform_device(dev);
+   struct gpio_bank *bank = platform_get_drvdata(pdev);
+   void __iomem *base = bank-base;
+   void __iomem *wake_status;
+   unsigned long flags;
 
-   list_for_each_entry(bank, omap_gpio_list, node) {
-   void __iomem *base = bank-base;
-   void __iomem *wake_status;
-   unsigned long flags;
+   if (!bank-regs-wkup_status)
+   return 0;
 
-   if (!bank-regs-wkup_status)
-   return 0;
+   wake_status = bank-base + bank-regs-wkup_status;
 
-   wake_status = bank-base + bank-regs-wkup_status;
+   pm_runtime_get_sync(dev);
 
-   spin_lock_irqsave(bank-lock, flags);
-   bank-saved_wakeup = __raw_readl(wake_status);
-   MOD_REG_BIT(bank-regs-wkup_status, 0x, 0);
-   MOD_REG_BIT(bank-regs-wkup_status, bank-suspend_wakeup, 1);
-   spin_unlock_irqrestore(bank-lock, flags);
-   }
+   spin_lock_irqsave(bank-lock, flags);
+   bank-saved_wakeup = __raw_readl(wake_status);
+   MOD_REG_BIT(bank-regs-wkup_status, 0x, 0);
+   MOD_REG_BIT(bank-regs-wkup_status, bank-suspend_wakeup, 1);
+   spin_unlock_irqrestore(bank-lock, flags);
 
pm_runtime_put_sync(dev);
 
@@ -1142,22 +1142,20 @@ static int omap_gpio_suspend(struct device *dev)
 
 static int omap_gpio_resume(struct device *dev)
 {
-   struct gpio_bank *bank;
+   struct platform_device *pdev = to_platform_device(dev);
+   struct gpio_bank *bank = platform_get_drvdata(pdev);
+   void __iomem *base = bank-base;
+   unsigned long flags;
 
-   pm_runtime_get_sync(dev);
+   if (!bank-regs-wkup_status)
+   return 0;
 
-   list_for_each_entry(bank, omap_gpio_list, node) {
-   void __iomem *base = bank-base;
-   unsigned long flags;
-
-   if (!bank-regs-wkup_status)
-   return 0;
+   pm_runtime_get_sync(dev);
 
-   spin_lock_irqsave(bank-lock, flags);
-   MOD_REG_BIT(bank-regs-wkup_status, 0x, 0);
-   MOD_REG_BIT(bank-regs-wkup_status, bank-saved_wakeup, 1);
-   spin_unlock_irqrestore(bank-lock, flags);
-   }
+   spin_lock_irqsave(bank-lock, flags);
+   MOD_REG_BIT(bank-regs-wkup_status, 0x, 0);
+   MOD_REG_BIT(bank-regs-wkup_status, bank-saved_wakeup, 1);
+   spin_unlock_irqrestore(bank-lock, flags);
 
pm_runtime_put_sync(dev);
 
-- 
1.6.0.4

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[PATCH v3 20/20] GPIO: OMAP2+: Clean prepare_for_idle and resume_after_idle

[Tarun Kanti DebBarma]

Simplify  omap2_gpio_prepare_for_idle() and omap2_gpio_resume_after_idle()
by moving most of the stuff to *_pm_runtime_suspend() and *_pm_runtime_resume().
Also, omap_gpio_suspend() and omap_gpio_resume() optimized to operate per
GPIO bank instead of operating on entire list every time.

Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Charulatha V ch...@ti.com
---
 drivers/gpio/gpio-omap.c |  234 -
 1 files changed, 125 insertions(+), 109 deletions(-)

diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index e9d2e1e..b2c1892 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1167,142 +1167,153 @@ static int omap_gpio_resume(struct device *dev)
 static void omap_gpio_save_context(struct gpio_bank *bank);
 static void omap_gpio_restore_context(struct gpio_bank *bank);
 
-void omap2_gpio_prepare_for_idle(int off_mode)
+static int omap_gpio_runtime_suspend(struct device *dev)
 {
-   struct gpio_bank *bank;
+   struct platform_device *pdev = to_platform_device(dev);
+   struct gpio_bank *bank = platform_get_drvdata(pdev);
+   u32 l1 = 0, l2 = 0;
+   int j;
 
-   list_for_each_entry(bank, omap_gpio_list, node) {
-   u32 l1 = 0, l2 = 0;
-   int j;
+   for (j = 0; j  hweight_long(bank-dbck_enable_mask); j++)
+   clk_disable(bank-dbck);
 
-   if (!bank-loses_context)
-   continue;
+   /* If going to OFF, remove triggering for all
+* non-wakeup GPIOs.  Otherwise spurious IRQs will be
+* generated.  See OMAP2420 Errata item 1.101. */
+   if (!(bank-enabled_non_wakeup_gpios))
+   goto save_gpio_ctx;
 
-   for (j = 0; j  hweight_long(bank-dbck_enable_mask); j++)
-   clk_disable(bank-dbck);
+   bank-saved_datain = __raw_readl(bank-base +
+   bank-regs-datain);
+   l1 = __raw_readl(bank-base + bank-regs-fallingdetect);
+   l2 = __raw_readl(bank-base + bank-regs-risingdetect);
 
-   if (!off_mode)
-   continue;
+   bank-saved_fallingdetect = l1;
+   bank-saved_risingdetect = l2;
+   l1 = ~bank-enabled_non_wakeup_gpios;
+   l2 = ~bank-enabled_non_wakeup_gpios;
 
-   if (IS_ERR_VALUE(pm_runtime_put_sync(bank-dev)  0))
-   dev_err(bank-dev, %s: GPIO bank %d 
-   pm_runtime_put_sync failed\n,
-   __func__, bank-id);
+   __raw_writel(l1, bank-base + bank-regs-fallingdetect);
+   __raw_writel(l2, bank-base + bank-regs-risingdetect);
+
+save_gpio_ctx:
+   if (bank-get_context_loss_count)
+   bank-ctx_loss_count = bank-get_context_loss_count(bank-dev);
+   omap_gpio_save_context(bank);
+
+   return 0;
+}
+
+static int omap_gpio_runtime_resume(struct device *dev)
+{
+   struct platform_device *pdev = to_platform_device(dev);
+   struct gpio_bank *bank = platform_get_drvdata(pdev);
+   u32 ctx_lost_cnt_after;
+   u32 l = 0, gen, gen0, gen1;
+   int j;
+
+   for (j = 0; j  hweight_long(bank-dbck_enable_mask); j++)
+   clk_enable(bank-dbck);
 
-   /* If going to OFF, remove triggering for all
-* non-wakeup GPIOs.  Otherwise spurious IRQs will be
-* generated.  See OMAP2420 Errata item 1.101. */
-   if (!(bank-enabled_non_wakeup_gpios))
-   goto save_gpio_ctx;
+   if (bank-get_context_loss_count) {
+   ctx_lost_cnt_after =
+   bank-get_context_loss_count(bank-dev);
+   if (ctx_lost_cnt_after != bank-ctx_loss_count)
+   omap_gpio_restore_context(bank);
+   }
 
-   bank-saved_datain = __raw_readl(bank-base +
-   bank-regs-datain);
-   l1 = __raw_readl(bank-base + bank-regs-fallingdetect);
-   l2 = __raw_readl(bank-base + bank-regs-risingdetect);
+   if (!(bank-enabled_non_wakeup_gpios))
+   return 0;
 
-   bank-saved_fallingdetect = l1;
-   bank-saved_risingdetect = l2;
-   l1 = ~bank-enabled_non_wakeup_gpios;
-   l2 = ~bank-enabled_non_wakeup_gpios;
+   __raw_writel(bank-saved_fallingdetect,
+   bank-base + bank-regs-fallingdetect);
+   __raw_writel(bank-saved_risingdetect,
+   bank-base + bank-regs-risingdetect);
+   l = __raw_readl(bank-base + bank-regs-datain);
 
-   __raw_writel(l1, bank-base + bank-regs-fallingdetect);
-   __raw_writel(l2, bank-base + bank-regs-risingdetect);
+   /* Check if any of the non-wakeup interrupt GPIOs have changed
+* state.  If so, generate an IRQ by software.  This is
+* horribly 

Re: [GIT PULL] omap iommu fixes for v3.0-rc

[Tony Lindgren]

* Ohad Ben-Cohen o...@wizery.com [110701 00:46]:
 On Fri, Jul 1, 2011 at 10:00 AM, Tony Lindgren t...@atomide.com wrote:
  These look like real fixes, but can you please update the commits
  with something like This fixes an issue with foo when doing bar.
 
 Done, please tell me if it's OK now.

OK thanks!
 
  Otherwise it's easy to claim that these are fixes for features that
  never worked and it might be hard to justify them this late into
  the -rc cycle.
 
 It seems we did have these issues for quite some time, and these are not
 explicit 3.0 regressions. So they might vaguely fall into the fixes
 for features that never worked definition too in a sense.
 
 If you prefer to take them into 3.1, that's OK too.

Let's do that then.

Regards,

Tony
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Re: [PATCH 3/3] OMAP4: powerdomain data: Fix core mem states and missing cefuse flag

[Cousson, Benoit]

On 7/1/2011 1:48 AM, Paul Walmsley wrote:

On Thu, 23 Jun 2011, Benoit Cousson wrote:


Since ES2.0, the core ocmram does not support a different state
than the main power domain anymore during both ON and RET power
domain state.
Since PM is not supported at all in ES1.0, update the common
structure.

LOWPOWERSTATECHANGE is supported by the cefuse power domain but
the flag was missing.
Add the PWRDM_HAS_LOWPOWERSTATECHANGE in flags field.

Indent all previous flags to be aligned with other fields.

Update the TI copyright date to 2011.

Signed-off-by: Benoit Coussonb-cous...@ti.com
Cc: Paul Walmsleyp...@pwsan.com
Cc: Rajendra Nayakrna...@ti.com
Cc: Santosh Shilimkarsantosh.shilim...@ti.com


Reviewed-by: Paul Walmsleyp...@pwsan.com

I guess the CEFUSE LOWPOWERSTATECHANGE bit is in the Security TRM?


Good question... but I think so.

Benoit

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Re: [PATCH v2] arm: omap: fix the alphabetical order

[Felipe Balbi]

Hi,

On Fri, Jul 01, 2011 at 10:04:00AM +0900, Silesh C V wrote:
 On Thu, Jun 30, 2011 at 9:06 PM, Felipe Balbi ba...@ti.com wrote:
  That might have been correct on some ancient
  dead language, but I like better when things
  are recent.
 
  Fix the alphabetical order.
 
  Signed-off-by: Felipe Balbi ba...@ti.com
  ---
 
  Fixed missing comma after Richard's name and removed
  comma after Vikram's name.
 
  Thanks Charulatha Varadarajan for spotting those two.
 
   arch/arm/plat-omap/include/plat/omap_device.h |    7 +++
   1 files changed, 3 insertions(+), 4 deletions(-)
 
  diff --git a/arch/arm/plat-omap/include/plat/omap_device.h 
  b/arch/arm/plat-omap/include/plat/omap_device.h
  index e4c349f..5a2369ba 100644
  --- a/arch/arm/plat-omap/include/plat/omap_device.h
  +++ b/arch/arm/plat-omap/include/plat/omap_device.h
  @@ -4,10 +4,9 @@
   * Copyright (C) 2009 Nokia Corporation
   * Paul Walmsley
   *
  - * Developed in collaboration with (alphabetical order): Benoit
  - * Cousson, Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram
  - * Pandita, Sakari Poussa, Anand Sawant, Santosh Shilimkar, Richard
  - * Woodruff
 
 Looks like the original author was referring to the last names when he
 meant 'in alphabetical order' which is also correct in a way. So it
 looks like it is not only correct in a dead ancient language but also
 in some recent ones. :-)

good catch ;-)

-- 
balbi


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Description: Digital signature

Re: [PATCH 1/7] OMAP: ID: introduce chip detection for OMAP4460

[Aneesh V]

On Friday 01 July 2011 11:55 AM, Tony Lindgren wrote:

* Rajendra Nayakrna...@ti.com  [110630 19:03]:

--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -331,8 +331,8 @@ static void __init omap3_check_revision(void)
  static void __init omap4_check_revision(void)
  {
u32 idcode;
-   u16 hawkeye;
u8 rev;
+   u16 hawkeye;

/*
 * The IC rev detection is done with hawkeye and rev.


Please leave out this change, there's no need for it.


Ok. I will fix this.

br,
Aneesh
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Re: [RFC 10/12] omap: mcbsp: Move sidetone clock management to mach-omap2/mcbsp.c

[ABRAHAM, KISHON VIJAY]

On Fri, Jul 1, 2011 at 3:04 PM, Paul Walmsley p...@pwsan.com wrote:
 cc'ing Kishon

 On Fri, 1 Jul 2011, Cousson, Benoit wrote:

 On 7/1/2011 11:23 AM, Paul Walmsley wrote:
  On Fri, 1 Jul 2011, Jarkko Nikula wrote:
 
   Active sidetone requires that McBSP interface clock doesn't idle and 
   there
   is no mechanism in hwmod to turn autoidling on/off in runtime. McBSP2 and
   3
   in OMAP34xx share their interface clock with McBSP sidetone module and
   that interface clock must be active when the sidetone is operating.
  
   Sidetone has its own autoidle bit which should keep the interface clock
   active but it is broken. Putting the McBSP core to no-idle mode when the
   sidetone is active is no good either since it results to higher power
   consumption when using the threshold based DMA transfers.
 
  In the hwmod code/data, we've got the OCPIF_SWSUP_IDLE flag that can be
  set on a struct omap_hwmod_ocp_if.  I think this is probably what's needed
  here.  The only problem is that we haven't linked that to the clock code
  to deny idle on the interface clock yet (see omap_hwmod.c:_setup()).
  Adding that code in, plus adding that OCPIF_SWSUP_IDLE flag to the
  McBSP2/3 data, seems like the right approach here.
 
  I guess we also will need some basic usecounting for denying idle in the
  clock code.
 
  Otherwise these direct register manipulations of clock registers, outside
  the clock code, could turn into a mess :-(

 AFAIR Kishon did submit some patches to expose this feature to the driver
 through omap_device API. The point is that other broken IP like SDMA of USB
 will require such feature.

 Didn't we pull them?

I'll repost by early next week.


 You sent him some comments on March 1 but it looks like the series never
 got updated and reposted, at least not that I can find in my mail
 archive.  Kishon?

 Anyway, those patches won't help in this case if the sidetone AUTOIDLE bit
 is broken - looks like the interface clock autoidle bit is what needs to
 change.


 - Paul

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Re: [PATCH] DMA: OMAP: Remove extra looping from omap_request_dma

[Scott Ellis]

A free channel gets found correctly, that's not the problem. 

The patch is to eliminate the extra passes through the loop after
free_ch is assigned.

I dropped some printk's into omap_request_dma()

[  158.375885] inside omap_request_dma()
[  158.379577] dev_id = 61 ch = 0 free_ch = -1
[  158.383789] dev_id = 61 ch = 1 free_ch = -1
[  158.387969] dev_id = 61 ch = 2 free_ch = -1
[  158.392181] dev_id = 61 ch = 3 free_ch = -1
[  158.396392] dev_id = 61 ch = 4 free_ch = -1
[  158.400573] set free_ch = 4 (could break now)
[  158.403381] dev_id = 61 ch = 5 free_ch = 4
[  158.407501] dev_id = 61 ch = 6 free_ch = 4
[  158.411621] dev_id = 61 ch = 7 free_ch = 4
[  158.415740] dev_id = 61 ch = 8 free_ch = 4
[  158.419830] dev_id = 61 ch = 9 free_ch = 4
[  158.423950] dev_id = 61 ch = 10 free_ch = 4
[  158.428161] dev_id = 61 ch = 11 free_ch = 4
[  158.432373] dev_id = 61 ch = 12 free_ch = 4
[  158.436553] dev_id = 61 ch = 13 free_ch = 4
[  158.440765] dev_id = 61 ch = 14 free_ch = 4
[  158.444976] dev_id = 61 ch = 15 free_ch = 4
[  158.449157] dev_id = 61 ch = 16 free_ch = 4
[  158.453369] dev_id = 61 ch = 17 free_ch = 4
[  158.457580] dev_id = 61 ch = 18 free_ch = 4
[  158.461761] dev_id = 61 ch = 19 free_ch = 4
[  158.465972] dev_id = 61 ch = 20 free_ch = 4
[  158.470184] dev_id = 61 ch = 21 free_ch = 4
[  158.474395] dev_id = 61 ch = 22 free_ch = 4
[  158.478576] dev_id = 61 ch = 23 free_ch = 4
[  158.482788] dev_id = 61 ch = 24 free_ch = 4
[  158.486999] dev_id = 61 ch = 25 free_ch = 4
[  158.491180] dev_id = 61 ch = 26 free_ch = 4
[  158.495391] dev_id = 61 ch = 27 free_ch = 4
[  158.499603] dev_id = 61 ch = 28 free_ch = 4
[  158.503784] dev_id = 61 ch = 29 free_ch = 4
[  158.507995] dev_id = 61 ch = 30 free_ch = 4
[  158.512207] dev_id = 61 ch = 31 free_ch = 4
...
[4.097991] inside omap_request_dma()
[4.101684] dev_id = 62 ch = 0 free_ch = -1
[4.105895] dev_id = 62 ch = 1 free_ch = -1
[4.110076] dev_id = 62 ch = 2 free_ch = -1
[4.114288] dev_id = 62 ch = 3 free_ch = -1
[4.118499] dev_id = 62 ch = 4 free_ch = -1
[4.122680] set free_ch = 4 (could break now)
[4.125488] dev_id = 62 ch = 5 free_ch = 4
[4.129608] dev_id = 62 ch = 6 free_ch = 4
[4.133728] dev_id = 62 ch = 7 free_ch = 4
[4.137847] dev_id = 62 ch = 8 free_ch = 4
[4.141937] dev_id = 62 ch = 9 free_ch = 4
[4.146057] dev_id = 62 ch = 10 free_ch = 4
[4.150268] dev_id = 62 ch = 11 free_ch = 4
[4.154479] dev_id = 62 ch = 12 free_ch = 4
[4.158660] dev_id = 62 ch = 13 free_ch = 4
[4.162872] dev_id = 62 ch = 14 free_ch = 4
[4.167083] dev_id = 62 ch = 15 free_ch = 4
[4.171264] dev_id = 62 ch = 16 free_ch = 4
[4.175476] dev_id = 62 ch = 17 free_ch = 4
[4.179687] dev_id = 62 ch = 18 free_ch = 4
[4.183868] dev_id = 62 ch = 19 free_ch = 4
[4.188079] dev_id = 62 ch = 20 free_ch = 4
[4.192291] dev_id = 62 ch = 21 free_ch = 4
[4.196502] dev_id = 62 ch = 22 free_ch = 4
[4.200683] dev_id = 62 ch = 23 free_ch = 4
[4.204895] dev_id = 62 ch = 24 free_ch = 4
[4.209106] dev_id = 62 ch = 25 free_ch = 4
[4.213287] dev_id = 62 ch = 26 free_ch = 4
[4.217498] dev_id = 62 ch = 27 free_ch = 4
[4.221710] dev_id = 62 ch = 28 free_ch = 4
[4.225891] dev_id = 62 ch = 29 free_ch = 4
[4.230102] dev_id = 62 ch = 30 free_ch = 4
[4.234313] dev_id = 62 ch = 31 free_ch = 4
...

I was also wondering, what is special about dev_id == 0? The current
code treats that special and does break immediately?

Scott

On Fri, 2011-07-01 at 00:19 -0700, Tony Lindgren wrote:
 * Scott Ellis sc...@jumpnowtek.com [110629 20:58]:
  Break from dma channel search when a free one is found.
 
 Care to describe how the current code is not finding a
 free channel currently?
 
 Tony
 
  
  Signed-off-by: Scott Ellis sc...@jumpnowtek.com
  ---
   arch/arm/plat-omap/dma.c |5 ++---
   1 files changed, 2 insertions(+), 3 deletions(-)
  
  diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
  index c22217c..3d36fcf 100644
  --- a/arch/arm/plat-omap/dma.c
  +++ b/arch/arm/plat-omap/dma.c
  @@ -678,10 +678,9 @@ int omap_request_dma(int dev_id, const char *dev_name,
   
  spin_lock_irqsave(dma_chan_lock, flags);
  for (ch = 0; ch  dma_chan_count; ch++) {
  -   if (free_ch == -1  dma_chan[ch].dev_id == -1) {
  +   if (dma_chan[ch].dev_id == -1) {
  free_ch = ch;
  -   if (dev_id == 0)
  -   break;
  +   break;
  }
  }
  if (free_ch == -1) {
  

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Re: [RFC 11/12] omap: mcbsp: Remove conditional compilation for OMAP3

[Varadarajan, Charulatha]

Jarkko,

On Fri, Jul 1, 2011 at 14:22, Jarkko Nikula jhnik...@gmail.com wrote:
 Although this increases the build size a little for !OMAP3 builds it makes
 the code one step more generic. For instance the threshold based DMA
 transfers seems to be possible with OMAP4 too from quick look of the TRM.

 Signed-off-by: Jarkko Nikula jhnik...@gmail.com
 ---
  arch/arm/plat-omap/include/plat/mcbsp.h |   35 --
  arch/arm/plat-omap/mcbsp.c              |   13 ---
  2 files changed, 5 insertions(+), 43 deletions(-)

 diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h 
 b/arch/arm/plat-omap/include/plat/mcbsp.h
 index 2a7e8d5..720461c 100644
 --- a/arch/arm/plat-omap/include/plat/mcbsp.h
 +++ b/arch/arm/plat-omap/include/plat/mcbsp.h
 @@ -26,9 +26,6 @@

  #include linux/spinlock.h

 -#include mach/hardware.h
 -#include plat/clock.h
 -
  /* macro for building platform_device for McBSP ports */
  #define OMAP_MCBSP_PLATFORM_DEVICE(port_nr)            \
  static struct platform_device omap_mcbsp##port_nr = {  \
 @@ -314,11 +311,11 @@ struct omap_mcbsp_platform_data {
        u8 dma_rx_sync, dma_tx_sync;
        u16 rx_irq, tx_irq;
        struct omap_mcbsp_ops *ops;
 -#ifdef CONFIG_ARCH_OMAP3
 +
        /* Sidetone block for McBSP 2 and 3 */
        unsigned long phys_base_st;
        int (*enable_st_clock)(unsigned int, bool);
 -#endif
 +
        u16 buffer_size;
        unsigned int mcbsp_config_type;
        u8 reg_size;
 @@ -354,12 +351,12 @@ struct omap_mcbsp {
        spinlock_t lock;
        struct omap_mcbsp_platform_data *pdata;
        struct clk *fclk;
 -#ifdef CONFIG_ARCH_OMAP3
 +
        struct omap_mcbsp_st_data *st_data;
        int dma_op_mode;
        u16 max_tx_thres;
        u16 max_rx_thres;
 -#endif
 +
        void *reg_cache;
        unsigned int mcbsp_config_type;
  };
 @@ -380,7 +377,6 @@ extern int omap_mcbsp_count, omap_mcbsp_cache_size;

  int omap_mcbsp_init(void);
  void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * 
 config);
 -#ifdef CONFIG_ARCH_OMAP3
  void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold);
  void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold);
  u16 omap_mcbsp_get_max_tx_threshold(unsigned int id);
 @@ -389,18 +385,7 @@ u16 omap_mcbsp_get_fifo_size(unsigned int id);
  u16 omap_mcbsp_get_tx_delay(unsigned int id);
  u16 omap_mcbsp_get_rx_delay(unsigned int id);
  int omap_mcbsp_get_dma_op_mode(unsigned int id);
 -#else
 -static inline void omap_mcbsp_set_tx_threshold(unsigned int id, u16 
 threshold)
 -{ }
 -static inline void omap_mcbsp_set_rx_threshold(unsigned int id, u16 
 threshold)
 -{ }
 -static inline u16 omap_mcbsp_get_max_tx_threshold(unsigned int id) { return 
 0; }
 -static inline u16 omap_mcbsp_get_max_rx_threshold(unsigned int id) { return 
 0; }
 -static inline u16 omap_mcbsp_get_fifo_size(unsigned int id) { return 0; }
 -static inline u16 omap_mcbsp_get_tx_delay(unsigned int id) { return 0; }
 -static inline u16 omap_mcbsp_get_rx_delay(unsigned int id) { return 0; }
 -static inline int omap_mcbsp_get_dma_op_mode(unsigned int id) { return 0; }
 -#endif
 +
  int omap_mcbsp_request(unsigned int id);
  void omap_mcbsp_free(unsigned int id);
  void omap_mcbsp_start(unsigned int id, int tx, int rx);
 @@ -416,21 +401,11 @@ void omap2_mcbsp1_mux_fsr_src(u8 mux);
  int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream);
  int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream);

 -#ifdef CONFIG_ARCH_OMAP3
  /* Sidetone specific API */
  int omap_st_set_chgain(unsigned int id, int channel, s16 chgain);
  int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain);
  int omap_st_enable(unsigned int id);
  int omap_st_disable(unsigned int id);
  int omap_st_is_enabled(unsigned int id);
 -#else
 -static inline int omap_st_set_chgain(unsigned int id, int channel,
 -                                    s16 chgain) { return 0; }
 -static inline int omap_st_get_chgain(unsigned int id, int channel,
 -                                    s16 *chgain) { return 0; }
 -static inline int omap_st_enable(unsigned int id) { return 0; }
 -static inline int omap_st_disable(unsigned int id) { return 0; }
 -static inline int omap_st_is_enabled(unsigned int id) {  return 0; }
 -#endif

  #endif
 diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
 index 1a7cfb3..d565b36 100644
 --- a/arch/arm/plat-omap/mcbsp.c
 +++ b/arch/arm/plat-omap/mcbsp.c
 @@ -63,7 +63,6 @@ static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 
 reg, bool from_cache)
        }
  }

 -#ifdef CONFIG_ARCH_OMAP3

Are there any plans to move the functions  omap_mcbsp_st_*
to mach-omap2/* as they are specific to OMAP3 only?

-V Charulatha

  static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
  {
        __raw_writel(val, mcbsp-st_data-io_base_st + reg);
 @@ -73,7 +72,6 @@ static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 
 reg)
  {
        return 

Re: [RFC 07/12] omap: mcbsp: Get rid of remaining is_omap tests

[Varadarajan, Charulatha]

Jarkko,

On Fri, Jul 1, 2011 at 14:22, Jarkko Nikula jhnik...@gmail.com wrote:
 We can get rid of remaining is_omap tests in the driver by using
 mcbsp_config_type that is set in omap hwmod data for 2430, 34xx and 44xx.

 Signed-off-by: Jarkko Nikula jhnik...@gmail.com
 ---
  arch/arm/plat-omap/mcbsp.c |   30 ++
  1 files changed, 14 insertions(+), 16 deletions(-)

 diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
 index 92d6d4f..47720b1 100644
 --- a/arch/arm/plat-omap/mcbsp.c
 +++ b/arch/arm/plat-omap/mcbsp.c
 @@ -193,7 +193,7 @@ void omap_mcbsp_config(unsigned int id, const struct 
 omap_mcbsp_reg_cfg *config)
        MCBSP_WRITE(mcbsp, MCR2, config-mcr2);
        MCBSP_WRITE(mcbsp, MCR1, config-mcr1);
        MCBSP_WRITE(mcbsp, PCR0, config-pcr0);
 -       if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
 +       if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE2) {
                MCBSP_WRITE(mcbsp, XCCR, config-xccr);
                MCBSP_WRITE(mcbsp, RCCR, config-rccr);
        }
 @@ -531,14 +531,13 @@ void omap_mcbsp_set_tx_threshold(unsigned int id, u16 
 threshold)
  {
        struct omap_mcbsp *mcbsp;

 -       if (!cpu_is_omap34xx()  !cpu_is_omap44xx())
 -               return;
 -
        if (!omap_mcbsp_check_valid_id(id)) {
                printk(KERN_ERR %s: Invalid id (%d)\n, __func__, id + 1);
                return;
        }
        mcbsp = id_to_mcbsp_ptr(id);
 +       if (mcbsp-mcbsp_config_type  MCBSP_CONFIG_TYPE3)
 +               return;

        if (threshold  threshold = mcbsp-max_tx_thres)
                MCBSP_WRITE(mcbsp, THRSH2, threshold - 1);
 @@ -554,14 +553,13 @@ void omap_mcbsp_set_rx_threshold(unsigned int id, u16 
 threshold)
  {
        struct omap_mcbsp *mcbsp;

 -       if (!cpu_is_omap34xx()  !cpu_is_omap44xx())
 -               return;
 -
        if (!omap_mcbsp_check_valid_id(id)) {
                printk(KERN_ERR %s: Invalid id (%d)\n, __func__, id + 1);
                return;
        }
        mcbsp = id_to_mcbsp_ptr(id);
 +       if (mcbsp-mcbsp_config_type  MCBSP_CONFIG_TYPE3)
 +               return;

        if (threshold  threshold = mcbsp-max_rx_thres)
                MCBSP_WRITE(mcbsp, THRSH1, threshold - 1);
 @@ -698,7 +696,7 @@ static inline void omap34xx_mcbsp_request(struct 
 omap_mcbsp *mcbsp)
         * Enable wakup behavior, smart idle and all wakeups
         * REVISIT: some wakeups may be unnecessary
         */
 -       if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
 +       if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE3) {
                MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
        }
  }
 @@ -712,7 +710,7 @@ static inline void omap34xx_mcbsp_free(struct omap_mcbsp 
 *mcbsp)
        /*
         * Disable wakup behavior, smart idle and all wakeups
         */
 -       if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
 +       if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE3) {


I think that it would be a good idea to not use
MCBSP_CONFIG_TYPE* in plat-omap/* as it is the .rev info.
At later point of time, this might make the code look uglier
as it happened with GPIO_METHOD_* flags in OMAP GPIO driver.
Instead use this .rev info in mach-omap*/ to fill the pdata and pass it
to driver.

-V Charulatha

                /*
                 * HW bug workaround - If no_idle mode is taken, we need to
                 * go to smart_idle before going to always_idle, or the
 @@ -872,7 +870,7 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
        }
        mcbsp = id_to_mcbsp_ptr(id);

 -       if (cpu_is_omap34xx())
 +       if (mcbsp-mcbsp_config_type == MCBSP_CONFIG_TYPE3)
                omap_st_start(mcbsp);

        /* Only enable SRG, if McBSP is master */
 @@ -910,7 +908,7 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
                MCBSP_WRITE(mcbsp, SPCR2, w | (1  7));
        }

 -       if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
 +       if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE2) {
                /* Release the transmitter and receiver */
                w = MCBSP_READ_CACHE(mcbsp, XCCR);
                w = ~(tx ? XDISABLE : 0);
 @@ -940,7 +938,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)

        /* Reset transmitter */
        tx = 1;
 -       if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
 +       if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE2) {
                w = MCBSP_READ_CACHE(mcbsp, XCCR);
                w |= (tx ? XDISABLE : 0);
                MCBSP_WRITE(mcbsp, XCCR, w);
 @@ -950,7 +948,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)

        /* Reset receiver */
        rx = 1;
 -       if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
 +       if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE2) {
                w = MCBSP_READ_CACHE(mcbsp, RCCR);
                w |= (rx ? RDISABLE : 0);
                MCBSP_WRITE(mcbsp, RCCR, w);
 @@ 

Re: [linux-pm] runtime PM usage_count during driver_probe_device()?

[Ming Lei]

Hi,

On Fri, Jul 1, 2011 at 8:33 AM, Rafael J. Wysocki r...@sisk.pl wrote:

 In theory it is possible that a subsystem (e.g. bus type) will enable
 runtime PM for devices without drivers and will (for example) put them
 into low power states until the drivers are loaded.  Then, it makes
 sense for the core to prevent such transitions from racing with .probe().

 I'm not sure if this happens in practice, though, but also I'm not sure
 whether or not that's used by USB.  Moreover, even if that doesn't happen
 right now, it may start to happen at one point.

It should be used by USB, for example, uvcvideo driver has enabled
auto suspend already:

- rmmod uvcvideo

- usb video class device auto suspended

- modprobe uvcvideo   #driver_probe_device()


thanks,
-- 
Ming Lei
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Re: [PATCH 2/3] Add tps65921 chip

[Samuel Ortiz]

Hi Tony,

On Fri, Jul 01, 2011 at 12:35:58AM -0700, Tony Lindgren wrote:
 Samuel,
 
 * gr...@linuxhacker.ru gr...@linuxhacker.ru [110614 08:42]:
  From: Oleg Drokin gr...@linuxhacker.ru
  
  Very similar to TPS65920
  List of differences: http://www.ti.com/litv/pdf/swcu066b
  
  CC: sa...@linux.intel.com
  Signed-off-by: Oleg Drokin gr...@linuxhacker.ru
 
 Looks like this one can be merged independently of the rest of the
 Nook patches via your mfd tree. Care to queue this?
I asked Oleg to rebase this patch against my for-next branch as it was not
applying cleanly. But I never got the fixed patch.
I fixed it up now, and it's applied.

Cheers,
Samuel.

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http://oss.intel.com/
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Re: [PATCH 0/8] HDMI: Split hdmi.c to seperate HDMI IP dependant code from DSS.

[Tomi Valkeinen]

On Fri, 2011-07-01 at 14:52 +0530, K, Mythri P wrote:

  I don't see a need for a separate file right now. We have the
  hdmi_ti_4xxx_ip.c file which contains code for the HDMI block as a
  whole, and could well contain the code that implements the API.
 
 if the hdmi_ti_4xxx_ip.c  is handling the configuration then how are
 we going to handle a scenario where netra uses a different PHY block ,

I wasn't aware that Netra has different HDMI blocks. I understood it's
the same as on OMAP4.

So they have a different PHY driver, but want to use PLL and core parts
of OMAP4 HDMI driver?

 you suggest to have a #if in the programming sequence within
 hdmi_ti_4xxx_ip.c function ?

No, we can't use #ifdefs as the same kernel has to work for both SoCs.

 Also in future OMAP's when are using the PHY and PLL block from
 hdmi_ti_4xxx_ip.c , but a different core/video block from
 hdmi_ti_5xxx_ip.c then how  would hdmi_ti_5xxx_ip.c hdmi_enable be
 able to call the PHY and PLL configuration functions  from
 hdmi_ti_4xxx_ip.c ??

If the different HDMI blocks will be mixed like that, then we need to
split the blocks to separate files. Otherwise it will get strange if
OMAP5 HDMI code is calling PLL functions from OMAP4 HDMI code.

And on top of those drivers/libs we would have a higher level driver/lib
for the whole HDMI entity, and this higher level driver would implement
the API being discussed. It would then use the lower level drivers/libs,
and be used by OMAP/Netra DSS.

 Tomi


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Re: [PATCH v3 1/8] OMAP2+: clockdomain: Add an api to read idle mode

[Paul Walmsley]

Hi

On Mon, 27 Jun 2011, Benoit Cousson wrote:

 From: Rajendra Nayak rna...@ti.com
 
 Add a clockdomain api to check if hardware supervised
 idle transitions are enabled on a clockdomain.

This looks good but I'd also suggest crediting Todd in the changelog for 
his review comments...

 
 Signed-off-by: Rajendra Nayak rna...@ti.com
 Cc: Paul Walmsley p...@pwsan.com
 ---
  arch/arm/mach-omap2/clockdomain.c |   21 +
  arch/arm/mach-omap2/clockdomain.h |3 +++
  2 files changed, 24 insertions(+), 0 deletions(-)
 
 diff --git a/arch/arm/mach-omap2/clockdomain.c 
 b/arch/arm/mach-omap2/clockdomain.c
 index 6cb6c03..3f2a8e7 100644
 --- a/arch/arm/mach-omap2/clockdomain.c
 +++ b/arch/arm/mach-omap2/clockdomain.c
 @@ -795,6 +795,27 @@ void clkdm_deny_idle(struct clockdomain *clkdm)
   arch_clkdm-clkdm_deny_idle(clkdm);
  }
  
 +/**
 + * clkdm_allows_idle - Check if the clkdm hwsup/autoidle is enabled
 + * @clkdm: struct clockdomain *
 + *
 + * Returns true if the clockdomain is in hardware-supervised
 + * idle mode, or 0 otherwise.
 + *
 + */
 +int clkdm_allows_idle(struct clockdomain *clkdm)
 +{
 + if (!clkdm)
 + return -EINVAL;
 +
 + if (!arch_clkdm || !arch_clkdm-clkdm_allows_idle)
 + return -EINVAL;
 +
 + pr_debug(clockdomain: reading idle state for %s\n, clkdm-name);
 +
 + return arch_clkdm-clkdm_allows_idle(clkdm);
 +}
 +
  
  /* Clockdomain-to-clock framework interface code */
  
 diff --git a/arch/arm/mach-omap2/clockdomain.h 
 b/arch/arm/mach-omap2/clockdomain.h
 index 5823584..2d3d970 100644
 --- a/arch/arm/mach-omap2/clockdomain.h
 +++ b/arch/arm/mach-omap2/clockdomain.h
 @@ -138,6 +138,7 @@ struct clockdomain {
   * @clkdm_wakeup: Force a clockdomain to wakeup
   * @clkdm_allow_idle: Enable hw supervised idle transitions for clock domain
   * @clkdm_deny_idle: Disable hw supervised idle transitions for clock domain
 + * @clkdm_allows_idle: Check if hw supervised idle transitions are enabled
   * @clkdm_clk_enable: Put the clkdm in right state for a clock enable
   * @clkdm_clk_disable: Put the clkdm in right state for a clock disable
   */
 @@ -154,6 +155,7 @@ struct clkdm_ops {
   int (*clkdm_wakeup)(struct clockdomain *clkdm);
   void(*clkdm_allow_idle)(struct clockdomain *clkdm);
   void(*clkdm_deny_idle)(struct clockdomain *clkdm);
 + int (*clkdm_allows_idle)(struct clockdomain *clkdm);
   int (*clkdm_clk_enable)(struct clockdomain *clkdm);
   int (*clkdm_clk_disable)(struct clockdomain *clkdm);
  };
 @@ -177,6 +179,7 @@ int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm);
  
  void clkdm_allow_idle(struct clockdomain *clkdm);
  void clkdm_deny_idle(struct clockdomain *clkdm);
 +int clkdm_allows_idle(struct clockdomain *clkdm);
  
  int clkdm_wakeup(struct clockdomain *clkdm);
  int clkdm_sleep(struct clockdomain *clkdm);
 -- 
 1.7.0.4
 


- Paul
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Re: [PATCH v3 2/8] OMAP2+: clockdomain: Add SoC support for clkdm_is_idle

[Paul Walmsley]

Hi

On Mon, 27 Jun 2011, Benoit Cousson wrote:

 From: Rajendra Nayak rna...@ti.com
 
 Add the SoC specific implemenation for clkdm_is_idle
 for OMAP2/3 and OMAP4.

The subject line and the changelog needs to be updated to read 
'clkdm_allows_idle'

Other than that, it looks good.


- Paul

 Signed-off-by: Rajendra Nayak rna...@ti.com
 Cc: Paul Walmsley p...@pwsan.com
 ---
  arch/arm/mach-omap2/clockdomain2xxx_3xxx.c |   12 
  arch/arm/mach-omap2/clockdomain44xx.c  |7 +++
  2 files changed, 19 insertions(+), 0 deletions(-)
 
 diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c 
 b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
 index 48d0db7..81f3e46 100644
 --- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
 +++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
 @@ -13,6 +13,7 @@
   */
  
  #include linux/types.h
 +#include linux/errno.h
  #include plat/prcm.h
  #include prm.h
  #include prm2xxx_3xxx.h
 @@ -146,6 +147,15 @@ static void omap2_clkdm_deny_idle(struct clockdomain 
 *clkdm)
   _clkdm_del_autodeps(clkdm);
  }
  
 +static int omap2_clkdm_allows_idle(struct clockdomain *clkdm)
 +{
 + if (!clkdm-clktrctrl_mask)
 + return -EINVAL;
 +
 + return omap2_cm_is_clkdm_in_hwsup(clkdm-pwrdm.ptr-prcm_offs,
 + clkdm-clktrctrl_mask);
 +}
 +
  static void _enable_hwsup(struct clockdomain *clkdm)
  {
   if (cpu_is_omap24xx())
 @@ -252,6 +262,7 @@ struct clkdm_ops omap2_clkdm_operations = {
   .clkdm_wakeup   = omap2_clkdm_wakeup,
   .clkdm_allow_idle   = omap2_clkdm_allow_idle,
   .clkdm_deny_idle= omap2_clkdm_deny_idle,
 + .clkdm_allows_idle  = omap2_clkdm_allows_idle,
   .clkdm_clk_enable   = omap2_clkdm_clk_enable,
   .clkdm_clk_disable  = omap2_clkdm_clk_disable,
  };
 @@ -269,6 +280,7 @@ struct clkdm_ops omap3_clkdm_operations = {
   .clkdm_wakeup   = omap3_clkdm_wakeup,
   .clkdm_allow_idle   = omap3_clkdm_allow_idle,
   .clkdm_deny_idle= omap3_clkdm_deny_idle,
 + .clkdm_allows_idle  = omap2_clkdm_allows_idle,
   .clkdm_clk_enable   = omap2_clkdm_clk_enable,
   .clkdm_clk_disable  = omap2_clkdm_clk_disable,
  };
 diff --git a/arch/arm/mach-omap2/clockdomain44xx.c 
 b/arch/arm/mach-omap2/clockdomain44xx.c
 index a1a4ecd..1599b18 100644
 --- a/arch/arm/mach-omap2/clockdomain44xx.c
 +++ b/arch/arm/mach-omap2/clockdomain44xx.c
 @@ -93,6 +93,12 @@ static void omap4_clkdm_deny_idle(struct clockdomain 
 *clkdm)
   clkdm-cm_inst, clkdm-clkdm_offs);
  }
  
 +static int omap4_clkdm_allows_idle(struct clockdomain *clkdm)
 +{
 + return omap4_cminst_is_clkdm_in_hwsup(clkdm-prcm_partition,
 + clkdm-cm_inst, clkdm-clkdm_offs);
 +}
 +
  static int omap4_clkdm_clk_enable(struct clockdomain *clkdm)
  {
   bool hwsup = false;
 @@ -132,6 +138,7 @@ struct clkdm_ops omap4_clkdm_operations = {
   .clkdm_wakeup   = omap4_clkdm_wakeup,
   .clkdm_allow_idle   = omap4_clkdm_allow_idle,
   .clkdm_deny_idle= omap4_clkdm_deny_idle,
 + .clkdm_allows_idle  = omap4_clkdm_allows_idle,
   .clkdm_clk_enable   = omap4_clkdm_clk_enable,
   .clkdm_clk_disable  = omap4_clkdm_clk_disable,
  };
 -- 
 1.7.0.4
 

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Re: [PATCH v2 07/13] OMAP4: prm: Replace warm reset API with the offset based version

[Paul Walmsley]

Hi

minor issue...

On Mon, 27 Jun 2011, Benoit Cousson wrote:

 The warm reset function was still using the obsolete API.
 Replace it by the new one and move the file to the proper c file.
 
 Signed-off-by: Benoit Cousson b-cous...@ti.com
 Cc: Paul Walmsley p...@pwsan.com
 Cc: Rajendra Nayak rna...@ti.com
 ---
  arch/arm/mach-omap2/prm44xx.c |   15 ---
  arch/arm/mach-omap2/prm44xx.h |2 --
  arch/arm/mach-omap2/prminst44xx.c |   19 +++
  3 files changed, 19 insertions(+), 17 deletions(-)
 
 diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
 index faec860..f815329 100644
 --- a/arch/arm/mach-omap2/prm44xx.c
 +++ b/arch/arm/mach-omap2/prm44xx.c
 @@ -87,18 +87,3 @@ u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 
 reg)
  {
   return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg);
  }
 -
 -void omap4_prm_global_warm_sw_reset(void)
 -{
 - u32 v;
 -
 - v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
 - OMAP4_RM_RSTCTRL);
 - v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK;
 - omap4_prm_write_inst_reg(v, OMAP4430_PRM_DEVICE_INST,
 -  OMAP4_RM_RSTCTRL);
 -
 - /* OCP barrier */
 - v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
 - OMAP4_RM_RSTCTRL);
 -}
 diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
 index 21b0240..a3887b8 100644
 --- a/arch/arm/mach-omap2/prm44xx.h
 +++ b/arch/arm/mach-omap2/prm44xx.h
 @@ -691,8 +691,6 @@ extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 
 inst, s16 idx);
  extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx);
  extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
  
 -extern void omap4_prm_global_warm_sw_reset(void);
 -
  # endif
  
  #endif
 diff --git a/arch/arm/mach-omap2/prminst44xx.c 
 b/arch/arm/mach-omap2/prminst44xx.c
 index 95fbbcf..f5a9cf5 100644
 --- a/arch/arm/mach-omap2/prminst44xx.c
 +++ b/arch/arm/mach-omap2/prminst44xx.c
 @@ -151,3 +151,22 @@ int omap4_prm_deassert_hardreset(u8 shift, u8 part, s16 
 inst,
  
   return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
  }
 +
 +
 +void omap4_prm_global_warm_sw_reset(void)

This function should be named 'omap4_prminst_global_warm_sw_reset' if it's 
in the prminst44xx.c file.

 +{
 + u32 v;
 +
 + v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
 + OMAP4430_PRM_DEVICE_INST,
 + OMAP4_PRM_RSTCTRL_OFFSET);
 + v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK;
 + omap4_prminst_write_inst_reg(v, OMAP4430_PRM_PARTITION,
 +  OMAP4430_PRM_DEVICE_INST,
 +  OMAP4_PRM_RSTCTRL_OFFSET);
 +
 + /* OCP barrier */
 + v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
 + OMAP4430_PRM_DEVICE_INST,
 + OMAP4_PRM_RSTCTRL_OFFSET);
 +}
 -- 
 1.7.0.4
 


- Paul
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Re: [PATCH 0/8] HDMI: Split hdmi.c to seperate HDMI IP dependant code from DSS.

[K, Mythri P]

Hi Tomi,

On Fri, Jul 1, 2011 at 5:14 PM, Tomi Valkeinen tomi.valkei...@ti.com wrote:
 On Fri, 2011-07-01 at 14:52 +0530, K, Mythri P wrote:

  I don't see a need for a separate file right now. We have the
  hdmi_ti_4xxx_ip.c file which contains code for the HDMI block as a
  whole, and could well contain the code that implements the API.
 
 if the hdmi_ti_4xxx_ip.c  is handling the configuration then how are
 we going to handle a scenario where netra uses a different PHY block ,

 I wasn't aware that Netra has different HDMI blocks. I understood it's
 the same as on OMAP4.

 So they have a different PHY driver, but want to use PLL and core parts
 of OMAP4 HDMI driver?

That was precisely what i was trying to explain for last few threads :-).
 you suggest to have a #if in the programming sequence within
 hdmi_ti_4xxx_ip.c function ?

 No, we can't use #ifdefs as the same kernel has to work for both SoCs.

 Also in future OMAP's when are using the PHY and PLL block from
 hdmi_ti_4xxx_ip.c , but a different core/video block from
 hdmi_ti_5xxx_ip.c then how  would hdmi_ti_5xxx_ip.c hdmi_enable be
 able to call the PHY and PLL configuration functions  from
 hdmi_ti_4xxx_ip.c ??

 If the different HDMI blocks will be mixed like that, then we need to
 split the blocks to separate files. Otherwise it will get strange if
 OMAP5 HDMI code is calling PLL functions from OMAP4 HDMI code.

 And on top of those drivers/libs we would have a higher level driver/lib
 for the whole HDMI entity, and this higher level driver would implement
 the API being discussed. It would then use the lower level drivers/libs,
 and be used by OMAP/Netra DSS.

Splitting that to multiple would be a file overhead , ie creating a
file to just host 2/3 functions.
Also note it is not OMAP5 HDMI code calling OMAP4 HDMI code , It it no
way in relation to OMAP's as such , so these IP drivers be
provisioning for API's , which the intermediate Arbitration lib / file
which can provide the clean handle to user and can handle the sequence
 as to what IP functions should be called.

  Tomi






-- 
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Mythri.
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Re: [PATCH v2 04/13] OMAP: hwmod: Wait the idle status to be disabled

[Cousson, Benoit]

On 7/1/2011 2:34 PM, Paul Walmsley wrote:

Hi

two comments on this one:

On Mon, 27 Jun 2011, Benoit Cousson wrote:


It is mandatory to wait for a module to be in disabled state before
potentially disabling source clock or re-asserting a reset.

omap_hwmod_idle and omap_hwmod_shutdown does not wait for
the module to be fully idle.

Add a cm_xxx accessor to wait the clkctrl idle status to be disabled.
Fix hwmod_[idle|shutdown] to use this API.

Based on Rajendra's initial patch.

Please note that most interconnects hwmod will return one timeout because
it is impossible for them to be in idle since the processor is accessing
the registers though the interconnect.


Should we have some flag in the data for this so the code does not waste
time waiting for those modules to go idle?


That was my initial thought, but I still didn't fully understand the 
reason for all the IPs. For some interconnect paths it makes sense, but 
for some other, I'm still wondering.
This is something we will have to do once we will have a better 
understanding of that status.


Benoit


Signed-off-by: Benoit Coussonb-cous...@ti.com
Signed-off-by: Rajendra Nayakrna...@ti.com
Cc: Paul Walmsleyp...@pwsan.com
---
  arch/arm/mach-omap2/cminst44xx.c |   25 +++
  arch/arm/mach-omap2/cminst44xx.h |1 +
  arch/arm/mach-omap2/omap_hwmod.c |   40 ++
  3 files changed, 66 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 1df740e..fa44ff5 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -244,3 +244,28 @@ int omap4_cm_wait_module_ready(u8 part, u16 inst, s16 
cdoffs, u16 clkctrl_offs)
return (i  MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
  }

+/**
+ * omap4_cm_wait_module_idle - wait for a module to be in 'disabled'
+ * state
+ * @part: PRCM partition ID that the CM_CLKCTRL register exists in
+ * @inst: CM instance register offset (*_INST macro)
+ * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
+ * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
+ *
+ * Wait for the module IDLEST to be disabled. Some PRCM transition,
+ * like reset assertion or parent clock de-activation must wait the
+ * module to be fully disabled.
+ */
+int omap4_cm_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs)
+{
+   int i = 0;
+
+   if (!clkctrl_offs)
+   return 0;
+
+   omap_test_timeout(
+   _clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) == 0x3,
+   MAX_MODULE_READY_TIME, i);
+
+   return (i  MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
+}
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index 9d39c70..4c5da7d 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -18,6 +18,7 @@ extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, 
u16 cdoffs);
  extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs);

  extern int omap4_cm_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 
clkctrl_offs);
+extern int omap4_cm_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 
clkctrl_offs);

  /*
   * In an ideal world, we would not export these low-level functions,
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index ea1c976..adbd4b8 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1029,6 +1029,36 @@ static int _wait_target_ready(struct omap_hwmod *oh)
  }

  /**
+ * _wait_target_disable - wait for a module to be disabled
+ * @oh: struct omap_hwmod *
+ *
+ * Wait for a module @oh to leave slave idle.  Returns 0 if the module
+ * does not have an IDLEST bit or if the module successfully leaves
+ * slave idle; otherwise, pass along the return value of the
+ * appropriate *_cm_wait_module_ready() function.
+ */
+static int _wait_target_disable(struct omap_hwmod *oh)
+{
+   if (!oh)
+   return -EINVAL;
+
+   if (oh-_int_flags  _HWMOD_NO_MPU_PORT)
+   return 0;
+
+   if (oh-flags  HWMOD_NO_IDLEST)
+   return 0;
+
+   /* TODO: For now just handle OMAP4+ */
+   if (cpu_is_omap24xx() || cpu_is_omap34xx())
+   return 0;


This is a pretty minor issue, but I'd suggest moving this up to the
top of this function so the compiler can optimize it out completely on
non-OMAP4 builds.


+
+   return omap4_cm_wait_module_idle(oh-clkdm-prcm_partition,
+oh-clkdm-cm_inst,
+oh-clkdm-clkdm_offs,
+oh-prcm.omap4.clkctrl_offs);
+}
+
+/**
   * _lookup_hardreset - fill register bit info for this hwmod/reset line
   * @oh: struct omap_hwmod *
   * @name: name of the reset line in the context of this hwmod
@@ -1335,6 +1365,8 @@ static int _enable(struct omap_hwmod *oh)
   */
  static int 

Re: [RFC 11/12] omap: mcbsp: Remove conditional compilation for OMAP3

[Jarkko Nikula]

On Fri, 1 Jul 2011 16:30:09 +0530
Varadarajan, Charulatha ch...@ti.com wrote:

  --- a/arch/arm/plat-omap/mcbsp.c
  +++ b/arch/arm/plat-omap/mcbsp.c
  @@ -63,7 +63,6 @@ static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 
  reg, bool from_cache)
         }
   }
 
  -#ifdef CONFIG_ARCH_OMAP3
 
 Are there any plans to move the functions  omap_mcbsp_st_*
 to mach-omap2/* as they are specific to OMAP3 only?
 
I was thinking that for saving code space for non !OMAP3 builds but
thats again is not generic code if sidetone IP gets ever reused in
another silicon. Another platform device for sidetone could be one
solution but I would like to preserve sidetone sysfs nodes to get
registered to McBSP port for keeping the userspace API the same during
the transition (or over a few kernel releases).

-- 
Jarkko
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RE: [PATCH 2/6] OMAP4: hwmod data: Add MSTANDBY_SMART_WKUP flag

[Elaidi, Djamil]

Benoit,

HSI has no RESET_STATUS bit in SYSCONFIG register.

The SYSC should be :

static struct omap_hwmod_class_sysconfig omap44xx_hsi_sysc = {
.rev_offs   = 0x,
.sysc_offs  = 0x0010,
.syss_offs  = 0x0014,
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_EMUFREE |
   SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE |
---SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
+++SYSC_HAS_SOFTRESET),
.idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
   SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
   MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
.sysc_fields= omap_hwmod_sysc_type1,

Best regards
Djamil ELAÏDI
+33 (0)4 97 27 50 97
Software Systems Engineer
OMAP Platform Business Unit - PSI Modem Integration
Texas Instruments


Texas Instruments France SA, 821 Avenue Jack Kilby, 06270 Villeneuve Loubet. 
036 420 040 R.C.S Antibes. Capital de EUR 753.920

-Original Message-

From: linux-omap-ow...@vger.kernel.org 
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Cousson, Benoit
Sent: jeudi 23 juin 2011 23:01
To: p...@pwsan.com
Cc: Nayak, Rajendra; linux-omap@vger.kernel.org; Cousson, Benoit
Subject: [PATCH 2/6] OMAP4: hwmod data: Add MSTANDBY_SMART_WKUP flag

Add the flag to every IPs that support it to allow the
framework to enable it instead of the SMART_STANDBY default
mode.
Without that, an IP with busmaster capability will not
be able to wakeup the interconnect at all.

Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
---
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c |9 +
 1 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c 
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index f7f4840..c531611 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -661,7 +661,8 @@ static struct omap_hwmod_class_sysconfig omap44xx_aess_sysc 
= {
.sysc_offs  = 0x0010,
.sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
.idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
-  MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+  MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART |
+  MSTANDBY_SMART_WKUP),
.sysc_fields= omap_hwmod_sysc_type2,
 };

@@ -2045,7 +2046,7 @@ static struct omap_hwmod_class_sysconfig 
omap44xx_hsi_sysc = {
   SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
.idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
   SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
-  MSTANDBY_SMART),
+  MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
.sysc_fields= omap_hwmod_sysc_type1,
 };

@@ -2447,7 +2448,7 @@ static struct omap_hwmod_class_sysconfig 
omap44xx_iss_sysc = {
   SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
.idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
   SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
-  MSTANDBY_SMART),
+  MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
.sysc_fields= omap_hwmod_sysc_type2,
 };

@@ -3421,7 +3422,7 @@ static struct omap_hwmod_class_sysconfig 
omap44xx_mmc_sysc = {
   SYSC_HAS_SOFTRESET),
.idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
   SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
-  MSTANDBY_SMART),
+  MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
.sysc_fields= omap_hwmod_sysc_type2,
 };

--
1.7.0.4

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Re: [PATCH 2/6] OMAP4: hwmod data: Add MSTANDBY_SMART_WKUP flag

[Cousson, Benoit]

Hi Djamil,

On 7/1/2011 3:50 PM, Elaidi, Djamil wrote:

Benoit,

HSI has no RESET_STATUS bit in SYSCONFIG register.


Yes indeed, the RESETDONE is inside HSI_SYSSTATUS.

And this is what that flag is meaning: SYSS_HAS_RESET_STATUS, with the 
SYSS prefix.


The other one will be SYSC_HAS_RESET_STATUS with the SYSC prefix.

I know this is confusing, like the HW spec :-)



The SYSC should be :

static struct omap_hwmod_class_sysconfig omap44xx_hsi_sysc = {
 .rev_offs   = 0x,
 .sysc_offs  = 0x0010,
 .syss_offs  = 0x0014,
 .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_EMUFREE |
SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE |
---SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),


So these flags are fine.

Benoit


+++SYSC_HAS_SOFTRESET),
 .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
 .sysc_fields=omap_hwmod_sysc_type1,

Best regards
Djamil ELAÏDI
+33 (0)4 97 27 50 97
Software Systems Engineer
OMAP Platform Business Unit - PSI Modem Integration
Texas Instruments


Texas Instruments France SA, 821 Avenue Jack Kilby, 06270 Villeneuve Loubet. 
036 420 040 R.C.S Antibes. Capital de EUR 753.920

-Original Message-

From: linux-omap-ow...@vger.kernel.org 
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Cousson, Benoit
Sent: jeudi 23 juin 2011 23:01
To: p...@pwsan.com
Cc: Nayak, Rajendra; linux-omap@vger.kernel.org; Cousson, Benoit
Subject: [PATCH 2/6] OMAP4: hwmod data: Add MSTANDBY_SMART_WKUP flag

Add the flag to every IPs that support it to allow the
framework to enable it instead of the SMART_STANDBY default
mode.
Without that, an IP with busmaster capability will not
be able to wakeup the interconnect at all.

Signed-off-by: Benoit Coussonb-cous...@ti.com
Cc: Paul Walmsleyp...@pwsan.com
---
  arch/arm/mach-omap2/omap_hwmod_44xx_data.c |9 +
  1 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c 
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index f7f4840..c531611 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -661,7 +661,8 @@ static struct omap_hwmod_class_sysconfig omap44xx_aess_sysc 
= {
 .sysc_offs  = 0x0010,
 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
 .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
-  MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+  MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART |
+  MSTANDBY_SMART_WKUP),
 .sysc_fields=omap_hwmod_sysc_type2,
  };

@@ -2045,7 +2046,7 @@ static struct omap_hwmod_class_sysconfig 
omap44xx_hsi_sysc = {
SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
 .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
-  MSTANDBY_SMART),
+  MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
 .sysc_fields=omap_hwmod_sysc_type1,
  };

@@ -2447,7 +2448,7 @@ static struct omap_hwmod_class_sysconfig 
omap44xx_iss_sysc = {
SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
 .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
-  MSTANDBY_SMART),
+  MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
 .sysc_fields=omap_hwmod_sysc_type2,
  };

@@ -3421,7 +3422,7 @@ static struct omap_hwmod_class_sysconfig 
omap44xx_mmc_sysc = {
SYSC_HAS_SOFTRESET),
 .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
-  MSTANDBY_SMART),
+  MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
 .sysc_fields=omap_hwmod_sysc_type2,
  };

--
1.7.0.4

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Re: [RFC 07/12] omap: mcbsp: Get rid of remaining is_omap tests

[Jarkko Nikula]

Hi

On Fri, 1 Jul 2011 16:41:23 +0530
Varadarajan, Charulatha ch...@ti.com wrote:

  @@ -712,7 +710,7 @@ static inline void omap34xx_mcbsp_free(struct 
  omap_mcbsp *mcbsp)
         /*
          * Disable wakup behavior, smart idle and all wakeups
          */
  -       if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
  +       if (mcbsp-mcbsp_config_type = MCBSP_CONFIG_TYPE3) {
 
 
 I think that it would be a good idea to not use
 MCBSP_CONFIG_TYPE* in plat-omap/* as it is the .rev info.
 At later point of time, this might make the code look uglier
 as it happened with GPIO_METHOD_* flags in OMAP GPIO driver.
 Instead use this .rev info in mach-omap*/ to fill the pdata and pass it
 to driver.
 
Exactly and this is already a little uggly here. Kind of simple
replacement for cpu_is_omap tests and definitely must be replaced with
some feature flags before moving code outside of plat-omap.

-- 
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Build issue.

[Jonathan Cameron]

No time to look into this now, but linux next today is giving:

  CHK include/linux/version.h
  CHK include/generated/utsrelease.h
make[1]: `include/generated/mach-types.h' is up to date.
  CALLscripts/checksyscalls.sh
  CHK include/generated/compile.h
  CC  drivers/media/video/omap/omap_vout.o
drivers/media/video/omap/omap_vout.c: In function 'omap_vout_probe':
drivers/media/video/omap/omap_vout.c:2549:15: error: 'struct omap_dss_driver' 
has no member named 'set_update_mode'
drivers/media/video/omap/omap_vout.c:2550:12: error: 'struct omap_dss_driver' 
has no member named 'set_update_mode'
drivers/media/video/omap/omap_vout.c:2551:8: error: 'OMAP_DSS_UPDATE_MANUAL' 
undeclared (first use in this function)
drivers/media/video/omap/omap_vout.c:2551:8: note: each undeclared identifier 
is reported only once for each function it appears in
drivers/media/video/omap/omap_vout.c:2553:15: error: 'struct omap_dss_driver' 
has no member named 'set_update_mode'
drivers/media/video/omap/omap_vout.c:2554:12: error: 'struct omap_dss_driver' 
has no member named 'set_update_mode'
drivers/media/video/omap/omap_vout.c:2555:8: error: 'OMAP_DSS_UPDATE_AUTO' 
undeclared (first use in this function)
make[4]: *** [drivers/media/video/omap/omap_vout.o] Error 1
make[3]: *** [drivers/media/video/omap] Error 2
make[2]: *** [drivers/media/video] Error 2
make[1]: *** [drivers/media] Error 2
make: *** [drivers] Error 2

Have I missed a relevant patch?
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Re: [linux-pm] runtime PM usage_count during driver_probe_device()?

[Alan Stern]

On Thu, 30 Jun 2011, Kevin Hilman wrote:

 Another curiosity is that, contrary to the above documentation, there is
 no usage_count increment before the bus/driver -remove() (although
 there is a _get_sync/_put_sync around the sysfs_remove and notifier just
 before the bus/driver-remove().

I hadn't noticed that.  There may be a reason for using get_sync 
instead of get_noresume, but it isn't explained anywhere.  And it 
certainly looks like a mistake for the put_sync to occur before the 
-remove() call instead of after.

This needs to be fixed.

Alan Stern

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Re: runtime PM usage_count during driver_probe_device()?

[Kevin Hilman]

Kevin Hilman khil...@ti.com writes:

[...]

 If the device bus type's or driver's -probe() or -remove()
 callback runs pm_runtime_suspend() or pm_runtime_idle() or their
 asynchronous counterparts, they will fail returning -EAGAIN, because
 the device's usage counter is incremented by the core before
 executing -probe() and -remove().  Still, it may be desirable to
 suspend the device as soon as -probe() or -remove() has finished,
 so the PM core uses pm_runtime_idle_sync() to invoke the
 subsystem-level idle callback for the device at that time.

[...]

 Another curiosity is that, contrary to the above documentation, there is
 no usage_count increment before the bus/driver -remove() (although
 there is a _get_sync/_put_sync around the sysfs_remove and notifier just
 before the bus/driver-remove().

OK, so the -probe() part has been explained and makes sense, but I
would expect -remove() to be similarily protected (as the documentation
states.)  But that is not the case.  Is that a bug?  If so, patch below
makes the code match the documentation.

Kevin

From eef73ab2feb203bacb57dc35862f2a9969b61593 Mon Sep 17 00:00:00 2001
From: Kevin Hilman khil...@ti.com
Date: Fri, 1 Jul 2011 07:37:47 -0700
Subject: [PATCH] driver core: prevent runtime PM races with -remove()

Runtime PM Documentation states that the runtime PM usage count is
incremented during driver -probe() and -remove().  This is designed
to prevent driver runtime PM races with subsystems which may initiate
runtime PM transitions before during and after drivers are loaded.

Current code increments the usage_count during -probe() but not
during -remove().  This patch fixes the -remove() part and makes the
code match the documentation.

Signed-off-by: Kevin Hilman khil...@ti.com
---
 drivers/base/dd.c |6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/base/dd.c b/drivers/base/dd.c
index 6658da7..47e079d 100644
--- a/drivers/base/dd.c
+++ b/drivers/base/dd.c
@@ -329,13 +329,13 @@ static void __device_release_driver(struct device *dev)
blocking_notifier_call_chain(dev-bus-p-bus_notifier,
 BUS_NOTIFY_UNBIND_DRIVER,
 dev);
-
-   pm_runtime_put_sync(dev);
-
if (dev-bus  dev-bus-remove)
dev-bus-remove(dev);
else if (drv-remove)
drv-remove(dev);
+
+   pm_runtime_put_sync(dev);
+
devres_release_all(dev);
dev-driver = NULL;
klist_remove(dev-p-knode_driver);
-- 
1.7.4

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Re: [linux-pm] runtime PM usage_count during driver_probe_device()?

[Kevin Hilman]

Ohad Ben-Cohen o...@wizery.com writes:

 On Fri, Jul 1, 2011 at 3:33 AM, Rafael J. Wysocki r...@sisk.pl wrote:
 In theory it is possible that a subsystem (e.g. bus type) will enable
 runtime PM for devices without drivers and will (for example) put them
 into low power states until the drivers are loaded.  Then, it makes
 sense for the core to prevent such transitions from racing with .probe().

 I'm not sure if this happens in practice, though,

 Yeah, this is exactly what the SDIO subsystem is doing.

Thanks, this makes sense.

Maybe runtime_pm.txt should be updated to explain this as well.

Kevin
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Re: [linux-pm] runtime PM usage_count during driver_probe_device()?

[Alan Stern]

On Thu, 30 Jun 2011, Kevin Hilman wrote:

 I'm still confused about the usage_count increment around -probe
 though.

As a few people have already pointed out, some subsystems do perform 
runtime PM on driverless devices.

The basic idea is simple: We don't want any PM callbacks to race with
each other or with other driver-core callbacks.  Incrementing the
usage_count prevents runtime_suspend callbacks while the probe callback
is running.

This does leave open the possibility of runtime_resume occurring 
concurrently with probe.  For the most part this should be okay 
because without a driver, no part of the kernel will try to resume the 
device.

Hmmm, but a resume could occur as a result of userspace writing to a 
sysfs attribute.  It looks like we need to add some lock_device() calls 
to control_store() and autosuspend_delay_ms_store().

Alan Stern

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Re: [RFC 7/8] drivers: introduce rpmsg, a remote-processor messaging bus

[Ohad Ben-Cohen]

On Wed, Jun 29, 2011 at 6:43 PM, Grant Likely grant.lik...@secretlab.ca wrote:
 So you are right that device_unregister drops the refcount to zero,
 but the code still needs to be fixed to not call kfree() directly.

Good point, thanks !

 It also looks like rpmsg_destroy_channel() needs to be fixed to remove
 the kfree call

Yes, I need to remove this direct kfree as well, and indeed just let
rpmsg_release_device do its thing when the last reference is dropped.

I should also remove the direct kfree when device_register fails: in
that case, I need only to put_device and let the release handler do
its thing too.

 and an extra put_device() call.

We need that extra put_device in rpmsg_destroy_channel because
device_find_child() is doing get_device before returning it.

Thanks, Grant!

Ohad.
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Re: [linux-pm] runtime PM usage_count during driver_probe_device()?

[Alan Stern]

On Fri, 1 Jul 2011, Kevin Hilman wrote:

 OK, so the -probe() part has been explained and makes sense, but I
 would expect -remove() to be similarily protected (as the documentation
 states.)  But that is not the case.  Is that a bug?  If so, patch below
 makes the code match the documentation.

I suspect it is a bug, but it's hard to be sure.  It's so _blatantly_ 
wrong that it looks like it was done deliberately.

 Kevin
 
 From eef73ab2feb203bacb57dc35862f2a9969b61593 Mon Sep 17 00:00:00 2001
 From: Kevin Hilman khil...@ti.com
 Date: Fri, 1 Jul 2011 07:37:47 -0700
 Subject: [PATCH] driver core: prevent runtime PM races with -remove()
 
 Runtime PM Documentation states that the runtime PM usage count is
 incremented during driver -probe() and -remove().  This is designed
 to prevent driver runtime PM races with subsystems which may initiate
 runtime PM transitions before during and after drivers are loaded.
 
 Current code increments the usage_count during -probe() but not
 during -remove().  This patch fixes the -remove() part and makes the
 code match the documentation.
 
 Signed-off-by: Kevin Hilman khil...@ti.com
 ---
  drivers/base/dd.c |6 +++---
  1 files changed, 3 insertions(+), 3 deletions(-)
 
 diff --git a/drivers/base/dd.c b/drivers/base/dd.c
 index 6658da7..47e079d 100644
 --- a/drivers/base/dd.c
 +++ b/drivers/base/dd.c
 @@ -329,13 +329,13 @@ static void __device_release_driver(struct device *dev)
   blocking_notifier_call_chain(dev-bus-p-bus_notifier,
BUS_NOTIFY_UNBIND_DRIVER,
dev);
 -
 - pm_runtime_put_sync(dev);
 -
   if (dev-bus  dev-bus-remove)
   dev-bus-remove(dev);
   else if (drv-remove)
   drv-remove(dev);
 +
 + pm_runtime_put_sync(dev);
 +
   devres_release_all(dev);
   dev-driver = NULL;
   klist_remove(dev-p-knode_driver);

To be safer, the put_sync() call should be moved down here.  Or maybe 
even after the blocking_notifier_call_chain() that occurs here.

Alan Stern

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Re: [linux-pm] runtime PM usage_count during driver_probe_device()?

[Kevin Hilman]

Alan Stern st...@rowland.harvard.edu writes:

 On Fri, 1 Jul 2011, Kevin Hilman wrote:

 OK, so the -probe() part has been explained and makes sense, but I
 would expect -remove() to be similarily protected (as the documentation
 states.)  But that is not the case.  Is that a bug?  If so, patch below
 makes the code match the documentation.

 I suspect it is a bug, but it's hard to be sure.  It's so _blatantly_ 
 wrong that it looks like it was done deliberately.

heh

 Kevin
 
 From eef73ab2feb203bacb57dc35862f2a9969b61593 Mon Sep 17 00:00:00 2001
 From: Kevin Hilman khil...@ti.com
 Date: Fri, 1 Jul 2011 07:37:47 -0700
 Subject: [PATCH] driver core: prevent runtime PM races with -remove()
 
 Runtime PM Documentation states that the runtime PM usage count is
 incremented during driver -probe() and -remove().  This is designed
 to prevent driver runtime PM races with subsystems which may initiate
 runtime PM transitions before during and after drivers are loaded.
 
 Current code increments the usage_count during -probe() but not
 during -remove().  This patch fixes the -remove() part and makes the
 code match the documentation.
 
 Signed-off-by: Kevin Hilman khil...@ti.com
 ---
  drivers/base/dd.c |6 +++---
  1 files changed, 3 insertions(+), 3 deletions(-)
 
 diff --git a/drivers/base/dd.c b/drivers/base/dd.c
 index 6658da7..47e079d 100644
 --- a/drivers/base/dd.c
 +++ b/drivers/base/dd.c
 @@ -329,13 +329,13 @@ static void __device_release_driver(struct device *dev)
  blocking_notifier_call_chain(dev-bus-p-bus_notifier,
   BUS_NOTIFY_UNBIND_DRIVER,
   dev);
 -
 -pm_runtime_put_sync(dev);
 -
  if (dev-bus  dev-bus-remove)
  dev-bus-remove(dev);
  else if (drv-remove)
  drv-remove(dev);
 +
 +pm_runtime_put_sync(dev);
 +
  devres_release_all(dev);
  dev-driver = NULL;
  klist_remove(dev-p-knode_driver);

 To be safer, the put_sync() call should be moved down here.  Or maybe 
 even after the blocking_notifier_call_chain() that occurs here.

I was actually thinking about the other direction: moving the get_sync
after the first notifier chain.  IOW, the get_sync/put_sync only
protects the -remove() calls, not the notifiers.

The protection around the notifiers doesn't make sense to me, at least
in the context of driver runtime PM racing with the subsystem.
Especially since these notifiers are likely how the
subsystem/bus/pm_domain code getting notified that there may be a device
to manage in the first place.

Kevin
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Re: [linux-pm] runtime PM usage_count during driver_probe_device()?

[Alan Stern]

On Fri, 1 Jul 2011, Kevin Hilman wrote:

  --- a/drivers/base/dd.c
  +++ b/drivers/base/dd.c
  @@ -329,13 +329,13 @@ static void __device_release_driver(struct device 
  *dev)
 blocking_notifier_call_chain(dev-bus-p-bus_notifier,
  BUS_NOTIFY_UNBIND_DRIVER,
  dev);
  -
  -  pm_runtime_put_sync(dev);
  -
 if (dev-bus  dev-bus-remove)
 dev-bus-remove(dev);
 else if (drv-remove)
 drv-remove(dev);
  +
  +  pm_runtime_put_sync(dev);
  +
 devres_release_all(dev);
 dev-driver = NULL;
 klist_remove(dev-p-knode_driver);
 
  To be safer, the put_sync() call should be moved down here.  Or maybe 
  even after the blocking_notifier_call_chain() that occurs here.
 
 I was actually thinking about the other direction: moving the get_sync
 after the first notifier chain.  IOW, the get_sync/put_sync only
 protects the -remove() calls, not the notifiers.
 
 The protection around the notifiers doesn't make sense to me, at least
 in the context of driver runtime PM racing with the subsystem.
 Especially since these notifiers are likely how the
 subsystem/bus/pm_domain code getting notified that there may be a device
 to manage in the first place.

The get_sync part doesn't matter so much.  Moving it past the notifier 
call would probably be okay -- unless one of the listeners on the 
notifier chain expects the device to be active.  Changing the get_sync 
to get_noresume would probably also be okay -- subject to a similar 
reservation.

The problem with the put_sync isn't the notifier.  If you leave it
where you've got it now, you'll end up invoking a callback at a time
when the driver thinks it no longer controls the device but the
driver-model core still thinks it does.  You certainly want to do the

dev-driver = NULL;

first.

Alan Stern

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Re: [PATCHv3 2/3] MMC: OMAP: HSMMC: add runtime pm support

[T Krishnamoorthy, Balaji]

On Fri, Jul 1, 2011 at 4:53 AM, Kevin Hilman khil...@ti.com wrote:
 Balaji T K balaj...@ti.com writes:

 +static int omap_hsmmc_runtime_resume(struct device *dev)
 +{
 +     struct omap_hsmmc_host *host;
 +
 +     host = platform_get_drvdata(to_platform_device(dev));
 +     omap_hsmmc_context_restore(host);
 +     dev_dbg(mmc_dev(host-mmc), host: enabled\n);

 Minor: this has a 'host: ' prefix, where as the one in
 .runtime_suspend() does not.

Fixing it in V4


 +
 +     return 0;
 +}
 +

 Kevin

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Re: [PATCH 0/7] OMAP4: Add 4460 base support

[Kevin Hilman]

Hi Rajendra,

Rajendra Nayak rna...@ti.com writes:

 This series adds base support needed to be able
 to boot on a OMAP4460 device.
 Patches are based on Benoit's for_3.0.1/7_hwmod_modulemode
 branch and boot tested on both 4460sdp as well as 4430sdp.

Since you're on the delivery path of these patches, they  need your
signoff as well.  Several are missing your signoff.

Also, please Cc linux-arm-kernel.

Thanks,

Kevin

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Re: [PATCH 0/7] OMAP4: Add 4460 base support

[Kevin Hilman]

Rajendra Nayak rna...@ti.com writes:

 This series adds base support needed to be able
 to boot on a OMAP4460 device.
 Patches are based on Benoit's for_3.0.1/7_hwmod_modulemode
 branch and boot tested on both 4460sdp as well as 4430sdp.

Can you also briefly summarize the dependencies between this series an
Benoit's?   I'm assuming it is mainly because of the s/4430/44XX/
changes, and also avoiding conflicts in clockdomain and powerdomain data
files.

With that, you can add

Reviewed-by: Kevin Hilman khil...@ti.com

for the whole series.

Kevin
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Re: [PATCH 0/7] OMAP4: Add 4460 base support

[Kevin Hilman]

On Fri, 2011-07-01 at 09:36 -0700, Kevin Hilman wrote:
 Rajendra Nayak rna...@ti.com writes:
 
  This series adds base support needed to be able
  to boot on a OMAP4460 device.
  Patches are based on Benoit's for_3.0.1/7_hwmod_modulemode
  branch and boot tested on both 4460sdp as well as 4430sdp.
 
 Can you also briefly summarize the dependencies between this series an
 Benoit's?   I'm assuming it is mainly because of the s/4430/44XX/
 changes, and also avoiding conflicts in clockdomain and powerdomain data
 files.
 
 With that, you can add
 
 Reviewed-by: Kevin Hilman khil...@ti.com
 
 for the whole series.

oops, except for [7/7], where I agree with Tony.

As discussed off-list, lets just drop this patch all together and state
in [0/7] that there is a limitation that until we fix the hwmod fwk to
do lazy disable as Tony suggested, 4460 can only reliably boot at OPP50.

Kevin


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[PATCHv4 0/3] OMAP: HSMMC: cleanup and runtime pm

[Balaji T K]

Removing the custom state machine - lazy disable framework in omap_hsmmc
to make way for runtime pm to handle host controller
power states.
This allows mmc_host_enable/mmc_host_disable to be replaced by
runtime get_sync and put_sync at host controller driver.

Enable runtime PM in omap_hsmmc

Rebased to MMC tree : mmc-next branch
Tested on OMAP4430SDP, OMAP3430SDP, OMAP2430SDP

MMC runtime patch has dependency on
[PATCH 0/6] OMAP2+: hwmod framework fixes [1]
for MMC1/MMC2 clock to get ungated after idle in OMAP4.

Without [1] patches, MMC1/MMC2 fails to get detected on OMAP4.

[1] http://www.mail-archive.com/linux-omap@vger.kernel.org/msg51457.html

Balaji T K (3):
  MMC: OMAP: HSMMC: Remove lazy_disable
  MMC: OMAP: HSMMC: add runtime pm support
  MMC: OMAP: HSMMC: Remove unused iclk

 drivers/mmc/host/omap_hsmmc.c |  365 +++--
 1 files changed, 57 insertions(+), 308 deletions(-)

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[PATCHv4 1/3] MMC: OMAP: HSMMC: Remove lazy_disable

[Balaji T K]

lazy_disable framework in OMAP HSMMC manages multiple low power states
and Card is powered off after inactivity time of 8 seconds.
Based on previous discussion on the list, card power (regulator)
handling (when to power OFF/ON) should ideally be handled by core layer.
Remove usage of lazy disable to allow core layer _only_ to handle card power.
With the removal of lazy disable framework, MMC regulators
are left ON until MMC_POWER_OFF via set_ios.

Signed-off-by: Balaji T K balaj...@ti.com
---
 drivers/mmc/host/omap_hsmmc.c |  246 +
 1 files changed, 2 insertions(+), 244 deletions(-)

diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index cd317af..819ff08 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -120,11 +120,6 @@
 #define OMAP_MMC_MASTER_CLOCK  9600
 #define DRIVER_NAMEomap_hsmmc
 
-/* Timeouts for entering power saving states on inactivity, msec */
-#define OMAP_MMC_DISABLED_TIMEOUT  100
-#define OMAP_MMC_SLEEP_TIMEOUT 1000
-#define OMAP_MMC_OFF_TIMEOUT   8000
-
 /*
  * One controller can have multiple slots, like on some omap boards using
  * omap.c controller driver. Luckily this is not currently done on any known
@@ -1628,8 +1623,6 @@ static void omap_hsmmc_set_ios(struct mmc_host *mmc, 
struct mmc_ios *ios)
 
if (host-power_mode == MMC_POWER_OFF)
mmc_host_disable(host-mmc);
-   else
-   mmc_host_lazy_disable(host-mmc);
 }
 
 static int omap_hsmmc_get_cd(struct mmc_host *mmc)
@@ -1685,220 +1678,6 @@ static void omap_hsmmc_conf_bus_power(struct 
omap_hsmmc_host *host)
set_sd_bus_power(host);
 }
 
-/*
- * Dynamic power saving handling, FSM:
- *   ENABLED - DISABLED - CARDSLEEP / REGSLEEP - OFF
- * ^___|  |  |
- * |__|__|
- *
- * ENABLED:   mmc host is fully functional
- * DISABLED:  fclk is off
- * CARDSLEEP: fclk is off, card is asleep, voltage regulator is asleep
- * REGSLEEP:  fclk is off, voltage regulator is asleep
- * OFF:   fclk is off, voltage regulator is off
- *
- * Transition handlers return the timeout for the next state transition
- * or negative error.
- */
-
-enum {ENABLED = 0, DISABLED, CARDSLEEP, REGSLEEP, OFF};
-
-/* Handler for [ENABLED - DISABLED] transition */
-static int omap_hsmmc_enabled_to_disabled(struct omap_hsmmc_host *host)
-{
-   omap_hsmmc_context_save(host);
-   clk_disable(host-fclk);
-   host-dpm_state = DISABLED;
-
-   dev_dbg(mmc_dev(host-mmc), ENABLED - DISABLED\n);
-
-   if (host-power_mode == MMC_POWER_OFF)
-   return 0;
-
-   return OMAP_MMC_SLEEP_TIMEOUT;
-}
-
-/* Handler for [DISABLED - REGSLEEP / CARDSLEEP] transition */
-static int omap_hsmmc_disabled_to_sleep(struct omap_hsmmc_host *host)
-{
-   int err, new_state;
-
-   if (!mmc_try_claim_host(host-mmc))
-   return 0;
-
-   clk_enable(host-fclk);
-   omap_hsmmc_context_restore(host);
-   if (mmc_card_can_sleep(host-mmc)) {
-   err = mmc_card_sleep(host-mmc);
-   if (err  0) {
-   clk_disable(host-fclk);
-   mmc_release_host(host-mmc);
-   return err;
-   }
-   new_state = CARDSLEEP;
-   } else {
-   new_state = REGSLEEP;
-   }
-   if (mmc_slot(host).set_sleep)
-   mmc_slot(host).set_sleep(host-dev, host-slot_id, 1, 0,
-new_state == CARDSLEEP);
-   /* FIXME: turn off bus power and perhaps interrupts too */
-   clk_disable(host-fclk);
-   host-dpm_state = new_state;
-
-   mmc_release_host(host-mmc);
-
-   dev_dbg(mmc_dev(host-mmc), DISABLED - %s\n,
-   host-dpm_state == CARDSLEEP ? CARDSLEEP : REGSLEEP);
-
-   if (mmc_slot(host).no_off)
-   return 0;
-
-   if ((host-mmc-caps  MMC_CAP_NONREMOVABLE) ||
-   mmc_slot(host).card_detect ||
-   (mmc_slot(host).get_cover_state 
-mmc_slot(host).get_cover_state(host-dev, host-slot_id)))
-   return OMAP_MMC_OFF_TIMEOUT;
-
-   return 0;
-}
-
-/* Handler for [REGSLEEP / CARDSLEEP - OFF] transition */
-static int omap_hsmmc_sleep_to_off(struct omap_hsmmc_host *host)
-{
-   if (!mmc_try_claim_host(host-mmc))
-   return 0;
-
-   if (mmc_slot(host).no_off)
-   return 0;
-
-   if (!((host-mmc-caps  MMC_CAP_NONREMOVABLE) ||
- mmc_slot(host).card_detect ||
- (mmc_slot(host).get_cover_state 
-  mmc_slot(host).get_cover_state(host-dev, host-slot_id {
-   mmc_release_host(host-mmc);
-   return 0;
-   }
-
-   mmc_slot(host).set_power(host-dev, host-slot_id, 0, 0);
-   host-vdd = 0;
-   host-power_mode = MMC_POWER_OFF;
-
-   dev_dbg(mmc_dev(host-mmc), 

[PATCHv4 2/3] MMC: OMAP: HSMMC: add runtime pm support

[Balaji T K]

add runtime pm support to HSMMC host controller
Use runtime pm API to enable/disable HSMMC clock
Use runtime autosuspend APIs to enable auto suspend delay

Based on OMAP HSMMC runtime implementation by Kevin Hilman, Kishore Kadiyala

Signed-off-by: Balaji T K balaj...@ti.com
---
changes since v3
remove host: prefix for dev_dbg in omap_hsmmc_runtime_resume
retain omap_hsmmc_enable/disable_fclk function names to avoid
possible merge conflicts with [1]
[1] http://www.spinics.net/lists/linux-mmc/msg08836.html

changes since v2
Change autosuspend delay to 100ms.

changes since v1
Removed pm_runtime_allow, pm_runtime_forbid, pm_suspend_ignore_children calls.

 drivers/mmc/host/omap_hsmmc.c |  111 +
 1 files changed, 56 insertions(+), 55 deletions(-)

diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 819ff08..3d01e3f 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -33,6 +33,7 @@
 #include linux/semaphore.h
 #include linux/gpio.h
 #include linux/regulator/consumer.h
+#include linux/pm_runtime.h
 #include plat/dma.h
 #include mach/hardware.h
 #include plat/board.h
@@ -116,6 +117,7 @@
 #define OMAP_MMC4_DEVID3
 #define OMAP_MMC5_DEVID4
 
+#define MMC_AUTOSUSPEND_DELAY  100
 #define MMC_TIMEOUT_MS 20
 #define OMAP_MMC_MASTER_CLOCK  9600
 #define DRIVER_NAMEomap_hsmmc
@@ -1147,8 +1149,7 @@ static int omap_hsmmc_switch_opcond(struct 
omap_hsmmc_host *host, int vdd)
int ret;
 
/* Disable the clocks */
-   clk_disable(host-fclk);
-   clk_disable(host-iclk);
+   pm_runtime_put_sync(host-dev);
if (host-got_dbclk)
clk_disable(host-dbclk);
 
@@ -1159,8 +1160,7 @@ static int omap_hsmmc_switch_opcond(struct 
omap_hsmmc_host *host, int vdd)
if (!ret)
ret = mmc_slot(host).set_power(host-dev, host-slot_id, 1,
   vdd);
-   clk_enable(host-iclk);
-   clk_enable(host-fclk);
+   pm_runtime_get_sync(host-dev);
if (host-got_dbclk)
clk_enable(host-dbclk);
 
@@ -1526,7 +1526,7 @@ static void omap_hsmmc_set_ios(struct mmc_host *mmc, 
struct mmc_ios *ios)
u32 con;
int do_send_init_stream = 0;
 
-   mmc_host_enable(host-mmc);
+   pm_runtime_get_sync(host-dev);
 
if (ios-power_mode != host-power_mode) {
switch (ios-power_mode) {
@@ -1621,8 +1621,7 @@ static void omap_hsmmc_set_ios(struct mmc_host *mmc, 
struct mmc_ios *ios)
else
OMAP_HSMMC_WRITE(host-base, CON, con  ~OD);
 
-   if (host-power_mode == MMC_POWER_OFF)
-   mmc_host_disable(host-mmc);
+   pm_runtime_put_autosuspend(host-dev);
 }
 
 static int omap_hsmmc_get_cd(struct mmc_host *mmc)
@@ -1681,13 +1680,9 @@ static void omap_hsmmc_conf_bus_power(struct 
omap_hsmmc_host *host)
 static int omap_hsmmc_enable_fclk(struct mmc_host *mmc)
 {
struct omap_hsmmc_host *host = mmc_priv(mmc);
-   int err;
 
-   err = clk_enable(host-fclk);
-   if (err)
-   return err;
-   dev_dbg(mmc_dev(host-mmc), mmc_fclk: enabled\n);
-   omap_hsmmc_context_restore(host);
+   pm_runtime_get_sync(host-dev);
+
return 0;
 }
 
@@ -1695,9 +1690,9 @@ static int omap_hsmmc_disable_fclk(struct mmc_host *mmc, 
int lazy)
 {
struct omap_hsmmc_host *host = mmc_priv(mmc);
 
-   omap_hsmmc_context_save(host);
-   clk_disable(host-fclk);
-   dev_dbg(mmc_dev(host-mmc), mmc_fclk: disabled\n);
+   pm_runtime_mark_last_busy(host-dev);
+   pm_runtime_put_autosuspend(host-dev);
+
return 0;
 }
 
@@ -1738,10 +1733,7 @@ static int omap_hsmmc_regs_show(struct seq_file *s, void 
*data)
return 0;
}
 
-   if (clk_enable(host-fclk) != 0) {
-   seq_printf(s, can't read the regs\n);
-   return 0;
-   }
+   pm_runtime_get_sync(host-dev);
 
seq_printf(s, SYSCONFIG:\t0x%08x\n,
OMAP_HSMMC_READ(host-base, SYSCONFIG));
@@ -1758,7 +1750,8 @@ static int omap_hsmmc_regs_show(struct seq_file *s, void 
*data)
seq_printf(s, CAPA:\t\t0x%08x\n,
OMAP_HSMMC_READ(host-base, CAPA));
 
-   clk_disable(host-fclk);
+   pm_runtime_mark_last_busy(host-dev);
+   pm_runtime_put_autosuspend(host-dev);
 
return 0;
 }
@@ -1878,18 +1871,10 @@ static int __init omap_hsmmc_probe(struct 
platform_device *pdev)
 
mmc-caps |= MMC_CAP_DISABLE;
 
-   if (clk_enable(host-iclk) != 0) {
-   clk_put(host-iclk);
-   clk_put(host-fclk);
-   goto err1;
-   }
-
-   if (mmc_host_enable(host-mmc) != 0) {
-   clk_disable(host-iclk);
-   clk_put(host-iclk);
-   clk_put(host-fclk);
-   goto err1;
-   }
+   pm_runtime_enable(host-dev);
+   

[PATCHv4 3/3] MMC: OMAP: HSMMC: Remove unused iclk

[Balaji T K]

After runtime conversion to handle clk,
iclk node is not used
However fclk node is still used to get clock rate.

Signed-off-by: Balaji T K balaj...@ti.com
---
 drivers/mmc/host/omap_hsmmc.c |   10 --
 1 files changed, 0 insertions(+), 10 deletions(-)

diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 3d01e3f..aae4105 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -145,7 +145,6 @@ struct omap_hsmmc_host {
struct  mmc_command *cmd;
struct  mmc_data*data;
struct  clk *fclk;
-   struct  clk *iclk;
struct  clk *dbclk;
/*
 * vcc == configured supply
@@ -1853,17 +1852,10 @@ static int __init omap_hsmmc_probe(struct 
platform_device *pdev)
 
spin_lock_init(host-irq_lock);
 
-   host-iclk = clk_get(pdev-dev, ick);
-   if (IS_ERR(host-iclk)) {
-   ret = PTR_ERR(host-iclk);
-   host-iclk = NULL;
-   goto err1;
-   }
host-fclk = clk_get(pdev-dev, fck);
if (IS_ERR(host-fclk)) {
ret = PTR_ERR(host-fclk);
host-fclk = NULL;
-   clk_put(host-iclk);
goto err1;
}
 
@@ -2021,7 +2013,6 @@ err_irq:
pm_runtime_mark_last_busy(host-dev);
pm_runtime_put_autosuspend(host-dev);
clk_put(host-fclk);
-   clk_put(host-iclk);
if (host-got_dbclk) {
clk_disable(host-dbclk);
clk_put(host-dbclk);
@@ -2057,7 +2048,6 @@ static int omap_hsmmc_remove(struct platform_device *pdev)
pm_runtime_put_sync(host-dev);
pm_runtime_disable(host-dev);
clk_put(host-fclk);
-   clk_put(host-iclk);
if (host-got_dbclk) {
clk_disable(host-dbclk);
clk_put(host-dbclk);
-- 
1.7.0.4

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Re: [linux-pm] runtime PM usage_count during driver_probe_device()?

[Kevin Hilman]

Alan Stern st...@rowland.harvard.edu writes:

 On Fri, 1 Jul 2011, Kevin Hilman wrote:

  --- a/drivers/base/dd.c
  +++ b/drivers/base/dd.c
  @@ -329,13 +329,13 @@ static void __device_release_driver(struct device 
  *dev)
blocking_notifier_call_chain(dev-bus-p-bus_notifier,
 BUS_NOTIFY_UNBIND_DRIVER,
 dev);
  -
  - pm_runtime_put_sync(dev);
  -
if (dev-bus  dev-bus-remove)
dev-bus-remove(dev);
else if (drv-remove)
drv-remove(dev);
  +
  + pm_runtime_put_sync(dev);
  +
devres_release_all(dev);
dev-driver = NULL;
klist_remove(dev-p-knode_driver);
 
  To be safer, the put_sync() call should be moved down here.  Or maybe 
  even after the blocking_notifier_call_chain() that occurs here.
 
 I was actually thinking about the other direction: moving the get_sync
 after the first notifier chain.  IOW, the get_sync/put_sync only
 protects the -remove() calls, not the notifiers.
 
 The protection around the notifiers doesn't make sense to me, at least
 in the context of driver runtime PM racing with the subsystem.
 Especially since these notifiers are likely how the
 subsystem/bus/pm_domain code getting notified that there may be a device
 to manage in the first place.

 The get_sync part doesn't matter so much.  Moving it past the notifier 
 call would probably be okay -- unless one of the listeners on the 
 notifier chain expects the device to be active.  Changing the get_sync 
 to get_noresume would probably also be okay -- subject to a similar 
 reservation.

There are enough probablys in the above to make me a bit uncomfortable
making this change.  Maybe you can take this patch forward?

Kevin

 The problem with the put_sync isn't the notifier.  If you leave it
 where you've got it now, you'll end up invoking a callback at a time
 when the driver thinks it no longer controls the device but the
 driver-model core still thinks it does.  You certainly want to do the

   dev-driver = NULL;

 first.

 Alan Stern
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Re: [PATCH 0/7] OMAP4: Add 4460 base support

[Rajendra Nayak]

On 7/1/2011 9:40 AM, Kevin Hilman wrote:

On Fri, 2011-07-01 at 09:36 -0700, Kevin Hilman wrote:

Rajendra Nayakrna...@ti.com  writes:


This series adds base support needed to be able
to boot on a OMAP4460 device.
Patches are based on Benoit's for_3.0.1/7_hwmod_modulemode
branch and boot tested on both 4460sdp as well as 4430sdp.


Can you also briefly summarize the dependencies between this series an
Benoit's?   I'm assuming it is mainly because of the s/4430/44XX/
changes, and also avoiding conflicts in clockdomain and powerdomain data
files.

With that, you can add

Reviewed-by: Kevin Hilmankhil...@ti.com

for the whole series.


oops, except for [7/7], where I agree with Tony.

As discussed off-list, lets just drop this patch all together and state
in [0/7] that there is a limitation that until we fix the hwmod fwk to
do lazy disable as Tony suggested, 4460 can only reliably boot at OPP50.


Sure, I'll re-post the series once I have Benoit's updated one's
to base on.

Thanks Kevin.



Kevin




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[PATCH] MMC: OMAP: change HSMMC maintainence to Orphan

[Kevin Hilman]

From: Madhusudhan Chikkature madhu...@ti.com

Update the OMAP HS MMC entry from the MAINTAINERS file as I will
no longer be able to maintain this driver.

Signed-off-by: Madhusudhan Chikkature madhu...@ti.com
[khil...@ti.com: change to Orphan rather than complete removal]
Signed-off-by: Kevin Hilman khil...@ti.com
---
Applies to v3.0-rc5

 MAINTAINERS |3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index f0358cd..2f238b5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4574,9 +4574,8 @@ S:Maintained
 F: drivers/mmc/host/omap.c
 
 OMAP HS MMC SUPPORT
-M: Madhusudhan Chikkature madhu...@ti.com
 L: linux-omap@vger.kernel.org
-S: Maintained
+S: Orphan
 F: drivers/mmc/host/omap_hsmmc.c
 
 OMAP RANDOM NUMBER GENERATOR SUPPORT
-- 
1.7.6

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Re: [PATCH] OMAP: HSMMC maintainence

[Kevin Hilman]

S, Venkatraman svenk...@ti.com writes:

 On Fri, Jul 1, 2011 at 2:37 AM,  Chikkature@lina0132712 wrote:
 From: Madhusudhan Chikkature madhu...@ti.com

 Removing the OMAP HS MMC entry from the MAINTAINERS file as I will
 no longer be able to maintain this driver.

 Signed-off-by: Madhusudhan Chikkature madhu...@ti.com

[...]

 It would be better to just change the status to 'Orphaned' than
 deleting the entire section.

Agreed, I'll post an updated patch, and also Cc LKML.

Kevin
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gpio interrupt is not invoked on Panda board

[hong zhang]

List,

I try to get gpio_191 ping interrupted on panda but never succeeded. What I do 
is

1. set 0x410b on dpm_emu19 register to enable interrupt and wakeup 
   on gpio_191
2. set bit 31 to 1 on GPIO_IRQSTATUS_SET_0 register at 0x4805d034
3. set bit 31 to 1 on GPIO_IRQWAKEN_0 register at 0x4805d044
4. set bit 31 to 0 on GPIO_OE register at 0x4805d134 (output)
5. set bit 31 to 1 on GPIO_SETDATAOUT register at 0x4805d194

Then I expect I should see interrupt on GPIO_IRQSTATUS_0 register at 
0x4805d02c. But nothing happens for both output and input (put pin on ground or 
1,8v).

Would you please give me hint what I miss here to get interrupt happened?
I want to use gpio_191 for IR receiver.

Thanks.

---henry
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[PATCH 0/6 V2] arm: omap: usb: Runtime PM support for EHCI and OHCI drivers

[Keshava Munegowda]

From: Keshava Munegowda keshava_mgo...@ti.com

The Hwmod structures and Runtime PM features are implemented
For EHCI and OHCI drivers of OMAP3 and OMAP4.
The global suspend/resume of EHCI and OHCI
is validated on OMAP3430 sdp board with these patches.

Benoit Cousson (1):
  arm: omap: usb: ehci and ohci hwmod structures for omap4

Keshava Munegowda (5):
  arm: omap: usb: ehci and ohci hwmod structures for omap3
  arm: omap: usb: register hwmods of usbhs
  arm: omap: usb: device name change for the clk names of usbhs
  arm: omap: usb: Runtime PM support
  arm: omap: usb: global Suspend and resume support of ehci and ohci

 arch/arm/mach-omap2/clock3xxx_data.c   |   28 +-
 arch/arm/mach-omap2/clock44xx_data.c   |   10 +-
 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |  279 +
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c |  235 +++
 arch/arm/mach-omap2/usb-host.c |  113 +++---
 arch/arm/plat-omap/include/plat/usb.h  |3 -
 drivers/mfd/omap-usb-host.c|  620 +---
 drivers/usb/host/ehci-omap.c   |   36 ++-
 drivers/usb/host/ohci-omap3.c  |   33 ++-
 9 files changed, 914 insertions(+), 443 deletions(-)

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