Hi Keshav,
Some minor comments
On Wednesday 24 August 2011 08:01 PM, Keshava Munegowda wrote:
From: Keshava Munegowdakeshava_mgo...@ti.com
The usbhs core driver does not enable/disable the interface and
functional clocks; These clocks are handled by hwmod and runtime pm,
hence instead of the
On Thu, Aug 25, 2011 at 12:03 PM, Shubhrajyoti shubhrajy...@ti.com wrote:
Hi Keshav,
Some minor comments
On Wednesday 24 August 2011 08:01 PM, Keshava Munegowda wrote:
From: Keshava Munegowdakeshava_mgo...@ti.com
The usbhs core driver does not enable/disable the interface and
functional
On Wed, Aug 24, 2011 at 4:30 PM, Munegowda, Keshava
keshava_mgo...@ti.com wrote:
On Wed, Aug 24, 2011 at 12:27 PM, Roger Quadros rog...@ti.com wrote:
Hi,
On 08/17/2011 02:43 PM, Keshava Munegowda wrote:
From: Benoit Cousson b-cous...@ti.com
Following 4 hwmod strcuture are added:
UHH hwmod
Felipe
On Fri, Aug 12, 2011 at 10:21 AM, Pandita, Vikram vikram.pand...@ti.com wrote:
On Fri, Aug 12, 2011 at 10:04 AM, Alan Stern st...@rowland.harvard.edu
wrote:
On Fri, 12 Aug 2011, Pandita, Vikram wrote:
On Fri, Aug 12, 2011 at 8:50 AM, Alan Stern st...@rowland.harvard.edu
wrote:
From: Benoit Cousson b-cous...@ti.com
Following 4 hwmod structures are added:
UHH hwmod of usbhs with uhh base address and functional clock,
EHCI hwmod with irq and base address,
OHCI hwmod with irq and base address,
TLL hwmod of usbhs with the TLL base address and irq.
Signed-off-by: Benoit
Following 4 hwmod structure are added:
UHH hwmod of usbhs with uhh base address and functional clock,
EHCI hwmod with irq and base address,
OHCI hwmod with irq and base address,
TLL hwmod of usbhs with the TLL base address and irq.
Signed-off-by: Keshava Munegowda keshava_mgo...@ti.com
---
From: Keshava Munegowda keshava_mgo...@ti.com
The Hwmod structures and Runtime PM features are implemented
For EHCI and OHCI drivers of OMAP3 and OMAP4.
The global suspend/resume of EHCI and OHCI
is validated on OMAP3430 sdp board with these patches.
these patches are rebased to kevin's pm
From: Keshava Munegowda keshava_mgo...@ti.com
The usbhs core driver does not enable/disable the interface and
functional clocks; These clocks are handled by hwmod and runtime pm,
hence instead of the clock enable/disable, the runtime pm APIS are
used. however,the port clocks are handled by the
The hwmod structure of uhh, ohci, ehci and tll are
retrieved and registered with omap device
Signed-off-by: Keshava Munegowda keshava_mgo...@ti.com
---
arch/arm/mach-omap2/usb-host.c | 114 +--
1 files changed, 50 insertions(+), 64 deletions(-)
diff --git
From: Keshava Munegowda keshava_mgo...@ti.com
device name usbhs clocks are changed from
usbhs-omap.0 to usbhs_omap; this is because
in the hwmod registration the device name is set
as usbhs_omap; The redudant clock nodes are removed.
Signed-off-by: Keshava Munegowda keshava_mgo...@ti.com
---
On Wed, Aug 24, 2011 at 08:07:12PM +0530, Keerthy wrote:
...
+ temp_sensor-phy_base = ioremap(mem-start, resource_size(mem));
Check NULL return.
temp_sensor-phy_base is never iounmapped in error paths or _remove
function.
...
+static int __devexit omap_temp_sensor_remove(struct
Tony,
On Thursday 02 June 2011 05:36 PM, Santosh Shilimkar wrote:
HIGMEM support is kernel is quite mature now and we have boards
like ZOOM, PANDA, SDP where 1 GB memories are installed.
Enable HIGMEM to make use of the additional memory.
Signed-off-by: Santosh
Set the VAUX2 regulator supply to 1.8V for the HSUSB host interface.
Tps65950 GPIO2 has to be set to zero in order to enable the EHCI select line.
Signed-off-by: Bryan DE FARIA bdefa...@adeneo-embedded.com
---
arch/arm/mach-omap2/board-omap3evm.c | 25 +
1 files
On Thu, Aug 25, 2011 at 09:35:07AM +0530, Pedanekar, Hemant wrote:
E.g., on OMAP3 with mem=32M@0x8000 mem=8M@0x8780
(CASE 1)
Memory: 32MB 8MB = 40MB total
Memory: 28408k/28408k available, 12552k reserved, 0K highmem
Virtual kernel memory layout:
vector : 0x -
On Thu, Aug 25, 2011 at 02:16:14AM +0300, Felipe Balbi wrote:
on top of all that, for IPs which are used on many SoCs (such as MUSB)
it's quite silly to force all users to provide resources in a certain
order. It sounds to me that this will be prone to error in many ways
until everything is
On Wed, Aug 24, 2011 at 10:46 PM, Guenter Roeck
guenter.ro...@ericsson.com wrote:
On Wed, Aug 24, 2011 at 10:37:12AM -0400, Keerthy wrote:
On chip temperature sensor driver. The driver monitors the temperature of
the MPU subsystem of the OMAP4. It sends notifications to the user space if
the
On Tue, Aug 23, 2011 at 11:31:54PM +0200, Rafael J. Wysocki wrote:
Perhaps. Still, that requires some policy to be put into drivers,
which I don't think is entirely correct.
So, I don't really have the bandwidth to discuss this properly for at
least the next week or so - is it possible to
Hi,
There seems to be a problem with 3.1-rc3, which prevents it from booting
on my PandaBoard (ARM OMAP4).
3.1-rc2 works fine, so I have bisected the problem and it turns out to
be caused by this:
commit f3637a5f2e2eb391ff5757bc83fb5de8f9726464
Author: Sebastian Andrzej Siewior
* Luciano Coelho | 2011-08-25 13:39:29 [+0300]:
Hi,
Hi,
Any ideas what may be going wrong?
I think my commit was identified as bogus and tglx is going to revert
it. The problem is that I force ONESHOT mode for all threaded IRQs but
there are also others without the flag which is not allowed.
On Wed, Aug 17, 2011 at 5:13 PM, Keshava Munegowda
keshava_mgo...@ti.com wrote:
Following 4 hwmod strcuture are added:
UHH hwmod of usbhs with uhh base address and functional clock,
EHCI hwmod with irq and base address,
OHCI hwmod with irq and base address,
TLL hwmod of usbhs with the TLL
On Thu, 2011-08-25 at 13:04 +0200, Sebastian Andrzej Siewior wrote:
* Luciano Coelho | 2011-08-25 13:39:29 [+0300]:
Any ideas what may be going wrong?
I think my commit was identified as bogus and tglx is going to revert
it. The problem is that I force ONESHOT mode for all threaded IRQs
On Thu, Aug 25, 2011 at 4:09 PM, Luciano Coelho coe...@ti.com wrote:
Hi,
There seems to be a problem with 3.1-rc3, which prevents it from booting
on my PandaBoard (ARM OMAP4).
3.1-rc2 works fine, so I have bisected the problem and it turns out to
be caused by this:
commit
On Thu, Aug 25, 2011 at 4:47 PM, ABRAHAM, KISHON VIJAY kis...@ti.com wrote:
On Wed, Aug 17, 2011 at 5:13 PM, Keshava Munegowda
keshava_mgo...@ti.com wrote:
Following 4 hwmod strcuture are added:
UHH hwmod of usbhs with uhh base address and functional clock,
EHCI hwmod with irq and base
On Thu, 2011-08-25 at 17:05 +0530, Govindraj wrote:
On Thu, Aug 25, 2011 at 4:09 PM, Luciano Coelho coe...@ti.com wrote:
Hi,
There seems to be a problem with 3.1-rc3, which prevents it from booting
on my PandaBoard (ARM OMAP4).
3.1-rc2 works fine, so I have bisected the problem and
* Luciano Coelho | 2011-08-25 14:24:34 [+0300]:
These are the interrupts reported in /proc/interrupts on my board:
Thank you, this is enough information.
Sebastian
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On Thu, Aug 25, 2011 at 5:09 PM, Luciano Coelho coe...@ti.com wrote:
On Thu, 2011-08-25 at 17:05 +0530, Govindraj wrote:
On Thu, Aug 25, 2011 at 4:09 PM, Luciano Coelho coe...@ti.com wrote:
Hi,
There seems to be a problem with 3.1-rc3, which prevents it from booting
on my PandaBoard (ARM
Hi Venkat,
On 8/24/2011 9:46 PM, S, Venkatraman wrote:
As part of an effort to get single ARM kernel binary [1],
multiple definitions of NR_IRQS under various platforms
have to be reconciled and abstracted away from common code.
This patch series takes the small step of populating the
machine
On Wednesday 24 August 2011 08:14 PM, Kevin Hilman wrote:
Shubhrajyotishubhrajy...@ti.com writes:
On Sunday 17 July 2011 06:13 PM, Shubhrajyoti D wrote:
Restore of context is not done for OMAP4. This patch
adds the OMAP_I2C_FLAG_RESET_REGS_POSTIDLE in the OMAP4
hwmod data which activates the
Benoit,
On 08/24/2011 05:17 AM, Benoit Cousson wrote:
Add initial device-tree support for OMAP4 SoC.
This is based on the original panda board patch done by Manju:
http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393
Add the generic GIC interrupt-controller from ARM.
Add an
Hi Rob,
On 8/25/2011 3:37 PM, Rob Herring wrote:
Benoit,
[...]
+ gic: interrupt-controller@48241000 {
+ compatible = ti,omap4-gic, arm,gic;
The gic binding is still being hashed out. This needs binding
documentation and handling of PPIs. I'm planning on
On Thu, Aug 25, 2011 at 06:30:07AM -0400, J, KEERTHY wrote:
On Wed, Aug 24, 2011 at 10:46 PM, Guenter Roeck
guenter.ro...@ericsson.com wrote:
On Wed, Aug 24, 2011 at 10:37:12AM -0400, Keerthy wrote:
On chip temperature sensor driver. The driver monitors the temperature of
the MPU subsystem
On Thursday, August 25, 2011, Kevin Hilman wrote:
commit c03f007a8bf0e092caeb6856a5c8a850df10b974 (OMAP: PM:
omap_device: add system PM methods for PM domain handling) mistakenly
used SET_SYSTEM_SLEEP_PM_OPS() when trying to configure custom methods
for the PM domains noirq methods. Fix that
On Thursday, August 25, 2011, Mark Brown wrote:
On Tue, Aug 23, 2011 at 11:31:54PM +0200, Rafael J. Wysocki wrote:
Perhaps. Still, that requires some policy to be put into drivers,
which I don't think is entirely correct.
So, I don't really have the bandwidth to discuss this properly
On Thu, Aug 25, 2011 at 4:17 PM, Rafael J. Wysocki r...@sisk.pl wrote:
On Thursday, August 25, 2011, Mark Brown wrote:
On Tue, Aug 23, 2011 at 11:31:54PM +0200, Rafael J. Wysocki wrote:
Perhaps. Still, that requires some policy to be put into drivers,
which I don't think is entirely
On Thursday, August 25, 2011, Jean Pihet wrote:
On Thu, Aug 25, 2011 at 4:17 PM, Rafael J. Wysocki r...@sisk.pl wrote:
On Thursday, August 25, 2011, Mark Brown wrote:
On Tue, Aug 23, 2011 at 11:31:54PM +0200, Rafael J. Wysocki wrote:
Perhaps. Still, that requires some policy to be put
On Thu, Aug 25, 2011 at 5:19 PM, Cousson, Benoit b-cous...@ti.com wrote:
Hi Venkat,
On 8/24/2011 9:46 PM, S, Venkatraman wrote:
As part of an effort to get single ARM kernel binary [1],
multiple definitions of NR_IRQS under various platforms
have to be reconciled and abstracted away from
Abhilash K V a écrit :
From: Vaibhav Hiremath hvaib...@ti.com
In case of AM3517 AM3505, Smart Reflex is not applicable so
we must not enable it. So add check for absence of SR feature
in omap3_twl_init() and return -ENODEV if absence, else continue.
I believe another check should be done :
On Thursday 25 August 2011, Russell King - ARM Linux wrote:
On Thu, Aug 25, 2011 at 02:16:14AM +0300, Felipe Balbi wrote:
on top of all that, for IPs which are used on many SoCs (such as MUSB)
it's quite silly to force all users to provide resources in a certain
order. It sounds to me
On Thu, 2011-08-25 at 03:24 -0400, Todd Poynor wrote:
On Wed, Aug 24, 2011 at 08:07:12PM +0530, Keerthy wrote:
...
+ temp_sensor-phy_base = ioremap(mem-start, resource_size(mem));
Check NULL return.
temp_sensor-phy_base is never iounmapped in error paths or _remove
function.
...
On Thu, 2011-08-25 at 10:06 -0400, Guenter Roeck wrote:
On Thu, Aug 25, 2011 at 06:30:07AM -0400, J, KEERTHY wrote:
On Wed, Aug 24, 2011 at 10:46 PM, Guenter Roeck
guenter.ro...@ericsson.com wrote:
On Wed, Aug 24, 2011 at 10:37:12AM -0400, Keerthy wrote:
On chip temperature sensor
* Ohad Ben-Cohen o...@wizery.com [110824 19:36]:
1. Migrate OMAP's iommu driver to the generic IOMMU API, and move it
to the dedicated iommu folder.
2. Fix omap3isp appropriately so it doesn't break.
3. Adapt OMAP's iovmm appropriately as well, because omap3isp still relies
on it. The
On Thu, Aug 25, 2011 at 7:36 PM, Guenter Roeck
guenter.ro...@ericsson.com wrote:
On Thu, Aug 25, 2011 at 06:30:07AM -0400, J, KEERTHY wrote:
On Wed, Aug 24, 2011 at 10:46 PM, Guenter Roeck
guenter.ro...@ericsson.com wrote:
On Wed, Aug 24, 2011 at 10:37:12AM -0400, Keerthy wrote:
On chip
On Thu, Aug 25, 2011 at 9:26 PM, Guenter Roeck
guenter.ro...@ericsson.com wrote:
On Thu, 2011-08-25 at 10:06 -0400, Guenter Roeck wrote:
On Thu, Aug 25, 2011 at 06:30:07AM -0400, J, KEERTHY wrote:
On Wed, Aug 24, 2011 at 10:46 PM, Guenter Roeck
guenter.ro...@ericsson.com wrote:
On Wed,
On Thu, 2011-08-25 at 12:04 -0400, J, KEERTHY wrote:
On Thu, Aug 25, 2011 at 7:36 PM, Guenter Roeck
guenter.ro...@ericsson.com wrote:
On Thu, Aug 25, 2011 at 06:30:07AM -0400, J, KEERTHY wrote:
On Wed, Aug 24, 2011 at 10:46 PM, Guenter Roeck
guenter.ro...@ericsson.com wrote:
On Wed, Aug
On Thu, Aug 25, 2011 at 9:49 PM, Guenter Roeck
guenter.ro...@ericsson.com wrote:
On Thu, 2011-08-25 at 12:04 -0400, J, KEERTHY wrote:
On Thu, Aug 25, 2011 at 7:36 PM, Guenter Roeck
guenter.ro...@ericsson.com wrote:
On Thu, Aug 25, 2011 at 06:30:07AM -0400, J, KEERTHY wrote:
On Wed, Aug 24,
On Thu, 2011-08-25 at 12:39 -0400, J, KEERTHY wrote:
On Thu, Aug 25, 2011 at 9:49 PM, Guenter Roeck
guenter.ro...@ericsson.com wrote:
On Thu, 2011-08-25 at 12:04 -0400, J, KEERTHY wrote:
On Thu, Aug 25, 2011 at 7:36 PM, Guenter Roeck
guenter.ro...@ericsson.com wrote:
On Thu, Aug 25,
On 8/25/2011 12:28 PM, Russell King - ARM Linux wrote:
On Thu, Aug 25, 2011 at 02:16:14AM +0300, Felipe Balbi wrote:
on top of all that, for IPs which are used on many SoCs (such as MUSB)
it's quite silly to force all users to provide resources in a certain
order. It sounds to me that this will
Arnd Bergmann a...@arndb.de writes:
On Thursday 25 August 2011, Russell King - ARM Linux wrote:
On Thu, Aug 25, 2011 at 02:16:14AM +0300, Felipe Balbi wrote:
on top of all that, for IPs which are used on many SoCs (such as MUSB)
it's quite silly to force all users to provide resources in
Russell King - ARM Linux wrote on Thursday, August 25, 2011 3:53 PM:
On Thu, Aug 25, 2011 at 09:35:07AM +0530, Pedanekar, Hemant wrote:
E.g., on OMAP3 with mem=32M@0x8000 mem=8M@0x8780
(CASE 1)
Memory: 32MB 8MB = 40MB total
Memory: 28408k/28408k available, 12552k reserved, 0K
On Fri, Aug 26, 2011 at 12:06:20AM +0530, Pedanekar, Hemant wrote:
Russell King - ARM Linux wrote on Thursday, August 25, 2011 3:53 PM:
On Thu, Aug 25, 2011 at 09:35:07AM +0530, Pedanekar, Hemant wrote:
E.g., on OMAP3 with mem=32M@0x8000 mem=8M@0x8780
(CASE 1)
Memory: 32MB
On Fri, Aug 19, 2011 at 06:10:58PM +0300, Felipe Balbi wrote:
+enum dwc3_link_state {
+ /* In SuperSpeed */
+ DWC3_LINK_STATE_U0 = 0x00, /* in HS, means ON */
+ DWC3_LINK_STATE_U1 = 0x01,
+ DWC3_LINK_STATE_U2 = 0x02, /* in HS, means SLEEP
Hi,
I have 2 questions related to tiler memory space 2D buffers.
I am working on a project that utilizes video encoder on OMAP4 (H.264) using
OpenMax API.
In general, the encoder works as expected except that I am seeing a very
slow memcpy operation that copies input frame data to encoder’s
Santosh santosh.shilim...@ti.com writes:
On Thursday 04 August 2011 04:34 PM, Tarun Kanti DebBarma wrote:
From: Charulatha Vch...@ti.com
Currently gpio_context array used to save gpio bank's context, is used only
for
OMAP3 architecture. Move gpio_context as part of gpio_bank structure so
Hi,
On Thu, Aug 25, 2011 at 12:15:09PM -0700, Sarah Sharp wrote:
On Fri, Aug 19, 2011 at 06:10:58PM +0300, Felipe Balbi wrote:
+enum dwc3_link_state {
+ /* In SuperSpeed */
+ DWC3_LINK_STATE_U0 = 0x00, /* in HS, means ON */
+ DWC3_LINK_STATE_U1 = 0x01,
+
-Original Message-
From: Felipe Balbi [mailto:ba...@ti.com]
Sent: Thursday, August 25, 2011 1:36 PM
To: Sarah Sharp
Cc: Felipe Balbi; Greg KH; Linux USB Mailing List; Linux OMAP Mailing List;
Paul Zimmerman
Subject: Re: [PATCH 3/4] usb: Introduce DesignWare USB3 DRD Driver
Hi,
On Thursday 25 August 2011 11:16:25 Kevin Hilman wrote:
Please clarify.
What I hear Russell saying is a problem with the implementation of the
_byname API.
What I hear you sating is that since DT doesn't support this, we need to
remove it's usage completely from platform_devices also.
Hi,
On Thu, Aug 25, 2011 at 01:48:09PM -0700, Paul Zimmerman wrote:
-Original Message-
From: Felipe Balbi [mailto:ba...@ti.com]
Sent: Thursday, August 25, 2011 1:36 PM
To: Sarah Sharp
Cc: Felipe Balbi; Greg KH; Linux USB Mailing List; Linux OMAP Mailing List;
Paul Zimmerman
On Fri, Jul 1, 2011 at 12:11 AM, jean.pi...@newoldbits.com wrote:
@@ -129,19 +146,19 @@ static const struct file_operations pm_qos_power_fops =
{
/* unlocked internal variant */
static inline int pm_qos_get_value(struct pm_qos_object *o)
{
- if (plist_head_empty(o-requests))
+
[...]
@@ -1494,33 +1490,31 @@ void omap2_gpio_resume_after_idle(void)
void omap_gpio_save_context(void)
{
struct gpio_bank *bank;
- int i = 0;
list_for_each_entry(bank,omap_gpio_list, node) {
- i++;
if (!bank-loses_context)
On Thu, Aug 25, 2011 at 11:16:25AM -0700, Kevin Hilman wrote:
Arnd Bergmann a...@arndb.de writes:
On Thursday 25 August 2011, Russell King - ARM Linux wrote:
On Thu, Aug 25, 2011 at 02:16:14AM +0300, Felipe Balbi wrote:
on top of all that, for IPs which are used on many SoCs (such as MUSB)
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