On Sun, Jul 28, 2013 at 10:52:38PM +0200, Linus Walleij wrote:
Someone moaned about oneline commit messages in
the last LWN...
I saw that (and even followed up). To be honest for this sort of patch
I'm not that concerned about it - it's fairly clear what's going on and
why it might be a good
Am 28.07.2013 21:06, schrieb Javier Martinez Canillas:
On Sun, Jul 28, 2013 at 8:22 PM, Linus Walleij linus.wall...@linaro.org wrote:
On Sun, Jul 28, 2013 at 7:33 PM, Javier Martinez Canillas
martinez.jav...@gmail.com wrote:
According to Documentation/devicetree/bindings/mmc/mmc.txt:
Am 28.07.2013 21:30, schrieb Javier Martinez Canillas:
On Sun, Jul 28, 2013 at 8:22 PM, Linus Walleij linus.wall...@linaro.org wrote:
On Sun, Jul 28, 2013 at 7:33 PM, Javier Martinez Canillas
martinez.jav...@gmail.com wrote:
I wish we already had the DTS schema parser and checks
in place.
On Monday 22 July 2013 11:29 PM, Joel Fernandes wrote:
HWMOD removal for MMC is breaking edma_start as the events are being manually
triggered due to unused channel list not being clear, Thanks to Balaji TK for
finding this issue.
So, Reported-by: Balaji T K balaj...@ti.com
?
This patch
On Sunday 28 July 2013 05:02 AM, Joel Fernandes wrote:
Hi Tony or Sekhar,
If this patch looks ok, could you pick it up for -rc cycle?
It fixes DMA breakages after the merge window for devices for which DMA
resources are being populated in device tree instead pdev.
But which DT-enabled
This patch series add support for ti qspi controller.
Adapted this series on top of Mark brown series[1]:
[1]: https://patchwork.kernel.org/patch/2834694/
And some other cleanups.
Sourav Poddar (2):
drivers: spi: Add qspi flash controller
driver: spi: Add quad spi read support
Since, qspi controller uses quad read.
Configuring the command register, if the transfer of data needs
dual or quad lines.
This patch has been done on top of the following patch[1], which is just the
basic idea of adding dual/quad support in spi framework.
$subject patch will undergo changes
The patch add basic support for the quad spi controller.
QSPI is a kind of spi module that allows single,
dual and quad read access to external spi devices. The module
has a memory mapped interface which provide direct interface
for accessing data form external spi devices.
The patch will
On Thu, Jul 18, 2013 at 01:57:33PM -0500, Joel Fernandes wrote:
On 07/18/2013 12:08 PM, Russell King - ARM Linux wrote:
As for the maximum number of scatterlist entries, really that's a bug in
the DMA engine implementations if they can't accept arbitary lengths.
I've created DMA engine
From: Ivan T. Ivanov iiva...@mm-sol.com
When deferred probe happens driver will try to ioremap multiple times
and will fail. Memory resource.start variable is a global variable,
modifications in this field will be accumulated on every probe.
Fix this by moving the above operations after driver
Hi,
* Paul Walmsley p...@pwsan.com [130728 13:23]:
Commit 621a0147d5c921f4cc33636ccd0602ad5d7cbfbc (ARM: 7757/1: mm:
don't flush icache in switch_mm with hardware broadcasting) breaks
the boot on OMAP2430SDP with omap2plus_defconfig. Tracked to an
undefined instruction abort from the CP15
Hi
your commit 0e970cec05635adbe7b686063e2548a8e4afb8f4 (gpio/omap: don't
create an IRQ mapping for every GPIO on DT) breaks the boot on the
OMAP5912 OSK:
http://www.pwsan.com/omap/testlogs/bisect_5912osk_boot_fail_v3.11-rc3/20130729013931/boot/5912osk/5912osk_log.txt
This test included a
On Thu, 25 Jul 2013, Aaro Koskinen wrote:
On Tue, Jul 16, 2013 at 07:58:34PM +0300, Aaro Koskinen wrote:
I get the following boot crash on N950/RM-680 (3630) with unpatched
3.11-rc1. The crash looks specific to 3630 (it happens during
omap3630_init_late), also the same kernel binary works
Hi Alexander,
On Mon, Jul 29, 2013 at 8:41 AM, Alexander Holler hol...@ahsoftware.de wrote:
Am 28.07.2013 21:06, schrieb Javier Martinez Canillas:
On Sun, Jul 28, 2013 at 8:22 PM, Linus Walleij linus.wall...@linaro.org
wrote:
On Sun, Jul 28, 2013 at 7:33 PM, Javier Martinez Canillas
Hi
On Wed, 26 Jun 2013, Tom Rini wrote:
On 06/26/2013 01:19 PM, Paul Walmsley wrote:
On Tue, 25 Jun 2013, Tom Rini wrote:
On 06/25/2013 02:20 PM, Paul Walmsley wrote:
BeagleBone-white has the additional complication that it is not easy
to automate, due to the way that power is
Hi guys
On Tue, 18 Jun 2013, Benoit Cousson wrote:
On 06/18/2013 12:07 AM, Vaibhav Hiremath wrote:
This patch adds DebugSS data to clock-tree and hwmod data files.
Changes from RFC/V1 (No code change):
- Based on comments, we have to follow DT and loadable module
approach
Rajendra,
On Mon, 22 Jul 2013, Rajendra Nayak wrote:
From: Grygorii Strashko grygorii.stras...@ti.com
If earlyprintk is enabled and current UART is console port the platform
code can mark it as RPM_ACTIVE to sync real IP state with PM Runtime and
avoid resuming of already active device,
* Linus Walleij linus.wall...@linaro.org [130722 14:50]:
On Mon, Jun 10, 2013 at 5:36 PM, Tony Lindgren t...@atomide.com wrote:
At least on omaps, each board typically has at least one device
configured as wake-up capable from deeper idle modes. In the
deeper idle modes the normal
On Monday 29 July 2013 02:14 PM, Paul Walmsley wrote:
Rajendra,
On Mon, 22 Jul 2013, Rajendra Nayak wrote:
From: Grygorii Strashko grygorii.stras...@ti.com
If earlyprintk is enabled and current UART is console port the platform
code can mark it as RPM_ACTIVE to sync real IP state with PM
* Linus Walleij linus.wall...@linaro.org [130722 14:22]:
On Sat, Jun 8, 2013 at 5:27 PM, Tony Lindgren t...@atomide.com wrote:
Subject: [PATCH] pinctrl: single: Prepare for supporting SoC specific
features
Let's replace is_pinconf with flags and add struct pcs_soc so we
can support
* Linus Walleij linus.wall...@linaro.org [130722 14:01]:
On Wed, Jul 10, 2013 at 2:24 PM, Tony Lindgren t...@atomide.com wrote:
How about I'll push an immutable branch against v3.11-rc1 when it's
tagged and send a pull request to Linus W for the first three patches?
That way we can base
Hi Paul,
On Mon, Jul 29, 2013 at 9:52 AM, Paul Walmsley p...@pwsan.com wrote:
your commit 0e970cec05635adbe7b686063e2548a8e4afb8f4 (gpio/omap: don't
create an IRQ mapping for every GPIO on DT) breaks the boot on the
OMAP5912 OSK:
I'm contemplating just reverting this whole series, as I
Hello Sebastian,
On Tue, 9 Jul 2013, Sebastian Andrzej Siewior wrote:
I'm slowly losing my mind with hwmod.
Well, look on the bright side, its days are numbered...
arch/arm/boot/dts/am33xx.dtsi has the ti,musb-am33xx node.
That one has usb_otg_hs as hwmod property.
The entry for it
* Stephen Warren swar...@wwwdotorg.org [130719 11:59]:
On 07/19/2013 01:29 AM, Tony Lindgren wrote:
I'd vote for keeping the existing behaviour with pinctrl_select_state()
when no active state is defined.
Yes, I think that will work, since the active state cannot exist before
this new
On Mon, Jul 29, 2013 at 7:24 AM, Alexander Holler hol...@ahsoftware.de wrote:
Maybe it might be worth to suggest using/returning NO_IRQ in (new) patches
instead of zero. That would make it very clear that the value 0 isn't to be
used later.
Using NO_IRQ is also discouraged, and this is
* Stephen Warren swar...@wwwdotorg.org [130719 12:10]:
On 07/19/2013 04:29 AM, Grygorii Strashko wrote:
First of all, I'd like to mention that these patches do *not* connect
pinctrl to PM runtime, so until driver will call pinctrl_select_state()
or pinctrl_pm_select_*() there will be no
hwmod framework today does a module enable/reset/idle for all hwmods registered
for a platform quite early at boot.
This has a few downsides like
-1- An early crash failing to enable/reset a device/module needs earlyprintk
for anyone to see the crash logs
-2- Puts a dependency to have all PM
Split the _init() function into something that can be done early and
the rest which can be done late (during drivers inits).
This is done in preperation to remove the hwmod dependency to do all
clock inits (which inturn need clockdomain and other frameworks to be
in place) and module resets quite
Instead of doing a complete init and setup(including reset) of all modules
early at boot, do it when a module is asked to be enabled the first time.
This should get rid of all the need for having all the rest of PM frameworks
in place quite early at boot, and should also make sure reset happens
På måndagen den 29 juli 2013 vid 10:17 AM, skrev Javier Martinez
Canillas martinez.jav...@gmail.com:
On Mon, Jul 29, 2013 at 8:41 AM, Alexander Holler hol...@ahsoftware.de
wrote:
Am 28.07.2013 21:06, schrieb Javier Martinez Canillas:
interrupt-parent = gpio6;
On 07/29/2013 11:01 AM, Linus Walleij wrote:
Hi Paul,
On Mon, Jul 29, 2013 at 9:52 AM, Paul Walmsley p...@pwsan.com wrote:
your commit 0e970cec05635adbe7b686063e2548a8e4afb8f4 (gpio/omap: don't
create an IRQ mapping for every GPIO on DT) breaks the boot on the
OMAP5912 OSK:
I'm
Hi Linus,
On Mon, 29 Jul 2013, Linus Walleij wrote:
If we revert these three patches:
commit 949eb1a4d29dc75e0b5b16b03747886b52ecf854
gpio/omap: fix build error when OF_GPIO is not defined.
commit b4419e1a15905191661ffe75ba2f9e649f5d565e
gpio/omap: auto request GPIO as input if used as
* Stephen Warren swar...@wwwdotorg.org [130719 12:05]:
On 07/19/2013 01:39 AM, Tony Lindgren wrote:
I think the only sane way to deal with this is to make the I2C controller
to show up as two separate I2C controller instances. Then use runtime
PM to save and restore the state for each
* Linus Walleij linus.wall...@linaro.org [130722 16:14]:
On Tue, Jul 16, 2013 at 11:05 AM, Tony Lindgren t...@atomide.com wrote:
To toggle dynamic states, let's add the optional active state in
addition to the static default state. Then if the optional active
state is defined, we can
Hi,
On Mon, Jul 29, 2013 at 12:52:29PM +0530, Sourav Poddar wrote:
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c
new file mode 100644
index 000..51fe95f
--- /dev/null
+++ b/drivers/spi/spi-ti-qspi.c
[ snip ]
+struct ti_qspi {
+ spinlock_t lock;
On Fri, 2013-07-19 at 20:14 +0200, Sebastian Andrzej Siewior wrote:
The problem is that platform_device_del() releases each ressource in its
tree. This does not work on platform_devices created by OF becuase they
were never added via insert_resource(). As a consequence old-parent in
On Mon, Jul 29, 2013 at 12:52:30PM +0530, Sourav Poddar wrote:
Since, qspi controller uses quad read.
Configuring the command register, if the transfer of data needs
dual or quad lines.
This patch has been done on top of the following patch[1], which is just the
basic idea of adding
On 07/29/2013 11:19 AM, Javier Martinez Canillas wrote:
On 07/29/2013 11:01 AM, Linus Walleij wrote:
Hi Paul,
On Mon, Jul 29, 2013 at 9:52 AM, Paul Walmsley p...@pwsan.com wrote:
your commit 0e970cec05635adbe7b686063e2548a8e4afb8f4 (gpio/omap: don't
create an IRQ mapping for every GPIO on
On Monday 29 July 2013 03:02 PM, Felipe Balbi wrote:
On Mon, Jul 29, 2013 at 12:52:30PM +0530, Sourav Poddar wrote:
Since, qspi controller uses quad read.
Configuring the command register, if the transfer of data needs
dual or quad lines.
This patch has been done on top of the following
* Linus Walleij linus.wall...@linaro.org [130722 16:01]:
On Thu, Jul 18, 2013 at 5:15 PM, Tony Lindgren t...@atomide.com wrote:
It's quite common that we need to dynamically change some pins for a
device for runtime PM, or toggle a pin between rx and tx. Changing all
What does change
Hi
On Mon, 29 Jul 2013, Javier Martinez Canillas wrote:
I've looked at this and it seems that irq_create_mapping() does not call the
irq_domain_ops .map function handler since OMAP1 still uses legacy domain
mapping. I don't have an OMAP1 platform to test but could you please see if
the
On Mon, 2013-07-22 at 00:44 +0100, Grant Likely wrote:
BTW, it looks like Grant has attempted this already:
Yup, things broke badly. Unfortunately the of_platform_device and
platform_device history doesn't treat resources in the same way. I
would like to merge the code, but I haven't been
Hi Nishanth,
On Wednesday 17 July 2013 10:15 PM, Nishanth Menon wrote:
Due to wrong older revision of documentation used as reference, we
seem to have a bunch of LDOs wrongly configured on OMAP5 uEVM. This
series is based power tree on production board 750-2628-XXX platform.
Unfortunately, the
On Mon, Jul 29, 2013 at 03:13:07PM +0530, Sourav Poddar wrote:
On Monday 29 July 2013 03:02 PM, Felipe Balbi wrote:
On Mon, Jul 29, 2013 at 12:52:30PM +0530, Sourav Poddar wrote:
Since, qspi controller uses quad read.
Configuring the command register, if the transfer of data needs
dual or
Hi Paul,
On Sun, Jul 28, 2013 at 09:16:29PM +0100, Paul Walmsley wrote:
Commit 621a0147d5c921f4cc33636ccd0602ad5d7cbfbc (ARM: 7757/1: mm:
don't flush icache in switch_mm with hardware broadcasting) breaks
the boot on OMAP2430SDP with omap2plus_defconfig. Tracked to an
undefined instruction
On Monday 29 July 2013 03:01 PM, Felipe Balbi wrote:
Hi,
On Mon, Jul 29, 2013 at 12:52:29PM +0530, Sourav Poddar wrote:
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c
new file mode 100644
index 000..51fe95f
--- /dev/null
+++ b/drivers/spi/spi-ti-qspi.c
[ snip ]
On 29/07/2013, at 11:47, Paul Walmsley p...@pwsan.com wrote:
Hi
On Mon, 29 Jul 2013, Javier Martinez Canillas wrote:
I've looked at this and it seems that irq_create_mapping() does not call the
irq_domain_ops .map function handler since OMAP1 still uses legacy domain
mapping. I don't
Hi,
On Mon, Jul 29, 2013 at 03:42:03PM +0530, Sourav Poddar wrote:
+ frame_length = (m-frame_length 3) / spi-bits_per_word;
there's another way to optimize this. If you assume bits_per_word to
always be power of two you can:
frame_length = (m-frame_length 3)
On Thu, Jul 25, 2013 at 12:53:51PM +0530, Vinod Koul wrote:
On Wed, Jul 24, 2013 at 02:36:26PM -0500, Joel Fernandes wrote:
Also another point worth considering is the approach Russell suggested, I
havent
gotten a chance to dig deeper but if I understood it correctly then
Am 29.07.2013 10:17, schrieb Javier Martinez Canillas:
Hi Alexander,
On Mon, Jul 29, 2013 at 8:41 AM, Alexander Holler hol...@ahsoftware.de
wrote:
Am 28.07.2013 21:06, schrieb Javier Martinez Canillas:
On Sun, Jul 28, 2013 at 8:22 PM, Linus Walleij linus.wall...@linaro.org
wrote:
On
Am 29.07.2013 11:05, schrieb Linus Walleij:
On Mon, Jul 29, 2013 at 7:24 AM, Alexander Holler hol...@ahsoftware.de wrote:
Maybe it might be worth to suggest using/returning NO_IRQ in (new) patches
instead of zero. That would make it very clear that the value 0 isn't to be
used later.
Using
On Monday 29 July 2013 03:50 PM, Felipe Balbi wrote:
Hi,
On Mon, Jul 29, 2013 at 03:42:03PM +0530, Sourav Poddar wrote:
+ frame_length = (m-frame_length 3) / spi-bits_per_word;
there's another way to optimize this. If you assume bits_per_word to
always be power of two you can:
Hi,
On Mon, Jul 29, 2013 at 04:34:41PM +0530, Sourav Poddar wrote:
+ irq = platform_get_irq(pdev, 0);
+ if (irq 0) {
+ dev_err(pdev-dev, no irq resource?\n);
+ return irq;
+ }
+
+ spin_lock_init(qspi-lock);
+
+ qspi-base = devm_ioremap_resource(pdev-dev, r);
+ if
On 29/07/2013, at 12:27, Alexander Holler hol...@ahsoftware.de wrote:
Am 29.07.2013 10:17, schrieb Javier Martinez Canillas:
Hi Alexander,
On Mon, Jul 29, 2013 at 8:41 AM, Alexander Holler hol...@ahsoftware.de
wrote:
Am 28.07.2013 21:06, schrieb Javier Martinez Canillas:
On Sun, Jul
On Monday 29 July 2013 04:39 PM, Felipe Balbi wrote:
Hi,
On Mon, Jul 29, 2013 at 04:34:41PM +0530, Sourav Poddar wrote:
+ irq = platform_get_irq(pdev, 0);
+ if (irq0) {
+ dev_err(pdev-dev, no irq resource?\n);
+ return irq;
+ }
+
+
Am 29.07.2013 13:11, schrieb Javier Martinez Canillas:
On 29/07/2013, at 12:27, Alexander Holler hol...@ahsoftware.de wrote:
Am 29.07.2013 10:17, schrieb Javier Martinez Canillas:
Hi Alexander,
On Mon, Jul 29, 2013 at 8:41 AM, Alexander Holler hol...@ahsoftware.de wrote:
Am 28.07.2013
Am 29.07.2013 13:30, schrieb Alexander Holler:
So I think the driver has to be changed independently of the approach
for auto request GPIO used.
Maybe, but that isn't much effort. I had done that in 3 minutes (ok,
without the would be necessary #ifdef CONFIG_OF_GPIO). But you have a
chicken
On Mon, Jul 29, 2013 at 12:19 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
I guess the safer approach is to just revert these since they are causing
a regression and what the patches aims to fix as been broken since the
initial OMAP migration to DT anyways.
I have
On Mon, Jul 29, 2013 at 1:11 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
A different GPIO hogs approach will be used to pre-define which GPIO
are going to be used as IRQ so the core can request them and setup as input.
I expect you will have the same issue with this
On Monday 29 July 2013 01:47 PM, Javier Martinez Canillas wrote:
Hi Alexander,
On Mon, Jul 29, 2013 at 8:41 AM, Alexander Holler hol...@ahsoftware.de wrote:
Am 28.07.2013 21:06, schrieb Javier Martinez Canillas:
On Sun, Jul 28, 2013 at 8:22 PM, Linus Walleij linus.wall...@linaro.org
wrote:
On Fri, Jul 26, 2013 at 10:15:54PM +0200, Sebastian Andrzej Siewior wrote:
The nop driver isn't a do-nothing-stub but supports a couple functions
like clock on/off or is able to use a voltage regulator. This patch
simply renames the driver to generic since it is easy possible to
extend it by a
On 07/29/2013 04:29 AM, Paul Walmsley wrote:
Hi
On Wed, 26 Jun 2013, Tom Rini wrote:
On 06/26/2013 01:19 PM, Paul Walmsley wrote:
On Tue, 25 Jun 2013, Tom Rini wrote:
On 06/25/2013 02:20 PM, Paul Walmsley wrote:
BeagleBone-white has the additional complication that it is not easy
to
On Thu, Jul 18, 2013 at 12:54:20AM +0200, Laurent Pinchart wrote:
Hello,
Here's a small patch set that replaces PWM polarity numerical constants with
macros in DT.
The series is the result of splitting the original patch into four patches
that
- add the flag macro (both in a header
Hi,
On Mon, Jul 29, 2013 at 04:45:02PM +0530, Sourav Poddar wrote:
+ irq = platform_get_irq(pdev, 0);
+ if (irq0) {
+ dev_err(pdev-dev, no irq resource?\n);
+ return irq;
+ }
+
+ spin_lock_init(qspi-lock);
+
+ qspi-base =
On 29/07/2013, at 13:43, Linus Walleij linus.wall...@linaro.org wrote:
On Mon, Jul 29, 2013 at 12:19 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
I guess the safer approach is to just revert these since they are causing
a regression and what the patches aims to fix as
NOTE: THIS PATCH IS UNFINISHED AND UNTESTED AND THE ONLY
INTENTION IS TO SHOWCASE MY DESIRED APPROACH, IT WILL NOT
TRAVERSE THE DT INTERRUPTS PROPERLY AS OF NOW. PLEASE LET US
JUST DISCUSS THIS APPROACH.
Currently the kernel are ambigously treating GPIOs and interrupts
from a GPIO controller:
Javier,
On Monday 29 July 2013 05:39 AM, Javier Martinez Canillas wrote:
On 07/29/2013 11:19 AM, Javier Martinez Canillas wrote:
On 07/29/2013 11:01 AM, Linus Walleij wrote:
Hi Paul,
On Mon, Jul 29, 2013 at 9:52 AM, Paul Walmsley p...@pwsan.com wrote:
your commit
On 07/27/2013 01:39 AM, Sourav Poddar wrote:
This patch disabled I2C/SPI/UART device initially(status = disabled).
This devices will only be probed, if the devices are
present in the dts file(status = okay).
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
Personally, I like this, though, if
On 07/29/2013 04:57 AM, Keerthy wrote:
Hi Nishanth,
On Wednesday 17 July 2013 10:15 PM, Nishanth Menon wrote:
Due to wrong older revision of documentation used as reference, we
seem to have a bunch of LDOs wrongly configured on OMAP5 uEVM. This
series is based power tree on production board
The following series adds support to EDMA driver to enable DMA of
scatter-gather lists of arbitrary length, but still make use of only
a certain MAX number of slots at a time for a given channel. Thus
free-ing up the rest of the slots to other slaves/channels. With this
there is no need for slave
In an effort to move to using Scatter gather lists of any size with
EDMA as discussed at [1] instead of placing limitations on the driver,
we work through the limitations of the EDMAC hardware to find missed
events and issue them.
The sequence of events that require this are:
For the scenario
With this series, this check is no longer required and
we shouldn't need to reject drivers DMA'ing more than the
MAX number of slots.
Signed-off-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c |6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/dma/edma.c
For crypto IP, we continue to receive events even continuously in
NULL slot, and request lines don't get de-asserted unlike omap_hsmmc.
Due to this, we continously receive error interrupts when we
manually trigger an event.
We fix this, by first detecting if the Channel is currently transferring
Changes are made here for configuring existing parameters to support
DMA'ing them out in batches as needed.
Also allocate as many as slots as needed by the SG list, but not more
than MAX_NR_SG. Then these slots will be reused accordingly.
For ex, if MAX_NR_SG=10, and number of SG entries is 40,
We certainly don't want error conditions to be cleared anywhere
as this will make us 'forget' about missed events. We depend on
knowing which events were missed in order to be able to reissue them.
This fixes a race condition where the EMR was being cleared
by the transfer completion interrupt
Consider the case where we have a scatter-list like:
SG1-SG2-SG3-SG4-SG5-SG6-Null
For ex, for a MAX_NR_SG of 2, earlier we were splitting this as:
SG1-SG2-Null
SG3-SG4-Null
SG5-SG6-Null
Now we split it as
SG1-SG2-Null
SG3-SG4-Null
SG5-SG6-Dummy
This approach results in lesser unwanted
Process SG-elements in batches of MAX_NR_SG if they are greater
than MAX_NR_SG. Due to this, at any given time only those many
slots will be used in the given channel no matter how long the
scatter list is. We keep track of how much has been written
inorder to process the next batch of elements in
Dummy slot has been used as a way for missed-events not to be
reported as missing. This has been particularly troublesome for cases
where we might want to temporarily pause all incoming events.
For EDMA DMAC, there is no way to do any such pausing of events as
the occurence of the next event is
Manual trigger for events missed as a result of splitting a
scatter gather list and DMA'ing it in batches. Add a helper
function to trigger a channel incase any such events are missed.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/common/edma.c | 21 +
Hi Nishanth,
On 29/07/2013 15:17, Nishanth Menon wrote:
On 07/29/2013 04:57 AM, Keerthy wrote:
Hi Nishanth,
On Wednesday 17 July 2013 10:15 PM, Nishanth Menon wrote:
Due to wrong older revision of documentation used as reference, we
seem to have a bunch of LDOs wrongly configured on OMAP5
On 07/29/2013 08:39 AM, Benoit Cousson wrote:
Hi Nishanth,
On 29/07/2013 15:17, Nishanth Menon wrote:
On 07/29/2013 04:57 AM, Keerthy wrote:
Hi Nishanth,
On Wednesday 17 July 2013 10:15 PM, Nishanth Menon wrote:
Due to wrong older revision of documentation used as reference, we
seem to have
* George Cherian | 2013-07-19 18:04:34 [+0530]:
diff --git a/drivers/usb/phy/phy-omap-control.c
b/drivers/usb/phy/phy-omap-control.c
index 1419ced..4f2502c 100644
--- a/drivers/usb/phy/phy-omap-control.c
+++ b/drivers/usb/phy/phy-omap-control.c
@@ -46,6 +46,73 @@ struct device
On 07/29/2013 09:19 AM, Benoit Cousson wrote:
2013/7/29 Nishanth Menon n...@ti.com mailto:n...@ti.com
Well you're lucky I'm now in an area with Wifi and 3G access... last
week it whould have been impossible to receive it :-)
hehe :)
All the fixes are sharing more than 50% of the changelog
Add device tree bindings documentation for the TI WiLink modules.
Currently only the WLAN part of the WiLink6, WiLink7 and WiLink8
modules is supported.
Signed-off-by: Luciano Coelho coe...@ti.com
---
Changes in v2:
Use generic clock definitions to get the clock data instead of passing
the
Am 29.07.2013 14:57, schrieb Santosh Shilimkar:
With some helps from MMC and other guys, we validated the Linus's tip which
includes
your patches. It actually doesn't break anything and as OMAP hsmmc maintainer
clarified, the cd-gpios isn't supported yet for DT. While supporting that it
can
On Monday 29 July 2013 10:52 AM, Alexander Holler wrote:
Am 29.07.2013 14:57, schrieb Santosh Shilimkar:
With some helps from MMC and other guys, we validated the Linus's tip which
includes
your patches. It actually doesn't break anything and as OMAP hsmmc maintainer
clarified, the
Hi,
On Fri, Jul 26, 2013 at 02:33:38PM +0530, Kishon Vijay Abraham I wrote:
Previously MUSB wrapper (OMAP) device used PLATFORM_DEVID_AUTO while creating
MUSB core device. So in usb_bind_phy (binds the controller with the PHY), the
device name of the controller had *.auto* in it. Since with
Am 29.07.2013 17:06, schrieb Santosh Shilimkar:
On Monday 29 July 2013 10:52 AM, Alexander Holler wrote:
Am 29.07.2013 14:57, schrieb Santosh Shilimkar:
With some helps from MMC and other guys, we validated the Linus's tip which
includes
your patches. It actually doesn't break anything and
* George Cherian | 2013-07-19 18:04:35 [+0530]:
Adds phy driver support for am33xx platform, the host/device
peripheral controller shall get this phy object to control the phy
operations.
If you rebase this on-top of the two instances patches I've sent earlier
then you can bury patch 3 and 4,
On Monday 29 July 2013 11:18 AM, Alexander Holler wrote:
Am 29.07.2013 17:06, schrieb Santosh Shilimkar:
On Monday 29 July 2013 10:52 AM, Alexander Holler wrote:
Am 29.07.2013 14:57, schrieb Santosh Shilimkar:
With some helps from MMC and other guys, we validated the Linus's tip
which
On Mon, Jul 29, 2013 at 2:40 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
On 29/07/2013, at 13:43, Linus Walleij linus.wall...@linaro.org wrote:
So I'm drafting an RFC to indicate how I think this should
be solved.
Great, I hope we can finally have a good solution for
Hi Kishon,
A small fix follows inline.
From: linux-media-ow...@vger.kernel.org [mailto:linux-media-
ow...@vger.kernel.org] On Behalf Of Kishon Vijay Abraham I
Sent: Friday, July 26, 2013 2:49 PM
The PHY framework provides a set of APIs for the PHY drivers to
create/destroy a PHY and APIs
Hi,
On Monday 29 July 2013 08:36 PM, Felipe Balbi wrote:
Hi,
On Fri, Jul 26, 2013 at 02:33:38PM +0530, Kishon Vijay Abraham I wrote:
Previously MUSB wrapper (OMAP) device used PLATFORM_DEVID_AUTO while creating
MUSB core device. So in usb_bind_phy (binds the controller with the PHY), the
On Monday 29 July 2013 08:58 PM, Kamil Debski wrote:
Hi Kishon,
A small fix follows inline.
From: linux-media-ow...@vger.kernel.org [mailto:linux-media-
ow...@vger.kernel.org] On Behalf Of Kishon Vijay Abraham I
Sent: Friday, July 26, 2013 2:49 PM
The PHY framework provides a set of
On 07/26/2013 02:49 PM, Kishon Vijay Abraham I wrote:
The PHY framework provides a set of APIs for the PHY drivers to
create/destroy a PHY and APIs for the PHY users to obtain a reference to the
PHY with or without using phandle. For dt-boot, the PHY drivers should
also register *PHY provider*
This patchset adds wake up capability for the keypad and
workaround for i689 errata.
Based on top of v3.11-rc3
Depends on:
Input: omap-keypad: Convert to threaded IRQ
https://patchwork.kernel.org/patch/2832920/
Input: omap-keypad: Cleanup - use bitfiled instead of hardcoded values
OMAP4 is DT only, so read the keypad IRQ type from DT instead hardcoding it
in driver.
Cc: Felipe Balbi ba...@ti.com
Signed-off-by: Illia Smyrnov illia.smyr...@ti.com
---
Based on top of v3.11-rc3
Depends on:
Input: omap-keypad: Convert to threaded IRQ
Enable/disable IRQ wake in suspend/resume handlers
to make the keypad wakeup capable.
Signed-off-by: Illia Smyrnov illia.smyr...@ti.com
---
drivers/input/keyboard/omap4-keypad.c | 43 +
1 file changed, 43 insertions(+)
diff --git
From: Axel Haslam axelhas...@ti.com
Set debounce time value to 12ms to workaround the errata.
ERRATA DESCRIPTION:
When a key is released for a time shorter than the debounce time,
in-between 2 key press (KP1 and KP2), the keyboard state machine will go to
idle mode and will never detect the key
On 07/28/2013 08:43 AM, Mark Brown wrote:
From: Mark Brown broo...@linaro.org
Most SPI drivers that implement runtime PM support use identical code to
do so: they acquire a runtime PM lock in prepare_transfer_hardware() and
then they release it in unprepare_transfer_hardware(). The
1 - 100 of 133 matches
Mail list logo
