On Thu, Apr 24, 2014 at 10:29:50AM +0300, Peter Ujfalusi wrote:
It helps to identify issues if we have some information regarding to the
channel which the event is associated.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Acked-by: Joel Fernandes jo...@ti.com
Applied, thanks
--
On Tue, Apr 29, 2014 at 6:31 AM, George Cherian george.cher...@ti.com wrote:
On 4/28/2014 9:47 PM, Yegor Yefremov wrote:
On Mon, Apr 28, 2014 at 4:25 PM, George Cherian george.cher...@ti.com
wrote:
On 4/28/2014 2:07 PM, yegorsli...@googlemail.com wrote:
From: Yegor Yefremov
On Thu, Apr 24, 2014 at 11:11 PM, Ezequiel Garcia
ezequ...@vanguardiasur.com.ar wrote:
The DMA controller is needed for the USB controller to be correctly
registered. Therefore, if the DMA node is located at the end an unecessary
probe deferral is produced systematically.
This is easily fixed
+Nishant
Hi,
On 04/28/2014 07:03 PM, Felipe Balbi wrote:
Hi,
On Mon, Apr 28, 2014 at 05:01:23PM +0300, Roger Quadros wrote:
As clocks might be named differently on multiple platforms, use a generic
name in the driver and allow device tree node to specify the platform
specific clock name.
Hi Sergei,
On 04/28/2014 08:23 PM, Sergei Shtylyov wrote:
Hello.
On 04/28/2014 06:01 PM, Roger Quadros wrote:
Add wkupclk and refclk information to DT binding information.
Signed-off-by: Roger Quadros rog...@ti.com
---
Documentation/devicetree/bindings/phy/ti-phy.txt | 7 +++
On 4/29/2014 11:49 AM, Yegor Yefremov wrote:
On Thu, Apr 24, 2014 at 11:11 PM, Ezequiel Garcia
ezequ...@vanguardiasur.com.ar wrote:
The DMA controller is needed for the USB controller to be correctly
registered. Therefore, if the DMA node is located at the end an unecessary
probe deferral is
On 04/29/2014 09:58 AM, George Cherian wrote:
This is easily fixed by moving the node at the beggining of the child
list,
so it's probed first.
This will give issues on module removal.
Since we use device_for_each_child in remove patch, it will try to
remove cppi dma controller, while the
Hi Sebastian,
On 4/29/2014 1:36 PM, Sebastian Andrzej Siewior wrote:
On 04/29/2014 09:58 AM, George Cherian wrote:
This is easily fixed by moving the node at the beggining of the child
list,
so it's probed first.
This will give issues on module removal.
Since we use device_for_each_child in
tbclk does not need to be a composite clock, we can simply
use gate clock for this purpose.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
v1-v2:
change compatible string according to mainline.
arch/arm/boot/dts/am33xx-clocks.dtsi | 30 ++
1 file changed, 6
We need tbclk clock data for the functioning of ehrpwm
module. Hence, populating the required clock information
in clock dts file.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
v1-v2:
change compatible according to mainline.
arch/arm/boot/dts/am43xx-clocks.dtsi | 48
Hi Paul,
On Tuesday 29 April 2014 03:37 AM, Paul Walmsley wrote:
On Wed, 16 Apr 2014, Sourav Poddar wrote:
These adds hwmod data for hdq/1w driver.
Signed-off-by: Sourav Poddarsourav.pod...@ti.com
Is a TRM available yet for AM43x so this patch can be properly reviewed?
NO, the TRMS are
On Tuesday 29 April 2014 12:09 AM, Felipe Balbi wrote:
On Mon, Apr 28, 2014 at 06:28:45PM +, Paul Walmsley wrote:
On Wed, 16 Apr 2014, Sourav Poddar wrote:
For SOCs with dt enabled, device should be build through device tree.
Prevent device build call from platform code, if device tree is
On Mon, Apr 28, 2014 at 03:47:37PM -0500, Joel Fernandes wrote:
On 04/28/2014 05:49 AM, Thomas Gleixner wrote:
A simpler version to provide granular residue accounting and readout
for EDMA.
Delta to V1:
- Removed the double read of the address in PaRAM
- Simplified
On 04/29/2014 10:27 AM, George Cherian wrote:
Hi Sebastian,
Hi George,
On 4/29/2014 1:36 PM, Sebastian Andrzej Siewior wrote:
On 04/29/2014 09:58 AM, George Cherian wrote:
This is easily fixed by moving the node at the beggining of the child
list,
so it's probed first.
This will give
Hi Paul,
On Tuesday 29 April 2014 12:49 AM, Paul Walmsley wrote:
On Wed, 16 Apr 2014, Sourav Poddar wrote:
The patch adds the following to the omap hdq driver.
1. HDQ Device reset call in probe.
2. Enabling '1 wire mode' and checking for presence pulse bit.
3. Proper disabling and enabling of
On Mon, Apr 28, 2014 at 06:21:49PM +0100, Joel Fernandes wrote:
On 04/28/2014 12:20 PM, Joel Fernandes wrote:
On 04/28/2014 11:43 AM, Dave Martin wrote:
On Tue, Apr 22, 2014 at 01:31:46PM -0500, Joel Fernandes wrote:
On my DRA7 system, when the kernel is built in THUMB mode, the secondary
On Mon, Apr 28, 2014 at 10:55:36AM -0500, Felipe Balbi wrote:
On Mon, Apr 28, 2014 at 04:49:23PM -0400, Zhuang Jin Can wrote:
Adds a debugfs file snapshot to dump dwc3 requests, trbs and events.
you need to explain what are you trying to provide to our users here.
What problem are you
On Sat 2014-04-26 01:56:15, Sebastian Reichel wrote:
Add common DT binding documentation for touchscreen devices and
implement input_parse_touchscreen_of_params, which parses the common
properties and configures the input device accordingly.
The method currently does not interpret the axis
On Sat 2014-04-26 01:56:19, Sebastian Reichel wrote:
Add devicetree binding documentation for TSC2005 touchscreen.
Reviewed-by: Pavel Machek pa...@ucw.cz
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
--
On Sat 2014-04-26 01:56:18, Sebastian Reichel wrote:
This adds DT support to the tsc2005 touchscreen
driver.
Signed-off-by: Sebastian Reichel s...@kernel.org
@@ -100,6 +102,11 @@
TSC2005_CFR2_AVG_7)
#define MAX_12BIT0xfff
On Sat 2014-04-26 01:56:17, Sebastian Reichel wrote:
Simplify the driver by using managed resources for memory allocation of
internal struct, input device allocation and irq request.
Signed-off-by: Sebastian Reichel s...@kernel.org
Reviewed-by: Pavel Machek pa...@ucw.cz
--
(english)
On Sat 2014-04-26 01:56:16, Sebastian Reichel wrote:
Change some dev_dbg() invocations to dev_err() ones, because they
are supposed to output error messages.
Signed-off-by: Sebastian Reichel s...@kernel.org
Reviewed-by: Pavel Machek pa...@ucw.cz
--
(english)
On Mon, Apr 28, 2014 at 9:40 AM, Andreas Fenkart afenk...@gmail.com wrote:
There have been various patches floating around for enabling
the SDIO IRQ for hsmmc, but none of them ever got merged.
Probably the reason for not merging the SDIO interrupt patches
has been the lack of wake-up path
On Tuesday 29 April 2014 01:59:20 Javier Martinez Canillas wrote:
This driver is also used by OMAP1. Even when disabling GPIO_OMAP on that
platform doesn't cause a build error since no function defined in the driver
is
used directly by platform code, I think that we always want this driver on
Hello Arnd,
On 04/29/2014 12:26 PM, Arnd Bergmann wrote:
On Tuesday 29 April 2014 01:59:20 Javier Martinez Canillas wrote:
This driver is also used by OMAP1. Even when disabling GPIO_OMAP on that
platform doesn't cause a build error since no function defined in the driver
is
used directly
The only difference from the dra74x devices is the missing .smp entry.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/board-generic.c | 25 +
1 file changed, 21 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/board-generic.c
Use of const init definition must use __initconst so replace
all such instances where __initdata is used.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/board-generic.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git
Use the corresponding compatibles to identify the devices.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/soc.h |7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index 30abcc8..5ff724e 100644
---
changes in v4:
-1- used full SoC names in compatibles eg ti,dra742 and ti,dra722
-2- Created a seperate patch for replacing __initdata with __initconst
changes in v3:
Removed wildcards from compatible strings and duplicates from
.dt_compat strings as suggested by Arnd
DRA72x devices are single
ti,dra752 is neither documented nor correct, since the device is actually a
dra742 device as rightly documented in dt bindings.
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: devicet...@vger.kernel.org
---
arch/arm/boot/dts/dra7-evm.dts |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
DRA722 is part of DRA72x family which are single core cortex A15 devices
with most infrastructure IPs otherwise same as whats on the DRA74x family.
So move the cpu nodes into dra74x.dtsi and dra72x.dtsi respectively.
Also add a minimal dra72-evm dts file.
Signed-off-by: Rajendra Nayak
On Tuesday 29 April 2014 16:35:12 Rajendra Nayak wrote:
The only difference from the dra74x devices is the missing .smp entry.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/board-generic.c | 25 +
1 file changed, 21 insertions(+), 4
On Tuesday 29 April 2014 16:35:10 Rajendra Nayak wrote:
DRA722 is part of DRA72x family which are single core cortex A15 devices
with most infrastructure IPs otherwise same as whats on the DRA74x family.
So move the cpu nodes into dra74x.dtsi and dra72x.dtsi respectively.
Also add a
From: Arnd Bergmann a...@arndb.de
The codec requires I2C to be enabled, so any other option
that selects it should also depend on I2C.
Signed-off-by: Arnd Bergmann a...@arndb.de
Signed-off-by: Xia Kaixu kaixu@linaro.org
Cc: Mark Brown broo...@kernel.org
Cc: Liam Girdwood lgirdw...@gmail.com
From: Arnd Bergmann a...@arndb.de
The cx20442 codec driver used here requires the TTY layer to
be enabled, or we get a link error:
sound/built-in.o: In function `cx20442_codec_remove':
cx20442.c:398: undefined reference to `tty_hangup'
sound/built-in.o: In function `ams_delta_remove':
On Tuesday 29 April 2014 04:48 PM, Arnd Bergmann wrote:
On Tuesday 29 April 2014 16:35:13 Rajendra Nayak wrote:
@@ -393,7 +395,12 @@ IS_OMAP_TYPE(3430, 0x3430)
#if defined(CONFIG_SOC_DRA7XX)
#undef soc_is_dra7xx
+#undef soc_is_dra74x
+#undef soc_is_dra72x
#define soc_is_dra7xx()
On Tuesday 29 April 2014 16:35:13 Rajendra Nayak wrote:
@@ -393,7 +395,12 @@ IS_OMAP_TYPE(3430, 0x3430)
#if defined(CONFIG_SOC_DRA7XX)
#undef soc_is_dra7xx
+#undef soc_is_dra74x
+#undef soc_is_dra72x
#define soc_is_dra7xx()(of_machine_is_compatible(ti,dra7))
+#define
On Tuesday 29 April 2014 12:53:45 Javier Martinez Canillas wrote:
Hello Arnd,
On 04/29/2014 12:26 PM, Arnd Bergmann wrote:
On Tuesday 29 April 2014 01:59:20 Javier Martinez Canillas wrote:
This driver is also used by OMAP1. Even when disabling GPIO_OMAP on that
platform doesn't cause a
On 04/29/2014 11:34 AM, Sourav Poddar wrote:
We need tbclk clock data for the functioning of ehrpwm
module. Hence, populating the required clock information
in clock dts file.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
v1-v2:
change compatible according to mainline.
On 04/29/2014 11:34 AM, Sourav Poddar wrote:
tbclk does not need to be a composite clock, we can simply
use gate clock for this purpose.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
Looks good to me so:
Acked-by: Tero Kristo t-kri...@ti.com
---
v1-v2:
change compatible string
Hi Tero,
On Tuesday 29 April 2014 06:16 PM, Tero Kristo wrote:
On 04/29/2014 11:34 AM, Sourav Poddar wrote:
We need tbclk clock data for the functioning of ehrpwm
module. Hence, populating the required clock information
in clock dts file.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
On Fri, 25 Apr 2014 16:44:58 -0700, Kevin Hilman khil...@linaro.org wrote:
Geert Uytterhoeven geert+rene...@glider.be writes:
When adding a device from DT, check if its clocks are suitable for Runtime
PM, and register them with the PM core.
If Runtime PM is disabled, just enable the
On Monday 28 April 2014 08:44 PM, Nishanth Menon wrote:
V3: has the following changes (w.r.t v2):
- fixed relaxed commit message and usage.
- AM437x internal documents showed that:
- new master information updated into the data
- masterid register
On 29 April 2014 06:09, Sebastian Andrzej Siewior bige...@linutronix.de wrote:
On 04/29/2014 10:27 AM, George Cherian wrote:
Hi Sebastian,
Hi George,
On 4/29/2014 1:36 PM, Sebastian Andrzej Siewior wrote:
On 04/29/2014 09:58 AM, George Cherian wrote:
This is easily fixed by moving the node
We need tbclk clock data for the functioning of ehrpwm
module. Hence, populating the required clock information
in clock dts file.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
v2-v3
- correct bitshifting
arch/arm/boot/dts/am43xx-clocks.dtsi | 48 ++
On 04/25/2014 11:41 AM, Tony Lindgren wrote:
* Dave Gerlach d-gerl...@ti.com [140423 10:25]:
On 04/23/2014 09:59 AM, Tony Lindgren wrote:
* Dave Gerlach d-gerl...@ti.com [140422 12:53]:
On 04/22/2014 02:01 PM, Tony Lindgren wrote:
* Dave Gerlach d-gerl...@ti.com [140422 11:52]:
This patch,
On 04/29/2014 05:15 PM, Sourav Poddar wrote:
We need tbclk clock data for the functioning of ehrpwm
module. Hence, populating the required clock information
in clock dts file.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
Acked-by: Tero Kristo t-kri...@ti.com
---
v2-v3
- correct
* Tomi Valkeinen tomi.valkei...@ti.com [140428 22:26]:
On 28/04/14 19:45, Tony Lindgren wrote:
* Tomi Valkeinen tomi.valkei...@ti.com [140427 23:53]:
On 25/04/14 18:31, Tony Lindgren wrote:
Chances are any mux register in the syscon area already works with
pinctrl-single,pins or
On Thu, Apr 24, 2014 at 11:44:58AM -0700, Tony Lindgren wrote:
* Felipe Balbi ba...@ti.com [140424 11:29]:
Hi,
On Fri, Jan 17, 2014 at 09:44:59AM +0200, Tomi Valkeinen wrote:
omap2_dpll_round_rate() doesn't actually round the given rate, even if
the name and the description so hints.
Hi,
On Tue, Apr 29, 2014 at 05:21:42PM -0400, Zhuang Jin Can wrote:
On Mon, Apr 28, 2014 at 10:55:36AM -0500, Felipe Balbi wrote:
On Mon, Apr 28, 2014 at 04:49:23PM -0400, Zhuang Jin Can wrote:
Adds a debugfs file snapshot to dump dwc3 requests, trbs and events.
you need to explain
On Tue, Apr 29, 2014 at 10:50:39AM +0300, Roger Quadros wrote:
+Nishant
Hi,
On 04/28/2014 07:03 PM, Felipe Balbi wrote:
Hi,
On Mon, Apr 28, 2014 at 05:01:23PM +0300, Roger Quadros wrote:
As clocks might be named differently on multiple platforms, use a generic
name in the driver
On Tue, Apr 29, 2014 at 11:14:20AM -0500, Felipe Balbi wrote:
On Tue, Apr 29, 2014 at 10:50:39AM +0300, Roger Quadros wrote:
+Nishant
Hi,
On 04/28/2014 07:03 PM, Felipe Balbi wrote:
Hi,
On Mon, Apr 28, 2014 at 05:01:23PM +0300, Roger Quadros wrote:
As clocks might be
On 04/28/2014 06:02 PM, Simon Horman wrote:
On Mon, Apr 28, 2014 at 08:30:32PM +0100, Russell King wrote:
Since we now automatically enable early BRESP in core L2C-310 code when
we detect a Cortex-A9, we don't need platforms/SoCs to set this bit
explicitly. Instead, they should seek to
On 29/04/14 18:05, Tony Lindgren wrote:
omap4_padconf_global is a syscon node, not pinctrl. As syscon just gives
a raw regmap to its memory area, the driver needs to know about the OMAP
control registers to use it.
That would be probably best set up the same way we have already set up
for
On 29/04/14 18:51, Felipe Balbi wrote:
On Thu, Apr 24, 2014 at 11:44:58AM -0700, Tony Lindgren wrote:
* Felipe Balbi ba...@ti.com [140424 11:29]:
Hi,
On Fri, Jan 17, 2014 at 09:44:59AM +0200, Tomi Valkeinen wrote:
omap2_dpll_round_rate() doesn't actually round the given rate, even if
the
On 29/04/14 19:19, Tomi Valkeinen wrote:
On 29/04/14 18:05, Tony Lindgren wrote:
omap4_padconf_global is a syscon node, not pinctrl. As syscon just gives
a raw regmap to its memory area, the driver needs to know about the OMAP
control registers to use it.
That would be probably best set up
On Apr 29, 2014, at 2:17 AM, Dave Martin dave.mar...@arm.com wrote:
On Mon, Apr 28, 2014 at 06:21:49PM +0100, Joel Fernandes wrote:
On 04/28/2014 12:20 PM, Joel Fernandes wrote:
On 04/28/2014 11:43 AM, Dave Martin wrote:
On Tue, Apr 22, 2014 at 01:31:46PM -0500, Joel Fernandes wrote:
On
* Tomi Valkeinen tomi.valkei...@ti.com [140429 09:33]:
On 29/04/14 19:19, Tomi Valkeinen wrote:
On 29/04/14 18:05, Tony Lindgren wrote:
omap4_padconf_global is a syscon node, not pinctrl. As syscon just gives
a raw regmap to its memory area, the driver needs to know about the OMAP
On Tue, Apr 29, 2014 at 05:36:30PM +0100, Joel Fernandes wrote:
[...]
Sorry what I meant is, say its of Type function. What tells the firmware
to switch to THUMB?
What's typically done is a boot address register is written by the
kernel, and the firmware jumps to it after WFE.
On Mon, Apr 28, 2014 at 02:17:54PM +0200, Stefan Roese wrote:
+ switch (params_channels(params)) {
+ case 2:
+ case 4:
+ case 8:
+ case 16:
+ fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF;
+ break;
+ default:
+ return
On Mon, Apr 28, 2014 at 02:17:52PM +0200, Stefan Roese wrote:
From: Jarkko Nikula jarkko.nik...@bitmer.com
Machine specific trigger callback allows to do final stream start/stop
related operations in a machine driver after setting up the codec, DMA and
DAI.
Applied, thanks.
signature.asc
Add the prcm_resets node to the prm parent node.
Add the dt-bindings header to the DT file
Signed-off-by: Dan Murphy dmur...@ti.com
---
arch/arm/boot/dts/dra7.dtsi|6 ++
include/dt-bindings/reset/ti,dra7-resets.h | 22 ++
2 files changed, 28
Add the reset register data for the am335 SoC.
Signed-off-by: Dan Murphy dmur...@ti.com
---
drivers/reset/ti/Makefile |1 +
drivers/reset/ti/reset-ti-am33xx.c | 37
drivers/reset/ti/reset-ti-data.h |1 +
drivers/reset/ti/reset-ti.c
The TI SoC reset controller support utilizes the
reset controller framework to give device drivers or
function drivers a common set of APIs to call to reset
a module.
The reset-ti is a common interface to the reset framework.
The register data is retrieved during initialization
of the reset
Call the reset init API to initialize the
reset framework and data for the related SoC.
Signed-off-by: Dan Murphy dmur...@ti.com
---
arch/arm/mach-omap2/prm_common.c |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
Add the reset register data for the dra7xx SoC.
Include the dt-bindings header to properly index
the right reset node.
Signed-off-by: Dan Murphy dmur...@ti.com
---
drivers/reset/ti/Makefile |1 +
drivers/reset/ti/reset-ti-data.h |1 +
drivers/reset/ti/reset-ti-dra7xx.c | 61
Add the reset register data for the am43xx SoC.
Signed-off-by: Dan Murphy dmur...@ti.com
---
drivers/reset/ti/Makefile |1 +
drivers/reset/ti/reset-ti-am43xx.c | 43
drivers/reset/ti/reset-ti-data.h |1 +
3 files changed, 45 insertions(+)
Describe the TI reset DT entries for TI SoC's.
Signed-off-by: Dan Murphy dmur...@ti.com
---
.../devicetree/bindings/reset/ti,reset.txt | 34
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/ti,reset.txt
diff --git
Add the reset register data for the omap5 SoC.
Signed-off-by: Dan Murphy dmur...@ti.com
---
drivers/reset/ti/Makefile |1 +
drivers/reset/ti/reset-ti-data.h |2 ++
drivers/reset/ti/reset-ti-omap5.c | 61 +
drivers/reset/ti/reset-ti.c |
This is a RFC on the TI reset adoption to the Reset framework.
The patchset was derived from work from Rajendra Nayak and Afzal Mohammed
who have had similar code offerings. One of the major differences here
is the SoC data has been broken out so that the data and code are independent.
There is
Add the prm_resets node to the prm parent node.
Add the dt-bindings header to the DT file
Signed-off-by: Dan Murphy dmur...@ti.com
---
arch/arm/boot/dts/omap5.dtsi|6 ++
include/dt-bindings/reset/ti,omap5-resets.h | 22 ++
2 files changed, 28
Add the prcm_resets node to the prcm parent node.
Add the dt-bindings header to the DT file
Signed-off-by: Dan Murphy dmur...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi|6 ++
include/dt-bindings/reset/ti,am33xx-resets.h | 18 ++
2 files changed, 24
Add the prcm_resets node to the prcm parent node.
Add the dt-bindings header to the DT file
Signed-off-by: Dan Murphy dmur...@ti.com
---
arch/arm/boot/dts/am4372.dtsi|6 ++
include/dt-bindings/reset/ti,am437x-resets.h | 19 +++
2 files changed, 25
On Tuesday 29 April 2014 15:19:47 Dan Murphy wrote:
+ * AM33xx reset index for PRCM Module
+ *
+ * Copyright 2014 Texas Instruments Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ *
On Tuesday 29 April 2014 15:19:40 Dan Murphy wrote:
+#ifndef _RESET_TI_H_
+#define _RESET_TI_H_
+
+#ifdef CONFIG_RESET_TI
+void ti_dt_reset_init(void);
+#else
+static inline void ti_dt_reset_init(void){ return; };
+#endif
Why can't this be a regular platform device driver that gets
On Mon, Apr 28, 2014 at 02:17:53PM +0200, Stefan Roese wrote:
+static int ha_dsp_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_pcm_runtime *rtd =
On Mon, Apr 28, 2014 at 04:07:19PM +0200, Sebastian Reichel wrote:
Mark the array and the string const by using static const char * const
foo[] instead of static const char* foo[].
Applied, thanks.
signature.asc
Description: Digital signature
On Mon, Apr 28, 2014 at 04:07:20PM +0200, Sebastian Reichel wrote:
Add module alias to support driver autoloading.
Applied, thanks.
signature.asc
Description: Digital signature
On Mon, Apr 28, 2014 at 04:07:21PM +0200, Sebastian Reichel wrote:
This patch converts the rx51 ASoC module to use
devm_snd_soc_register_card.
Applied, thanks.
signature.asc
Description: Digital signature
Looks like quite a few omaps have sharp ls037v7dw01 that's configured
as various panel dpi entries for whatever legacy reasons. For device
tree based support, let's just configure these properly for panel
ls037v7dw01 instead of panel dpi.
This patch creates a common file for panel ls037v7dw01,
Using gpiod will make it easier to add device tree support
for this panel in the following patches.
Note that all the GPIOs for this panel are optional, any
of the the GPIOs could be configured with external pulls
instead of GPIOs, so let's not error out if GPIOs are not
found to make the panel
We can pass the GPIO configuration for ls037v7dw01 in a standard
gpios property.
Signed-off-by: Tony Lindgren t...@atomide.com
---
.../bindings/panel/sharp,ls037v7dw01.txt | 53 ++
.../omap2/displays-new/panel-sharp-ls037v7dw01.c | 84 --
2 files
Hi all,
Here are few patches to add devicetree support for panel ls037v7dw01
that's found on many omap3 boards. They seem to be often mis-configured
as various panel dpi entries, but really should be move to use panel
ls037v7dw01 instead. This panel is found at least on the omap3 sdp,
ldp, omap3
Otherwise we can get often errors like the following and the
display won't come on:
omapdss APPLY error: FIFO UNDERFLOW on gfx, disabling the overlay
omapdss APPLY error: SYNC_LOST on channel lcd, restarting
the output with video overlays disabled
There are some earlier references to this issue:
* Arnd Bergmann a...@arndb.de [140429 13:35]:
On Tuesday 29 April 2014 15:19:47 Dan Murphy wrote:
+ * AM33xx reset index for PRCM Module
+ *
+ * Copyright 2014 Texas Instruments Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of
On 30 April 2014 01:52, Tony Lindgren t...@atomide.com wrote:
Looks like quite a few omaps have sharp ls037v7dw01 that's configured
as various panel dpi entries for whatever legacy reasons. For device
tree based support, let's just configure these properly for panel
ls037v7dw01 instead of
On 18 April 2014 17:10, Joachim Eastwood manab...@gmail.com wrote:
Add support for VAR-SOM-OM44[1] SODIMM system on module from Variscite. SoM
features a OMAP4460, 1GB RAM, Gigabit Ethernet (LAN7500) and optional WLAN/BT.
Also add support for VAR-STK-OM44 development board from Variscite. This
Minor nit...
On 04/28/2014 02:40 AM, Andreas Fenkart wrote:
[..]
/* Do not initialize card-specific things if the power is off */
if (host-power_mode == MMC_POWER_OFF)
@@ -1117,8 +1138,12 @@ static irqreturn_t omap_hsmmc_irq(int irq, void
*dev_id)
int status;
Minor nit...
On 04/28/2014 02:40 AM, Andreas Fenkart wrote:
[..]
/* Do not initialize card-specific things if the power is off */
if (host-power_mode == MMC_POWER_OFF)
@@ -1117,8 +1138,12 @@ static irqreturn_t omap_hsmmc_irq(int irq, void
*dev_id)
int status;
Here's a redo of the patch [1] that effectively does the same
thing but is the right way to do things by using ENDPROC instead.
The firmware correctly switches to THUMB before entry.
The patch applies ontop of the earlier patch [1].
[1] https://lkml.org/lkml/2014/4/22/1044
Suggested-by: Dave
On 04/29/2014 01:31 PM, Dave Martin wrote:
On Tue, Apr 29, 2014 at 05:36:30PM +0100, Joel Fernandes wrote:
[...]
Sorry what I meant is, say its of Type function. What tells the firmware
to switch to THUMB?
What's typically done is a boot address register is written by the
kernel, and
On 04/29/2014 03:46 AM, Vinod Koul wrote:
[..]
commit 770f0f3a20188b7e17db2790803b9da925dc0b94
Author: Thomas Gleixner t...@linutronix.de
Date: Mon Apr 28 10:49:43 2014 +
dmaengine: edma: Make reading the position of active channels work
As Joel pointed out,
On Tue, Apr 29, 2014 at 11:25:02PM -0500, Joel Fernandes wrote:
On 04/29/2014 03:46 AM, Vinod Koul wrote:
[..]
commit 770f0f3a20188b7e17db2790803b9da925dc0b94
Author: Thomas Gleixner t...@linutronix.de
Date: Mon Apr 28 10:49:43 2014 +
dmaengine: edma: Make reading the
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