(Patch 3)
v1:
- Add DT parse support to OMAP hwspinlock driver
- Add OMAP4 DT node and bindings information
http://marc.info/?l=linux-omapm=137823082308009w=2
[1] https://lkml.org/lkml/2013/8/14/528
[2] http://marc.info/?t=13782309035r=1w=2
Suman Anna (9):
hwspinlock/core: add common dt
. The documentation and OF helpers to
retrieve these common properties have been added to the driver core.
Signed-off-by: Suman Anna s-a...@ti.com
---
.../devicetree/bindings/hwlock/hwlock.txt | 26 +
drivers/hwspinlock/hwspinlock_core.c | 61 +-
include/linux
AM33XX device family also supports hwspinlocks. The IP
is identical to that of OMAP4/OMAP5, except for the
number of locks.
Signed-off-by: Suman Anna s-a...@ti.com
---
drivers/hwspinlock/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/hwspinlock/Kconfig b
controlled, and it is disabled out of
reset. Make sure the module is enabled and clocked before reading
the SYSSTATUS register.
Signed-off-by: Suman Anna s-a...@ti.com
---
drivers/hwspinlock/omap_hwspinlock.c | 21 ++---
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers
Add the hwspinlock device tree node for OMAP4 family
of SoCs.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/omap4.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 22d9f2b..a8cc274 100644
--- a/arch
Add the missing sysc configuration to the AM335 spinlock hwmod
data. This ensures that smart-idle is enabled whenever the module
is enabled by the driver.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 13 +
1 file changed, 13 insertions
Add the hwspinlock device tree node for AM33xx family
of SoCs.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index f9c5da9..4371257 100644
Add the hwspinlock device tree node for OMAP5 SoCs.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 07be2cd..449be92 100644
--- a/arch/arm/boot/dts
Add the hwmod data for the spinlock IP in OMAP5 SoC.
This is needed to be able to enable the OMAP spinlock
support for OMAP5.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 44 ++
1 file changed, 44 insertions(+)
diff --git
HwSpinlock IP is present only on OMAP4 and other newer SoCs,
which are all device-tree boot only. This patch adds the
base support for parsing the DT nodes, and removes the code
dealing with the traditional platform device instantiation.
Signed-off-by: Suman Anna s-a...@ti.com
---
.../devicetree
Hi Benoit,
On 08/08/2013 17:44, Suman Anna wrote:
On 08/08/2013 09:34 AM, Kumar Gala wrote:
On Aug 7, 2013, at 3:08 PM, Suman Anna wrote:
On 08/07/2013 12:41 PM, Kumar Gala wrote:
On Aug 7, 2013, at 11:59 AM, Suman Anna wrote:
Kumar,
Logic has been added to the OMAP2+ mailbox code
On 09/24/2013 05:24 PM, Santosh Shilimkar wrote:
On Tuesday 24 September 2013 04:30 PM, Paul Zimmerman wrote:
From: Paul Zimmerman
Sent: Tuesday, September 24, 2013 1:21 PM
Hi,
I have an OMAP5432 uEVM which I cannot get to boot with recent mainline
(tried 3.11 and 3.12-rc1). I have the TI
Santosh,
On 09/24/2013 06:55 PM, Santosh Shilimkar wrote:
On Tuesday 24 September 2013 07:48 PM, Suman Anna wrote:
On 09/24/2013 05:24 PM, Santosh Shilimkar wrote:
On Tuesday 24 September 2013 04:30 PM, Paul Zimmerman wrote:
From: Paul Zimmerman
Sent: Tuesday, September 24, 2013 1:21 PM
Hi
Paul,
On 09/25/2013 10:02 AM, Santosh Shilimkar wrote:
On Tuesday 24 September 2013 07:59 PM, Paul Zimmerman wrote:
From: Suman Anna [mailto:s-a...@ti.com]
Sent: Tuesday, September 24, 2013 4:48 PM
On 09/24/2013 05:24 PM, Santosh Shilimkar wrote:
On Tuesday 24 September 2013 04:30 PM, Paul
Hi Paul,
Hi,
I have an OMAP5432 uEVM which I cannot get to boot with recent mainline
(tried 3.11 and 3.12-rc1). I have the TI GLSDK for this board
(v6.0.0.7),
which comes with 3.8.4 which works fine.
I found this thread: http://marc.info/?l=fedora-armm=137717811815777
and
Wrong
On 09/26/2013 06:44 PM, Paul Zimmerman wrote:
From: Suman Anna [mailto:s-a...@ti.com]
Sent: Thursday, September 26, 2013 1:36 PM
I have an OMAP5432 uEVM which I cannot get to boot with recent
mainline
(tried 3.11 and 3.12-rc1). I have the TI GLSDK for this board
(v6.0.0.7),
which comes
On 09/17/2013 02:30 PM, Suman Anna wrote:
Hi,
This is an updated series for adding the device tree support to
the OMAP hwspinlock driver. The series is based on 3.12-rc1, and
includes patches on hwspinlock driver, OMAP hwmod data files and
OMAP DTS files. The updated series adds new patches
On 09/27/2013 11:06 AM, Kumar Gala wrote:
On Sep 17, 2013, at 2:30 PM, Suman Anna wrote:
HwSpinlock IP is present only on OMAP4 and other newer SoCs,
which are all device-tree boot only. This patch adds the
base support for parsing the DT nodes, and removes the code
dealing
Kumar,
On 09/27/2013 11:04 AM, Kumar Gala wrote:
On Sep 17, 2013, at 2:30 PM, Suman Anna wrote:
All the platform-specific hwlock driver implementations need the
number of locks and the associated base id for registering the
locks present within a hwspinlock device with the driver core
Kumar,
On 09/27/2013 11:04 AM, Kumar Gala wrote:
On Sep 17, 2013, at 2:30 PM, Suman Anna wrote:
All the platform-specific hwlock driver implementations need the
number of locks and the associated base id for registering the
locks present within a hwspinlock device with the driver core
On 09/29/2013 10:12 PM, Paul Walmsley wrote:
Hi
On Fri, 27 Sep 2013, Suman Anna wrote:
Paul,
The hwmod data patches needs to be merged only after the respective DT
node patches are merged, without which the hwmod entry will not have a
base address while enabling and idling (using sysc
Hi Mark,
On Fri, Sep 27, 2013 at 05:06:38PM +0100, Kumar Gala wrote:
On Sep 17, 2013, at 2:30 PM, Suman Anna wrote:
HwSpinlock IP is present only on OMAP4 and other newer SoCs,
which are all device-tree boot only. This patch adds the
base support for parsing the DT nodes, and removes
, at 2:30 PM, Suman Anna wrote:
All the platform-specific hwlock driver implementations need the
number of locks and the associated base id for registering the
locks present within a hwspinlock device with the driver core.
These two variables are represented by 'hwlock-num-locks' and
'hwlock
dereference and a kernel boot hang.
Handle this scenario by checking for a valid module address space
during the _init of each hwmod, and leaving it in the registered
state if no module register address base is defined in either of
the hwmod data or the DT data.
Signed-off-by: Suman Anna s
Tony,
On 10/03/2013 01:05 PM, Tony Lindgren wrote:
* Suman Anna s-a...@ti.com [130903 11:00]:
HwSpinlock IP is present only on OMAP4 and other newer SoCs,
which are all device-tree boot only. This patch adds the
base support for parsing the DT nodes, and removes the code
dealing
On 10/07/2013 04:19 PM, Nishanth Menon wrote:
On 10/03/2013 11:59 AM, Suman Anna wrote:
The hwmod init sequence involves initializing and idling all the
hwmods during bootup. If a module class has sysconfig, the init
sequence utilizes the module register base for performing any
sysc
Tony,
On 10/08/2013 01:09 PM, Tony Lindgren wrote:
* Suman Anna s-a...@ti.com [131003 10:07]:
The hwmod init sequence involves initializing and idling all the
hwmods during bootup. If a module class has sysconfig, the init
sequence utilizes the module register base for performing any
sysc
On 10/09/2013 02:12 AM, Paul Walmsley wrote:
On Tue, 17 Sep 2013, Suman Anna wrote:
Add the hwmod data for the spinlock IP in OMAP5 SoC.
This is needed to be able to enable the OMAP spinlock
support for OMAP5.
Signed-off-by: Suman Anna s-a...@ti.com
Thanks, queued. You can omit
Hi Paul,
On 10/09/2013 12:35 AM, Paul Walmsley wrote:
Hi
On Thu, 3 Oct 2013, Suman Anna wrote:
The hwmod init sequence involves initializing and idling all the
hwmods during bootup. If a module class has sysconfig, the init
sequence utilizes the module register base for performing any
Hi Mark,
On Fri, Sep 27, 2013 at 05:06:38PM +0100, Kumar Gala wrote:
On Sep 17, 2013, at 2:30 PM, Suman Anna wrote:
HwSpinlock IP is present only on OMAP4 and other newer SoCs,
which are all device-tree boot only. This patch adds the
base support for parsing the DT nodes, and removes
controlled, and it is disabled out of
reset. Make sure the module is enabled and clocked before reading
the SYSSTATUS register.
Signed-off-by: Suman Anna s-a...@ti.com
---
drivers/hwspinlock/omap_hwspinlock.c | 21 ++---
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers
Add the hwspinlock device tree node for OMAP4 family
of SoCs.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/omap4.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 45708e1..74db751 100644
--- a/arch
Add the hwspinlock device tree node for OMAP5 SoCs.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 86295d2..2a98a59 100644
--- a/arch/arm/boot/dts
, and to request a specific lock using
the phandle + args specifier. The latter function is different
from the existing non-DT function, in that the specifier is
relative to the hwlock device instead of being a global lock id
registered with the core.
Signed-off-by: Suman Anna s-a...@ti.com
Add the hwspinlock device tree node for AM33xx family
of SoCs.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 8692490..49dfb86 100644
to OMAP hwspinlock driver
- Add OMAP4 DT node and bindings information
http://marc.info/?l=linux-omapm=137823082308009w=2
[1] https://lkml.org/lkml/2013/8/14/528
[2] http://marc.info/?t=13782309035r=1w=2
Suman Anna (8):
hwspinlock/core: maintain a list of registered hwspinlock banks
HwSpinlock IP is present only on OMAP4 and other newer SoCs,
which are all device-tree boot only. This patch adds the
base support for parsing the DT nodes, and removes the code
dealing with the traditional platform device instantiation.
Signed-off-by: Suman Anna s-a...@ti.com
---
.../devicetree
AM33XX device family also supports hwspinlocks. The IP
is identical to that of OMAP4/OMAP5, except for the
number of locks.
Signed-off-by: Suman Anna s-a...@ti.com
---
drivers/hwspinlock/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/hwspinlock/Kconfig b
and a specific lock belonging to the device
requested through a phandle + args approach.
Signed-off-by: Suman Anna s-a...@ti.com
---
drivers/hwspinlock/hwspinlock_core.c | 48
drivers/hwspinlock/hwspinlock_internal.h | 2 ++
2 files changed, 50 insertions(+)
diff --git
The spinlock module's SYSCONFIG register does not support
smart wakeup, so remove this flag from the idle modes in
the spinlock hwmod definition.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff
of irqs in the OMAP2/3 hwmod data were misconfigured completely
as they were missing this OMAP_INTC_START relative offset. Add this
offset back to fix the incorrect irq data for the following modules:
OMAP2 - GPMC, RNG
OMAP3 - GPMC, ISP MMU IVA MMU
Signed-off-by: Suman Anna s
interrupt to the
appropriate interrupt #52.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/omap2.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index d0c5b37..5377ddf 100644
--- a/arch/arm/boot/dts
The spinlock module's SYSCONFIG register on DRA7xx does not
support smart wakeup, and also does not have the CLKACTIVITY
field. The sysc data for spinlock module has been appropriately
fixed up to reflect the same.
Cc: Ambresh K ambr...@ti.com
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm
-off-by: Suman Anna s-a...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
index 9002fca..5c2cc80 100644
--- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
the
phandle + args specifier. This function relies on the
implementation providing back a relative hwlock id within
the bank from the args specifier.
Signed-off-by: Suman Anna s-a...@ti.com
---
Documentation/hwspinlock.txt | 34 +-
drivers/hwspinlock/hwspinlock_core.c
.
Signed-off-by: Suman Anna s-a...@ti.com
---
drivers/hwspinlock/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/hwspinlock/Kconfig b/drivers/hwspinlock/Kconfig
index 70637d2..3612cb5 100644
--- a/drivers/hwspinlock/Kconfig
+++ b/drivers/hwspinlock/Kconfig
@@ -10,7
HwSpinlock IP is present only on OMAP4 and other newer SoCs,
which are all device-tree boot only. This patch adds the
base support for parsing the DT nodes, and removes the code
dealing with the traditional platform device instantiation.
Signed-off-by: Suman Anna s-a...@ti.com
[t...@atomide.com
controlled, and it is disabled out of
reset. Make sure the module is enabled and clocked before reading
the SYSSTATUS register.
Signed-off-by: Suman Anna s-a...@ti.com
---
drivers/hwspinlock/omap_hwspinlock.c | 21 ++---
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers
HwSpinlock IP is present only on OMAP4 and other newer SoCs,
which are all device-tree boot only. This patch adds the
DT bindings information for OMAP hwspinlock module.
Cc: Rob Herring robh...@kernel.org
Signed-off-by: Suman Anna s-a...@ti.com
---
.../devicetree/bindings/hwlock/omap
the '#hwlock-cells' property.
Note that the document is named hwlock.txt deliberately to keep it
a bit more generic.
Cc: Rob Herring robh...@kernel.org
Signed-off-by: Suman Anna s-a...@ti.com
---
.../devicetree/bindings/hwlock/hwlock.txt | 52 ++
1 file changed, 52
and a specific lock belonging to the device
requested through a phandle + args approach.
Signed-off-by: Suman Anna s-a...@ti.com
---
Documentation/hwspinlock.txt | 2 ++
drivers/hwspinlock/hwspinlock_core.c | 51
drivers/hwspinlock/hwspinlock_internal.h | 2
hwspinlock driver
- Add OMAP4 DT node and bindings information
http://marc.info/?l=linux-omapm=137823082308009w=2
Suman Anna (7):
Documentation: dt: add common bindings for hwspinlock
Documentation: dt: add the omap hwspinlock bindings document
hwspinlock/core: maintain a list of registered
Add the hwspinlock device tree node for AM43xx family
of SoCs.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 974d103..81bf21f 100644
Add the hwspinlock device tree node for DRA7 SoCs.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index d0df4c4..672ffec 100644
--- a/arch/arm/boot/dts
Add a new generic property #hwlock-cells to the hwspinlock
DT nodes on OMAP4, OMAP5 and AM33xx. This common property allows
different platform implementations to define the args specifier
length. OMAP implementations will always use a value of 1.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch
confusion.
[1] http://marc.info/?l=linux-omapm=138433541420926w=2
[2] http://marc.info/?l=linux-omapm=138965904015225w=2
Suman Anna (3):
ARM: dts: OMAP: Add #hwlock-cells property to hwspinlock nodes
ARM: dts: DRA7: Add hwspinlock node
ARM: dts: AM4372: Add hwspinlock node
arch/arm/boot
controlled, and it is disabled out of
reset. Make sure the module is enabled and clocked before reading
the SYSSTATUS register.
Signed-off-by: Suman Anna s-a...@ti.com
---
drivers/hwspinlock/omap_hwspinlock.c | 27 ---
1 file changed, 20 insertions(+), 7 deletions(-)
diff --git
Bjorn,
On 02/07/2014 04:49 PM, Bjorn Andersson wrote:
On Mon, Jan 13, 2014 at 4:19 PM, Suman Anna s-a...@ti.com wrote:
This patch adds three new OF helper functions to use/request
locks from a hwspinlock device instantiated through a
device-tree blob.
Nice, I ran in to the problem of needing
Mark,
On 01/13/2014 06:19 PM, Suman Anna wrote:
Hi,
This is an updated series mainly addressing Mark Rutland's comments
about hwlock specifier being always one-cell. The series adds the
support for #hwlock-cells property and adds a simple default OF
translate function.
The DTS patches from
portions are
decoupled from omap_hwmod/omap_device into a separate reset
driver.
This patch adds the pdata quirks for the reset management of
iommus within the DSP (OMAP3 OMAP4) and IPU subsystems (OMAP4).
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/mach-omap2/pdata-quirks.c | 20
the pointer.
In such case, omap_iommu_attach() should return ENODEV, not NULL.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
Acked-by: Suman Anna s-a...@ti.com
---
drivers/iommu/omap-iommu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/omap
A new MMU hwmod class and data structures are created
to represent the MMUs within the IPU and DSP processor
subsystems in OMAP5. The MMUs in OMAP5 are identical to
those in OMAP4.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 83
...@ideasonboard.com
[s-a...@ti.com: updated to use device name instead of OF name]
Signed-off-by: Suman Anna s-a...@ti.com
---
drivers/iommu/omap-iommu.c | 45 +
1 file changed, 45 insertions(+)
diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap
From: Florian Vaussard florian.vauss...@epfl.ch
When booting with a devicetree, no platform data is provided.
Do not prematurely exit iommu_enable() and iommu_disable() in
such a case.
Note: As OMAP do not yet has a proper reset controller driver,
IOMMUs requiring a reset signal should use
-err-back'.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
[s-a...@ti.com: split bindings document, add dra7 and bus error back]
Signed-off-by: Suman Anna s-a...@ti.com
---
.../devicetree/bindings/iommu/ti,omap-iommu.txt| 28 ++
1 file changed, 28 insertions
Pinchart (1):
iommu/omap: allocate archdata on the fly for DT-based devices
Suman Anna (7):
iommu/omap: convert to devm_* interfaces
iommu/omap: enable bus-error back on supported iommus
ARM: OMAP2+: change the ISP device archdata MMU name
ARM: OMAP2+: use pdata quirks for iommu reset lines
Use the various devm_ interfaces to simplify the cleanup in
probe and remove functions.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
Signed-off-by: Suman Anna s-a...@ti.com
---
drivers/iommu/omap-iommu.c | 52 +-
1 file changed, 10
. Convert it!
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
[s-a...@ti.com: dev_name adaptation and improved error checking]
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/mach-omap2/omap-iommu.c | 5 +
drivers/iommu/omap-iommu.c | 41
From: Florian Vaussard florian.vauss...@epfl.ch
The device attribute data and ocp address space have all been
cleaned up for OMAP4 iommus. All this data is populated via
the corresponding dt node.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
Signed-off-by: Suman Anna s-a...@ti.com
From: Florian Vaussard florian.vauss...@epfl.ch
With full DT boot, the legacy mode of platform device creation
for OMAP IOMMUs is not needed anymore.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
arch/arm/mach-omap2/Makefile | 3 --
arch/arm/mach-omap2/omap-iommu.c | 79
, and there
is no automatic power domain switching to ON.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/mach-omap2/clockdomains3xxx_data.c | 2 +-
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 4
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2
OMAP5 has the same iommus as OMAP4, so extend the OMAP4
iommu pdata quirks for OMAP5 as well.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/mach-omap2/pdata-quirks.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-omap2/pdata-quirks.c
b/arch/arm/mach-omap2/pdata
.
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
[s-a...@ti.com: revise commit log]
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 8
arch/arm/plat-omap/Kconfig | 3 ---
2 files changed, 11
The IOMMU DT nodes have been added for the DSP and IPU
subsystems. The MMUs in OMAP5 are identical to those in
OMAP4, including the bus error back capability on IPU.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 17 +
1 file changed, 17 insertions
subsystem.
The MMU within the IPU sub-system also supports a bus error back
capability, not available on the DSP MMU.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
[s-a...@ti.com: dma-window updates and bus error back addition]
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts
-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/omap3.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index ac91cc3..9607187 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -419,6 +419,15
node
ARM: dts: OMAP3: Add IVA IOMMU node
ARM: dts: OMAP4: Add IOMMU nodes
Suman Anna (1):
ARM: dts: OMAP5: Add IOMMU nodes
arch/arm/boot/dts/omap3.dtsi | 17 ++---
arch/arm/boot/dts/omap4.dtsi | 17 +
arch/arm/boot/dts/omap5.dtsi | 17 +
3 files
forward.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/mach-omap2/devices.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 0dd6398..3bf0452 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach
From: Florian Vaussard florian.vauss...@epfl.ch
The irq numbers, ocp address space and device attribute data
have all been cleaned up for OMAP3 IOMMUs. All this data is
populated via the corresponding dt node.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
Signed-off-by: Suman Anna s
it as a bus fault and provide additional debug
information. This feature is turned on by default by the driver on
iommus supporting it.
Signed-off-by: Subramaniam Chanderashekarapuram subramaniam...@ti.com
Signed-off-by: Suman Anna s-a...@ti.com
---
drivers/iommu/omap-iommu.c | 2 ++
drivers/iommu/omap
From: Florian Vaussard florian.vauss...@epfl.ch
Update the IOMMU node for the camera subsystem as per the
OMAP IOMMU bindings.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
[s-a...@ti.com: corrected interrupt number]
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/omap3
:
[...]
-
Illia Smyrnov (1):
ARM: OMAP4: hwmod: Fix SOFTRESET logic for OMAP4
Suman Anna (1):
ARM: DRA7: hwmod data: correct the sysc data for spinlock
Tomi Valkeinen (1):
ARM: OMAP2+: clock: fix clkoutx2 with CLK_SET_RATE_PARENT
Vaibhav Bedia (1):
ARM: OMAP5
Mark, Kumar, Rob,
On 02/13/2014 07:15 PM, Suman Anna wrote:
From: Florian Vaussard florian.vauss...@epfl.ch
This patch adds the iommu bindings for all OMAP2+ SoCs. Apart from
the standard bindings used by OMAP peripherals, this patch uses a
'dma-window' (already used by Tegra SMMU) and adds
Mark, Ohad,
On 02/10/2014 01:27 PM, Suman Anna wrote:
Mark,
On 01/13/2014 06:19 PM, Suman Anna wrote:
Hi,
This is an updated series mainly addressing Mark Rutland's comments
about hwlock specifier being always one-cell. The series adds the
support for #hwlock-cells property and adds a simple
Hi Laurent,
On 02/25/2014 03:13 PM, Laurent Pinchart wrote:
Hi Suman,
Thank you for the patch.
On Thursday 13 February 2014 12:15:33 Suman Anna wrote:
From: Florian Vaussard florian.vauss...@epfl.ch
omap_iommu_attach() returns NULL or ERR_PTR in case of error, but
omap_iommu_attach_dev
Hi Laurent,
On 02/25/2014 03:15 PM, Laurent Pinchart wrote:
Hi Suman,
Thank you for the patch.
On Thursday 13 February 2014 12:15:38 Suman Anna wrote:
From: Florian Vaussard florian.vauss...@epfl.ch
When booting with a devicetree, no platform data is provided.
Do not prematurely exit
Hi Laurent,
On 02/25/2014 03:26 PM, Laurent Pinchart wrote:
Hi Suman,
Thank you for the patch.
On Thursday 13 February 2014 12:15:34 Suman Anna wrote:
From: Florian Vaussard florian.vauss...@epfl.ch
This patch adds the iommu bindings for all OMAP2+ SoCs. Apart from
the standard bindings
Florian,
On 02/25/2014 02:10 AM, Florian Vaussard wrote:
On 02/25/2014 07:26 AM, Mike Turquette wrote:
Quoting Florian Vaussard (2014-02-23 21:44:25)
On 02/23/2014 10:23 PM, Mike Turquette wrote:
Quoting Florian Vaussard (2014-02-19 11:26:43)
On 02/19/2014 05:22 PM, Tero Kristo wrote:
On
Hi Laurent,
On Tuesday 25 February 2014 16:32:03 Suman Anna wrote:
On 02/25/2014 03:13 PM, Laurent Pinchart wrote:
On Thursday 13 February 2014 12:15:33 Suman Anna wrote:
From: Florian Vaussard florian.vauss...@epfl.ch
omap_iommu_attach() returns NULL or ERR_PTR in case of error
Hi Laurent,
On 02/25/2014 08:13 PM, Laurent Pinchart wrote:
Hi Suman,
On Tuesday 25 February 2014 17:02:35 Suman Anna wrote:
On 02/25/2014 03:26 PM, Laurent Pinchart wrote:
On Thursday 13 February 2014 12:15:34 Suman Anna wrote:
From: Florian Vaussard florian.vauss...@epfl.ch
This patch
Tony,
On 02/26/2014 11:18 AM, Tony Lindgren wrote:
* Suman Anna s-a...@ti.com [140213 10:19]:
From: Florian Vaussard florian.vauss...@epfl.ch
The irq numbers, ocp address space and device attribute data
have all been cleaned up for OMAP3 IOMMUs. All this data is
populated via
Hi Tony,
On 02/26/2014 11:17 AM, Tony Lindgren wrote:
* Suman Anna s-a...@ti.com [140213 10:19]:
The OMAP iommu driver performs the reset management for the
iommu instances in processor sub-systems using the omap_device
API which are currently supplied as platform data ops. Use pdata
quirks
Hi Laurent,
On Wednesday 26 February 2014 11:02:24 Suman Anna wrote:
On 02/25/2014 08:13 PM, Laurent Pinchart wrote:
On Tuesday 25 February 2014 17:02:35 Suman Anna wrote:
On 02/25/2014 03:26 PM, Laurent Pinchart wrote:
On Thursday 13 February 2014 12:15:34 Suman Anna wrote:
From: Florian
Hi Laurent,
On 02/26/2014 03:05 PM, Laurent Pinchart wrote:
Hi Suman,
Thank you for the patch.
On Thursday 13 February 2014 12:22:55 Suman Anna wrote:
From: Florian Vaussard florian.vauss...@epfl.ch
Add the IOMMU nodes for the DSP and IPU subsystems. The external
address space for DSP
Hi Laurent,
On 02/26/2014 02:36 PM, Laurent Pinchart wrote:
Hi Suman,
On Wednesday 26 February 2014 14:23:03 Suman Anna wrote:
On Wednesday 26 February 2014 11:02:24 Suman Anna wrote:
On 02/25/2014 08:13 PM, Laurent Pinchart wrote:
On Tuesday 25 February 2014 17:02:35 Suman Anna wrote
On 02/26/2014 04:18 PM, Suman Anna wrote:
Hi Laurent,
On 02/26/2014 02:36 PM, Laurent Pinchart wrote:
Hi Suman,
On Wednesday 26 February 2014 14:23:03 Suman Anna wrote:
On Wednesday 26 February 2014 11:02:24 Suman Anna wrote:
On 02/25/2014 08:13 PM, Laurent Pinchart wrote:
On Tuesday 25
Hi Laurent,
On Wednesday 26 February 2014 16:28:08 Suman Anna wrote:
On 02/26/2014 04:18 PM, Suman Anna wrote:
On 02/26/2014 02:36 PM, Laurent Pinchart wrote:
On Wednesday 26 February 2014 14:23:03 Suman Anna wrote:
On Wednesday 26 February 2014 11:02:24 Suman Anna wrote:
On 02/25/2014 08
Paul,
On 02/28/2014 01:58 PM, Paul Walmsley wrote:
On Thu, 13 Feb 2014, Suman Anna wrote:
From: Florian Vaussard florian.vauss...@epfl.ch
CONFIG_OMAP_IOMMU_IVA2 was defined originally to avoid conflicting
usage by tidspbridge and other iommu users. The same can be achieved
by marking the DT
Use the various devm_ interfaces to simplify the cleanup in
probe and remove functions.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
Signed-off-by: Suman Anna s-a...@ti.com
Acked-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
---
drivers/iommu/omap-iommu.c | 52
deprecated CONFIG_OMAP_IOMMU_IVA2
Laurent Pinchart (1):
iommu/omap: allocate archdata on the fly for DT-based devices
Suman Anna (8):
iommu/omap: convert to devm_* interfaces
iommu/omap: fix error return paths in omap_iommu_attach()
iommu/omap: enable bus-error back on supported iommus
ARM
101 - 200 of 639 matches
Mail list logo
