Re: [PATCH 0/4] Cleanup legacy OMAP IOMMU device creation

Hi Tony, On 09/16/2015 06:48 PM, Suman Anna wrote: > Hi Tony, > > The following series removes the legacy platform device creation > logic for OMAP IOMMU devices. I will cleanup the legacy support > from the OMAP IOMMU driver in a subsequent merge window after > this series ma

Re: [PATCH v3 1/3] mailbox/omap: Add ti,mbox-send-noirq quirk to fix AM33xx CPU Idle

On 10/21/2015 11:42 PM, Jassi Brar wrote: > On 22 October 2015 at 05:35, Suman Anna <s-a...@ti.com> wrote: > >>> Anyways I am OK too, if you guys want to fix it with a platform >>> specific quirk. Let me know I'll pick this patch. >> >> I haven't gott

Re: [PATCH 1/2] ARM: OMAP2+: Remove legacy mailbox device instantiation

Hi Tony, On 09/14/2015 06:37 PM, Suman Anna wrote: > The legacy-style mailbox device creation is supported currently > only for OMAP3, as all other SoCs are DT-boot only. Even on this > SoC, there are no client drivers that utilize these mailbox devices. > So, clean up the legacy-s

Re: [PATCH v3 1/3] mailbox/omap: Add ti,mbox-send-noirq quirk to fix AM33xx CPU Idle

Hi Jassi, On 10/20/2015 11:44 PM, Jassi Brar wrote: > On Wed, Sep 23, 2015 at 5:44 AM, Dave Gerlach wrote: >> The mailbox framework controls the transmission queue and requires >> either its controller implementations or clients to run the state >> machine for the Tx queue. The

Re: [PATCH] ARM: OMAP2+: Fix oops with LPAE and more than 2GB of memory

On 10/14/2015 03:12 PM, Arnd Bergmann wrote: > On Wednesday 14 October 2015 09:17:56 Tony Lindgren wrote: >> * Arnd Bergmann [151014 02:20]: >>> On Tuesday 13 October 2015 16:13:20 Tony Lindgren wrote: On boards with more than 2GB of RAM booting goes wrong with things not

Re: [REPOST PATCH 1/4] ARM: dts: DRA7: Add dsp1_system syscon node

Hi Tony, On 10/12/2015 04:43 PM, Tony Lindgren wrote: > * Suman Anna <s-a...@ti.com> [151002 16:27]: >> The DSP_SYSTEM sub-module is a dedicated system control logic >> module present within a DRA7 DSP processor sub-system. This >> module is responsible for power m

Re: [PATCH] arm: omap2: timer: don't disable our timers

On 10/06/2015 12:14 PM, Felipe Balbi wrote: > > Hi, > > Suman Anna <s-a...@ti.com> writes: >>>>>> On 10/05/2015 02:48 PM, Balbi, Felipe wrote: >>>>>>> We actually want these devices to be created because >>>>>>> we w

Re: [PATCH 04/11] arm: omap2: timer: provide generic sync32k_timer_init function

On 10/06/2015 12:02 PM, Balbi, Felipe wrote: > instead of constantly defining a small wrapper > around __omap_sync32k_timer_init(), let's define > a generic one which can be used by all OMAPs. > > Signed-off-by: Felipe Balbi > --- > arch/arm/mach-omap2/board-generic.c | 10

Re: [PATCH] arm: omap2: timer: don't disable our timers

Hi Felipe, On 10/05/2015 02:48 PM, Balbi, Felipe wrote: > We actually want these devices to be created because > we will be moving timers to drivers/clocksource and > this will prevent them from probing. This logic is also used to remove the secure timer from being

Re: [PATCH v2 3/4] ARM: dts: DRA7: Add timer12 node

On 10/06/2015 02:52 AM, Tony Lindgren wrote: > * Felipe Balbi [151005 17:51]: >> >> according to Tony we should avoid using status at all for in-SoC >> devices. >> >> Tony, can you confirm I understood you correctly ? > > Yes. With status = "disabled" kernel completely ignores the

Re: [PATCH 1/4] ARM: OMAP: dmtimer: check for fixed timers during config

On 10/05/2015 11:58 AM, Tony Lindgren wrote: > * Suman Anna <s-a...@ti.com> [151005 09:47]: >> Tony, >> >> On 10/03/2015 12:29 PM, kbuild test robot wrote: >>> Hi Suman, >>> >>> [auto build test results on v4.3-rc3 -- if it's inapp

Re: [PATCH] arm: omap2: timer: don't disable our timers

Hi Felipe, On 10/05/2015 02:48 PM, Balbi, Felipe wrote: > We actually want these devices to be created because > we will be moving timers to drivers/clocksource and > this will prevent them from probing. This logic is also used to remove the secure timer from being registered to the kernel on HS

Re: [PATCH] arm: omap2: timer: don't disable our timers

Hi Felipe, >> >> On 10/05/2015 02:48 PM, Balbi, Felipe wrote: >>> We actually want these devices to be created because >>> we will be moving timers to drivers/clocksource and >>> this will prevent them from probing. >> >> This logic is also used to remove the secure timer from being >> registered

[PATCH v2 2/4] ARM: OMAP2+: timer: Remove secure timer for DRA7xx HS devices

t;ARM: OMAP3: Dynamically disable secure timer nodes for secure devices") to remove the secure timer on DRA7xx SoCs at run-time based on the SoC device type. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/mach-omap2/timer.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletion

[PATCH v2 3/4] ARM: dts: DRA7: Add timer12 node

disabled for now, and the kernel should refrain from using this secure timer on HS devices. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/boot/dts/dra7.dtsi | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi

[PATCH v2 1/4] ARM: OMAP: dmtimer: check for fixed timers during config

for such cases and proceed with out throwing an error. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/plat-omap/dmtimer.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 8ca94d379bc3..4c48b52c4a7c

[PATCH v2 0/4] DRA7 Timer12 Support

generations. regards Suman [1] http://marc.info/?l=linux-omap=144372799601354=2 [2] https://patchwork.kernel.org/patch/7311021/ Suman Anna (4): ARM: OMAP: dmtimer: check for fixed timers during config ARM: OMAP2+: timer: Remove secure timer for DRA7xx HS devices ARM: dts: DRA7: Add timer12

[PATCH v2 4/4] ARM: DRA7: hwmod: Add data for GPTimer 12

reused the existing timer class instead of reintroducing the identical dra7xx_timer_secure_sysc class which was dropped in commit edec17863362 ("ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4"). Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/mach-omap2/omap_hwmod

Re: [PATCH 1/4] ARM: OMAP: dmtimer: check for fixed timers during config

Tony, On 10/03/2015 12:29 PM, kbuild test robot wrote: > Hi Suman, > > [auto build test results on v4.3-rc3 -- if it's inappropriate base, please > ignore] > > config: arm-omap1_defconfig (attached as .config) > reproduce: > wget >

Re: [PATCH] clk: ti: dflt: fix enable_reg validity check

On 10/02/2015 01:21 PM, Stephen Boyd wrote: > On 09/29, Suman Anna wrote: >> diff --git a/drivers/clk/ti/clkt_dflt.c b/drivers/clk/ti/clkt_dflt.c >> index 90d7d8a21c49..1ddc288fce4e 100644 >> --- a/drivers/clk/ti/clkt_dflt.c >> +++ b/drivers/clk/ti/clkt_dflt.c

[REPOST PATCH 1/4] ARM: dts: DRA7: Add dsp1_system syscon node

family. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/boot/dts/dra7.dtsi | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index e289c706d27d..62055094e8d5 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dt

[REPOST PATCH 3/4] ARM: dts: DRA7: Add common IOMMU nodes

of a second MMU within the DSP subsystem for the EDMA port. The DSP IOMMUs also need an additional 'ti,syscon-mmuconfig' property compared to the IPU IOMMUs. NOTE: The enabling of these nodes is left to the respective board dts files. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/boot/dt

[REPOST PATCH 4/4] ARM: dts: DRA74x: Add IOMMU nodes for DSP2

The DRA74x family of SoCs have a second DSP, that also has two MMUs just like the DSP1 subsystem. Add the IOMMU nodes for this DSP2 subsystem in disabled state to the DRA74x specific DTS file, the nodes would need to be enabled appropriately in the respective board DTS files. Signed-off-by: Suman

[REPOST PATCH 2/4] ARM: dts: DRA74x: Add dsp2_system syscon node

family. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/boot/dts/dra74x.dtsi | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi index feea98e0a4b5..dfa29b7ba86a 100644 --- a/arch/arm/boot/dts/dra74x.dtsi +++ b/arch/ar

[REPOST PATCH 0/4] Add DRA7 IOMMU DT nodes

://marc.info/?l=linux-omap=144382697928741=2 Suman Anna (4): ARM: dts: DRA7: Add dsp1_system syscon node ARM: dts: DRA74x: Add dsp2_system syscon node ARM: dts: DRA7: Add common IOMMU nodes ARM: dts: DRA74x: Add IOMMU nodes for DSP2 arch/arm/boot/dts/dra7.dtsi | 45

[REPOST PATCH 1/2] Documentation: dt: Update OMAP iommu bindings for DRA7 DSPs

e document for clarity. Signed-off-by: Suman Anna <s-a...@ti.com> --- .../devicetree/bindings/iommu/ti,omap-iommu.txt| 27 ++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/ti,omap-iommu.txt b/Documentation/devicetree/bindings/iommu/t

[REPOST PATCH 2/2] iommu/omap: Add support for configuring dsp iommus on DRA7xx

register programming is achieved through the processing of the optional "ti,syscon-mmuconfig" property. A proper value is assigned to the id field only when this property is present. Signed-off-by: Suman Anna <s-a...@ti.com> --- drivers/iommu/o

[REPOST PATCH 0/2] DRA7 DSP MMU config support

://marc.info/?l=linux-omap=144356627831318=2 [6] http://marc.info/?l=linux-omap=143752332808524=2 Suman Anna (2): Documentation: dt: Update OMAP iommu bindings for DRA7 DSPs iommu/omap: Add support for configuring dsp iommus on DRA7xx .../devicetree/bindings/iommu/ti,omap-iommu.txt| 27

[PATCH 1/4] ARM: OMAP: dmtimer: check for fixed timers during config

for such cases and proceed with out throwing an error. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/plat-omap/dmtimer.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 8ca94d379bc3..25693e722f1f 100644 ---

[PATCH 0/4] DRA7 Timer12 Support

. Patches baselined on 4.3-rc3, but should apply just fine on -rc1 as well. regards Suman Suman Anna (4): ARM: OMAP: dmtimer: check for fixed timers during config ARM: OMAP2+: timer: Remove secure timer for DRA7xx devices ARM: dts: DRA7: Add timer12 node ARM: DRA7: hwmod: Add data for GPTimer 12

[PATCH 2/4] ARM: OMAP2+: timer: Remove secure timer for DRA7xx devices

t;ARM: OMAP3: Dynamically disable secure timer nodes for secure devices") to remove the secure timer on DRA7xx SoCs at run-time based on the SoC device type. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/mach-omap2/timer.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletion

[PATCH 4/4] ARM: DRA7: hwmod: Add data for GPTimer 12

reused the existing timer class instead of reintroducing the identical dra7xx_timer_secure_sysc class which was dropped in commit edec17863362 ("ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4"). Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/mach-omap2/omap_hwmod

[PATCH 3/4] ARM: dts: DRA7: Add timer12 node

disabled for now, and the kernel should refrain from using this secure timer on HS devices. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/boot/dts/dra7.dtsi | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi

[PATCH] clk: ti: dflt: fix enable_reg validity check

c807dbedb5e5 ("clk: ti: fix ti_clk_get_reg_addr error handling"). Signed-off-by: Suman Anna <s-a...@ti.com> --- Hi Tero, Patch done against 4.3-rc3. There are couple of similar checks in drivers/clk/ti/clockdomain.c, but those seem to be ok. This is a non-urgent fix, as there are cur

[PATCH 5/5] ARM: dts: beagle-x15: Enable the system mailboxes 5 and 6

Enable the System Mailboxes 5 and 6 and the corresponding child sub-mailbox (IPC 3.x) nodes for the Beagle X15 EVM boards. This is needed to enable communication with the respective remote processors IPU1, IPU2, DSP1 and DSP2 from the MPU. Signed-off-by: Suman Anna <s-a...@ti.com> --- ar

[PATCH 4/5] ARM: dts: dra72-evm: Enable the system mailboxes 5 and 6

Enable the System Mailboxes 5 and 6 and the corresponding child sub-mailbox (IPC 3.x) nodes for the DRA72 EVM board. This is needed to enable communication with the respective remote processors IPU1, IPU2, and DSP1 from the MPU. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/bo

[PATCH 3/5] ARM: dts: dra7-evm: Enable the system mailboxes 5 and 6

Enable the System Mailboxes 5 and 6 and the corresponding child sub-mailbox (IPC 3.x) nodes for the DRA7 EVM board. This is needed to enable communication with the respective remote processors IPU1, IPU2, DSP1 and DSP2 from the MPU. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/bo

[PATCH 0/5] Add DRA7 sub-mailboxes for 4.4

stack, and that can be done by overwriting the properties or by using different sub-mailbox nodes altogether. The actual enablement of nodes is therefore done in the respective board DTS files. Patches are based on 4.3-rc1 and are intended for the 4.4 merge window. regards Suman Suman Anna (5

[PATCH 2/5] ARM: dts: DRA72x: Add IPC sub-mailbox nodes for IPU1, IPU2 & DSP1

. All these sub-mailbox nodes are left in disabled state, and should be enabled (and modified if needed) as per the individual product configuration in the corresponding board dts files. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/boot/dts/dra72x.dtsi | 21 +

[PATCH 1/5] ARM: dts: DRA74x: Add IPC sub-mailbox nodes for all IPUs & DSPs

product configuration in the corresponding board dts files. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/boot/dts/dra74x.dtsi | 26 ++ 1 file changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi index feea98

[PATCH 1/4] ARM: OMAP2+: Remove legacy device instantiation of IOMMUs

Drop platform data support") removed the legacy device support from the OMAP3 ISP driver, so the legacy device instantiation of OMAP IOMMU devices is no longer needed, and is cleaned up. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/mach-omap2/o

[PATCH 4/4] ARM: OMAP2+: Remove omap_mmu_dev_attr structure

needed, so remove it. Signed-off-by: Suman Anna <s-a...@ti.com> --- include/linux/platform_data/iommu-omap.h | 9 - 1 file changed, 9 deletions(-) diff --git a/include/linux/platform_data/iommu-omap.h b/include/linux/platform_data/iommu-omap.h index 54a0a9582fad..0496d171700a

[PATCH 3/4] ARM: OMAP4: hwmod data: Remove legacy IOMMU attr and addrs

OMAP4 has been DT-boot only for some time, and the legacy-mode device creation logic for IOMMU devices has also been cleaned up, so the dev_attr and address data is no longer required. So, remove these attribute data and hwmod addr space for the IPU & DSP IOMMU devices. Signed-off-by: Suman

[PATCH 2/4] ARM: OMAP3: hwmod data: Remove legacy IOMMU data

The legacy-mode device creation logic for IOMMU devices has been cleaned up, so the device attribute data, irq information and address data are no longer required. Remove all of these data for the ISP & IVA IOMMU devices. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/

[PATCH 0/4] Cleanup legacy OMAP IOMMU device creation

definition altogether, so will cause build issues if picked separately from the hwmod cleanup patches. I do not have any boards where I can still perform a legacy-style boot, so patches verified using DT-boot only. regards Suman [1] https://patchwork.kernel.org/patch/6806891/ Suman Anna (4

Re: [PATCH 1/2] ARM: OMAP2+: Remove legacy OMAP3 ISP instantiation

Hi Tony, On 09/03/2015 05:34 PM, Suman Anna wrote: > Hi Sakari, > > On 07/16/2015 07:58 AM, Tony Lindgren wrote: >> * Laurent Pinchart <laurent.pinch...@ideasonboard.com> [150716 05:57]: >>> The OMAP3 ISP is now fully supported in DT, remove its instantiation >

[PATCH 1/2] ARM: OMAP2+: Remove legacy mailbox device instantiation

present and supported for the DT boot on OMAP3. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/mach-omap2/devices.c | 28 1 file changed, 28 deletions(-) diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 9374da313e8e..f0f990

[PATCH 0/2] Cleanup legacy OMAP mailbox support

. regards Suman [1] https://patchwork.kernel.org/patch/6806891/ Suman Anna (2): ARM: OMAP2+: Remove legacy mailbox device instantiation ARM: OMAP3: hwmod data: Remove legacy mailbox data and addrs arch/arm/mach-omap2/devices.c | 28 arch/arm/mach-omap2

[PATCH 2/2] ARM: OMAP3: hwmod data: Remove legacy mailbox data and addrs

Remove the mailbox attribute data, irq info and hwmod addr space data that are used for creating the legacy-style mailbox devices, there is no need for these as the support for legacy-mode for this IP is being dropped. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/mach

[PATCH 0/2] OMAP hwspinlock hwmod cleanup

Hi Paul, Following are couple of hwmod cleanup patches for HwSpinlock IP. Patches based on 4.3-rc1. The legacy platform device instantiation logic has been cleaned up in 4.2 kernel when DT-support was added to the OMAP HwSpinlock driver. regards Suman Suman Anna (2): ARM: OMAP4: hwmod data

[PATCH 2/2] ARM: DRA7: hwmod data: Remove spinlock hwmod addrs

The legacy-style device creation logic for hwspinlock has been removed after the DT-support was added to the driver. The hwmod addr space for spinlock is therefore no longer needed, so remove it. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/mach-omap2/omap_hwmod_7xx_data.

[PATCH 1/2] ARM: OMAP4: hwmod data: Remove spinlock hwmod addrs

The legacy-style device creation logic for hwspinlock has been removed after the DT-support was added to the driver. The hwmod addr space for spinlock is therefore no longer needed, so remove it. Signed-off-by: Suman Anna <s-a...@ti.com> --- arch/arm/mach-omap2/omap_hwmod_44xx_data.

Re: [PATCH 1/2] ARM: OMAP2+: Remove legacy OMAP3 ISP instantiation

Hi Sakari, On 07/16/2015 07:58 AM, Tony Lindgren wrote: > * Laurent Pinchart [150716 05:57]: >> The OMAP3 ISP is now fully supported in DT, remove its instantiation >> from C code. > > Please feel to queue this along with the second patch in this series, >

Re: [PATCH 2/2] iommu/omap: Add support for configuring dsp iommus on DRA7xx

Hi Tony, Sorry for the long delay in getting back on this. I will repost the series once 4.3-rc1 is out, but at the moment I do not think any changes are required. Let me know if you still need any additional details. >>>> On 07/23/2015 02:24 AM, Tony Lindgren wrote: >>&

Re: [PATCH v2 1/3] mailbox/omap: Add ti,mbox-send-noirq quirk to fix AM33xx CPU Idle

Hi Tony, On 08/05/2015 05:28 AM, Tony Lindgren wrote: * Dave Gerlach d-gerl...@ti.com [150717 13:59]: --- a/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt +++ b/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt @@ -75,6 +75,14 @@ data that represent the following:

Re: [PATCH 00/11] Some OMAP IOMMU cleanup patches

On 08/03/2015 08:55 AM, Joerg Roedel wrote: On Mon, Jul 20, 2015 at 05:33:22PM -0500, Suman Anna wrote: Suman Anna (11): Documentation: dt: Add #iommu-cells info to OMAP iommu bindings iommu/omap: Remove all module references iommu/omap: Move debugfs functions to omap-iommu-debug.c

Re: [PATCH 0/2] DRA7 DSP MMU config support

On 08/03/2015 11:31 AM, Joerg Roedel wrote: On Tue, Jul 21, 2015 at 06:55:34PM -0500, Suman Anna wrote: The patches are baselined on 4.2-rc3 + the recent OMAP IOMMU cleanup series [1]. I will post the DTS patches separately to allow Tony to pick them up independently. From the discussion

Re: [PATCH 2/2] iommu/omap: Add support for configuring dsp iommus on DRA7xx

Hi Tony, On 07/23/2015 11:30 PM, Tony Lindgren wrote: * Suman Anna s-a...@ti.com [150723 09:25]: Hi Tony, On 07/23/2015 02:24 AM, Tony Lindgren wrote: * Suman Anna s-a...@ti.com [150722 09:25]: On 07/22/2015 12:26 AM, Tony Lindgren wrote: I don't like using syscon for tinkering directly

Re: [PATCH 2/2] iommu/omap: Add support for configuring dsp iommus on DRA7xx

Hi Tony, On 07/23/2015 02:24 AM, Tony Lindgren wrote: * Suman Anna s-a...@ti.com [150722 09:25]: On 07/22/2015 12:26 AM, Tony Lindgren wrote: I don't like using syscon for tinkering directly with SoC registers. This is not a SoC-level register, but a register within a sub-module of the DSP

Re: [PATCH 2/2] iommu/omap: Add support for configuring dsp iommus on DRA7xx

Hi Tony, On 07/22/2015 12:26 AM, Tony Lindgren wrote: * Suman Anna s-a...@ti.com [150721 16:58]: --- a/drivers/iommu/omap-iommu.c +++ b/drivers/iommu/omap-iommu.c @@ -26,6 +26,8 @@ #include linux/of_iommu.h #include linux/of_irq.h #include linux/of_platform.h +#include linux/regmap.h

Re: [PATCH 02/11] iommu/omap: Remove all module references

Hi Laurent, On Monday 20 July 2015 17:33:24 Suman Anna wrote: The OMAP IOMMU driver has been adapted to the IOMMU framework for a while now, and it does not support being built as a module anymore. So, remove all the module references from the OMAP IOMMU driver. While at it, also relocate

[PATCH 2/2] iommu/omap: Add support for configuring dsp iommus on DRA7xx

register programming is achieved through the processing of the optional ti,syscon-mmuconfig property. A proper value is assigned to the id field only when this property is present. Signed-off-by: Suman Anna s-a...@ti.com --- drivers/iommu/omap-iommu.c | 58

[PATCH 0/2] DRA7 DSP MMU config support

the DTS patches separately to allow Tony to pick them up independently. regards Suman [1] http://lists.linuxfoundation.org/pipermail/iommu/2015-July/013659.html Suman Anna (2): Documentation: dt: Update OMAP iommu bindings for DRA7 DSPs iommu/omap: Add support for configuring dsp iommus on DRA7xx

[PATCH 1/2] Documentation: dt: Update OMAP iommu bindings for DRA7 DSPs

. Signed-off-by: Suman Anna s-a...@ti.com --- .../devicetree/bindings/iommu/ti,omap-iommu.txt| 27 ++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/ti,omap-iommu.txt b/Documentation/devicetree/bindings/iommu/ti,omap-iommu.txt index

[PATCH 3/4] ARM: dts: DRA7: Add common IOMMU nodes

of a second MMU within the DSP subsystem for the EDMA port. The DSP IOMMUs also need an additional 'ti,syscon-mmuconfig' property compared to the IPU IOMMUs. NOTE: The enabling of these nodes is left to the respective board dts files. Signed-off-by: Suman Anna s-a...@ti.com --- arch/arm/boot/dts/dra7.dtsi

[PATCH 1/4] ARM: dts: DRA7: Add dsp1_system syscon node

family. Signed-off-by: Suman Anna s-a...@ti.com --- arch/arm/boot/dts/dra7.dtsi | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 8f1e25bcecbd..1c96729641b6 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7

[PATCH 4/4] ARM: dts: DRA74x: Add IOMMU nodes for DSP2

The DRA74x family of SoCs have a second DSP, that also has two MMUs just like the DSP1 subsystem. Add the IOMMU nodes for this DSP2 subsystem in disabled state to the DRA74x specific DTS file, the nodes would need to be enabled appropriately in the respective board DTS files. Signed-off-by: Suman

[PATCH 2/4] ARM: dts: DRA74x: Add dsp2_system syscon node

family. Signed-off-by: Suman Anna s-a...@ti.com --- arch/arm/boot/dts/dra74x.dtsi | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi index fa995d0ca1f2..6cb112450ddd 100644 --- a/arch/arm/boot/dts/dra74x.dtsi +++ b/arch/arm/boot/dts

[PATCH 0/4] Add DRA7 IOMMU DT nodes

=linux-omapm=143752295508435w=2 Suman Anna (4): ARM: dts: DRA7: Add dsp1_system syscon node ARM: dts: DRA74x: Add dsp2_system syscon node ARM: dts: DRA7: Add common IOMMU nodes ARM: dts: DRA74x: Add IOMMU nodes for DSP2 arch/arm/boot/dts/dra7.dtsi | 45

Re: [PATCH] ARM: OMAP2+: Remove module references from IOMMU machine layer

Hi Tony, On 07/16/2015 02:16 AM, Tony Lindgren wrote: * Suman Anna s-a...@ti.com [150710 13:45]: The OMAP IOMMU driver has been adapted to the IOMMU framework for a while now, and it no longer supports being built as a module. Cleanup all the module related references both from the code

[PATCH 06/11] iommu/omap: Remove trailing semi-colon from a macro

Remove the trailing semi-colon in the DEBUG_FOPS_RO macro definition. This fixes the checking warning, WARNING: macros should not use a trailing semicolon Signed-off-by: Suman Anna s-a...@ti.com --- drivers/iommu/omap-iommu-debug.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

[PATCH 03/11] iommu/omap: Move debugfs functions to omap-iommu-debug.c

routines are in one place. The move required exposing some new functions and moving some definitions to the internal omap-iommu.h header file. Signed-off-by: Suman Anna s-a...@ti.com --- drivers/iommu/omap-iommu-debug.c | 111 + drivers/iommu/omap-iommu.c | 148

[PATCH 04/11] iommu/omap: Protect omap-iopgtable.h against double inclusion

Protect the omap-pgtable.h header against double inclusion in source code by using the standard include guard mechanism. Signed-off-by: Suman Anna s-a...@ti.com --- drivers/iommu/omap-iopgtable.h | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/iommu/omap-iopgtable.h b/drivers

[PATCH 02/11] iommu/omap: Remove all module references

warning about using a blank line after function/struct/union/enum declarations. Signed-off-by: Suman Anna s-a...@ti.com --- drivers/iommu/omap-iommu.c | 19 +-- 1 file changed, 1 insertion(+), 18 deletions(-) diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c index

[PATCH 10/11] iommu/omap: Align code with open parenthesis

Fix all the occurrences of the following check warning generated with the checkpatch --strict option: CHECK: Alignment should match open parenthesis Signed-off-by: Suman Anna s-a...@ti.com --- drivers/iommu/omap-iommu.c | 23 +++ 1 file changed, 11 insertions(+), 12

[PATCH 05/11] iommu/omap: Remove unused union fields

There are couple of unions defined in the structures iotlb_entry and cr_regs. There are no usage/references to some of these union fields in the code, so clean them up and simplify the structures. Signed-off-by: Suman Anna s-a...@ti.com --- drivers/iommu/omap-iommu.h | 23

[PATCH 08/11] iommu/omap: Use BIT(x) macros in omap-iopgtable.h

-by: Suman Anna s-a...@ti.com --- drivers/iommu/omap-iopgtable.h | 22 -- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/iommu/omap-iopgtable.h b/drivers/iommu/omap-iopgtable.h index bfde5405f514..01a315227bf0 100644 --- a/drivers/iommu/omap-iopgtable.h +++ b

[PATCH 09/11] iommu/omap: Use BIT(x) macros in omap-iommu.h

Switch to using the BIT(x) macros in omap-iommu.h where possible. This eliminates the following checkpatch check warning: CHECK: Prefer using the BIT macro A couple of the warnings were ignored for better readability of the bit-shift for the different values. Signed-off-by: Suman Anna s

[PATCH 07/11] iommu/omap: Remove unnecessary error traces on alloc failures

Fix couple of checkpatch warnings of the type, WARNING: Possible unnecessary 'out of memory' message Signed-off-by: Suman Anna s-a...@ti.com --- drivers/iommu/omap-iommu.c | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu

[PATCH 00/11] Some OMAP IOMMU cleanup patches

and should apply fine on any 4.2-rc. regards Suman Suman Anna (11): Documentation: dt: Add #iommu-cells info to OMAP iommu bindings iommu/omap: Remove all module references iommu/omap: Move debugfs functions to omap-iommu-debug.c iommu/omap: Protect omap-iopgtable.h against double inclusion

[PATCH 11/11] iommu/omap: Split multiple assignments into separate lines

Use separate assignments for assigning the same value into different variables. This fixes the following check warning generated with the checkpatch --strict option: CHECK: multiple assignments should be avoided Signed-off-by: Suman Anna s-a...@ti.com --- drivers/iommu/omap-iommu.c | 6

[PATCH 01/11] Documentation: dt: Add #iommu-cells info to OMAP iommu bindings

The OMAP IOMMU bindings is updated to reflect the required #iommu-cells property. Signed-off-by: Suman Anna s-a...@ti.com --- Documentation/devicetree/bindings/iommu/ti,omap-iommu.txt | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/ti,omap

[PATCH 0/2] Add missing #iommu-cells on IOMMU nodes

the warning as seen with the fix added for OMAP3 is not seen yet, but will as soon as a user is added. Patches based on 4.2-rc1. regards Suman Suman Anna (2): ARM: dts: OMAP4: Add #iommu-cells property to IOMMUs ARM: dts: OMAP5: Add #iommu-cells property to IOMMUs arch/arm/boot/dts/omap4.dtsi | 2

[PATCH 2/2] ARM: dts: OMAP5: Add #iommu-cells property to IOMMUs

Add missing #iommu-cells property to the DSP and IPU IOMMU nodes for OMAP5 platforms. This property is required as per the generic iommu binding. Signed-off-by: Suman Anna s-a...@ti.com --- arch/arm/boot/dts/omap5.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/omap5

[PATCH 1/2] ARM: dts: OMAP4: Add #iommu-cells property to IOMMUs

Add missing #iommu-cells property to the DSP and IPU IOMMU nodes for OMAP4 platforms. This property is required as per the generic iommu binding. Signed-off-by: Suman Anna s-a...@ti.com --- arch/arm/boot/dts/omap4.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/omap4

[PATCH] ARM: OMAP2+: Remove module references from IOMMU machine layer

warning about using a blank line after function/struct/union/enum declarations. Signed-off-by: Suman Anna s-a...@ti.com --- arch/arm/mach-omap2/Makefile | 3 +-- arch/arm/mach-omap2/omap-iommu.c | 13 + 2 files changed, 2 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach

Re: [PATCH 1/1] add pwm capability to dm816x

Brian, On 06/15/2015 02:32 PM, Kristo, Tero wrote: On 06/15/2015 09:36 PM, Brian Hutchinson wrote: Clocks 4-7 are capable of PWM output on dm816x. This adds the pwm capability to those timers. Use checkpatch pls, I see lots of whitespace errors. Also, I don't think Mike / Stephen care

Re: Enabling IPU on OMAP44xx

Hi Jack, On 24/04/15 19:34, Nishanth Menon wrote: On 04/24/2015 11:21 AM, Jack Mitchell wrote: I've been fighting for a week with trying to get the IPU booted over remoteproc on an OMAP4470. I feel like I've got most of the way there we do not have support for OMAP4470 on git.kernel.org.

[PATCH] bus: omap_l3_noc: Fix master id address decoding for OMAP5

. The common DEBUGSS source is at a different input on each SoC. Fix the above issues by using a OMAP5-specific compatible property and using SoC-specific data where there are differences. Cc: Nishanth Menon n...@ti.com Signed-off-by: Suman Anna s-a...@ti.com --- Some validation traces

Re: [PATCH] bus: omap_l3_noc: Fix master id address decoding for OMAP5

On 04/24/2015 01:33 PM, Nishanth Menon wrote: On 04/24/2015 12:54 PM, Suman Anna wrote: The L3 Error handling on OMAP5 for the most part is very similar to that of OMAP4, and had leveraged common data structures and register layout definitions so far. Upon closer inspection, there are a few

Re: [PATCH] bus: omap_l3_noc: Fix master id address decoding for OMAP5

On 04/24/2015 02:38 PM, Nishanth Menon wrote: On Fri, Apr 24, 2015 at 2:10 PM, Suman Anna s-a...@ti.com wrote: On 04/24/2015 01:33 PM, Nishanth Menon wrote: On 04/24/2015 12:54 PM, Suman Anna wrote: ... -static struct l3_target_data omap_l3_target_data_clk3[] = { -{0x0100, EMUSS

Re: [PATCH v8 0/4] hwspinlock core omap dt support

Mark, On 03/18/2015 04:57 PM, Suman Anna wrote: Hi Mark, On 03/12/2015 04:24 AM, Ohad Ben-Cohen wrote: Hi Suman, On Thu, Mar 5, 2015 at 4:01 AM, Suman Anna s-a...@ti.com wrote: This is the latest version of the hwspinlock dt support series, rebased onto v4.0-rc1 and addressing the long

Re: [PATCH 2/2] ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4

On 03/24/2015 01:06 PM, Paul Walmsley wrote: On Mon, 16 Mar 2015, Suman Anna wrote: GPTimer 4 is a regular timer and not a secure timer, so fix the hwmod to use the correct hwmod class (even though there are no differences in the class definition itself). Signed-off-by: Suman Anna s

Re: [PATCHv5 29/35] ARM: dts: am4372: add minimal l4 bus layout with control module support

Hi Tero, On 03/20/2015 01:44 PM, Kristo, Tero wrote: This patch creates an l4_wkup interconnect for AM43xx, and moves some of the generic peripherals under it. System control module nodes are moved under this new interconnect also, and the SCM clock layout is changed to use the renamed SCM

Re: [PATCH 0/2] Couple of DRA7 hwmod patches on Timers

Hi Paul, Following are couple of DRA7 hwmod patches for the GPTimers. Patches based on 4.0-rc1. The first patch adds the data for timers 13 through 16, the DT nodes are already present, and when enabled without the hwmod data triggers a l3_noc interrupt and hangs the kernel boot [1]. The

Re: [PATCHv5 27/35] ARM: dts: am33xx: add minimal l4 bus layout with control module support

On 03/20/2015 05:35 PM, Tony Lindgren wrote: * Suman Anna s-a...@ti.com [150320 14:44]: On 03/20/2015 01:44 PM, Kristo, Tero wrote: + scm: scm@21 { + compatible = ti,am3-scm, simple-bus; + reg = 0x21 0x2000

Re: [PATCHv5 27/35] ARM: dts: am33xx: add minimal l4 bus layout with control module support

Hi Tero, On 03/20/2015 01:44 PM, Kristo, Tero wrote: This patch creates an l4_wkup interconnect for AM33xx, and moves some of the generic peripherals under it. System control module nodes are moved under this new interconnect also, and the SCM clock layout is changed to use the renamed SCM

Re: [PATCH v8 0/4] hwspinlock core omap dt support

Hi Mark, On 03/12/2015 04:24 AM, Ohad Ben-Cohen wrote: Hi Suman, On Thu, Mar 5, 2015 at 4:01 AM, Suman Anna s-a...@ti.com wrote: This is the latest version of the hwspinlock dt support series, rebased onto v4.0-rc1 and addressing the long discussion on the bindings in v7 [1]. I really hope

[PATCH 2/2] ARM: OMAP: dmtimer: disable pm runtime on remove

Disable the pm_runtime of the device upon remove. This is added to balance the pm_runtime_enable() invoked in the probe. Signed-off-by: Suman Anna s-a...@ti.com --- arch/arm/plat-omap/dmtimer.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat

[PATCH 0/2] Couple of dmtimer fixes

-omapm=142653933112526w=2 Suman Anna (2): ARM: OMAP: dmtimer: check for pm_runtime_get_sync() failure ARM: OMAP: dmtimer: disable pm runtime on remove arch/arm/plat-omap/dmtimer.c | 15 ++- 1 file changed, 14 insertions(+), 1 deletion(-) -- 2.3.2 -- To unsubscribe from this list

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