Re: [PATCH 0/2] arm64: dts: renesas: Mark EthernetAVB device nodes disabled

On Wed, Jan 25, 2017 at 02:19:29PM +0100, Geert Uytterhoeven wrote: > Hi Simon, Magnus, > > This patch series marks the EthernetAVB device nodes in the R-Car H3 and > M3-W DTSes disabled. > Device nodes representing I/O devices should be marked disabled in the > SoC-specific DTSes, and

Re: [PATCH/RFC 3/4] iommu: dma: iommu iova domain reset

Hi Robin, Shimoda-san, everyone, Thanks for your feedback! On Thu, Jan 26, 2017 at 1:38 AM, Robin Murphy wrote: > On 25/01/17 12:54, Yoshihiro Shimoda wrote: >> From: Magnus Damm >> >> To add a workaround code for ipmmu-vmsa driver, this patch

RE: [RFC 1/5] pinctrl: rz-pfc: Add Renesas RZ pinctrl core module

Hi Jacopo, On Wednesday, January 25, 2017, Jacopo Mondi wrote: > drivers/pinctrl/Kconfig | 1 + > drivers/pinctrl/Makefile| 1 + > drivers/pinctrl/rz-pfc/Kconfig | 18 ++ > drivers/pinctrl/rz-pfc/Makefile | 1 + > drivers/pinctrl/rz-pfc/pinctrl-rz.c | 447

RE: [RFC 0/5] Renesas RZ series pinctrl driver

Hi Jacopo, Thanks for the patches. On Wednesday, January 25, 2017, Jacopo Mondi wrote: > Right now, the only "SoC" module support implemented is for RZ/A1H (Genmai > and GR-Peach boards). I'm going to give it a try on the RZ/A1 RSK board. > I have tested the correctness of mux settings

Re: [PATCH/RFC 1/4] iommu: dma: track mapped iova

Hi Robin, Shimoda-san, everyone, On Thu, Jan 26, 2017 at 1:27 AM, Robin Murphy wrote: > On 25/01/17 12:53, Yoshihiro Shimoda wrote: >> From: Magnus Damm >> >> To track mapped iova for a workaround code in the future. >> >> Signed-off-by: Magnus

[PATCH v4 2/2] clocksource: Add renesas-ostm timer driver

This patch adds a OSTM driver for the Renesas architecture. The OS Timer (OSTM) has independent channels that can be used as a freerun or interval times. This driver uses the first probed device as a clocksource and then any additional devices as clock events. Signed-off-by: Chris Brandt

[PATCH v4 1/2] dt-bindings: document renesas-ostm timer

Signed-off-by: Chris Brandt Reviewed-by: Geert Uytterhoeven --- v3: * changed ostm@fcfec000 to timer@fcfec000 in example * added power-domains in example v2: * remove sw implementation specific portions ---

Re: [PATCH] arm64: renesas: r8a7795: tidyup audma definition order

Hi Geert Thank you for your feedback > > From: Kuninori Morimoto > > > > Current r8a7795.dtsi defines audma -> ipmmu -> dma order. > > Because of this order, dma can connect to ipmmu, but > > audma can't connect to it. > > This patch moves audma order as ipmmu

Re: [PATCH] arm64: renesas: r8a7795: tidyup audma definition order

Hi Simon > sorry for missing this earlier. > > The patch did not seem to compile so I have applied it manually > by moving the audma0 and audma1 nodes to between the dmac2 and avb nodes. > > The result is follows: Thank you for your adjusting !! > > From: Kuninori Morimoto

[PATCH v3 3/3] drm: rcar-du: Add VSP1 live source support

From: Laurent Pinchart Register live sources for VSPD0 and VSPD1 and configure the plane source at plane setup time to source frames from memory or from the VSP1. [Sergei: ported to the modern kernel.] Signed-off-by: Laurent Pinchart

[PATCH v2] ARM: dts: r8a7791: link DU to VSPDs

Add the "vsps" property to the DU device node in order to link this node to the VSPD nodes. Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com> --- Changes in version 2: - rebased the patch. This patch is against the 'renesas-devel-20170125-v4.10-rc5' o

[PATCH v3 2/3] drm: Connect live source to framebuffers

From: Laurent Pinchart Introduce a new live source flag for framebuffers. When a framebuffer is created with that flag set, a live source is associated with the framebuffer instead of buffer objects. The framebuffer can then be used with a plane to

Re: [PATCH 0/2] Fix incorrect warning from dma-debug

Hi Robin, On Wed, Jan 25, 2017 at 6:27 PM, Robin Murphy wrote: > On 25/01/17 16:23, Geert Uytterhoeven wrote: >> On Mon, May 9, 2016 at 11:37 AM, Robin Murphy wrote: >>> On 08/05/16 11:59, Niklas Söderlund wrote: While using CONFIG_DMA_API_DEBUG

[PATCH v6 3/3] ARM: dts: r7s72100: update sdhi clock bindings

The SDHI controller in the RZ/A1 has 2 clock sources per channel and both need to be enabled/disabled for proper operation. This fixes the fact that the define for R7S72100_CLK_SDHI1 was not correct to begin with (typo), and that all 4 clock sources need to be defined an used. Signed-off-by:

[PATCH v6 2/3] mmc: sh_mobile_sdhi: explain clock bindings

In the case of a single clock source, you don't need names. However, if the controller has 2 clock sources, you need to name them correctly so the driver can find the 2nd one. The 2nd clock is for the internal card detect logic. Signed-off-by: Chris Brandt Reviewed-by:

[PATCH v6 1/3] mmc: sh_mobile_sdhi: add support for 2 clocks

Some controllers have 2 clock sources instead of 1. The 2nd clock is for the internal card detect logic and must be enabled/disabled along with the main core clock for proper operation. Signed-off-by: Chris Brandt --- v5: * call clk_disable_unprepare even if clk_cd is

[PATCH v6 0/3] mmc: sh_mobile_sdhi: fix missing r7s72100 clocks

At first this started out as a simple typo fix, until I realized that the SDHI in the RZ/A1 has 2 clocks per channel and both need to be turned on/off. This patch series adds the ability to specify 2 clocks instead of just 1, and does so for the RZ/A1 r7s72100. This patch has been tested on an

Re: [PATCH v2 0/3] net: phy: leds: Fix truncated LED trigger names and crashes

From: Geert Uytterhoeven Date: Wed, 25 Jan 2017 11:39:47 +0100 > I started seeing crashes during s2ram and poweroff on all my ARM boards, > like: > > Unable to handle kernel NULL pointer dereference at virtual address > > ... > []

[RFC 1/5] pinctrl: rz-pfc: Add Renesas RZ pinctrl core module

Add core module for per-pin Renesas RZ series pin controller. The core module allows SoC driver to register their pins and SoC specific operations and interfaces with pinctrl and pinmux core on their behalf. Signed-off-by: Jacopo Mondi --- drivers/pinctrl/Kconfig

[RFC 3/5] arm: dts: dt-bindings: Add Renesas RZ pinctrl header

Add dt-bindings header for Renesas RZ pincontroller. The header defines macros for pin description and alternate function numbers. Signed-off-by: Jacopo Mondi --- include/dt-bindings/pinctrl/pinctrl-renesas-rz.h | 19 +++ 1 file changed, 19

[RFC 0/5] Renesas RZ series pinctrl driver

Hello, after having discussed in great detail the RZ series per-pin PFC hardware peculiarities, this is a proposal for a possible pin-based pin controller driver for SoC devices of Renesas RZ family. This RFC series adds a minimal driver infrastructure which supports pin multiplexing via

[RFC 5/5] arm: dts: genmai: Add SCIF2 pin group

Add TxD and RxD pin configuration for SCIF2 serial communication interface on r7s72100 Genmai board. Signed-off-by: Jacopo Mondi --- arch/arm/boot/dts/r7s72100-genmai.dts | 13 + 1 file changed, 13 insertions(+) diff --git

[RFC 2/5] pinctrl: rz-pfc: Add Renesas RZ/A1 pinctrl driver

Add pin controller driver for Renesas RZ/A1 SoC. The SoC driver registers to rz-pfc core module and provides pin description array and SoC specific pin mux operation. Signed-off-by: Jacopo Mondi --- drivers/pinctrl/rz-pfc/Kconfig| 7 +

Re: [PATCH 0/2] Fix incorrect warning from dma-debug

On 25/01/17 16:23, Geert Uytterhoeven wrote: > Hi Robin, Hi Geert, > On Mon, May 9, 2016 at 11:37 AM, Robin Murphy wrote: >> On 08/05/16 11:59, Niklas Söderlund wrote: >>> While using CONFIG_DMA_API_DEBUG i came across this warning which I >>> think is a false positive. As

Re: [PATCH/RFC v3 net] ravb: unmap descriptors when freeing rings

On Wed, Jan 25, 2017 at 07:18:15PM +0300, Sergei Shtylyov wrote: > On 01/24/2017 09:21 PM, Simon Horman wrote: > > >From: Kazuya Mizuguchi > > > >"swiotlb buffer is full" errors occur after repeated initialisation of a > >device - f.e. suspend/resume or ip link

Re: [PATCH/RFC v3 net] ravb: unmap descriptors when freeing rings

On Wed, Jan 25, 2017 at 07:05:08PM +0300, Sergei Shtylyov wrote: > Hello. > > On 01/24/2017 09:21 PM, Simon Horman wrote: > > >From: Kazuya Mizuguchi > > > >"swiotlb buffer is full" errors occur after repeated initialisation of a > >device - f.e. suspend/resume

Re: [PATCH] serial: sh-sci: Reformat sci_parse_dt() for git diff

On Wed, Jan 25, 2017 at 03:55:49PM +0100, Geert Uytterhoeven wrote: > As the function header of sci_parse_dt() is split in an unusual way, > "git diff" gets confused when changes to the body of the function are > made, and attributes them to the wrong function. > > Reformat the function header to

Re: [PATCH 0/2] clk: renesas: r8a7795/r8a7796: Add IIC-DVFS clock

On Wed, Jan 25, 2017 at 12:19:32PM +0100, Geert Uytterhoeven wrote: > Hi all, > > This patch series, pulled from the rcar-3.5.1 BSP, adds the module > clocks for IIC-DVFS on the R-Car H3 and M3-W SoCs. > > As this is a dependency for Suspend-to-RAM, I plan to queue this in >

Re: [PATCH/RFC 3/4] iommu: dma: iommu iova domain reset

On 25/01/17 12:54, Yoshihiro Shimoda wrote: > From: Magnus Damm > > To add a workaround code for ipmmu-vmsa driver, this patch adds > a new geometry "force_reset_when_empty" not to reuse iova space. The domain geometry is absolutely not the appropriate place for

Re: [PATCH/RFC 1/4] iommu: dma: track mapped iova

On 25/01/17 12:53, Yoshihiro Shimoda wrote: > From: Magnus Damm > > To track mapped iova for a workaround code in the future. > > Signed-off-by: Magnus Damm > Signed-off-by: Yoshihiro Shimoda > --- >

Re: [PATCH/RFC 2/4] iommu: iova: use __alloc_percpu_gfp() with GFP_NOWAIT in init_iova_rcaches()

On 25/01/17 12:54, Yoshihiro Shimoda wrote: > In the future, the init_iova_rcaches will be called in atomic. That screams "doing the wrong thing". The sole point of the rcaches is to reuse IOVAs, whereas the main point of this series seems to involve not reusing IOVAs. The fact that we have to

Re: [PATCH 0/2] Fix incorrect warning from dma-debug

Hi Robin, On Mon, May 9, 2016 at 11:37 AM, Robin Murphy wrote: > On 08/05/16 11:59, Niklas Söderlund wrote: >> While using CONFIG_DMA_API_DEBUG i came across this warning which I >> think is a false positive. As shown dma_sync_single_for_device() are >> called from the

Re: [PATCH/RFC v3 net] ravb: unmap descriptors when freeing rings

Hello. On 01/24/2017 09:21 PM, Simon Horman wrote: From: Kazuya Mizuguchi "swiotlb buffer is full" errors occur after repeated initialisation of a device - f.e. suspend/resume or ip link set up/down. This is because memory mapped using dma_map_single() in

[PATCH] serial: sh-sci: Reformat sci_parse_dt() for git diff

As the function header of sci_parse_dt() is split in an unusual way, "git diff" gets confused when changes to the body of the function are made, and attributes them to the wrong function. Reformat the function header to fix this. Signed-off-by: Geert Uytterhoeven ---

Re: [PATCH] arm64: renesas: r8a7795: tidyup audma definition order

Hi Morimoto-san, On Wed, Dec 21, 2016 at 5:56 AM, Kuninori Morimoto wrote: > From: Kuninori Morimoto > > Current r8a7795.dtsi defines audma -> ipmmu -> dma order. > Because of this order, dma can connect to ipmmu, but > audma

Re: [RFC] Runtime PM on the RZ/A series is never going to work right

Hi Chris, On Wed, Jan 25, 2017 at 3:35 PM, Chris Brandt wrote: > On Wednesday, January 25, 2017, Geert Uytterhoeven wrote: >> > But won't the individual drivers still want to keep turning clocks on >> and off manually? >> > (unless I'm not understanding that the

RE: [RFC] Runtime PM on the RZ/A series is never going to work right

Hi Geert, On Wednesday, January 25, 2017, Geert Uytterhoeven wrote: > > I can play around and see. I know udealy(100) works OK, but then I > > have to have a delay that's as long as the slowest peripheral. > > If it was just to turn a clock on once, or once in a while, that's OK. > > But it seems

RE: [PATCH v3 2/2] clocksource: Add renesas-ostm timer driver

Hi Daniel, On Wednesday, January 25, 2017, Daniel Lezcano wrote: > > Then things work, but I'm back to managing the rollback code manually. > > > > > > Any other ideas on how to get the corresponding platform_device for a > > DT node? > > No :/ > > So up to you. > - CLOCKSOURCE_OF_DECLARE

RE: [PATCH v3 2/2] clocksource: Add renesas-ostm timer driver

Hi Geert, On Wednesday, January 25, 2017, Geert Uytterhoeven wrote: > > So I realized that in order to use builtin_platform, I can't have any > > of the functions in __init because the build system has no idea that I > > never plan on removing or probing again after boot. But, even if I > > take

[PATCH 2/2] arm64: dts: r8a7796: Mark EthernetAVB device node disabled

Device nodes representing I/O devices should be marked disabled in the SoC-specific DTS, and overridden by board-specific DTSes where needed. Fixes: 8e8b9eaef8fb05d9 ("arm64: dts: renesas: r8a7796: Add EthernetAVB instance") Signed-off-by: Geert Uytterhoeven ---

[PATCH 1/2] arm64: dts: r8a7795: Mark EthernetAVB device node disabled

Device nodes representing I/O devices should be marked disabled in the SoC-specific DTS, and overridden by board-specific DTSes where needed. Fixes: a92843c8a6f8c039 ("arm64: dts: r8a7795: add EthernetAVB device node") Signed-off-by: Geert Uytterhoeven ---

[PATCH 0/2] arm64: dts: renesas: Mark EthernetAVB device nodes disabled

Hi Simon, Magnus, This patch series marks the EthernetAVB device nodes in the R-Car H3 and M3-W DTSes disabled. Device nodes representing I/O devices should be marked disabled in the SoC-specific DTSes, and overridden by board-specific DTSes where needed. Thanks for applying! Geert

[PATCH/RFC 1/4] iommu: dma: track mapped iova

From: Magnus Damm To track mapped iova for a workaround code in the future. Signed-off-by: Magnus Damm Signed-off-by: Yoshihiro Shimoda --- drivers/iommu/dma-iommu.c | 29 +++--

[PATCH/RFC 4/4] iommu: ipmmu-vmsa: enable force_reset_when_empty

The IPMMU of R-Car Gen3 will mistake an address translation if IMCTR.FLUSH is set while some related devices that on the same doamin are running. To avoid this, this patch uses the force_reset_when_empty feature. Signed-off-by: Yoshihiro Shimoda ---

[PATCH/RFC 0/4] iommu: add workaround for R-Car Gen3 IPMMU

This patch set is based on: iommu.git / next branch and the following patch that Magnus-san sent: [patch v6 00/07] iommu/ipmmu-vmsa: ipmmu multi-arch update v6 R-Car Gen3 IPMMU has an issue that will mistake an address translation if IMCTR.FLUSH is set while some related devices that on the

[PATCH/RFC 2/4] iommu: iova: use __alloc_percpu_gfp() with GFP_NOWAIT in init_iova_rcaches()

In the future, the init_iova_rcaches will be called in atomic. Signed-off-by: Yoshihiro Shimoda --- drivers/iommu/iova.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/iova.c b/drivers/iommu/iova.c index b7268a1..866ad65

Re: [PATCH v2 2/3] net: phy: leds: Break dependency of phy.h on phy_led_triggers.h

On Wed, Jan 25, 2017 at 11:39:49AM +0100, Geert Uytterhoeven wrote: > includes , which is not really > needed. Drop the include from , and add it to all users > that didn't include it explicitly. > > Suggested-by: Andrew Lunn > Signed-off-by: Geert Uytterhoeven

Re: [PATCH v2 3/3] net: phy: leds: Fix truncated LED trigger names

On Wed, Jan 25, 2017 at 11:39:50AM +0100, Geert Uytterhoeven wrote: > Commit 4567d686f5c6d955 ("phy: increase size of MII_BUS_ID_SIZE and > bus_id") increased the size of MII bus IDs, but forgot to update the > private definition in . > This may cause: > 1. Truncation of LED trigger names, >

[PATCH 1/2] clk: renesas: r8a7795: Add IIC-DVFS clock

From: Keita Kobayashi This patch adds DVFS clock for R8A7795 SoC. Signed-off-by: Keita Kobayashi Signed-off-by: Gaku Inami Signed-off-by: Dien Pham Signed-off-by:

[PATCH 2/2] clk: renesas: r8a7796: Add IIC-DVFS clock

From: Khiem Nguyen This patch adds DVFS clock for R8A7796 SoC. Signed-off-by: Khiem Nguyen Signed-off-by: Dien Pham Signed-off-by: Takeshi Kihara Signed-off-by: Geert

[PATCH 0/2] clk: renesas: r8a7795/r8a7796: Add IIC-DVFS clock

Hi all, This patch series, pulled from the rcar-3.5.1 BSP, adds the module clocks for IIC-DVFS on the R-Car H3 and M3-W SoCs. As this is a dependency for Suspend-to-RAM, I plan to queue this in clk-renesas-for-v4.11. Thanks for your comments! Keita Kobayashi (1): clk: renesas:

[PATCH v2 3/3] net: phy: leds: Fix truncated LED trigger names

Commit 4567d686f5c6d955 ("phy: increase size of MII_BUS_ID_SIZE and bus_id") increased the size of MII bus IDs, but forgot to update the private definition in . This may cause: 1. Truncation of LED trigger names, 2. Duplicate LED trigger names, 3. Failures registering LED triggers, 4.

[ANNOUNCE] Renesas tree closed for v4.11

Hi, I would like to stop accepting non-bug-fix patches for v4.11 and get the last pull requests posted by the end of this week. This is in order for them to be sent before the release of v4.10-rc6, the deadline set by the ARM SoC maintainers. As patches should ideally progress from the renesas

[PATCH v2 2/3] net: phy: leds: Break dependency of phy.h on phy_led_triggers.h

includes , which is not really needed. Drop the include from , and add it to all users that didn't include it explicitly. Suggested-by: Andrew Lunn Signed-off-by: Geert Uytterhoeven --- v2: - New. --- drivers/net/phy/phy.c | 1 +

[PATCH v2 0/3] net: phy: leds: Fix truncated LED trigger names and crashes

Hi David, I started seeing crashes during s2ram and poweroff on all my ARM boards, like: Unable to handle kernel NULL pointer dereference at virtual address ... [] (__list_del_entry_valid) from [] (led_trigger_unregister+0x34/0xcc) [] (led_trigger_unregister)

Re: [PATCH] ARM: dts: r7s72100: add power-domains to mmcif

On Tue, Jan 24, 2017 at 04:32:30PM +, Chris Brandt wrote: > On Tuesday, January 24, 2017, Simon Horman wrote: > > On Mon, Jan 23, 2017 at 04:12:16PM +0100, Geert Uytterhoeven wrote: > > > On Mon, Jan 23, 2017 at 3:13 PM, Chris Brandt > > wrote: > > > > Signed-off-by:

Re: [PATCH v2] ARM: shmobile: rcar-gen2: Add more register documentation

On Wed, Jan 25, 2017 at 10:02:13AM +0100, Geert Uytterhoeven wrote: > Signed-off-by: Geert Uytterhoeven > --- > v2: > - Remove unneeded parentheses in phys_to_sbar(). Thanks, I have queued this up for v4.11.

Re: [PATCH] arm64: renesas: r8a7795: tidyup audma definition order

Hi Morimoto-san, sorry for missing this earlier. The patch did not seem to compile so I have applied it manually by moving the audma0 and audma1 nodes to between the dmac2 and avb nodes. The result is follows: From: Kuninori Morimoto Subject: [PATCH] arm64:

Re: [PATCH v2 4/7] serial: sh-sci: increase RX FIFO trigger defaults for (H)SCIF

On Mon, Jan 23, 2017 at 05:04:15PM +0100, Ulrich Hecht wrote: > Signed-off-by: Ulrich Hecht > --- > drivers/tty/serial/sh-sci.c | 13 - > 1 file changed, 12 insertions(+), 1 deletion(-) I will not take a patch without any changelog text, sorry...

Re: [PATCH/RFC 1/2] arm64: mm: Silently allow devices lacking IOMMU group

Hi Robin, On Mon, Jan 23, 2017 at 9:34 PM, Robin Murphy wrote: > Hi Magnus, > > On 23/01/17 12:12, Magnus Damm wrote: >> From: Magnus Damm >> >> Consider failure of iommu_get_domain_for_dev() as non-critical and >> get rid of the warning

Re: [PATCH v3 2/2] clocksource: Add renesas-ostm timer driver

On Tue, Jan 24, 2017 at 08:19:50PM +, Chris Brandt wrote: > Hi Daniel, > > On Tuesday, January 24, 2017, Daniel Lezcano wrote: > > > > > +early_platform_init("earlytimer", _timer); > > > > > +subsys_initcall(ostm_init); module_exit(ostm_exit); > > > > > + > > > > > +MODULE_AUTHOR("Chris

Re: [PATCH 2/2] net: phy: leds: Fix truncated LED trigger names

Hi Andrew, On Tue, Jan 24, 2017 at 9:03 PM, Andrew Lunn wrote: >> diff --git a/include/linux/phy.h b/include/linux/phy.h >> index 5c9d2529685fe215..f6ab919528ab3627 100644 >> --- a/include/linux/phy.h >> +++ b/include/linux/phy.h >> @@ -25,7 +25,6 @@ >> #include >> #include

Re: [PATCH v2 7/7] arm64: dts: r8a7796: salvator-x: add SCIF1 (DEBUG1)

On Tue, Jan 24, 2017 at 9:08 AM, Geert Uytterhoeven wrote: > While the patch is acceptable as-is, my question is still valid: > Is there any specific reason you chose scif1 over hscif1? Conservatism. :) CU Uli

[PATCH v2 4/4] clk: renesas: cpg-mssr: Add support for reset control

Add optional support for the Reset Control feature of the Renesas Clock Pulse Generator / Module Standby and Software Reset module on R-Car Gen2, R-Car Gen3, and RZ/G1 SoCs. This allows to reset SoC devices using the Reset Controller API. Signed-off-by: Geert Uytterhoeven

[PATCH v2 1/4] dt-bindings: clock: renesas: cpg-mssr: Document reset control support

Document properties needed to use the Reset Control feature of the Renesas Clock Pulse Generator / Module Standby and Software Reset module. Signed-off-by: Geert Uytterhoeven --- v2: - Change oneline summary to refer to dt-bindings. ---

[PATCH v2 0/4] Renesas CPG/MSSR Reset Control Support

Hi all, This patch series adds reset control support to the Renesas Clock Pulse Generator / Module Standby and Software Reset module, on the R-Car H3 and M3-W, RZ/G1M, and RZ/G1E SoCs. - Patch 1 amends the Renesas CPG/MSSR DT bindings for reset control, - Patches 2-4 add reset

[PATCH v2 3/4] clk: renesas: cpg-mssr: Rename cpg_mssr_priv.mstp_lock

The spinlock is used to protect Read-Modify-Write register accesses, which won't be limited to SMSTPCR register accesses. Signed-off-by: Geert Uytterhoeven Acked-by: Stephen Boyd --- v2: - Add Acked-by. --- drivers/clk/renesas/renesas-cpg-mssr.c

[PATCH v2 2/4] clk: renesas: cpg-mssr: Document suitability for RZ/G1

The Renesas CPG/MSSR driver is already in active use for RZ/G1 since commits c0b2d75d2a4bf6a3 ("clk: renesas: cpg-mssr: Add R8A7743 support") and 9127d54bb8947159 ("clk: renesas: cpg-mssr: Add R8A7745 support"). Signed-off-by: Geert Uytterhoeven Acked-by: Stephen Boyd

[PATCH v2] ARM: shmobile: rcar-gen2: Add more register documentation

Signed-off-by: Geert Uytterhoeven --- v2: - Remove unneeded parentheses in phys_to_sbar(). --- arch/arm/mach-shmobile/pm-rcar-gen2.c | 40 +-- 1 file changed, 29 insertions(+), 11 deletions(-) diff --git

Re: [PATCH] arm64: Use __pa_symbol for empty_zero_page

On 01/24/2017 12:43 PM, Geert Uytterhoeven wrote: If CONFIG_DEBUG_VIRTUAL=y and CONFIG_ARM64_SW_TTBR0_PAN=y: virt_to_phys used for non-linear address: ff8008cc (empty_zero_page+0x0/0x1000) WARNING: CPU: 0 PID: 0 at arch/arm64/mm/physaddr.c:14 __virt_to_phys+0x28/0x60 ...

Re: [PATCH] drivers: firmware: psci: Use __pa_symbol for cpu_resume

On 01/24/2017 04:30 PM, Geert Uytterhoeven wrote: If CONFIG_DEBUG_VIRTUAL=y, during s2ram: virt_to_phys used for non-linear address: ff80085db280 (cpu_resume+0x0/0x20) [ cut here ] WARNING: CPU: 0 PID: 1628 at arch/arm64/mm/physaddr.c:14

Re: [RFC] Runtime PM on the RZ/A series is never going to work right

Hi Chris, On Tue, Jan 24, 2017 at 5:22 PM, Chris Brandt wrote: > On Tuesday, January 24, 2017, Geert Uytterhoeven wrote: >> > From what I can tell, that makes the register space readable...but the >> > IP block is not fully functional unless you delay a little. >> >> If

Re: [PATCH v3 2/2] clocksource: Add renesas-ostm timer driver

Hi Chris, On Tue, Jan 24, 2017 at 3:43 PM, Chris Brandt wrote: > On Tuesday, January 24, 2017, Daniel Lezcano wrote: >> > > > +early_platform_init("earlytimer", _timer); >> > > > +subsys_initcall(ostm_init); module_exit(ostm_exit); >> > > > + >> > > >

Re: [PATCH v3 2/2] clocksource: Add renesas-ostm timer driver

On Tue, Jan 24, 2017 at 9:19 PM, Chris Brandt wrote: > On Tuesday, January 24, 2017, Daniel Lezcano wrote: >> > > > +early_platform_init("earlytimer", _timer); >> > > > +subsys_initcall(ostm_init); module_exit(ostm_exit); >> > > > + >> > > > +MODULE_AUTHOR("Chris