Re: rcar-du DRM driver failed to build

Hi Shawn, On Friday, 18 May 2018 04:21:48 EEST Shawn Lin wrote: > Hi, > > linux-next-20180517 fail to build for arm64 defconfig due to this > drivers. This is a known issue due to two bugs, fixed by commits 315852b42297 ("drm: rcar-du: Fix build failure") and dd856d924b

Re: [PATCH 2/2] dmaengine: rcar-dmac: Document R8A77990 bindings

On 16-05-18, 15:06, Ulrich Hecht wrote: > From: Hiroyuki Yokoyama > > Renesas R-Car E3 (R8A77990) SoC also has the R-Car gen2/3 compatible DMA > controllers, so document the SoC specific binding. This fails to apply for me, please rebase and send -- ~Vinod

Re: [PATCH 1/2] dmaengine: usb-dmac: Document R8A7799{0,5} bindings

On 16-05-18, 15:06, Ulrich Hecht wrote: > From: Hiroyuki Yokoyama > > Renesas R-Car D3 (R8A77995) and E3 (R8A77990) SoCs also have the R-Car > gen2/3 compatible DMA controllers, so document the SoC specific binding. Applied, thanks -- ~Vinod

Re: [PATCH] arm64: dts: r8a77995: Add all HSCIF nodes

On Wed, May 16, 2018 at 03:04:50PM +0200, Ulrich Hecht wrote: > From: Takeshi Kihara > > This patch adds the device nodes all HSCIF serial ports > incl. clocks and power domain to the R8A77995 SoC. > > Signed-off-by: Takeshi Kihara

Re: [PATCH 2/3] clk: renesas: r8a7795: Add ccree clock

Hi Gilad, On Thu, May 17, 2018 at 10:00 AM, Gilad Ben-Yossef wrote: > On Tue, May 15, 2018 at 5:47 PM, Geert Uytterhoeven > wrote: >> On Tue, May 15, 2018 at 2:29 PM, Gilad Ben-Yossef >> wrote: >>> This patch adds the clock used

Re: [PATCH 5/6] ARM: dts: rcar-gen2: Remove unused VIN properties

Hi Niklas, On Thu, May 17, 2018 at 12:13:07AM +0200, Niklas Söderlund wrote: > Hi Jacopo, > > Thanks for your work. > > On 2018-05-16 18:32:31 +0200, Jacopo Mondi wrote: > > The 'bus-width' and 'pclk-sample' properties are not parsed by the VIN > > driver and only confuse users. Remove them in

Re: [PATCH v9 7/8] media: vsp1: Adapt entities to configure into a body

Hi Kieran, Thank you for the patch. On Thursday, 3 May 2018 16:35:46 EEST Kieran Bingham wrote: > Currently the entities store their configurations into a display list. > Adapt this such that the code can be configured into a body directly, > allowing greater flexibility and control of the

Re: [PATCH 2/2] dmaengine: rcar-dmac: Document R8A77990 bindings

On Wed, May 16, 2018 at 03:06:19PM +0200, Ulrich Hecht wrote: > From: Hiroyuki Yokoyama > > Renesas R-Car E3 (R8A77990) SoC also has the R-Car gen2/3 compatible DMA > controllers, so document the SoC specific binding. > > Signed-off-by: Hiroyuki Yokoyama

Re: [PATCH 1/3] sh_eth: add RGMII support

On 5/16/2018 11:37 PM, Andrew Lunn wrote: What about PHY_INTERFACE_MODE_RGMII_ID, PHY_INTERFACE_MODE_RGMII_RXID, PHY_INTERFACE_MODE_RGMII_TXID, Oops, totally forgot about those... :-/ Everybody does. I keep intending to write a email template for this, and

Re: [PATCH 2/3] clk: renesas: r8a7795: Add ccree clock

On Tue, May 15, 2018 at 5:47 PM, Geert Uytterhoeven wrote: > Hi Gilad, > > On Tue, May 15, 2018 at 2:29 PM, Gilad Ben-Yossef wrote: >> This patch adds the clock used by the CryptoCell 630p instance in the SoC. >> >> Signed-off-by: Gilad Ben-Yossef

Re: [PATCH] v4l: Add support for STD ioctls on subdev nodes

On 17/05/18 04:00, Niklas Söderlund wrote: Missing commit log. > Signed-off-by: Niklas Söderlund > --- > Documentation/media/uapi/v4l/vidioc-g-std.rst| 14 ++ > Documentation/media/uapi/v4l/vidioc-querystd.rst | 11 +++ What about

Re: [PATCH 3/3] arm64: dts: renesas: r8a7795: add ccree binding

On Thu, May 17, 2018 at 11:01:57AM +0300, Gilad Ben-Yossef wrote: > On Wed, May 16, 2018 at 10:43 AM, Simon Horman wrote: > > On Tue, May 15, 2018 at 04:50:44PM +0200, Geert Uytterhoeven wrote: > >> Hi Gilad, > >> > >> On Tue, May 15, 2018 at 2:29 PM, Gilad Ben-Yossef

Re: [PATCH v9 6/8] media: vsp1: Refactor display list configure operations

Hi Kieran, Thank you for the patch. On Thursday, 3 May 2018 16:35:45 EEST Kieran Bingham wrote: > The entities provide a single .configure operation which configures the > object into the target display list, based on the vsp1_entity_params > selection. > > Split the configure function into

Re: [PATCH 3/3] arm64: dts: renesas: r8a7795: add ccree binding

Hi Gilad, On Thu, May 17, 2018 at 10:01 AM, Gilad Ben-Yossef wrote: > On Wed, May 16, 2018 at 10:43 AM, Simon Horman wrote: >> On Tue, May 15, 2018 at 04:50:44PM +0200, Geert Uytterhoeven wrote: >>> On Tue, May 15, 2018 at 2:29 PM, Gilad Ben-Yossef

Re: [PATCH 4/6] media: rcar-vin: Handle CLOCKENB pin polarity

Hi Niklas, On Thu, May 17, 2018 at 12:11:03AM +0200, Niklas Söderlund wrote: > Hi Jacopo, > > Thanks for your patch. > > I'm happy that you dig into this as it clearly needs doing! > > On 2018-05-16 18:32:30 +0200, Jacopo Mondi wrote: > > Handle CLOCKENB pin polarity, or use HSYNC in its place if

[PATCH] clk: renesas: r8a7795: Add CR clock

Add the CR core clock, which is used by the Secure Engine (SCEG). Signed-off-by: Geert Uytterhoeven --- Pending successfull use of the SCEG. drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+) diff --git

Re: [PATCH 1/2] dmaengine: usb-dmac: Document R8A7799{0,5} bindings

On Wed, May 16, 2018 at 03:06:18PM +0200, Ulrich Hecht wrote: > From: Hiroyuki Yokoyama > > Renesas R-Car D3 (R8A77995) and E3 (R8A77990) SoCs also have the R-Car > gen2/3 compatible DMA controllers, so document the SoC specific binding. > > Signed-off-by:

Re: [PATCH 2/2] spi: sh-msiof: Document R-Car D3 support

On Wed, May 16, 2018 at 03:05:16PM +0200, Ulrich Hecht wrote: > Document support for the MSIOF module in the Renesas D3 (r8a77995) SoC. > > No driver update is needed. > > Signed-off-by: Ulrich Hecht Reviewed-by: Simon Horman > ---

Re: [PATCH/RFT v3 0/3] thermal: add support for r8a77995

On Wed, May 16, 2018 at 09:08:06PM +0200, Niklas Söderlund wrote: > Hi Ulrich, > > On 2018-05-16 15:07:01 +0200, Ulrich Hecht wrote: > > On Wed, Apr 11, 2018 at 11:01 AM, jacopo mondi wrote: > > > Hello Kaneko-san, > > > > > > On Tue, Apr 03, 2018 at 09:43:02PM +0900,

Re: [PATCH 3/6] media: rcar-vin: Handle data-active property

Hi Niklas, On Wed, May 16, 2018 at 11:58:47PM +0200, Niklas Söderlund wrote: > Hi Jacopo, > > Thanks for your work. > > On 2018-05-16 18:32:29 +0200, Jacopo Mondi wrote: > > The data-active property has to be specified when running with embedded > > synchronization. The VIN peripheral can use

Re: [PATCH 3/6] media: rcar-vin: Handle data-active property

Hello! On 5/16/2018 7:32 PM, Jacopo Mondi wrote: The data-active property has to be specified when running with embedded Prop names are typically enclosed in "". synchronization. The VIN peripheral can use HSYNC in place of CLOCKENB CLKENB, maybe? when the CLOCKENB pin is not

Re: [PATCH v2 3/3] arm64: dts: renesas: draak: Describe HDMI input

On Thu, May 17, 2018 at 09:14:56AM +0200, jacopo mondi wrote: > Hi Niklas, > > On Thu, May 17, 2018 at 12:23:18AM +0200, Niklas Söderlund wrote: > > Hi Jacopo, > > > > Thanks for your patch. > > > > On 2018-05-16 15:42:09 +0200, Jacopo Mondi wrote: > > > Describe HDMI input connector and ADV7612

Re: [PATCH] arm64: dts: r8a77995: Add SCIF-{0,1,3,4,5} device nodes

On Wed, May 16, 2018 at 03:04:51PM +0200, Ulrich Hecht wrote: > From: Takeshi Kihara > > This patch adds the device nodes for SCIF-{0,1,3,4,5} serial ports, > incl. clocks and power domain. > > Signed-off-by: Takeshi Kihara >

Re: [PATCH 1/2] arm64: dts: r8a77995: Add MSIOF device nodes

On Wed, May 16, 2018 at 03:05:15PM +0200, Ulrich Hecht wrote: > From: Hiromitsu Yamasaki > > This patch adds MSIOF device nodes for the R8A77995 SoC. > > Signed-off-by: Hiromitsu Yamasaki > Signed-off-by: Takeshi Kihara

Re: [PATCH 3/3] arm64: dts: renesas: r8a7795: add ccree binding

On Wed, May 16, 2018 at 10:43 AM, Simon Horman wrote: > On Tue, May 15, 2018 at 04:50:44PM +0200, Geert Uytterhoeven wrote: >> Hi Gilad, >> >> On Tue, May 15, 2018 at 2:29 PM, Gilad Ben-Yossef >> wrote: >> > Add bindings for CryptoCell instance in the

Re: [PATCH 3/3] sh_eth: add R8A77980 support

On Wed, May 16, 2018 at 11:00:29PM +0300, Sergei Shtylyov wrote: > Finally, add support for the DT probing of the R-Car V3H (AKA R8A77980) -- > it's the only R-Car gen3 SoC having the GEther controller -- others have > only EtherAVB... > > Based on the original (and large) patch by Vladimir

Re: [PATCH v2 3/3] arm64: dts: renesas: draak: Describe HDMI input

Hi Niklas, On Thu, May 17, 2018 at 12:23:18AM +0200, Niklas Söderlund wrote: > Hi Jacopo, > > Thanks for your patch. > > On 2018-05-16 15:42:09 +0200, Jacopo Mondi wrote: > > Describe HDMI input connector and ADV7612 HDMI decoder installed on > > R-Car Gen3 Draak board. > > > > The video signal

Re: [PATCH 1/2] arm64: dts: r8a77995: Add MSIOF device nodes

On Wed, May 16, 2018 at 07:43:29PM +0200, Geert Uytterhoeven wrote: > Hi Uli, > > On Wed, May 16, 2018 at 3:05 PM, Ulrich Hecht > wrote: > > From: Hiromitsu Yamasaki > > > > This patch adds MSIOF device nodes for the R8A77995

Re: [PATCH 2/6] dt-bindings: media: rcar-vin: Document data-active

Hi Niklas, On Wed, May 16, 2018 at 11:55:38PM +0200, Niklas Söderlund wrote: > Hi Jacopo, > > Thanks for your work. > > On 2018-05-16 18:32:28 +0200, Jacopo Mondi wrote: > > Document 'data-active' property in R-Car VIN device tree bindings. > > The property is optional when running with explicit

Re: [PATCH] dt-bindings: media: rcar_vin: fix style for ports and endpoints

On 5/17/2018 2:32 AM, Niklas Söderlund wrote: The style for referring to ports and endpoint are wrong. Refer to them using lowercase and a unit address, port@x and endpoint@x. Signed-off-by: Niklas Söderlund Reported-by: Geert Uytterhoeven

Re: [PATCH v2 1/4] media: rcar-vin: Parse digital input in mc-path

Hi Niklas, thanks for review. On Wed, May 16, 2018 at 10:32:49PM +0200, Niklas Söderlund wrote: > Hi Jacopo, > > Thanks for your work! > > First let me apologies for the use of the keyword 'digital' in the > driver it should have been parallel... Someday we should remedy this. > > If you touch

Re: [PATCH 1/3] crypto: ccree: drop signature register check

Herbert, On Tue, May 15, 2018 at 3:29 PM, Gilad Ben-Yossef wrote: > We were using the content of the signature register as a sanity > check for the hardware functioning but it turns out not all > implementers use the same values so the check is giving false > negative on

Re: [PATCH 3/3] arm64: dts: renesas: r8a7795: add ccree binding

Hi Gilad, On Thu, May 17, 2018 at 3:09 PM, Gilad Ben-Yossef wrote: > On Thu, May 17, 2018 at 1:16 PM, Geert Uytterhoeven > wrote: >> However, even with your clock patch, the signature checking fails for me, >> on both R-Car H3 ES1.0 and ES2.0. >> Does

Re: [PATCH 3/3] arm64: dts: renesas: r8a7795: add ccree binding

On Thu, May 17, 2018 at 12:04 PM, Simon Horman wrote: > On Thu, May 17, 2018 at 11:01:57AM +0300, Gilad Ben-Yossef wrote: >> On Wed, May 16, 2018 at 10:43 AM, Simon Horman wrote: >> > On Tue, May 15, 2018 at 04:50:44PM +0200, Geert Uytterhoeven wrote: >>

Re: [PATCH v9 6/8] media: vsp1: Refactor display list configure operations

Hi Laurent, Thanks for the review, On 17/05/18 10:41, Laurent Pinchart wrote: > Hi Kieran, > > Thank you for the patch. > > On Thursday, 3 May 2018 16:35:45 EEST Kieran Bingham wrote: >> The entities provide a single .configure operation which configures the >> object into the target display

Re: [PATCH 3/3] arm64: dts: renesas: r8a7795: add ccree binding

On Thu, May 17, 2018 at 1:16 PM, Geert Uytterhoeven wrote: > Hi Gilad, > > On Thu, May 17, 2018 at 10:01 AM, Gilad Ben-Yossef > wrote: >> On Wed, May 16, 2018 at 10:43 AM, Simon Horman wrote: >>> On Tue, May 15, 2018 at 04:50:44PM

Re: [PATCH v2 1/4] media: rcar-vin: Parse digital input in mc-path

Hi Jacopo, On 2018-05-17 12:13:06 +0200, Jacopo Mondi wrote: > Hi Niklas, >thanks for review. > > On Wed, May 16, 2018 at 10:32:49PM +0200, Niklas Söderlund wrote: > > Hi Jacopo, > > > > Thanks for your work! > > > > First let me apologies for the use of the keyword 'digital' in the > >

Re: [PATCH] v4l: Add support for STD ioctls on subdev nodes

Hi Hans, Thanks for your feedback. On 2018-05-17 10:04:35 +0200, Hans Verkuil wrote: > On 17/05/18 04:00, Niklas Söderlund wrote: > > Missing commit log. I checked other commits doing the same thing, they had no commit log and that was enough reason for me to be lazy. Will fix in v2. And

Re: [PATCH 3/3] arm64: dts: renesas: r8a7795: add ccree binding

On Thu, May 17, 2018 at 12:16 PM, Geert Uytterhoeven wrote: > On Thu, May 17, 2018 at 10:01 AM, Gilad Ben-Yossef > wrote: >> On Wed, May 16, 2018 at 10:43 AM, Simon Horman wrote: >>> On Tue, May 15, 2018 at 04:50:44PM +0200, Geert

Re: [PATCH 3/3] arm64: dts: renesas: r8a7795: add ccree binding

On Thu, May 17, 2018 at 4:35 PM, Geert Uytterhoeven wrote: > Hi Gilad, > > On Thu, May 17, 2018 at 3:09 PM, Gilad Ben-Yossef wrote: >> On Thu, May 17, 2018 at 1:16 PM, Geert Uytterhoeven >> wrote: >>> However, even with your clock

Re: [PATCH 3/3] arm64: dts: renesas: r8a7795: add ccree binding

Hi Gilad, On Thu, May 17, 2018 at 3:41 PM, Gilad Ben-Yossef wrote: > On Thu, May 17, 2018 at 4:35 PM, Geert Uytterhoeven > wrote: >> On Thu, May 17, 2018 at 3:09 PM, Gilad Ben-Yossef >> wrote: >>> On Thu, May 17, 2018 at 1:16 PM,

[PATCH v2 2/2] v4l: Add support for STD ioctls on subdev nodes

There is no way to control the standard of subdevices which are part of a media device. The ioctls which exists all target video devices explicitly and the idea is that the video device should talk to the subdevice. For subdevices part of a media graph this is not possible and the standard must be

Re: [PATCH] clk: renesas: r8a7795: Add CR clock

Hi Geert, Thanks for your patch. On 2018-05-17 12:21:02 +0200, Geert Uytterhoeven wrote: > Add the CR core clock, which is used by the Secure Engine (SCEG). > > Signed-off-by: Geert Uytterhoeven Reviewed-by: Niklas Söderlund >

[PATCH v2 1/2] v4l2-ioctl: create helper to fill in v4l2_standard for ENUMSTD

Prepare for adding a new IOCTL VIDIOC_SUBDEV_ENUMSTD which would enumerate the standards for a subdevice by breaking out the code which could be shared between the video and subdevice versions of this IOCTL. Signed-off-by: Niklas Söderlund ---

[PATCH v2 0/2] v4l: Add support for STD ioctls on subdev nodes

Hi Hans, This series enables the video standards to be controlled directly on the subdev device node. This is needed as there is no way to control the standard of a subdevice if it's part of a media controller centric setup as oppose to a video centric one. I have tested this on Renesas Gen3

Re: [PATCH v7 8/8] media: vsp1: Move video configuration to a cached dlb

Hi Kieran, On Monday, 30 April 2018 20:48:03 EEST Kieran Bingham wrote: > On 07/04/18 01:23, Laurent Pinchart wrote: > > On Thursday, 8 March 2018 02:05:31 EEST Kieran Bingham wrote: > >> We are now able to configure a pipeline directly into a local display > >> list body. Take advantage of this

Re: [PATCH v6] gpio: dwapb: Add support for 1 interrupt per port A GPIO

Hi Lee, On 5/16/18, 11:25 PM, "Lee Jones" wrote: On Wed, 16 May 2018, Hoan Tran wrote: > Hi Phil, > > On 5/11/18, 1:31 AM, "Phil Edworthy" wrote: > > The DesignWare GPIO IP can be configured for either 1

Re: [PATCH v7 8/8] media: vsp1: Move video configuration to a cached dlb

Hi Laurent, On 17/05/18 15:35, Laurent Pinchart wrote: > Hi Kieran, > > On Monday, 30 April 2018 20:48:03 EEST Kieran Bingham wrote: >> On 07/04/18 01:23, Laurent Pinchart wrote: >>> On Thursday, 8 March 2018 02:05:31 EEST Kieran Bingham wrote: We are now able to configure a pipeline

[PATCH v10 2/8] media: vsp1: Protect bodies against overflow

The body write function relies on the code never asking it to write more than the entries available in the list. Currently with each list body containing 256 entries, this is fine, but we can reduce this number greatly saving memory. In preparation of this add a level of protection to catch any

[PATCH v10 0/8] vsp1: TLB optimisation and DL caching

Each display list currently allocates an area of DMA memory to store register settings for the VSP1 to process. Each of these allocations adds pressure to the IPMMU TLB entries. We can reduce the pressure by pre-allocating larger areas and dividing the area across multiple bodies represented as a

[PATCH v10 8/8] media: vsp1: Move video configuration to a cached dlb

We are now able to configure a pipeline directly into a local display list body. Take advantage of this fact, and create a cacheable body to store the configuration of the pipeline in the video object. vsp1_video_pipeline_run() is now the last user of the pipe->dl object. Convert this function to

[PATCH v10 4/8] media: vsp1: Convert display lists to use new body pool

Adapt the dl->body0 object to use an object from the body pool. This greatly reduces the pressure on the TLB for IPMMU use cases, as all of the lists use a single allocation for the main body. The CLU and LUT objects pre-allocate a pool containing three bodies, allowing a userspace update before

[PATCH v10 6/8] media: vsp1: Refactor display list configure operations

The entities provide a single .configure operation which configures the object into the target display list, based on the vsp1_entity_params selection. Split the configure function into three parts, '.configure_stream()', '.configure_frame()', and '.configure_partition()' to facilitate splitting

[PATCH v10 5/8] media: vsp1: Use reference counting for bodies

Extend the display list body with a reference count, allowing bodies to be kept as long as a reference is maintained. This provides the ability to keep a cached copy of bodies which will not change, so that they can be re-applied to multiple display lists. Signed-off-by: Kieran Bingham

[PATCH v10 7/8] media: vsp1: Adapt entities to configure into a body

Currently the entities store their configurations into a display list. Adapt this such that the code can be configured into a body directly, allowing greater flexibility and control of the content. All users of vsp1_dl_list_write() are removed in this process, thus it too is removed. A helper,

[PATCH v10 3/8] media: vsp1: Provide a body pool

Each display list allocates a body to store register values in a dma accessible buffer from a dma_alloc_wc() allocation. Each of these results in an entry in the IOMMU TLB, and a large number of display list allocations adds pressure to this resource. Reduce TLB pressure on the IPMMUs by

[PATCH v10 1/8] media: vsp1: Reword uses of 'fragment' as 'body'

Throughout the codebase, the term 'fragment' is used to represent a display list body. This term duplicates the 'body' which is already in use. The datasheet references these objects as a body, therefore replace all mentions of a fragment with a body, along with the corresponding pluralised

Re: [PATCH 0/3] Add R8A77980 GEther support

From: Sergei Shtylyov Date: Wed, 16 May 2018 22:52:40 +0300 > Here's a set of 3 patches against DaveM's 'net-next.git' repo. They > (gradually) > add R8A77980 GEther support to the 'sh_eth' driver, starting with couple new > register bits/values introduced

Re: [PATCH] arm64: dts: renesas: r8a77980: add SMP support

Hi Sergei, On Thu, May 17, 2018 at 10:19 PM, Sergei Shtylyov wrote: > Add the device nodes for 3 more Cortex-A53 CPU cores; adjust the interrupt > delivery masks for the ARM GIC and Architectured Timer. > > Based on the original (and large) patch by Vladimir

Re: [PATCH v10 8/8] media: vsp1: Move video configuration to a cached dlb

Hi Kieran, Thank you for the patch. On Thursday, 17 May 2018 20:24:01 EEST Kieran Bingham wrote: > We are now able to configure a pipeline directly into a local display > list body. Take advantage of this fact, and create a cacheable body to > store the configuration of the pipeline in the video

Re: [PATCH v7 8/8] media: vsp1: Move video configuration to a cached dlb

Hi Kieran, On Thursday, 17 May 2018 20:06:46 EEST Kieran Bingham wrote: > On 17/05/18 15:35, Laurent Pinchart wrote: > > On Monday, 30 April 2018 20:48:03 EEST Kieran Bingham wrote: > >> On 07/04/18 01:23, Laurent Pinchart wrote: > >>> On Thursday, 8 March 2018 02:05:31 EEST Kieran Bingham wrote:

[PATCH] arm64: dts: renesas: r8a77980: add SMP support

Add the device nodes for 3 more Cortex-A53 CPU cores; adjust the interrupt delivery masks for the ARM GIC and Architectured Timer. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov Signed-off-by: Sergei Shtylyov