On Thu, Nov 8, 2018 at 5:07 PM Jacopo Mondi wrote:
> VIN data groups may appear on different sets of pins, usually named
> "vinX_data_[a|b]". The existing VIN_DATA_PIN_GROUP() does not support
> appending the '_a' or '_b' suffix, leading to the definition of group
> names not consistent with the
Hi Jacopo,
On Thu, Nov 8, 2018 at 5:07 PM Jacopo Mondi wrote:
> Versioned VIN groups can appear on different sets of pins. Use of the
> VIN_DATA_PIN_GROUP macro fix naming of said groups through an optional
> 'version' argument.
I more liked the description from the previous version, which you
Hi Jacopo,
On Thu, Nov 8, 2018 at 5:08 PM Jacopo Mondi wrote:
> Versioned VIN groups can appear on different sets of pins. Using the
> VIN_DATA_PIN_GROUP macro now supports proper naming of said groups through
> an optional 'version' argument.
>
> Use the 'version' argument for said macro to fix
Hi Hoan,
Thanks for your patch!
Please run scripts/get_maintainer.pl on your patches, to get the list of
maintainers.
CC thermal
On Tue, Nov 13, 2018 at 7:46 AM Nguyen An Hoan wrote:
>
> From: Hoan Nguyen An
>
> Gen3 thermal registered by devm_thermal_zone_of_sensor_register()
> and this
On Wed, Nov 7, 2018 at 4:24 PM Fabrizio Castro
wrote:
> Now that include/dt-bindings/clock/r8a774a1-cpg-mssr.h is in Linus'
> master branch we can replace clock related magic numbers with the
> corresponding labels.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
> ---
On Wed, Nov 7, 2018 at 4:24 PM Fabrizio Castro
wrote:
> Now that include/dt-bindings/power/r8a774a1-sysc.h is in Linus'
> master branch we can replace power related magic numbers with
> the corresponding labels.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
On Thu, Nov 8, 2018 at 5:07 PM Jacopo Mondi wrote:
> Add pin, mux and functions definitions for VIN4 and VIN5 for R-Car E3.
>
> Signed-off-by: Jacopo Mondi
Reviewed-by: Geert Uytterhoeven
I.e. queuing in sh-pfc-for-v4.21.
Gr{oetje,eeting}s,
Geert
--
Geert
On Thu, Nov 8, 2018 at 5:07 PM Jacopo Mondi wrote:
> The VIN4 and VIN5 interfaces supports parallel video input.
> Add pin, mux and functions definitions for VIN4 and VIN5 for R-Car M3-N.
>
> Reviewed-by: Ulrich Hecht
> Signed-off-by: Jacopo Mondi
>
> ---
> v4 -> v5:
> - Add definitions for 10,
Hi Jacopo,
On Thu, Nov 8, 2018 at 5:07 PM Jacopo Mondi wrote:
> Versioned VIN groups can appear on different sets of pins. Use of the
> VIN_DATA_PIN_GROUP macro fix naming of said groups through an optional
> 'version' argument.
I more liked the description from the previous version, which you
Reviewed-by: Wolfram Sang
signature.asc
Description: PGP signature
Reviewed-by: Wolfram Sang
signature.asc
Description: PGP signature
> > > Fix setting value for IRQCTL register. We are setting the last 6 bits
> > > of (IRQCTL) to be 1 (0x3f), this is only suitable for H3ES1.*, according
> > > to new Hardware manual values 1 are "setting prohibited" for Gen3!
> > Hum, as you point out this change is not suitable for H3 ES1.x so
> Please run scripts/get_maintainer.pl on your patches, to get the list of
> maintainers.
>
> CC thermal
Thanks, Geert!
Hi Hoan,
> + /* Enable hwmon thermal sysfs */
> + tsc->zone->tzp->no_hwmon = false;
A driver diving so deep into core structures always looks
On Tue, Nov 13, 2018 at 09:52:19AM +0100, Geert Uytterhoeven wrote:
> On Wed, Nov 7, 2018 at 4:24 PM Fabrizio Castro
> wrote:
> > Now that include/dt-bindings/power/r8a774a1-sysc.h is in Linus'
> > master branch we can replace power related magic numbers with
> > the corresponding labels.
> >
> >
Hi Geert,
On Monday, November 12, 2018 1, Geert Uytterhoeven wrote:
> > +Required properties:
> > + - compatible: should be:
> > +- "renesas,r7s9210-pinctrl": for RZ/A2M
>
> On RZ/A1, the datasheet called this "Ports", and the corresponding
> compatible
> value is "renesas,r7s72100-ports".
On Thu, Nov 08, 2018 at 11:44:12AM +0100, Simon Horman wrote:
> On Wed, Nov 07, 2018 at 11:17:17AM +0100, Geert Uytterhoeven wrote:
> > CONFIG_ARM_BIG_LITTLE_CPUFREQ was removed on arm64 in commit
> > a7314405d83c8f95 ("cpufreq: drop ARM_BIG_LITTLE_CPUFREQ support for
> > ARM64").
> >
> >
On Thu, Nov 08, 2018 at 11:44:24AM +0100, Simon Horman wrote:
> On Wed, Nov 07, 2018 at 11:17:18AM +0100, Geert Uytterhoeven wrote:
> > Enable R-Car Gen3 PCIe PHY support, which is needed for PCIe to function
> > on the Renesas Condor board.
> >
> > Signed-off-by: Geert Uytterhoeven
> > ---
> >
On Wed, Nov 07, 2018 at 12:21:16PM +0100, Simon Horman wrote:
> On Mon, Oct 22, 2018 at 02:14:34AM +0900, Magnus Damm wrote:
> > Connect R-Car Gen3 Ethernet-AVB to IPMMU
> >
> > [PATCH 01/03] arm64: dts: renesas: r8a77965: Connect R-Car M3-N AVB to IPMMU
> > [PATCH 02/03] arm64: dts: renesas:
On Tue, Nov 13, 2018 at 09:53:55AM +0100, Geert Uytterhoeven wrote:
> On Wed, Nov 7, 2018 at 4:24 PM Fabrizio Castro
> wrote:
> > Now that include/dt-bindings/clock/r8a774a1-cpg-mssr.h is in Linus'
> > master branch we can replace clock related magic numbers with the
> > corresponding labels.
> >
Enable R-Car Gen3 PCIe PHY support, which is needed for PCIe to function
on the Renesas Condor board.
Signed-off-by: Geert Uytterhoeven
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index
On Mon, Nov 12, 2018 at 04:30:29PM +0100, Geert Uytterhoeven wrote:
> CC SuperH
>
> On Mon, Nov 12, 2018 at 4:22 PM Geert Uytterhoeven
> wrote:
> > Renesas R-Mobile APE6 support is currently unused:
> > - DMA slaves were never enabled in r8a73a4.dtsi,
> > - The driver relies on legacy filter
On Fri, Nov 09, 2018 at 11:05:56AM +0100, Simon Horman wrote:
> On Thu, Nov 08, 2018 at 05:04:42PM +, Fabrizio Castro wrote:
> > Add QSPI[01] support to the RZ/G1C SoC specific device tree.
> >
> > Signed-off-by: Fabrizio Castro
>
> Thanks,
>
> This looks fine to me but I will wait to see
On Fri, Nov 09, 2018 at 11:06:07AM +0100, Simon Horman wrote:
> On Thu, Nov 08, 2018 at 05:04:43PM +, Fabrizio Castro wrote:
> > This commit adds QSPI flash support to the iwg23s board specific
> > device tree.
> >
> > Signed-off-by: Fabrizio Castro
>
> Thanks,
>
> This looks fine to me
Hi Simon,
On Tue, Nov 13, 2018 at 3:31 PM Simon Horman wrote:
> On Wed, Nov 07, 2018 at 12:21:16PM +0100, Simon Horman wrote:
> > On Mon, Oct 22, 2018 at 02:14:34AM +0900, Magnus Damm wrote:
> > > Connect R-Car Gen3 Ethernet-AVB to IPMMU
> > >
> > > [PATCH 01/03] arm64: dts: renesas: r8a77965:
Hi Chris,
On Tue, Nov 13, 2018 at 5:38 PM Chris Brandt wrote:
> On Monday, November 12, 2018 1, Geert Uytterhoeven wrote:
> > > +Required properties:
> > > + - compatible: should be:
> > > +- "renesas,r7s9210-pinctrl": for RZ/A2M
> >
> > On RZ/A1, the datasheet called this "Ports", and the
Hi Geert,
On Tuesday, November 13, 2018 1, Geert Uytterhoeven wrote:
> Perhaps adding a convenience definition
>
> #define JP PM
>
> may be a good idea? Or just a comment?
>
> #define PM 21/* JP */
Either one is OK I guess. I'll see which one makes more sense as I
reworked
Hi Geert,
As always, thank you for your review!
On Monday, November 12, 2018, Geert Uytterhoeven wrote:
> > +config PINCTRL_RZA2
> > + bool "Renesas RZ/A2 gpio and pinctrl driver"
> > + depends on OF
> > + depends on ARCH_R7S9210 || COMPILE_TEST
> > + select GPIOLIB
> >
Hi Chris,
On Tue, Nov 13, 2018 at 8:26 PM Chris Brandt wrote:
> On Tuesday, November 13, 2018, Geert Uytterhoeven wrote:
> > > It makes the files show up under /sys look nice.
> > >
> > > For example, P5_6 is button SW4:
> > >
> > > $ echo 912 > /sys/class/gpio/export
> > >
> > > Then you end
Hi Rob,
On Tue, Nov 13, 2018 at 8:32 PM Rob Landley wrote:
> On 11/12/18 9:30 AM, Geert Uytterhoeven wrote:
> > CC SuperH
> >
> > On Mon, Nov 12, 2018 at 4:22 PM Geert Uytterhoeven
> > wrote:
> >> Renesas R-Mobile APE6 support is currently unused:
> >> - DMA slaves were never enabled in
Hi Chris,
a few more notes on top of what Geert said. Thanks for addressing
comments on the previous version.
On Wed, Nov 07, 2018 at 01:27:32PM -0500, Chris Brandt wrote:
> Adds support for the pin and gpio controller found in R7S9210 (RZ/A2) SoCs.
>
> Signed-off-by: Chris Brandt
> ---
> v3:
On Tuesday, November 13, 2018, jacopo mondi wrote:
> Just two minor things, so please add my
> Reviewed-by: Jacopo Mondi
Thanks Jacopo!
Chris
On 11/12/18 9:30 AM, Geert Uytterhoeven wrote:
> CC SuperH
>
> On Mon, Nov 12, 2018 at 4:22 PM Geert Uytterhoeven
> wrote:
>> Renesas R-Mobile APE6 support is currently unused:
>> - DMA slaves were never enabled in r8a73a4.dtsi,
>> - The driver relies on legacy filter matching and describing
Hi Chris,
On Tue, Nov 13, 2018 at 7:43 PM Chris Brandt wrote:
> On Monday, November 12, 2018, Geert Uytterhoeven wrote:
> > > +static const char * const rza2_gpio_names[] = {
> > > + "P0_0", "P0_1", "P0_2", "P0_3", "P0_4", "P0_5", "P0_6", "P0_7",
> > > + "P1_0", "P1_1", "P1_2",
Hi Chris,
thanks for the patch
Just two minor things, so please add my
Reviewed-by: Jacopo Mondi
On Wed, Nov 07, 2018 at 01:27:33PM -0500, Chris Brandt wrote:
> Add device tree binding documentation and header file for Renesas R7S9210
> (RZ/A2) SoCs.
>
> Signed-off-by: Chris Brandt
>
From: Takeshi Kihara
This patch adds PCI express channel 0 device node to the R8A77990 SoC
and enables PCIEC0 PCI express controller on the Ebisu board.
Signed-off-by: Takeshi Kihara
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Simon Horman
Cc: Wolfram Sang
Cc: Yoshihiro Shimoda
Hi Geert,
On Tuesday, November 13, 2018, Geert Uytterhoeven wrote:
> > It makes the files show up under /sys look nice.
> >
> > For example, P5_6 is button SW4:
> >
> > $ echo 912 > /sys/class/gpio/export
> >
> > Then you end up with "/sys/class/gpio/P5_6/"
> >
> > $ echo in >
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