Hi Jiada,
On Wed, Feb 20, 2019 at 6:25 AM Jiada Wang wrote:
> According to user reference manual for R-CAR H3 and M3-W SoCs,
> in order to access busif4 ~ busif7, extended audio dmac registers
> (PDMASAREn, PDMADAREn, PDMACHCREn)
> need to be used, rather than basic audio dmac registers
> (PDMASA
On Wed, Feb 20, 2019 at 6:25 AM Jiada Wang wrote:
> Basic audio dmac register only supports busif from 0 to 3,
> in order to use busif4 ~ busif7, extended audio dmac register
> need to be used
>
> Signed-off-by: Jiada Wang
Reviewed-by: Geert Uytterhoeven
but please consider my comments to the c
On Wed, Feb 20, 2019 at 6:25 AM Jiada Wang wrote:
> Basic audio dmac register only supports busif from 0 to 3,
> in order to use busif4 ~ busif7, extended audio dmac register
> need to be used.
>
> Signed-off-by: Jiada Wang
Reviewed-by: Geert Uytterhoeven
but please consider my comments to the
On Tue, Feb 19, 2019 at 5:30 PM Marek Vasut wrote:
> Handling broken DTs only adds to the complexity, but I think this cannot
> be helped, since those DTs can be stored in some ROM.
I agree, but if the broken DT needs to be supported going forward
I would like it to be quite explicit, so that th
Hi Marc
On 19 February 2019 20:29 Marc Zyngier wrote:
> On Tue, 19 Feb 2019 15:55:11 + Phil Edworthy wrote:
>
> + LinusW, who seem to have taken an interest in irqchip hierarchies...
>
> > On RZ/N1 devices, there are 3 Synopsys DesignWare GPIO blocks each
> > configured to have 32 interrupt
On Tue, Feb 19, 2019 at 5:08 PM Thierry Reding wrote:
> Linus,
>
> can you squash this into Marek's original commit? I'd rather not make
> that two patches because that would potentially cause bisectability
> issues.
Sadly no, new development is merged on top.
Bisection breaks sometimes, it's ju
On Wed, Feb 13, 2019 at 2:15 PM Geert Uytterhoeven
wrote:
> Implement the irq_set_wake() method in the (optional) irq_chip of the
> GPIO expander, and propagate wake-up settings to the upstream interrupt
> controller. This allows GPIOs connected to a PCA953X GPIO expander to
> serve as wake-up s
On Wed, 20 Feb 2019 09:07:02 +,
Phil Edworthy wrote:
>
> Hi Marc
>
> On 19 February 2019 20:29 Marc Zyngier wrote:
[...]
> > > + for (i = 0; i < MAX_NR_INPUT_IRQS; i++)
> > > + irq_create_mapping(priv->irq_domain, i);
> >
> > This should never happen. Mappings should be created fr
On Wed, Feb 20, 2019 at 10:01:50AM +0100, Linus Walleij wrote:
> On Tue, Feb 19, 2019 at 5:30 PM Marek Vasut wrote:
>
> > Handling broken DTs only adds to the complexity, but I think this cannot
> > be helped, since those DTs can be stored in some ROM.
>
> I agree, but if the broken DT needs to
On 2/20/19 11:52 AM, Thierry Reding wrote:
> From: Thierry Reding
>
> Commit 0e7d6f940164 ("gpio: of: Apply regulator-gpio quirk only to
> enable-gpios") breaks the device tree ABI specified in the device tree
> bindings for fixed regulators (compatible "regulator-fixed"). According
> to these bi
From: Marek Vasut
Handle both enable-gpio and enable-gpios properties of the GPIO
regulator in the quirk. The later is the preferred modern name
of the property.
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Jan Kotas
Cc: Linus Walleij
Cc: Mark Brown
Cc: Thierry Reding
Cc: Wolfram
Hi Marc,
On 20 February 2019 10:05 Marc Zyngier wrote:
> On Wed, 20 Feb 2019 09:07:02 +, Phil Edworthy wrote:
> > On 19 February 2019 20:29 Marc Zyngier wrote:
>
> [...]
>
> > > > + for (i = 0; i < MAX_NR_INPUT_IRQS; i++)
> > > > + irq_create_mapping(priv->irq_domain, i);
From: Phil Edworthy
The driver requires an undocumented clock property, so detail it.
Add documentation for a separate, optional, bus clock.
Signed-off-by: Phil Edworthy
v3:
- Changed clocks and clock-names sections to use term "peripheral clock"
(pclk) instead of "bus clock" (busclk).
v2:
The Synopsys I2C Controller has a bus clock that some SoCs require to access
the registers. This series also details the new clock property in the bindings
documentation.
v3:
- busclk renamed to pclk.
- Added comment with dw_i2c_dev struct definition describing pclk.
- Added enable rollback of
Sorry, the email below was sent prematurely and will be resent shortly.
-Gareth
> On 20 February 2019 13:26 Gareth Williams wrote:
> The Synopsys I2C Controller has a bus clock that some SoCs require to access
> the registers. This series also details the new clock property in the bindings
> docu
Adds HSCIF0 and HSCIF1 pins, groups and functions for R8A7779.
Signed-off-by: Ulrich Hecht
Reviewed-by: Simon Horman
Reviewed-by: Geert Uytterhoeven
---
This revision should fix the issues found by Geert in v1.
CU
Uli
Changes in v2:
- added comments to the pin definitions
- fixed names of hsc
IPMMU address translation enablement prototype
[PATCH/RFC 01/09] iommu/ipmmu-vmsa: Disable IPMMU when address expansion is not
needed
[PATCH/RFC 02/09] iommu/ipmmu-vmsa: Display system memory informationn during
boot
[PATCH/RFC 03/09] iommu/ipmmu-vmsa: Introduce keepipmmu boot parameter
[PATCH/R
From: Magnus Damm
Add a memory bank location check to the whitelist handling.
Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c |7 +++
1 file changed, 7 insertions(+)
--- 0001/drivers/iommu/ipmmu-vmsa.c
+++ work/drivers/iommu/ipmmu-vmsa.c 2019-02-20 22:59:28.589893396 +0
From: Magnus Damm
Introduce a keepipmmu boot paramenter to let the user override.
Not-Yet-Signed-off-by: Magnus Damm
---
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- 0001/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
+++ work/ar
From: Magnus Damm
Clarify runtime memory bank detection in the IPMMU driver.
Not-Yet-Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c |8
1 file changed, 8 insertions(+)
--- 0002/drivers/iommu/ipmmu-vmsa.c
+++ work/drivers/iommu/ipmmu-vmsa.c 2019-02-20 23:09:46.2122
From: Magnus Damm
Introduce a keepipmmu boot paramenter to let the user override.
Not-Yet-Signed-off-by: Magnus Damm
---
arch/arm64/boot/dts/renesas/r8a77995-draak.dts |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- 0001/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ work/ar
From: Magnus Damm
Introduce a keepipmmu boot paramenter to let the user override.
Not-Yet-Signed-off-by: Magnus Damm
---
arch/arm64/boot/dts/renesas/ulcb.dtsi |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- 0001/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ work/arch/arm64/boot/dts/
From: Magnus Damm
Introduce a keepipmmu boot paramenter to let the user override.
Not-Yet-Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
--- 0004/drivers/iommu/ipmmu-vmsa.c
+++ work/drivers/iommu/ipmmu-vmsa.c
From: Magnus Damm
Introduce a keepipmmu boot paramenter to let the user override.
Not-Yet-Signed-off-by: Magnus Damm
---
arch/arm64/boot/dts/renesas/salvator-common.dtsi |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- 0001/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ wor
From: Magnus Damm
Introduce a keepipmmu boot paramenter to let the user override.
Not-Yet-Signed-off-by: Magnus Damm
---
arch/arm64/boot/dts/renesas/r8a77970-eagle.dts |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- 0001/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+++ work/ar
From: Magnus Damm
Introduce a keepipmmu boot paramenter to let the user override.
Not-Yet-Signed-off-by: Magnus Damm
---
arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- 0001/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
+++ work/
From: kbuild test robot
drivers/clk/renesas/rcar-gen3-cpg.c:125:40-41: Unneeded semicolon
Remove unneeded semicolon.
Generated by: scripts/coccinelle/misc/semicolon.cocci
Fixes: 4ee5f0e4e12c ("clk: renesas: rcar-gen3: Parameterise Z and Z2 clock
fixed divisor")
CC: Takeshi Kihara
Signed-of
tree:
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
topic/clk-r8a77990-z2-v5
head: ac808448e4bda5538c4acdcb90284ab51a2abe9d
commit: 4ee5f0e4e12cdf04eda10b64082d52c894d05a91 [9/14] clk: renesas:
rcar-gen3: Parameterise Z and Z2 clock fixed divisor
coccinelle warn
ipmmu_domain_init_context() takes care of (1) initializing the software
domain, and (2) initializing the hardware context for the domain.
Extract the code to initialize the hardware context into a new subroutine
ipmmu_context_init(), to prepare for later reuse.
Signed-off-by: Geert Uytterhoeven
Make the IPMMU_CTX_MAX constant unsigned, to match the type of
ipmmu_features.number_of_contexts.
This allows to use plain min() instead of type-casting min_t().
Signed-off-by: Geert Uytterhoeven
---
drivers/iommu/ipmmu-vmsa.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --g
There is a helper to write to the root IPMMU instance's registers, so
let's use it.
Signed-off-by: Geert Uytterhoeven
---
drivers/iommu/ipmmu-vmsa.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
index 9f2b781e20a0eba
During PSCI system suspend, R-Car Gen3 SoCs are powered down, and all
IPMMU state is lost. Hence after s2ram, devices wired behind an IPMMU,
and configured to use it, will see their DMA operations hang.
To fix this, restore all IPMMU contexts, and re-enable all active
micro-TLBs during system res
On R-Car Gen3, the faulting virtual address is a 40-bit address, and
comprised of two registers. Read the upper address part, and combine
both parts, when running on a 64-bit system.
Signed-off-by: Geert Uytterhoeven
---
Apart from this, the driver doesn't support 40-bit IOVA addresses yet.
---
Hi Jörg, Magnus,
On R-Car Gen3 systems with PSCI, PSCI may power down the SoC during
system suspend, thus losing all IOMMU state. Hence after s2ram, devices
behind an IPMMU (e.g. SATA), and configured to use it, will fail to
complete their I/O operations.
This patch series adds suspend/r
As of commit 7af9a5fdb9e0ca33 ("iommu/ipmmu-vmsa: Use
iommu_device_sysfs_add()/remove()"), IOMMU devices show up under
/sys/class/iommus/, but their "devices" subdirectories are empty.
Likewise, devices tied to an IOMMU do not have an "iommu" backlink.
Make sure all links are created, on both arm3
The maximum number of micro-TLBs per IPMMU instance is not fixed, but
depends on the SoC type. Hence move it from struct ipmmu_vmsa_device to
struct ipmmu_features, and set up the correct value for both R-Car Gen2
and Gen3 SoCs.
Note that currently no code uses this value.
Signed-off-by: Geert U
Hi Geert,
Thank you for the patch.
On Wed, Feb 20, 2019 at 04:05:25PM +0100, Geert Uytterhoeven wrote:
> As of commit 7af9a5fdb9e0ca33 ("iommu/ipmmu-vmsa: Use
> iommu_device_sysfs_add()/remove()"), IOMMU devices show up under
> /sys/class/iommus/, but their "devices" subdirectories are empty.
> L
Hi Uli,
On Wed, Feb 20, 2019 at 3:50 PM Ulrich Hecht wrote:
> Adds HSCIF0 and HSCIF1 pins, groups and functions for R8A7779.
>
> Signed-off-by: Ulrich Hecht
> Reviewed-by: Simon Horman
> Reviewed-by: Geert Uytterhoeven
> ---
> This revision should fix the issues found by Geert in v1.
>
> CU
>
Hi Geert,
Thank you for the patch.
On Wed, Feb 20, 2019 at 04:05:26PM +0100, Geert Uytterhoeven wrote:
> There is a helper to write to the root IPMMU instance's registers, so
> let's use it.
>
> Signed-off-by: Geert Uytterhoeven
> ---
> drivers/iommu/ipmmu-vmsa.c | 3 +--
> 1 file changed, 1 i
Hi Geert,
Thank you for the patch.
On Wed, Feb 20, 2019 at 04:05:27PM +0100, Geert Uytterhoeven wrote:
> On R-Car Gen3, the faulting virtual address is a 40-bit address, and
> comprised of two registers. Read the upper address part, and combine
> both parts, when running on a 64-bit system.
>
>
Hi Geert,
Thank you for the patch.
On Wed, Feb 20, 2019 at 04:05:28PM +0100, Geert Uytterhoeven wrote:
> Make the IPMMU_CTX_MAX constant unsigned, to match the type of
> ipmmu_features.number_of_contexts.
>
> This allows to use plain min() instead of type-casting min_t().
>
> Signed-off-by: Gee
Hi Geert,
Thank you for the patch.
On Wed, Feb 20, 2019 at 04:05:30PM +0100, Geert Uytterhoeven wrote:
> ipmmu_domain_init_context() takes care of (1) initializing the software
> domain, and (2) initializing the hardware context for the domain.
>
> Extract the code to initialize the hardware con
Hi Laurent,
On Wed, Feb 20, 2019 at 4:31 PM Laurent Pinchart
wrote:
> On Wed, Feb 20, 2019 at 04:05:27PM +0100, Geert Uytterhoeven wrote:
> > On R-Car Gen3, the faulting virtual address is a 40-bit address, and
> > comprised of two registers. Read the upper address part, and combine
> > both par
Hi Geert,
Thank you for the patch.
On Wed, Feb 20, 2019 at 04:05:31PM +0100, Geert Uytterhoeven wrote:
> During PSCI system suspend, R-Car Gen3 SoCs are powered down, and all
> IPMMU state is lost. Hence after s2ram, devices wired behind an IPMMU,
> and configured to use it, will see their DMA o
Hi Geert,
Thank you for the patch.
On Wed, Feb 20, 2019 at 04:05:29PM +0100, Geert Uytterhoeven wrote:
> The maximum number of micro-TLBs per IPMMU instance is not fixed, but
> depends on the SoC type. Hence move it from struct ipmmu_vmsa_device to
> struct ipmmu_features, and set up the correct
Hi Laurent,
On Wed, Feb 20, 2019 at 4:35 PM Laurent Pinchart
wrote:
> On Wed, Feb 20, 2019 at 04:05:30PM +0100, Geert Uytterhoeven wrote:
> > ipmmu_domain_init_context() takes care of (1) initializing the software
> > domain, and (2) initializing the hardware context for the domain.
> >
> > Extra
The Synopsys I2C Controller has a bus clock that some SoCs require to access
the registers. This series also details the new clock property in the bindings
documentation.
v3:
- busclk renamed to pclk.
- Added comment with dw_i2c_dev struct definition describing pclk.
- Added enable rollback of
From: Phil Edworthy
The driver requires an undocumented clock property, so detail it.
Add documentation for a separate, optional, bus clock.
Signed-off-by: Phil Edworthy
v3:
- Changed clocks and clock-names sections to use term "peripheral clock"
(pclk) instead of "bus clock" (busclk).
v2:
From: Phil Edworthy
The Synopsys I2C Controller has a bus clock, but most SoCs hide this away.
However, on some SoCs you need to explicity enable the bus clock in order
to access the registers. Therefore, add support for an optional bus clock.
Signed-off-by: Phil Edworthy
Signed-off-by: Gareth
Hi Laurent,
On Wed, Feb 20, 2019 at 4:42 PM Laurent Pinchart
wrote:
> On Wed, Feb 20, 2019 at 04:05:31PM +0100, Geert Uytterhoeven wrote:
> > During PSCI system suspend, R-Car Gen3 SoCs are powered down, and all
> > IPMMU state is lost. Hence after s2ram, devices wired behind an IPMMU,
> > and c
Enum LAST_DT_CORE_CLK needs updating as R8A774C0_CLK_CANFD
was recently added and it's the core clock with the highest
index.
Signed-off-by: Fabrizio Castro
---
drivers/clk/renesas/r8a774c0-cpg-mssr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/renesas/r8a774c
Hi Magnus,
On Wed, Feb 20, 2019 at 3:55 PM Magnus Damm wrote:
> From: Magnus Damm
>
> Add a memory bank location check to the whitelist handling.
>
> Signed-off-by: Magnus Damm
Thanks for your patch!
> --- 0001/drivers/iommu/ipmmu-vmsa.c
> +++ work/drivers/iommu/ipmmu-vmsa.c 2019-02-20 22
CANFD is found also on the R8A774C0, therefore move CANFD pin
groups and functions to "common".
Signed-off-by: Fabrizio Castro
---
drivers/pinctrl/sh-pfc/pfc-r8a77990.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
b/d
CANFD is found also on the R8A774A1, therefore move CANFD pin
groups and functions to "common".
Signed-off-by: Fabrizio Castro
---
drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
b/d
Hi Geert,
On Wed, Feb 20, 2019 at 05:05:49PM +0100, Geert Uytterhoeven wrote:
> On Wed, Feb 20, 2019 at 4:42 PM Laurent Pinchart wrote:
> > On Wed, Feb 20, 2019 at 04:05:31PM +0100, Geert Uytterhoeven wrote:
> >> During PSCI system suspend, R-Car Gen3 SoCs are powered down, and all
> >> IPMMU stat
Hi Laurent,
On Wed, Feb 20, 2019 at 5:11 PM Laurent Pinchart
wrote:
> On Wed, Feb 20, 2019 at 05:05:49PM +0100, Geert Uytterhoeven wrote:
> > On Wed, Feb 20, 2019 at 4:42 PM Laurent Pinchart wrote:
> > > On Wed, Feb 20, 2019 at 04:05:31PM +0100, Geert Uytterhoeven wrote:
> > >> During PSCI system
On Wed, Feb 20, 2019 at 03:50:02PM +, Gareth Williams wrote:
> From: Phil Edworthy
>
> The driver requires an undocumented clock property, so detail it.
> Add documentation for a separate, optional, bus clock.
>
> Signed-off-by: Phil Edworthy
Looks good to me:
Acked-by: Wolfram Sang
Let
Hi Magnus,
On Wed, Feb 20, 2019 at 3:55 PM Magnus Damm wrote:
> From: Magnus Damm
>
> Introduce a keepipmmu boot paramenter to let the user override.
>
> Not-Yet-Signed-off-by: Magnus Damm
> ---
>
> drivers/iommu/ipmmu-vmsa.c | 14 +-
> 1 file changed, 13 insertions(+), 1 deletio
On Wed, Feb 20, 2019 at 03:50:03PM +, Gareth Williams wrote:
> From: Phil Edworthy
>
> The Synopsys I2C Controller has a bus clock, but most SoCs hide this away.
> However, on some SoCs you need to explicity enable the bus clock in order
> to access the registers. Therefore, add support for a
> From: Fabrizio Castro
> Sent: 20 February 2019 16:09
> To: Geert Uytterhoeven
> Cc: Fabrizio Castro ; Michael Turquette
> ; Stephen Boyd ; linux-
> renesas-...@vger.kernel.org; linux-...@vger.kernel.org; Simon Horman
> ; Chris Paterson ;
> Biju Das
> Subject: [PATCH] clk: renesas: r8a774c0: Fi
> From: Fabrizio Castro
> Sent: 20 February 2019 16:10
> To: Geert Uytterhoeven ; Linus Walleij
>
> Cc: Fabrizio Castro ; linux-renesas-
> s...@vger.kernel.org; linux-g...@vger.kernel.org; Simon Horman
> ; Chris Paterson ;
> Biju Das
> Subject: [PATCH] pinctrl: sh-pfc: r8a7796: move CANFD pin gr
> From: Fabrizio Castro
> Sent: 20 February 2019 16:10
> To: Geert Uytterhoeven ; Linus Walleij
>
> Cc: Fabrizio Castro ; linux-renesas-
> s...@vger.kernel.org; linux-g...@vger.kernel.org; Simon Horman
> ; Chris Paterson ;
> Biju Das
> Subject: [PATCH] pinctrl: sh-pfc: r8a77990: move CANFD pin g
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