Re: [PATCH] arm64: dts: renesas: r8a779{7|8}0: add TMU support
On 09/12/2018 12:39 PM, Simon Horman wrote:
>> Describe TMUs in the R8A779{7|8}0 device trees.
>>
>> Based on the original (and large) patches by Vladimir Barinov.
>>
>> Signed-off-by: Vladimir Barinov
>> Signed-off-by: Sergei Shtylyov
>>
>> ---
>> This patch is against the 'renesas-devel-20180906-v4.19-rc2' branch of
>> Simon Horman's 'renesas.git' repo plus the R8A779{7|8}0 DT patch adding
>> the CMT support).
>>
>> The R8A779{7|8}0 TMU DT binding update have been just posted...
>>
>> arch/arm64/boot/dts/renesas/r8a77970.dtsi | 66
>> ++
>> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 66
>> ++
>> 2 files changed, 132 insertions(+)
>>
>> Index: renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
>> ===
>> --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970.dtsi
>> +++ renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
>> @@ -316,6 +316,72 @@
>> resets = < 407>;
>> };
>>
>> +tmu0: timer@e61e {
>> +compatible = "renesas,tmu-r8a77970",
>> "renesas,tmu";
>> +reg = <0 0xe61e 0 0x30>;
>> +interrupts = ,
>> + ,
>> + ;
>> +clocks = < CPG_MOD 125>;
>> +clock-names = "fck";
>> +power-domains = < R8A77970_PD_ALWAYS_ON>;
>> +resets = < 125>;
>> +status = "disabled";
>> +};
>> +
>> +tmu1: timer@e6fc {
>> +compatible = "renesas,tmu-r8a77970",
>> "renesas,tmu";
>> +reg = <0 0xe6fc 0 0x30>;
>> +interrupts = ,
>> + ,
>> + ;
>> +clocks = < CPG_MOD 124>;
>> +clock-names = "fck";
>> +power-domains = < R8A77970_PD_ALWAYS_ON>;
>> +resets = < 124>;
>> +status = "disabled";
>> +};
>> +
>> +tmu2: timer@e6fd {
>> +compatible = "renesas,tmu-r8a77970",
>> "renesas,tmu";
>> +reg = <0 0xe6fd 0 0x30>;
>> +interrupts = ,
>> + ,
>> + ;
>
> Should GIC_SPI 306 also be here for TMU 2 channel 3?>
> And likewise for the r8a77980 (V3H)
There are only 3 channels per TMU according to the beginning of the TMU
chapter.
> The documentation seems inconsistent as I see this listed in the
> interrupt controller documentation. But I do not see that channel
> documented in the TMU documentation.
Right!
>> +clocks = < CPG_MOD 123>;
>> +clock-names = "fck";
>> +power-domains = < R8A77970_PD_ALWAYS_ON>;
>> +resets = < 123>;
>> +status = "disabled";
>> +};
>> +
>> +tmu3: timer@e6fe {
>> +compatible = "renesas,tmu-r8a7797",
>> "renesas,tmu";
>> +reg = <0 0xe6fe 0 0x30>;
>> +interrupts = ,
>> + ,
>> + ;
>> +clocks = < CPG_MOD 122>;
>> +clock-names = "fck";
>> +power-domains = < R8A77970_PD_ALWAYS_ON>;
>> +resets = < 122>;
>> +status = "disabled";
>> +};
>> +
>> +tmu4: timer@ffc0 {
>> +compatible = "renesas,tmu-r8a7797",
>> "renesas,tmu";
>> +reg = <0 0xffc0 0 0x30>;
>> +interrupts = ,
>> + ,
>> + ,
>> + ;
>
> Should GIC_SPI 369 for TMU 4 channel 3 be present not here for
> the r8a77970 (V3M) but rather below for the r8a77980 (V3H) ?
I don't think it should be pesent in either place, and I thought I had
removed
the 4th IRQ from every node before posting... :-/
> As per my note above, the documentation seems inconsistent
Re: [PATCH] arm64: dts: renesas: r8a779{7|8}0: add TMU support
On 09/11/2018 09:35 PM, Sergei Shtylyov wrote:
> Describe TMUs in the R8A779{7|8}0 device trees.
>
> Based on the original (and large) patches by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov
> Signed-off-by: Sergei Shtylyov
>
> ---
> This patch is against the 'renesas-devel-20180906-v4.19-rc2' branch of
> Simon Horman's 'renesas.git' repo plus the R8A779{7|8}0 DT patch adding
> the CMT support).
>
> The R8A779{7|8}0 TMU DT binding update have been just posted...
>
> arch/arm64/boot/dts/renesas/r8a77970.dtsi | 66
> ++
> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 66
> ++
> 2 files changed, 132 insertions(+)
>
> Index: renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> ===
> --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> +++ renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> @@ -316,6 +316,72 @@
> resets = < 407>;
> };
>
> + tmu0: timer@e61e {
> + compatible = "renesas,tmu-r8a77970", "renesas,tmu";
> + reg = <0 0xe61e 0 0x30>;
> + interrupts = ,
> + ,
> + ;
> + clocks = < CPG_MOD 125>;
> + clock-names = "fck";
> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> + resets = < 125>;
> + status = "disabled";
> + };
> +
> + tmu1: timer@e6fc {
> + compatible = "renesas,tmu-r8a77970", "renesas,tmu";
> + reg = <0 0xe6fc 0 0x30>;
> + interrupts = ,
> + ,
> + ;
> + clocks = < CPG_MOD 124>;
> + clock-names = "fck";
> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> + resets = < 124>;
> + status = "disabled";
> + };
> +
> + tmu2: timer@e6fd {
> + compatible = "renesas,tmu-r8a77970", "renesas,tmu";
> + reg = <0 0xe6fd 0 0x30>;
> + interrupts = ,
> + ,
> + ;
Should GIC_SPI 306 also be here for TMU 2 channel 3?>
And likewise for the r8a77980 (V3H)
>>>
>>>There are only 3 channels per TMU according to the beginning of the TMU
>>> chapter.
>>>
The documentation seems inconsistent as I see this listed in the
interrupt controller documentation. But I do not see that channel
documented in the TMU documentation.
>>>
>>>Right!
>>>
> + clocks = < CPG_MOD 123>;
> + clock-names = "fck";
> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> + resets = < 123>;
> + status = "disabled";
> + };
> +
> + tmu3: timer@e6fe {
> + compatible = "renesas,tmu-r8a7797", "renesas,tmu";
> + reg = <0 0xe6fe 0 0x30>;
> + interrupts = ,
> + ,
> + ;
> + clocks = < CPG_MOD 122>;
> + clock-names = "fck";
> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> + resets = < 122>;
> + status = "disabled";
> + };
> +
> + tmu4: timer@ffc0 {
> + compatible = "renesas,tmu-r8a7797", "renesas,tmu";
> + reg = <0 0xffc0 0 0x30>;
> + interrupts = ,
> + ,
> + ,
> + ;
Should GIC_SPI 369 for TMU 4 channel 3 be present not here for
the r8a77970 (V3M) but rather below for the r8a77980 (V3H) ?
>>>
>>>I don't think it should be pesent in either place, and I thought I had
>>> removed
>>> the 4th IRQ from every node before posting... :-/
>>>
As per my note above, the documentation seems inconsistent here.
>>>
>>>Yes.
>>
>> Lets go with no 4th IRQ anywhere :)
>
>After having studied the manual, 4th IRQ might have sometging to do with
> the input capture channel capability which uses an extra IRQ output.
>
>> Could you send an updated patch?
>
>Sure. I'll verify and repost.
No, the extra IRQ doesn't match the existing of the input capture hardware.
MBR, Sergei
Re: [PATCH] arm64: dts: renesas: r8a779{7|8}0: add TMU support
On Tue, Sep 11, 2018 at 09:35:50PM +0300, Sergei Shtylyov wrote:
> Hello!
>
> On 09/11/2018 04:36 PM, Simon Horman wrote:
>
> Describe TMUs in the R8A779{7|8}0 device trees.
>
> Based on the original (and large) patches by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov
> Signed-off-by: Sergei Shtylyov
>
> ---
> This patch is against the 'renesas-devel-20180906-v4.19-rc2' branch of
> Simon Horman's 'renesas.git' repo plus the R8A779{7|8}0 DT patch adding
> the CMT support).
>
> The R8A779{7|8}0 TMU DT binding update have been just posted...
>
> arch/arm64/boot/dts/renesas/r8a77970.dtsi | 66
> ++
> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 66
> ++
> 2 files changed, 132 insertions(+)
>
> Index: renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> ===
> --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> +++ renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> @@ -316,6 +316,72 @@
> resets = < 407>;
> };
>
> +tmu0: timer@e61e {
> +compatible = "renesas,tmu-r8a77970",
> "renesas,tmu";
> +reg = <0 0xe61e 0 0x30>;
> +interrupts = ,
> + ,
> + ;
> +clocks = < CPG_MOD 125>;
> +clock-names = "fck";
> +power-domains = < R8A77970_PD_ALWAYS_ON>;
> +resets = < 125>;
> +status = "disabled";
> +};
> +
> +tmu1: timer@e6fc {
> +compatible = "renesas,tmu-r8a77970",
> "renesas,tmu";
> +reg = <0 0xe6fc 0 0x30>;
> +interrupts = ,
> + ,
> + ;
> +clocks = < CPG_MOD 124>;
> +clock-names = "fck";
> +power-domains = < R8A77970_PD_ALWAYS_ON>;
> +resets = < 124>;
> +status = "disabled";
> +};
> +
> +tmu2: timer@e6fd {
> +compatible = "renesas,tmu-r8a77970",
> "renesas,tmu";
> +reg = <0 0xe6fd 0 0x30>;
> +interrupts = ,
> + ,
> + ;
> >>>
> >>> Should GIC_SPI 306 also be here for TMU 2 channel 3?>
> >>> And likewise for the r8a77980 (V3H)
> >>
> >>There are only 3 channels per TMU according to the beginning of the TMU
> >> chapter.
> >>
> >>> The documentation seems inconsistent as I see this listed in the
> >>> interrupt controller documentation. But I do not see that channel
> >>> documented in the TMU documentation.
> >>
> >>Right!
> >>
> +clocks = < CPG_MOD 123>;
> +clock-names = "fck";
> +power-domains = < R8A77970_PD_ALWAYS_ON>;
> +resets = < 123>;
> +status = "disabled";
> +};
> +
> +tmu3: timer@e6fe {
> +compatible = "renesas,tmu-r8a7797",
> "renesas,tmu";
> +reg = <0 0xe6fe 0 0x30>;
> +interrupts = ,
> + ,
> + ;
> +clocks = < CPG_MOD 122>;
> +clock-names = "fck";
> +power-domains = < R8A77970_PD_ALWAYS_ON>;
> +resets = < 122>;
> +status = "disabled";
> +};
> +
> +tmu4: timer@ffc0 {
> +compatible = "renesas,tmu-r8a7797",
> "renesas,tmu";
> +reg = <0 0xffc0 0 0x30>;
> +interrupts = ,
> + ,
> + ,
> + ;
> >>>
> >>> Should GIC_SPI 369 for TMU 4 channel 3 be present not here for
> >>> the r8a77970 (V3M) but rather below for the r8a77980 (V3H) ?
> >>
> >>I don't think it should be pesent in either place, and I thought I had
> >> removed
> >> the 4th IRQ from every node before
Re: [PATCH] arm64: dts: renesas: r8a779{7|8}0: add TMU support
Hello!
On 09/11/2018 04:36 PM, Simon Horman wrote:
Describe TMUs in the R8A779{7|8}0 device trees.
Based on the original (and large) patches by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
---
This patch is against the 'renesas-devel-20180906-v4.19-rc2' branch of
Simon Horman's 'renesas.git' repo plus the R8A779{7|8}0 DT patch adding
the CMT support).
The R8A779{7|8}0 TMU DT binding update have been just posted...
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 66
++
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 66
++
2 files changed, 132 insertions(+)
Index: renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
===
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -316,6 +316,72 @@
resets = < 407>;
};
+ tmu0: timer@e61e {
+ compatible = "renesas,tmu-r8a77970", "renesas,tmu";
+ reg = <0 0xe61e 0 0x30>;
+ interrupts = ,
+ ,
+ ;
+ clocks = < CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = < R8A77970_PD_ALWAYS_ON>;
+ resets = < 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@e6fc {
+ compatible = "renesas,tmu-r8a77970", "renesas,tmu";
+ reg = <0 0xe6fc 0 0x30>;
+ interrupts = ,
+ ,
+ ;
+ clocks = < CPG_MOD 124>;
+ clock-names = "fck";
+ power-domains = < R8A77970_PD_ALWAYS_ON>;
+ resets = < 124>;
+ status = "disabled";
+ };
+
+ tmu2: timer@e6fd {
+ compatible = "renesas,tmu-r8a77970", "renesas,tmu";
+ reg = <0 0xe6fd 0 0x30>;
+ interrupts = ,
+ ,
+ ;
>>>
>>> Should GIC_SPI 306 also be here for TMU 2 channel 3?>
>>> And likewise for the r8a77980 (V3H)
>>
>>There are only 3 channels per TMU according to the beginning of the TMU
>> chapter.
>>
>>> The documentation seems inconsistent as I see this listed in the
>>> interrupt controller documentation. But I do not see that channel
>>> documented in the TMU documentation.
>>
>>Right!
>>
+ clocks = < CPG_MOD 123>;
+ clock-names = "fck";
+ power-domains = < R8A77970_PD_ALWAYS_ON>;
+ resets = < 123>;
+ status = "disabled";
+ };
+
+ tmu3: timer@e6fe {
+ compatible = "renesas,tmu-r8a7797", "renesas,tmu";
+ reg = <0 0xe6fe 0 0x30>;
+ interrupts = ,
+ ,
+ ;
+ clocks = < CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = < R8A77970_PD_ALWAYS_ON>;
+ resets = < 122>;
+ status = "disabled";
+ };
+
+ tmu4: timer@ffc0 {
+ compatible = "renesas,tmu-r8a7797", "renesas,tmu";
+ reg = <0 0xffc0 0 0x30>;
+ interrupts = ,
+ ,
+ ,
+ ;
>>>
>>> Should GIC_SPI 369 for TMU 4 channel 3 be present not here for
>>> the r8a77970 (V3M) but rather below for the r8a77980 (V3H) ?
>>
>>I don't think it should be pesent in either place, and I thought I had
>> removed
>> the 4th IRQ from every node before posting... :-/
>>
>>> As per my note above, the documentation seems inconsistent here.
>>
>>Yes.
>
> Lets go with no 4th IRQ anywhere :)
After having studied the manual, 4th IRQ might have sometging to do with the
input capture channel capability which uses an extra IRQ output.
> Could you send an updated patch?
Sure. I'll verify and repost.
[...]
MBR, Sergei
Re: [PATCH] arm64: dts: renesas: r8a779{7|8}0: add TMU support
On Tue, Sep 11, 2018 at 3:36 PM Simon Horman wrote:
> On Mon, Sep 10, 2018 at 03:04:56PM +0300, Sergei Shtylyov wrote:
> > On 09/10/2018 12:23 PM, Simon Horman wrote:
> >
> > >> Describe TMUs in the R8A779{7|8}0 device trees.
> > >>
> > >> Based on the original (and large) patches by Vladimir Barinov.
> > >>
> > >> Signed-off-by: Vladimir Barinov
> > >> Signed-off-by: Sergei Shtylyov
> Lets go with no 4th IRQ anywhere :)
> Could you send an updated patch?
Please consider my comments on the bindings first:
https://patchwork.kernel.org/patch/10592517/
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH] arm64: dts: renesas: r8a779{7|8}0: add TMU support
On Mon, Sep 10, 2018 at 03:04:56PM +0300, Sergei Shtylyov wrote:
> Hello!
>
> On 09/10/2018 12:23 PM, Simon Horman wrote:
>
> >> Describe TMUs in the R8A779{7|8}0 device trees.
> >>
> >> Based on the original (and large) patches by Vladimir Barinov.
> >>
> >> Signed-off-by: Vladimir Barinov
> >> Signed-off-by: Sergei Shtylyov
> >>
> >> ---
> >> This patch is against the 'renesas-devel-20180906-v4.19-rc2' branch of
> >> Simon Horman's 'renesas.git' repo plus the R8A779{7|8}0 DT patch adding
> >> the CMT support).
> >>
> >> The R8A779{7|8}0 TMU DT binding update have been just posted...
> >>
> >> arch/arm64/boot/dts/renesas/r8a77970.dtsi | 66
> >> ++
> >> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 66
> >> ++
> >> 2 files changed, 132 insertions(+)
> >>
> >> Index: renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> >> ===
> >> --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> >> +++ renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> >> @@ -316,6 +316,72 @@
> >>resets = < 407>;
> >>};
> >>
> >> + tmu0: timer@e61e {
> >> + compatible = "renesas,tmu-r8a77970", "renesas,tmu";
> >> + reg = <0 0xe61e 0 0x30>;
> >> + interrupts = ,
> >> + ,
> >> + ;
> >> + clocks = < CPG_MOD 125>;
> >> + clock-names = "fck";
> >> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> >> + resets = < 125>;
> >> + status = "disabled";
> >> + };
> >> +
> >> + tmu1: timer@e6fc {
> >> + compatible = "renesas,tmu-r8a77970", "renesas,tmu";
> >> + reg = <0 0xe6fc 0 0x30>;
> >> + interrupts = ,
> >> + ,
> >> + ;
> >> + clocks = < CPG_MOD 124>;
> >> + clock-names = "fck";
> >> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> >> + resets = < 124>;
> >> + status = "disabled";
> >> + };
> >> +
> >> + tmu2: timer@e6fd {
> >> + compatible = "renesas,tmu-r8a77970", "renesas,tmu";
> >> + reg = <0 0xe6fd 0 0x30>;
> >> + interrupts = ,
> >> + ,
> >> + ;
> >
> > Should GIC_SPI 306 also be here for TMU 2 channel 3?>
> > And likewise for the r8a77980 (V3H)
>
>There are only 3 channels per TMU according to the beginning of the TMU
> chapter.
>
> > The documentation seems inconsistent as I see this listed in the
> > interrupt controller documentation. But I do not see that channel
> > documented in the TMU documentation.
>
>Right!
>
> >> + clocks = < CPG_MOD 123>;
> >> + clock-names = "fck";
> >> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> >> + resets = < 123>;
> >> + status = "disabled";
> >> + };
> >> +
> >> + tmu3: timer@e6fe {
> >> + compatible = "renesas,tmu-r8a7797", "renesas,tmu";
> >> + reg = <0 0xe6fe 0 0x30>;
> >> + interrupts = ,
> >> + ,
> >> + ;
> >> + clocks = < CPG_MOD 122>;
> >> + clock-names = "fck";
> >> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> >> + resets = < 122>;
> >> + status = "disabled";
> >> + };
> >> +
> >> + tmu4: timer@ffc0 {
> >> + compatible = "renesas,tmu-r8a7797", "renesas,tmu";
> >> + reg = <0 0xffc0 0 0x30>;
> >> + interrupts = ,
> >> + ,
> >> + ,
> >> + ;
> >
> > Should GIC_SPI 369 for TMU 4 channel 3 be present not here for
> > the r8a77970 (V3M) but rather below for the r8a77980 (V3H) ?
>
>I don't think it should be pesent in either place, and I thought I had
> removed
> the 4th IRQ from every node before posting... :-/
>
> > As per my note above, the documentation seems inconsistent here.
>
>Yes.
Lets go with no 4th IRQ anywhere :)
Could you send an updated patch?
>
> >> + clocks = < CPG_MOD 121>;
> >> + clock-names = "fck";
> >> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> >> + resets = < 121>;
> >> + status = "disabled";
> >> + };
> >> +
> >>i2c0: i2c@e650 {
> >>compatible = "renesas,i2c-r8a77970",
> >> "renesas,rcar-gen3-i2c";
Re: [PATCH] arm64: dts: renesas: r8a779{7|8}0: add TMU support
On Fri, Sep 07, 2018 at 11:14:40PM +0300, Sergei Shtylyov wrote:
> Describe TMUs in the R8A779{7|8}0 device trees.
>
> Based on the original (and large) patches by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov
> Signed-off-by: Sergei Shtylyov
>
> ---
> This patch is against the 'renesas-devel-20180906-v4.19-rc2' branch of
> Simon Horman's 'renesas.git' repo plus the R8A779{7|8}0 DT patch adding
> the CMT support).
>
> The R8A779{7|8}0 TMU DT binding update have been just posted...
>
> arch/arm64/boot/dts/renesas/r8a77970.dtsi | 66
> ++
> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 66
> ++
> 2 files changed, 132 insertions(+)
>
> Index: renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> ===
> --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> +++ renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> @@ -316,6 +316,72 @@
> resets = < 407>;
> };
>
> + tmu0: timer@e61e {
> + compatible = "renesas,tmu-r8a77970", "renesas,tmu";
> + reg = <0 0xe61e 0 0x30>;
> + interrupts = ,
> + ,
> + ;
> + clocks = < CPG_MOD 125>;
> + clock-names = "fck";
> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> + resets = < 125>;
> + status = "disabled";
> + };
> +
> + tmu1: timer@e6fc {
> + compatible = "renesas,tmu-r8a77970", "renesas,tmu";
> + reg = <0 0xe6fc 0 0x30>;
> + interrupts = ,
> + ,
> + ;
> + clocks = < CPG_MOD 124>;
> + clock-names = "fck";
> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> + resets = < 124>;
> + status = "disabled";
> + };
> +
> + tmu2: timer@e6fd {
> + compatible = "renesas,tmu-r8a77970", "renesas,tmu";
> + reg = <0 0xe6fd 0 0x30>;
> + interrupts = ,
> + ,
> + ;
Should GIC_SPI 306 also be here for TMU 2 channel 3?
And likewise for the r8a77980 (V3H)
The documentation seems inconsistent as I see this listed in the
interrupt controller documentation. But I do not see that channel
documented in the TMU documentation.
> + clocks = < CPG_MOD 123>;
> + clock-names = "fck";
> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> + resets = < 123>;
> + status = "disabled";
> + };
> +
> + tmu3: timer@e6fe {
> + compatible = "renesas,tmu-r8a7797", "renesas,tmu";
> + reg = <0 0xe6fe 0 0x30>;
> + interrupts = ,
> + ,
> + ;
> + clocks = < CPG_MOD 122>;
> + clock-names = "fck";
> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> + resets = < 122>;
> + status = "disabled";
> + };
> +
> + tmu4: timer@ffc0 {
> + compatible = "renesas,tmu-r8a7797", "renesas,tmu";
> + reg = <0 0xffc0 0 0x30>;
> + interrupts = ,
> + ,
> + ,
> + ;
Should GIC_SPI 369 for TMU 4 channel 3 be present not here for
the r8a77970 (V3M) but rather below for the r8a77980 (V3H) ?
As per my note above, the documentation seems inconsistent here.
> + clocks = < CPG_MOD 121>;
> + clock-names = "fck";
> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> + resets = < 121>;
> + status = "disabled";
> + };
> +
> i2c0: i2c@e650 {
> compatible = "renesas,i2c-r8a77970",
>"renesas,rcar-gen3-i2c";
> Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> ===
> --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> +++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> @@ -346,6 +346,72 @@
> resets = < 407>;
> };
>
> + tmu0: timer@e61e {
> + compatible = "renesas,tmu-r8a77980", "renesas,tmu";
> + reg = <0 0xe61e 0 0x30>;
> +
