Tomasz / Olof,
On Thu, May 9, 2013 at 2:45 AM, Tomasz Figa t.f...@samsung.com wrote:
Nothing stops you from doing that on your own. I tend to push back
onto the maintainers to get them engaged in their own housekeeping,
but anyone is free to :)
I will probably leave this to the maintainers at
. Also add basic dependencies for the PINCTRL_EXYNOS
kernel config.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v3:
- Moved to chip level as per Tomasz.
- Update PINCTRL Kconfig for exynos.
Changes in v2:
- Moved to the arch level as suggested by Olof.
arch/arm/mach-exynos
Olof,
On Wed, May 8, 2013 at 11:19 AM, Olof Johansson o...@lixom.net wrote:
Seems like this should be selected by the SoC (ARCH_EXYNOS5) instead
of the board. Actually, I'm not sure we need the board Kconfig entry
long-term; all boards will be dt-only.
Good point. Hopefully someone at
) will eventually move over to the common code.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v2:
- Moved to the arch level as suggested by Olof.
arch/arm/mach-exynos/Kconfig | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-exynos/Kconfig b
. The changes committed during the
earlier patch has also been reverted here.
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
CC: Doug Anderson diand...@chromium.org
---
Doug,
Would you please test whether this patch works for Snow?
Yup, it works for me. I did the basic testing
Naveen,
On Fri, Apr 12, 2013 at 9:36 PM, Naveen Krishna Ch
naveenkrishna...@gmail.com wrote:
Can some one review this and get this fix into the tree.
I think the ball is in your court. Lars responded to your RFC patch
here and requested that you do a reset of the bus in the case of being
Mark,
On Mon, Mar 11, 2013 at 10:36 AM, Doug Anderson diand...@chromium.org wrote:
Thomas,
On Wed, Mar 6, 2013 at 3:42 AM, Thomas Abraham
thomas.abra...@linaro.org wrote:
With device core now able to setup the default pin configuration,
the pin configuration code based on the deprecated
From: Thomas Abraham thomas.abra...@linaro.org
With device core now able to setup the default pin configuration,
the pin configuration code based on the deprecated Samsung specific
gpio bindings is removed.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Signed-off-by: Doug Anderson
Thomas,
On Wed, Apr 10, 2013 at 5:48 AM, Thomas Abraham
thomas.abra...@linaro.org wrote:
The call to regulator_enable() is prior to the call to mmc_add_host().
Hence, call to mmc_fre_host is not required in this case. So the above
change should be right.
Are you sure that mmc_free_host() is
Thomas,
On Wed, Apr 10, 2013 at 6:56 AM, Doug Anderson diand...@chromium.org wrote:
On Wed, Apr 10, 2013 at 5:48 AM, Thomas Abraham
thomas.abra...@linaro.org wrote:
The call to regulator_enable() is prior to the call to mmc_add_host().
Hence, call to mmc_fre_host is not required in this case
Thomas,
On Mon, Apr 8, 2013 at 10:59 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:
@@ -2002,7 +1994,7 @@ static int dw_mci_init_slot(struct dw_mci *host,
unsigned int id)
if (ret) {
dev_err(host-dev,
failed to
Thomas,
Since I commented on previous versions of this patch, I would have
loved to have been CCed on this new version. ;)
On Fri, Apr 5, 2013 at 6:53 AM, Thomas Abraham
thomas.abra...@linaro.org wrote:
With device core now able to setup the default pin configuration,
the pin configuration
The display timing node was added:
7ed2077 ARM: dts: Add display timing node to exynos5250-smdk5250.dts
...and looks OK there. ...but it looks like we lost a }; in the
merge and it no longer compiles. Fix it.
Signed-off-by: Doug Anderson diand...@chromium.org
---
arch/arm/boot/dts/exynos5250
]
(kernel_init_freeable+0x108/0x1d0)
[80633a8c] (kernel_init_freeable+0x108/0x1d0) from [8046d2f8]
(kernel_init+0x1c/0xf4)
[8046d2f8] (kernel_init+0x1c/0xf4) from [8000e358]
(ret_from_fork+0x14/0x20)
---[ end trace 4bcdc801c868d73f ]---
Signed-off-by: Doug Anderson diand...@chromium.org
---
arch/arm/boot/dts
Kukjin,
On Mon, Apr 8, 2013 at 11:23 AM, Kukjin Kim kgene@samsung.com wrote:
Thanks for your pointing out. But it should be fixed with re-sorting out the
branch.
No problem with however you want to solve it. ;) Seemed that the
patch was the easiest way to report the problem in any
Kukjin,
On Mon, Apr 8, 2013 at 11:29 AM, Kukjin Kim kgene@gmail.com wrote:
BTW, if any problems on current for-next, please kindly let me know.
I usually try to check linux-next at least once a week, but sometimes
it's more or less often. At the moment I'm trying to track something
weird
Tomasz,
On Mon, Apr 8, 2013 at 12:27 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
Common Clock Framework by default automatically gates unused clocks, just
like regulator core does with unused regulators. Maybe this is the cause?
Yes, I'm nearly certain that's the case here. The reset code
Lars,
On Fri, Apr 5, 2013 at 1:53 AM, Lars-Peter Clausen l...@metafoo.de wrote:
Since we sleep inside the protected section we need to use a mutex.
Ah, good point.
It's not the timeout case I'm worried about, but the case where the transfer
is interrupted by the user. Even though it is
Lars,
On Sat, Mar 16, 2013 at 7:41 AM, Lars-Peter Clausen l...@metafoo.de wrote:
I think you still need the mutex for serialization, otherwise the requests
would just cancel each other out. Btw. what happens if you start a conversion
while another is still in progress? Is it possible to abort
Kukjin,
On Tue, Apr 2, 2013 at 7:16 PM, Kukjin Kim kgene@samsung.com wrote:
Applied with 1st one, BTW, do you want to send this for stable tree?
I don't have any need for it to be in stable tree. The ARM Chromebook
hasn't reached critical functionality on any released/upstram Linux
...@linaro.org
Acked-by: Linus Walleij linus.wall...@linaro.org
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
You missed Seungwon's other feedback. Please change the title from
mmc: dwmmc: let device core setup the default pin configuration to
mmc
Thomas,
On Mon, Mar 25, 2013 at 9:56 AM, Doug Anderson diand...@google.com wrote:
Are you planning on doing this? I noticed that Chris pulled your
sdhci-s3c change in recently but apparently skipped this one since it
had outstanding comments. Can you address comments and re-send
Thomas,
On Mon, Mar 11, 2013 at 10:53 AM, Doug Anderson diand...@google.com wrote:
It would be good to address Seungwon Jeon's comments (change prefix to
dw_mmc and remove setup_bus), but in general this looks good to me,
so...
Are you planning on doing this? I noticed that Chris pulled your
to make suspend/resume reliable on the ARM Chromebook
(exynos5250-snow).
A few more details:
- The first patch is not strictly needed but was a nice cleanup. Our
understanding was that EINT0 was originally turned on for exynos
evt0 silicon and not needed for evt1.
- The second patch is more
From: Jonathan Kliegman kli...@chromium.org
For legacy reasons EINT_0 was being forced on for all
exynos systems as a wake interrupt. For boards that need
EINT_0 they should probably enable it with enable_irq_wake
Signed-off-by: Jonathan Kliegman kli...@chromium.org
Signed-off-by: Doug Anderson
Kliegman kli...@chromium.org
Signed-off-by: Doug Anderson diand...@chromium.org
Reviewed-by: Doug Anderson diand...@chromium.org
---
arch/arm/mach-exynos/include/mach/pm-core.h | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/pm-core.h
b/arch/arm
Reported-by: Dan Carpenter dan.carpen...@oracle.com
Cc: Doug Anderson diand...@chromium.org
Cc: Lars-Peter Clausen l...@metafoo.de
---
Discussion thread for this patch can be found at
http://www.gossamer-threads.com/lists/linux/kernel/1693284?page=last
drivers/iio/adc/Kconfig |1 +
1
On Fri, Mar 15, 2013 at 2:53 PM, Lars-Peter Clausen l...@metafoo.de wrote:
What exactly is the spinlock protecting against here? Concurrent runs of
exynos_adc_isr? This is probably not issue in the first place.
What you want to protect against is that completion is completed between the
call
Hi,
On Thu, Mar 14, 2013 at 7:58 AM, Thomas Abraham
thomas.abra...@linaro.org wrote:
I can see your point, but as I mentioned earlier there seems to be some
timing issue here. By simply doing the reset a few ms earlier (in the first
probe, before the driver detects that it needs to defer
Alexander,
On Tue, Mar 12, 2013 at 6:09 PM, Alexander Graf ag...@suse.de wrote:
- err = gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, ehci_vbus_gpio);
- if (err)
+ /* reset pulls the line down, then up again */
+ err = gpio_request_one(gpio, GPIOF_OUT_INIT_LOW,
Alexander,
On Wed, Mar 13, 2013 at 10:45 AM, Alexander Graf ag...@suse.de wrote:
+ gpio_free(gpio);
Freeing the gpio is a little on the iffy side since you actually care
about keeping the value. Perhaps you can change this to
devm_gpio_request_one() and avoid the free? I was about
Naveen,
On Tue, Mar 12, 2013 at 9:48 PM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
Doug, There was a comment from Lars regarding the match not
being NULL, if driver depends on CONFIG_OF. So, i've removed
the NULL check in v2 of this patch.
Lars,
On Wed, Mar 13, 2013 at 11:11 AM, Lars-Peter Clausen l...@metafoo.de wrote:
Agreed. Adding the dependency on OF in Kconfig should be all that is needed.
I think changing the timeout from 'unsigned long' to 'long' is also
legit (to match the actual type returned) and a good idea.
-Doug
--
Lars,
On Wed, Mar 13, 2013 at 11:40 AM, Lars-Peter Clausen l...@metafoo.de wrote:
Yes, but that's a different issue and to be honest I didn't even realize
that the patch was trying to fix this as well. In my opinion it's best to
split this up into two patches one which fixes the OF dependency.
-Hartman gre...@linuxfoundation.org
CC: Doug Anderson diand...@chromium.org
---
v1 - v2:
- remove gpio_free call
- move reset logic after phy node search
Seems fine to me. I guess the earlier problem you wrote about was the
probe failure, then? I think that the reason I don't tend to get
Naveen,
On Wed, Mar 6, 2013 at 7:09 PM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
- unsigned intversion;
+ unsigned intversion;
Given that you've changed exynos_adc_get_version() to return an int,
shouldn't this be an int too (not unsigned)?
configuration
2225141 New [1/2] ARM: dts: add pin state information in
client nodes for Exynos4 platforms
2225151 New [2/2] ARM: dts: add pin state information in
client nodes for Exynos5 platforms
Tested-by: Doug Anderson diand...@chromium.org
This patch looks good to me
):
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
-Doug
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo
...
With https://patchwork.kernel.org/patch/2225151/ on exynos5250-snow
(ARM Chromebook):
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
-Doug
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message
Linus,
+dw_mmc folks and Stephen Warren : for context here, we are discussing
device tree bindings for pinmux for dw_mmc. The issue at hand is
whether they belong under the slot node or under the top-level device
node.
On Wed, Mar 6, 2013 at 11:57 PM, Linus Walleij linus.wall...@linaro.org
Linus,
On Thu, Mar 7, 2013 at 6:04 PM, Linus Walleij linus.wall...@linaro.org wrote:
On Thu, Mar 7, 2013 at 5:13 PM, Doug Anderson diand...@chromium.org wrote:
...I think the most important issue at hand is the device tree
bindings for pinmux on this device. It sounds like you
Tomasz,
Thanks for your response.
On Sat, Mar 2, 2013 at 3:48 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
The 4 patches above are already merged in Kgene's for-next-next (for 3.10)
branch.
Excellent. I see them now. I haven't yet seen them show up in
linux-next (which is where I tend to
Thomas,
On Mon, Mar 4, 2013 at 6:04 AM, Thomas Abraham
thomas.abra...@linaro.org wrote:
Ok. I will repost this patch again with pinctrl_1 and pinctrl_2
included. I had not included this in the earlier patch since I was not
sure of the best pin grouping for the camera and c2c interface.
OK,
Thomas,
On Tue, Mar 5, 2013 at 3:49 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:
Yes, I am currently held up with supporting default pin states at slot
level. One option that could be considered is to list out the default
pin states for all slots in the parent node of the slots. So it
Thomas,
On Tue, Mar 5, 2013 at 4:01 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:
So now I have: pinctrl_0 is SPI[46], pinctrl_1 is SPI[45], pinctrl_2
is SPI[50] and pinctrl_3 is SPI[47]. I am yet to test this and
confirm. If you feel these are wrong, could you please let me know.
Yes,
don't
have access to a board that uses this driver.
Doug Anderson (2):
i2c-core: dt: Pick i2c bus number from i2c alias if present
i2c: pxa: Use i2c-core to get bus number now
drivers/i2c/busses/i2c-pxa.c | 20 --
drivers/i2c/i2c-core.c | 49
{
i2c0 = i2c_0;
i2c1 = i2c_1;
};
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v4:
- Rebased atop the removal of MAX_IDR_MASK.
Changes in v3:
- Addressed Wolfram's feedback; rebased atop idr-cleanup series.
Changes in v2: None
drivers/i2c/i2c-core.c | 49
The commit: i2c-core: dt: Pick i2c bus number from i2c alias if
present adds support for automatically picking the bus number based
on the alias ID. Remove the now unnecessary code from i2c-pxa that
did the same thing.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v4: None
Thomas and Tomasz,
I'm trying to get my head wrapped around the state of pinctrl for
exynos5250. I see various patches that have floated around at times
but it doesn't look like anything has landed. It would be really nice
to get this resolved since I think it blocks getting eint support
landed
Wolfram,
On Thu, Feb 28, 2013 at 3:25 PM, Wolfram Sang w...@the-dreams.de wrote:
Regarding patch 1, I was waiting for the idr changes to hit mainline.
They are mainline now, but since the removal of MAX_IDR_MASK your patch
doesn't apply anymore :( Can you rebase and retest, please? I'd like
Wolfram,
On Mon, Feb 11, 2013 at 4:48 PM, Doug Anderson diand...@chromium.org wrote:
This was suggested by Mark Brown in response to a patch for adding
this functionality only for the s3c2410 bus:
https://lkml.org/lkml/2012/11/20/681
I have also modified the i2c-pxa driver to use this new
.
Reported-by: Doug Anderson diand...@chromium.org
Signed-off-by: Rob Herring rob.herr...@calxeda.com
Cc: Kukjin Kim kgene@samsung.com
Cc: Russell King li...@arm.linux.org.uk
Cc: Thomas Gleixner t...@linutronix.de
Cc: linux-samsung-soc@vger.kernel.org
---
I thought there may be other
Wolfram,
On Sun, Feb 10, 2013 at 10:17 AM, Wolfram Sang w.s...@pengutronix.de wrote:
On Mon, Feb 04, 2013 at 02:33:15PM +0530, Yuvaraj Kumar C D wrote:
This RFC patch is w.r.t multimaster bus arbitration which is already
being discussing in the mainline.
This patch provides hooks for the i2c
{
i2c0 = i2c_0;
i2c1 = i2c_1;
};
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v3:
- Addressed Wolfram's feedback; rebased atop idr-cleanup series.
Changes in v2: None
drivers/i2c/i2c-core.c | 54 +-
1 file changed, 40
The commit: i2c-core: dt: Pick i2c bus number from i2c alias if
present adds support for automatically picking the bus number based
on the alias ID. Remove the now unnecessary code from i2c-pxa that
did the same thing.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v3: None
Wolfram,
Thanks for the review. New patch was just sent. :)
On Sun, Feb 10, 2013 at 4:19 AM, Wolfram Sang w.s...@pengutronix.de wrote:
+static int i2c_get_number_from_dt(struct i2c_adapter *adap)
i2c_get_id_from_dt()?
Done.
+ if (!dev-of_node)
+ return -1;
with
dynamically (or automatically) allocated IDs.
- Use dev_name(dev-dev) to register for the IRQ; this matches what
the i2c-s3c2410.c does and handles dynamically allocated IDs.
- This change was only compile-tested (corgi_defconfig), since I don't
have access to a board that uses this driver.
Doug
Yavaraj,
On Mon, Feb 4, 2013 at 1:03 AM, Yuvaraj Kumar C D yuvaraj...@gmail.com wrote:
This RFC patch is w.r.t multimaster bus arbitration which is already
being discussing in the mainline.
This patch provides hooks for the i2c multimaster bus arbitration
and to have the arbitration
Lars,
Thank you for your comments / thoughts...
On Thu, Jan 24, 2013 at 1:54 AM, Lars-Peter Clausen l...@metafoo.de wrote:
adc: adc@12D1 {
#io-channel-cells = 1;
io-channel-output-names = adc1, adc2, ...;
ncp15wb473@0 {
compatible =
Lars,
On Wed, Jan 23, 2013 at 4:52 AM, Lars-Peter Clausen l...@metafoo.de wrote:
Few doubts regarding the mappings and child device handling.
Kindly, suggest me better methods.
The patch looks mostly good now. As for the mappings, the problem is that we
currently do not have any device tree
Will,
On Mon, Jan 14, 2013 at 2:47 AM, Will Newton will.new...@gmail.com wrote:
These changes look ok to me. I don't know if patch 4 made it to the
list, I only got a copy via the cc and the only archive I can find of
linux-mmc (gmane) seems to be missing a lot of messages besides this
one.
Sylwester,
Thanks for the review...
On Fri, Jan 11, 2013 at 2:12 PM, Sylwester Nawrocki
sylvester.nawro...@gmail.com wrote:
- ret = of_alias_get_id(np, i2c);
- if (ret 0) {
- dev_err(pdev-dev, failed to get alias id, errno %d\n,
ret);
- return ret;
.
- This change was only compile-tested (corgi_defconfig), since I don't
have access to a board that uses this driver.
Doug Anderson (2):
i2c-core: dt: Pick i2c bus number from i2c alias if present
i2c: pxa: Use i2c-core to get bus number now
drivers/i2c/busses/i2c-pxa.c | 20
The commit: i2c-core: dt: Pick i2c bus number from i2c alias if
present adds support for automatically picking the bus number based
on the alias ID. Remove the now unnecessary code from i2c-pxa that
did the same thing.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v2
{
i2c0 = i2c_0;
i2c1 = i2c_1;
};
Signed-off-by: Doug Anderson diand...@chromium.org
Acked-by: Haojian Zhuang haojian.zhu...@gmail.com
---
Changes in v2: None
drivers/i2c/i2c-core.c | 105 +++-
1 files changed, 77 insertions(+), 28 deletions
Vivek,
Sorry for being so absent from these reviews. I'll try to look over a
few patches today, but please don't hold up anything on account of my
reviews. I'm definitely a bit of an interested bystander in USB land.
;)
In general things look pretty good here. :) One last comment below...
Vivek,
On Mon, Jan 14, 2013 at 12:06 AM, Vivek Gautam
gautamvivek1...@gmail.com wrote:
Is it fine if we don't use macro for SHIFT, earlier code also doesn't use it.
Can we just do like this ..
#define HOST_CTRL0_FSEL_MASK (0x7 16)
#define HOST_CTRL0_FSEL_CLKSEL_50M
disable-wp
because the lack of a wp-gpios property means to use the special
purpose write protect line. On some other mmc devices the lack of
wp-gpios means that write protect should be disabled.
Signed-off-by: Doug Anderson diand...@chromium.org
Acked-by: Seungwon Jeon tgih@samsung.com
tested.
Reposting (with Haojian Zhuang's ack) in the hopes that a maintainer
will pick it up. :)
Doug Anderson (2):
i2c-core: dt: Pick i2c bus number from i2c alias if present
i2c: pxa: Use i2c-core to get bus number now
drivers/i2c/busses/i2c-pxa.c |8 +---
drivers/i2c/i2c-core.c
The commit: i2c-core: dt: Pick i2c bus number from i2c alias if
present adds support for automatically picking the bus number based
on the alias ID. Remove the now unnecessary code from i2c-pxa that
did the same thing.
Signed-off-by: Doug Anderson diand...@chromium.org
Acked-by: Haojian Zhuang
{
i2c0 = i2c_0;
i2c1 = i2c_1;
};
Signed-off-by: Doug Anderson diand...@chromium.org
Acked-by: Haojian Zhuang haojian.zhu...@gmail.com
---
drivers/i2c/i2c-core.c | 105 +++-
1 files changed, 77 insertions(+), 28 deletions(-)
diff --git a/drivers/i2c
Vivek,
On Fri, Jan 11, 2013 at 4:40 AM, Vivek Gautam gautamvivek1...@gmail.com wrote:
+#define HOST_CTRL0_REFCLKSEL_MASK (0x3)
+#define HOST_CTRL0_REFCLKSEL_XTAL (0x0 19)
+#define HOST_CTRL0_REFCLKSEL_EXTL (0x1 19)
+#define HOST_CTRL0_REFCLKSEL_CLKCORE
The next change will remove the code from the dw_mmc-exynos that added
the DW_MCI_QUIRK_NO_WRITE_PROTECT. Keep existing functionality of
having no write protect pin on smdk5250 by adding the disable-wp
property.
Signed-off-by: Doug Anderson diand...@chromium.org
Acked-by: Seungwon Jeon tgih
Olof,
Thanks for your comments.
On Thu, Jan 10, 2013 at 3:01 PM, Olof Johansson o...@lixom.net wrote:
The previous code used the controller-common quirk field to set a
per-controller DW_MCI_QUIRK_NO_WRITE_PROTECT. Is there really need to
do this per-slot? And if so, please explain in the
OS
tree. The third number (that you removed) is already correctly
specified in the dts as samsung,dw-mshc-ciu-div. :)
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Tested-by: Doug Anderson diand...@chromium.org
Acked-by: Doug Anderson diand...@chromium.org
--
To unsubscribe from this list
Vivek,
Nothing really serious below and things look good to me, but figured
I'd put a few nits in (sorry!).
On Fri, Dec 21, 2012 at 12:16 AM, Vivek Gautam gautam.vi...@samsung.com wrote:
diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
grant.lik...@secretlab.ca
Any more thought about this patch-set?
Or does this change seems fine?
These two changes look good to me. For both of them:
Reviewed-by: Doug Anderson diand...@chromium.org
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message
Vivek,
On Wed, Dec 19, 2012 at 9:51 PM, Vivek Gautam gautamvivek1...@gmail.com wrote:
Hi Doug,
On Thu, Dec 20, 2012 at 3:18 AM, Doug Anderson diand...@chromium.org wrote:
Vivek,
Since you're changing the name, I would have expected to see a removal
of the old enum type in this patch. I
On Wed, Dec 19, 2012 at 10:37 PM, Vivek Gautam
gautamvivek1...@gmail.com wrote:
On Thu, Dec 20, 2012 at 5:00 AM, Doug Anderson diand...@chromium.org wrote:
On Tue, Dec 18, 2012 at 6:43 AM, Vivek Gautam gautam.vi...@samsung.com
wrote:
+static void s5p_ehci_phy_enable(struct s5p_ehci_hcd
Vivek,
On Tue, Dec 18, 2012 at 6:43 AM, Vivek Gautam gautam.vi...@samsung.com wrote:
Updating the names of usb-phy types to more generic names:
USB_PHY_TYPE_DEIVCE USB_PHY_TYPE_HOST; and further update
its dependencies.
Since you're changing the name, I would have expected to see a removal
Vivek,
I don't really have a good 1 foot view about how all of the USB
bits fit together, but a few detail-oriented comments below.
On Tue, Dec 18, 2012 at 6:43 AM, Vivek Gautam gautam.vi...@samsung.com wrote:
This patch adds host phy support to samsung-usbphy.c and
further adds support
Vivek,
Again, not a high-level review, but...
On Tue, Dec 18, 2012 at 6:43 AM, Vivek Gautam gautam.vi...@samsung.com wrote:
Adding the phy driver to ehci-s5p. Keeping the platform data
for continuing the smooth operation for boards which still uses it
Signed-off-by: Vivek Gautam
Chris,
On Fri, Nov 30, 2012 at 3:57 AM, Seungwon Jeon tgih@samsung.com wrote:
Doug, Thanks to work.
Looks good to me with other patches.
Acked-by: Seungwon Jeon tgih@samsung.com
Does this series look reasonable to you? I can check back later when
things are less hectic, but I wanted
;
+ regulator-always-on;
+ };
+ };
+ };
};
i2c@12C7 {
--
1.6.6.1
...would love to see LDO7 name fixed up, but otherwise looks good to
me. Thanks!
Acked-by: Doug Anderson diand
-off-by: Doug Anderson diand...@chromium.org
---
Changes in v3:
- Totally removed wp-gpios handling from exynos code.
Changes in v2: None
drivers/mmc/host/dw_mmc-exynos.c | 10 --
1 files changed, 0 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc
-off-by: Doug Anderson diand...@chromium.org
---
Changes in v3: None
Changes in v2:
- Fixed return type from u32 to int
- Return -EINVAL instead of -1
drivers/mmc/host/dw_mmc.c | 34 ++
1 files changed, 34 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host
Seungwon,
On Wed, Nov 28, 2012 at 11:46 PM, Seungwon Jeon tgih@samsung.com wrote:
Hi Doug,
On Thursday, November 29, 2012, Doug Anderson wrote:
Seungwon,
Thanks for the review. See below for comments. If you'd like me to
respin then please let me know. Otherwise I look forward
disable-wp
because the lack of a wp-gpios property means to use the special
purpose write protect line. On some other mmc devices the lack of
wp-gpios means that write protect should be disabled.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v3:
- New for this version
The next change will remove the code from the dw_mmc-exynos that added
the DW_MCI_QUIRK_NO_WRITE_PROTECT. Keep existing functionality of
having no write protect pin on smdk5250 by adding the disable-wp
property.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v3:
- New
Olof / Kukjin,
On Tue, Nov 27, 2012 at 10:05 PM, Olof Johansson o...@lixom.net wrote:
On Wed, Nov 28, 2012 at 02:23:09PM +0900, Kukjin Kim wrote:
Olof Johansson wrote:
On Tue, Nov 27, 2012 at 2:27 PM, Kukjin Kim kgene@samsung.com wrote:
On 11/28/12 07:11, Olof Johansson wrote:
. I have some suggestion below.
Could you check it?
On Friday, November 23, 2012, Doug Anderson wrote:
The exynos code claimed wp-gpio with devm_gpio_request() but never did
anything with it. That meant that anyone using a write protect GPIO
would effectively be write protected all the time
]
(exynos_timer_init+0x100/0x1e8)
[80612a18] (exynos_timer_init+0x100/0x1e8) from [8060d184]
(time_init+0x28/0x38)
[8060d184] (time_init+0x28/0x38) from [8060a754]
(start_kernel+0x1e0/0x3c8)
[8060a754] (start_kernel+0x1e0/0x3c8) from [40008078] (0x40008078)
Signed-off-by: Doug Anderson
-off-by: Doug Anderson diand...@chromium.org
---
drivers/mmc/host/dw_mmc.c | 35 +++
1 files changed, 35 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 5b41348..9c79870 100644
--- a/drivers/mmc/host/dw_mmc.c
On Wed, Nov 21, 2012 at 5:42 PM, Seungwon Jeon tgih@samsung.com wrote:
Hi,
wp-gpios has been implemented in dw_mmc-exynos.c
It can be reused for EXYNOS platform? We need to modify some though.
Yup, I've seen that. Patch 1/2 (mmc: dw_mmc: exynos: Stop claiming
wp-gpio) addressed that.
Jaehoon,
Thanks for the review. See below for comments. I'll plan on a new
patch either Monday or Tuesday when I have a chance to spin and
re-test.
On Wed, Nov 21, 2012 at 5:55 PM, Jaehoon Chung jh80.ch...@samsung.com wrote:
On 11/22/2012 07:03 AM, Doug Anderson wrote:
On some SoCs (like
won't claim the GPIO but will
just set the DW_MCI_QUIRK_NO_WRITE_PROTECT quirk if write protect
won't be used.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v2:
- Nothing new in this patch
drivers/mmc/host/dw_mmc-exynos.c | 12 ++--
1 files changed, 6 insertions(+), 6
-off-by: Doug Anderson diand...@chromium.org
---
Changes in v2:
- Fixed return type from u32 to int
- Return -EINVAL instead of -1
drivers/mmc/host/dw_mmc.c | 35 +++
1 files changed, 35 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers
won't claim the GPIO but will
just set the DW_MCI_QUIRK_NO_WRITE_PROTECT quirk if write protect
won't be used.
Signed-off-by: Doug Anderson diand...@chromium.org
---
drivers/mmc/host/dw_mmc-exynos.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/host
From: Olof Johansson o...@lixom.net
Add support for using UART3 for DEBUG_LL on exynos.
[dianders: added depend on ARCH_EXYNOS.]
Signed-off-by: Olof Johansson o...@lixom.net
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v2:
- Matched Olof's commit message.
- Added
On Tue, Nov 20, 2012 at 11:29 PM, Olof Johansson o...@lixom.net wrote:
On Tue, Nov 20, 2012 at 02:48:58PM -0800, Doug Anderson wrote:
From: Olof Johansson o...@lixom.net
UART3 is used for debugging on exynos5250-snow.
[dianders: cleaned commit message.]
Signed-off-by: Olof
601 - 700 of 710 matches
Mail list logo