s5pv210 and exynos4 are now DT only platforms hence these
entries can now be safely removed from the match table.
Signed-off-by: Sylwester Nawrocki <s.nawro...@samsung.com>
---
drivers/spi/spi-s3c64xx.c |6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/spi/spi-s3c64
Hello Mike,
On 22/12/15 19:38, Mike Turquette wrote:
> Pulled.
>
> Was it necessary to base on -rc5? That required me to update my tree
> from -rc1.
>
> This is not difficult, but it is a bit annoying when it is not strictly
> necessary just to take one PR.
Sorry about that, originally I've
Mike,
On 22/12/15 19:44, Mike Turquette wrote:
> This is superseded by the pull request found in Message-ID:
> <5671a456.9030...@samsung.com>, correct?
The two pull requests are based on same branch, first 2 commits are
tagged with for-4.5-clk-exynos5420 tag and the whole branch is tagged
as
On 30/11/15 11:08, Mutharaju, Prasanna (P.) wrote:
> From: Prasanna Karthik
>
> Remove unneeded variable used to store return value.
>
> Signed-off-by: Prasanna Karthik
Patch applied, thanks.
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The following changes since commit 9f9499ae8e6415cefc4fe0a96ad0e27864353c89:
Linux 4.4-rc5 (2015-12-13 17:42:58 -0800)
are available in the git repository at:
git://linuxtv.org/snawrocki/samsung.git tags/clk-samsung-4.5
for you to fetch changes up to
Krzysztof,
On 09/12/15 14:36, Krzysztof Kozlowski wrote:
> W dniu 09.12.2015 o 19:14, Sylwester Nawrocki pisze:
>> > Adding Stephen and linux-clk at Cc.
>> >
>> > On 09/12/15 05:49, Krzysztof Kozlowski wrote:
>>> >> On 08.12.2015 22:46, Marek Szypro
lock is used by gate/mux clocks during enable/disable calls.
>
> This deadlock, can be reproduced by enabling CPUfreq (ondemand or
> userspace) and decoding video with s5p-mfc driver.
> Signed-off-by: Marek Szyprowski <m.szyprow...@samsung.com>
> CC: sta...@vger.kernel.org # v4
ose that, with ack from clock folks, this can go through samsung-soc?
I guess it makes more sense that making a stable branch with just
this patch to be pulled into arm-soc and clk tree. I'm fine with
applying this patch through arm-soc, but I think we also need
Mike's or Stephen ack
Tomasz Figa <tomasz.f...@gmail.com>
> Cc: Mike Turquette <mturque...@linaro.org>
> Cc: Javier Martinez Canillas <jav...@osg.samsung.com>
> Cc: Thomas Abraham <thomas...@samsung.com>
> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnier...@samsung.com>
Acked-by: Sylw
...@linaro.org>
> Cc: Javier Martinez Canillas <jav...@osg.samsung.com>
> Signed-off-by: Thomas Abraham <thomas...@samsung.com>
> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnier...@samsung.com>
Acked-by: Sylwester Nawrocki <s.nawro...@samsung.com>
--
Regards,
Sylwester
--
T
On 19/11/15 10:16, Tomasz Figa wrote:
> 2015-11-19 13:51 GMT+09:00 Krzysztof Kozlowski :
>> > On 19.11.2015 13:18, Tomasz Figa wrote:
>>> >> However, I don't think we can disable compilation of particular
>>> >> 64-bit SoCs, so maybe there isn't much sense in splitting
Exynos SoC clock file under
>> EXYNOS7_COMMON_CLK? As for all ARM64 SoC there is single defconfig and
>> binary.
>
> Yes, it can be one config symbol for all clocks of ARMv8 Exynos SoCs.
> From my point of view both has some advantages and disadvantages (kernel
> siz
On 20/10/15 12:34, Michael Turquette wrote:
>> diff --git a/include/dt-bindings/clock/exynos5433.h
>> b/include/dt-bindings/clock/exynos5433.h
>> > index 5bd80d5..4f0d566 100644
>> > --- a/include/dt-bindings/clock/exynos5433.h
>> > +++ b/include/dt-bindings/clock/exynos5433.h
>> > @@ -765,7
On 20/10/15 14:24, Krzysztof Kozlowski wrote:
> W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze:
>> > DECON IP requires this clock to access configuration registers.
>> >
>> > Signed-off-by: Andrzej Hajda
>> > ---
>> >
On 12/10/15 08:47, Krzysztof Kozlowski wrote:
>> diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts
>> b/arch/arm/boot/dts/exynos5420-peach-pit.dts
>> > index 8f4d76c..525a93a 100644
>> > --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
>> > +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
On 02/10/15 20:37, Stephen Boyd wrote:
> On 10/02, Sylwester Nawrocki wrote:
...
> Thanks, pulled. I put this patch on top though.
Thanks for taking care of this, I'll make sure such issues
are fixed before sending any future pull requests.
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On 05/10/15 13:07, Arnd Bergmann wrote:
> On Monday 05 October 2015 12:24:40 Sylwester Nawrocki wrote:
>> > On 03/10/15 00:25, Arnd Bergmann wrote:
>>> > > On Thursday 01 October 2015 19:17:27 Mauro Carvalho Chehab wrote:
>>>>> > >> > diff
On 03/10/15 00:25, Arnd Bergmann wrote:
> On Thursday 01 October 2015 19:17:27 Mauro Carvalho Chehab wrote:
>> > diff --git a/drivers/media/platform/exynos4-is/mipi-csis.c
>> > b/drivers/media/platform/exynos4-is/mipi-csis.c
>> > index d74e1bec3d86..4b85105dc159 100644
>> > ---
The following changes since commit 6ff33f3902c3b1c5d0db6b1e2c70b6d76fba357f:
Linux 4.3-rc1 (2015-09-12 16:35:56 -0700)
are available in the git repository at:
git://linuxtv.org/snawrocki/samsung.git tags/clk-samsung-4.4
for you to fetch changes up to
On 29/09/15 16:42, Mauro Carvalho Chehab wrote:
> Em Tue, 29 Sep 2015 16:32:58 +0200
> Sylwester Nawrocki <s.nawro...@samsung.com> escreveu:
>
>> > Adding linux-samsung-soc mailing list at Cc.
>
> Never mind. My mistake: I forgot to reinstall the modules (mwifiex a
Adding linux-samsung-soc mailing list at Cc.
On 29/09/15 16:01, Mauro Carvalho Chehab wrote:
> Em Tue, 29 Sep 2015 15:37:51 +0200
> Sylwester Nawrocki <s.nawro...@samsung.com> escreveu:
>
>> Hi Mauro,
>>
>> On 29/09/15 14:43, Mauro Carvalho Chehab wrote:
>>
Hi Mauro,
On 21/09/15 13:41, Mauro Carvalho Chehab wrote:
> Btw, I just got a Samsung TM1 device, with seems to be using an arm64
> SoC. Is this driver providing support for its camera?
The TM1 device (Z3) is based on a Qualcomm 64-bit SoC. The $subject
patch adds support for a standalone JPEG
>
> Signed-off-by: Arnd Bergmann <a...@arndb.de>
> ---
For:
drivers/media/platform/exynos4-is/fimc-lite.c
drivers/media/platform/s3c-camif/camif-capture.c
Acked-by: Sylwester Nawrocki <s.nawro...@samsung.com>
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for timestamps across suspend or settimeofday().
>
> This changes the driver to use the normal v4l2_get_timestamp()
> function like all other drivers.
>
> Signed-off-by: Arnd Bergmann <a...@arndb.de>
Acked-by: Sylwester Nawrocki <s.nawro...@samsung.com>
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On 26/08/15 05:30, Alim Akhtar wrote:
> This patch series are minor improvement over the current
> exynos7 clock file. This fix some bugs and update the clock
> bits as per user manual.
That one applied as well, thanks.
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On 10/09/15 10:44, Alim Akhtar wrote:
> Currently there are lots of ambiguity between clock names in clock file
> and in user manual, which leads to lots of confusion for the reviewers.
> This series attempts to cleanup the exynos7 clock file as per
> user manual naming convention.
> This also
Turquette mturque...@baylibre.com
Cc: Javier Martinez Canillas javier.marti...@collabora.co.uk
Cc: Thomas Abraham thomas...@samsung.com
Reported-by: Dan Carpenter dan.carpen...@oracle.com
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Sylwester Nawrocki s.nawro
On 07/22/2015 08:41 AM, Krzysztof Kozlowski wrote:
On 22.07.2015 07:42, Stephen Boyd wrote:
On 06/12, Krzysztof Kozlowski wrote:
[...]
Signed-off-by: Krzysztof Kozlowskik.kozlow...@samsung.com
Cc:sta...@vger.kernel.org
Fixes: c63c57433003 (ARM: dts: Add ADC's dt data to read raw data for
(CLK_TSADC, tsadc, aclk133, E4X12_GATE_BUS_FSYS1, 16, 0, 0),
GATE(CLK_MIPI_HSI, mipi_hsi, aclk133, GATE_IP_FSYS, 10, 0, 0),
GATE(CLK_CHIPID, chipid, aclk100, E4X12_GATE_IP_PERIR, 0, 0, 0),
GATE(CLK_SYSREG, sysreg, aclk100, E4X12_GATE_IP_PERIR, 1,
--
Sylwester Nawrocki
+++
1 file changed, 50 insertions(+)
I guess you prefer to have this whole series applied through one,
e.g samsung-soc tree? If so, here is my ack.
Acked-by: Sylwester Nawrocki s.nawro...@samsung.com
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On 09/07/15 02:23, Krzysztof Kozlowski wrote:
drivers/clk/samsung/clk-exynos4.c | 2 ++
1 file changed, 2 insertions(+)
Patch looks good to me.
Reviewed-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Hi Tomasz and Sylwester,
Any comments on this version of
On 04/06/15 01:05, Michael Turquette wrote:
One small thing: clk-next isn't considered stable. I had some stuff in
there (Stephen's amba assigned-clock-rates patch) which I had to pull
out (no ACK from maintainer) and it crept back in because this PR was
based on top of it. No big deal
The following changes since commit 20db7092e478c33a2bf5254063c51f5db6443959:
Merge branch 'clk-next-hi6220' into clk-next (2015-05-27 22:06:42 -0700)
are available in the git repository at:
git://linuxtv.org/snawrocki/samsung.git tags/clk-samsung-for-4.2
for you to fetch changes up to
...@broadcom.com
Need your ACK for this patch.
For
drivers/media/platform/exynos4-is/Kconfig
drivers/video/fbdev/exynos/Kconfig
Acked-by: Sylwester Nawrocki s.nawro...@samsung.com
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Sylwester
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Hi Chanwoo,
On 27/04/15 13:36, Chanwoo Choi wrote:
From: Jonghwa Lee jonghwa3@samsung.com
Some clocks are required being unmasked for suspend-to-ram. Otherwise,
PMU (Power Management Unit) will stick and power line never down.
Signed-off-by: Jonghwa Lee jonghwa3@samsung.com
Hello,
On 28/04/15 11:25, Chanwoo Choi wrote:
Hi Valentin,
On Mon, Apr 27, 2015 at 3:31 PM, Valentin Rothberg
valentinrothb...@gmail.com wrote:
Hi Chanwoo,
this is a kind reminder that the issue mentioned below is still
present and made its way to v4.1-rc1.
I sent the patch[1] to
On 16/04/15 12:10, Charles Keepax wrote:
Commit 523c5b89640e (i2c: Remove support for legacy PM) removed the PM
ops from the bus type, which causes the pm operations on the s3c2410
adapter device to fail (-ENOSUPP in rpm_callback). The adapter device
doesn't get bound to a driver and as such
= 0x, },
};
I'm going to tag this patch for inclusion in the stable tree and send
it to Mike or Stephen with other clk/samsung fixes after v4.1-rc1 is
released.
Mike/Stephen, if you're willing to take this patch earlier here is my:
Acked-by: Sylwester Nawrocki s.nawro...@samsung.com
Hello,
On 31/03/15 22:00, Javier Martinez Canillas wrote:
On 03/31/2015 04:38 PM, Abhilash Kesavan wrote:
javier.marti...@collabora.co.uk wrote:
Unfortunately I don't fully understand why this clock needs to be
enabled. It would be good if someone at Samsung can explain in
more detail what
Hello Javier,
On 01/04/15 13:44, Javier Martinez Canillas wrote:
On 04/01/2015 01:03 PM, Sylwester Nawrocki wrote:
On 31/03/15 22:00, Javier Martinez Canillas wrote:
On 03/31/2015 04:38 PM, Abhilash Kesavan wrote:
javier.marti...@collabora.co.uk wrote:
I had a look at this some more today
Hello Javier,
On 27/03/15 15:21, Javier Martinez Canillas wrote:
Commit ae43b3289186 (ARM: 8202/1: dmaengine: pl330: Add runtime Power
Management support v12) added pm support for the pl330 dma driver but
it makes the clock for the Exynos5420 MDMA0 DMA controller to be gated
during suspend
Hello Mike,
Please pull the following changes, it seems all we have for next release
for clk/samsung.
The following changes since commit 5bc43f9b615f02c57b1ca782128ef5daf055:
Merge branch 'clk-fixes' into clk-next (2015-03-09 14:23:45 -0700)
are available in the git repository at:
;
+ assigned-clock-rates = 0,
+ 0,
+ 1920;
The patch looks good, except it would be more appropriate to move the
above properties to clock_audss { }; node in this file.
With that change feel free to add:
Reviewed-by: Sylwester
;
}
The patch looks good to me, Robert could you comment on that?
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
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Odroid X2/U3 sound support can now be specified in device tree using
the simple card binding, make SND_SOC_ODROIDX2 select SND_SIMPLE_CARD
to ensure there are always required drivers in place.
Reported-by: Tobias Jakobi liquid.a...@gmx.net
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
On 12/03/15 00:34, Stephen Boyd wrote:
On 03/01/15 18:15, Inha Song wrote:
This patch add CLKOUT driver support for Exynos3250 SoC.
Exynos3250 SoC PMU_DEBUG is the same with Exynos4's PMU_DEBUG
including CLKOUT mux. So, We can use the exynos4's clkout init
function for Exynos3250
On 02/03/15 14:17, Beata Michalska wrote:
From: Tomasz Figa t.f...@samsung.com
Add clock controller for CMU ISP clock domain on Exynos3250,
providing clocks for FIMC-IS subsystem.
[b.michalska:use samsung_cmu_register_one to register
the provider; updated DT binding documentation]
reduces the risk of accessing the ISP CMU
registers while the ISP power domain remains turned off
(i.e. through the common clock framework by clk_summary)
Signed-off-by: Beata Michalska b.michal...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Acked-by: Sylwester Nawrocki s.nawro
addition
of more clocks, especially that it fixes a real bug.
Please feel free to add:
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
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-by: Andrzej Hajda a.ha...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
arch/arm/mach-exynos/pm_domains.c | 27 +++
1 file changed, 23 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-exynos/pm_domains.c
b/arch/arm/mach-exynos
Hi,
On 04/03/15 13:24, Kishon Vijay Abraham I wrote:
This patch doesn't apply on 4.0-rc1. Can to refresh it to mainline
latest?
It depends on Axel's previous patch: phy: exynos-mipi-video: Fixup
the test for state-regmap. Are there any issues even with that patch
applied ?
--
Thanks
is concerned, it may take
some time until I get around and fix all the issues so I tested your
patch on v3.19. It all works well as expected.
Acked-by: Sylwester Nawrocki s.nawro...@samsung.com
Tested-by: Sylwester Nawrocki s.nawro...@samsung.com
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return value.
Signed-off-by: Axel Lin axel@ingics.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
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On 26/02/15 04:48, Axel Lin wrote:
syscon_regmap_lookup_by_phandle() returns ERR_PTR on error.
Thus don't use null test against state-regmap.
Signed-off-by: Axel Lin axel@ingics.com
Thanks for the patch, I had this on my todo list.
Acked-by: Sylwester Nawrocki s.nawro...@samsung.com
Hi,
On 17/12/14 07:22, Tony K Nadackal wrote:
Bits EXYNOS4_DEC_MODE and EXYNOS4_ENC_MODE do not get cleared
on software reset. These bits need to be cleared explicitly.
Signed-off-by: Tony K Nadackal tony...@samsung.com
---
This patch is created and tested on top of linux-next-20141210.
On 17/12/14 07:25, Tony K Nadackal wrote:
In case of corrupt images, multiple interrupts may occur
due to different error scenarios.
Since we are removing the src and dest buffers in the first
interrupt itself, crash occurs in the second error interrupts.
Disable the global interrupt
On 20/02/15 01:36, Andreas Färber wrote:
So it seems the mclk is not always set up properly by the kernel,
relying on firmware. Who's in charge of setting that clock up?
Right, it seems audio is only working due the firmware doing some previous
setup. Probably it works on every boot if
On 10/02/15 13:46, Javier Martinez Canillas wrote:
This debugfs code iterates over list of generic_pm_domains (gpd_list). I
cannot find function for translating from genpd to its platform device
so only genpd-name can be printed.
Then why power domains aren't just named with the
On 07/02/15 12:53, Inki Dae wrote:
This patch fixes the issue that the try to get a phy object is failed
to enable mipi phy.
System and power management unit registers should be controlled by
syscon framework. So this patch removes existing phy framework based
codes and adds syscon support
On 09/02/15 13:17, Inki Dae wrote:
Instead I just added syscon support to the PHY layer, it's not perfect
but fixes the issue for both DSI and CSI and doesn't strip the PHY layer
which could potentially be useful.
Ah, Right. I didn't check your patch set. Your way is a better idea than
my
On 05/02/15 20:41, Mark Brown wrote:
On Tue, Feb 03, 2015 at 03:06:22PM +0100, Sylwester Nawrocki wrote:
I2S1, I2S2 on Exynos4 SoC series have limited functionality compared
to I2S0, samsung,s3c6410-i2s compatible should be used for them.
I've applied this even though I really shouldn't
On 05/02/15 08:44, Pankaj Dubey wrote:
+static struct samsung_gate_clock apollo_gate_clks[] __initdata = {
+
+ /* ENABLE_PCLK_APOLLO */
+ GATE(CLK_PCLK_ASAPBMST_CSSYS_APOLLO, pclk_asapbmst_cssys_apollo,
+ div_pclk_dbg_apollo, ENABLE_PCLK_APOLLO,
+ 2,
Hi Mike,
This pull request includes driver for clock controller of the Exynos
5433 SoC. As the hardware is quite complex, with many peripherals and
corresponding clock management units the driver is rather huge. I guess
it will require a bit more cleanups than last time to balance lines
Hi Chanwoo,
On 02/02/15 15:23, Chanwoo Choi wrote:
+/*
+ * ATLAS_PLL APOLLO_PLL MEM0_PLL MEM1_PLL BUS_PLL MFC_PLL
+ * MPHY_PLL G3D_PLL DISP_PLL ISP_PLL
+ */
+static struct samsung_pll_rate_table exynos5443_pll_rates[] = {
+ PLL_35XX_RATE(25, 625, 6, 0),
+
Hi Chanwoo,
On 02/02/15 15:24, Chanwoo Choi wrote:
This patch adds the mux/divider/gate clocks for CMU_BUS{0|1|2} domains
which contain global data buses clocked at up the 400MHz. These blocks
transfer data between DRAM and various sub-blocks. These clock domains
also contain global
to CMU_DISP should be always on state.
Are you sure we need to add anything to CMU_MIF in this patch ?
Also, CMU_DISP must need the source clock of 'sclk_hdmi_spdif_disp'
from CMU_TOP domain. This patch adds the clocks of CMU_TOP related to HDMI.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
On 03/02/15 14:11, Mark Brown wrote:
On Tue, Feb 03, 2015 at 12:04:16PM +0100, Sylwester Nawrocki wrote:
Sorry, I should've said - I applied the ASoC patches, not these.
Shall I take 13 to 15 DT patches in Samsung tree?
Patches 13, 14 use macro definitions which are added in patch which
-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi |6 ++
arch/arm/boot/dts/exynos4412-odroid-common.dtsi |8 ++--
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts
I2S1, I2S2 on Exynos4 SoC series have limited functionality compared
to I2S0, samsung,s3c6410-i2s compatible should be used for them.
Cc: sta...@vger.kernel.org
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi |4 ++--
1 file changed, 2 insertions
Now when the CDCLK I2S output clock can be handled through the clock
API the Odroid X2/U3 can be switched to the simple-audio-card DT binding.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi |3 +++
arch/arm/boot/dts/exynos4412
On 03/02/15 05:27, Kukjin Kim wrote:
Mark Brown wrote:
On Wed, Jan 14, 2015 at 07:42:40PM +0100, Sylwester Nawrocki wrote:
Clock related properties are added to the Exynos4 I2S device nodes
so they can be referred to as clock providers. Missing i2s_opclk1
clock is added to the I2S0 node
Hi Chanwoo,
On 02/02/15 14:01, Chanwoo Choi wrote:
This patch adds devicetree binding document for Exynos5433 SoC system clock
controller.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
Acked-by: Inki
Hi Kukjin,
On 16/01/15 18:30, Sylwester Nawrocki wrote:
This is required to fix regression after introducing the PMU device
nodes required for the PMU driver modified in commit
14fc8b93d47323561edf5d482d4a4b3ee1b90286
(ARM: EXYNOS: Add platform driver support for Exynos PMU).
This change
On 02/02/15 15:08, Chanwoo Choi wrote:
OK, I'll add more following information:
I'll send only patch1 with following information.
+ - clocks: list of clock identifiers which are fed as the input to
+ the given clock controller. Please refer the next section to
+ find the input
Hi Chanwoo,
On 02/02/15 16:51, Chanwoo Choi wrote:
On Mon, Feb 2, 2015 at 11:40 PM, Sylwester Nawrocki
s.nawro...@samsung.com wrote:
On 02/02/15 15:08, Chanwoo Choi wrote:
OK, I'll add more following information:
I'll send only patch1 with following information.
+ - clocks: list
Hi Chanwoo,
On 29/01/15 00:38, Chanwoo Choi wrote:
...
Right. current samsung clock drivers cannot show the hierarchy among clock
domains in DT.
IOW, there is currently
no way to ensure proper registration order of the CMUs (clock domains).
This may be important in some cases.
To address
Hi Chanwoo,
On 23/01/15 21:54, Chanwoo Choi wrote:
On Sat, Jan 24, 2015 at 2:40 AM, Sylwester Nawrocki
s.nawro...@samsung.com wrote:
On 21/01/15 07:26, Chanwoo Choi wrote:
+/* list of all parent clock list */
+PNAME(mout_bus_pll_user_p) = { fin_pll, sclk_bus_pll, };
...
+
+static
Hi Mike,
The following changes since commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672:
Linux 3.19-rc1 (2014-12-20 17:08:50 -0800)
are available in the git repository at:
git://linuxtv.org/snawrocki/samsung.git tags/v3.20-exynos-clk
for you to fetch changes up to
On 23/01/15 06:03, Inha Song wrote:
+static int trats2_aif1_startup(struct snd_pcm_substream *substream)
+{
+ struct snd_soc_pcm_runtime *rtd = substream-private_data;
+ struct trats2_machine_priv *priv = snd_soc_card_get_drvdata(rtd-card);
+ int ret;
+
+ ret =
On 21/01/15 07:26, Chanwoo Choi wrote:
+/* list of all parent clock list */
+PNAME(mout_bus_pll_user_p) = { fin_pll, sclk_bus_pll, };
...
+
+static struct samsung_mux_clock top_mux_clks[] __initdata = {
+ MUX(CLK_MOUT_BUS_PLL_USER, mout_bus_pll_user, mout_bus_pll_user_p,
+
On 23/01/15 06:03, Inha Song wrote:
This patch add WM1811 audio codec, I2S interface and the sound
machine nodes to enable audio on exynos4412-trats2 board.
Signed-off-by: Inha Song ideal.s...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
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On 23/01/15 06:03, Inha Song wrote:
This patch add Trats2 audio subsystem bindings document.
Signed-off-by: Inha Song ideal.s...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
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the body
On 22/01/15 12:18, Inha Song wrote:
This patch add Trats2 audio subsystem bindings document.
Signed-off-by: Inha Song ideal.s...@samsung.com
Acked-by: Sylwester Nawrocki s.nawro...@samsung.com
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On 22/01/15 12:18, Inha Song wrote:
This patch set clock out parent to XUSBXTI.
Signed-off-by: Inha Song ideal.s...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index
On 22/01/15 12:17, Inha Song wrote:
diff --git a/sound/soc/samsung/Kconfig b/sound/soc/samsung/Kconfig
index fc67f97..8031423 100644
--- a/sound/soc/samsung/Kconfig
+++ b/sound/soc/samsung/Kconfig
@@ -245,3 +245,11 @@ config SND_SOC_ARNDALE_RT5631_ALC5631
depends on SND_SOC_SAMSUNG
Hi Chanwoo,
On 21/01/15 07:26, Chanwoo Choi wrote:
This patch adds the support for CMU (Clock Management Units) of Exynos5433
which is 64bit SoC and has Octa-cores. This patch supports necessary clocks
(PLL/MMC/UART/MCT/I2C/SPI) for kernel boot and includes binding documentation
for
Hi,
On 19/01/15 10:48, Inha Song wrote:
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
+ sound {
+ compatible = samsung,trats2-audio;
+ assigned-clocks = pmu_system_controller 0;
+ assigned-clock-parents
Hi,
On 21/01/15 06:58, Inha Song wrote:
Add MAX98090 audio codec, I2S interface and the sound nodes to support
audio on Odroid-XU3 board.
Signed-off-by: Inha Song ideal.s...@samsung.com
---
arch/arm/boot/dts/exynos5422-odroidxu3.dts | 34
++
1 file changed,
option in this case.
Acked-by: Sylwester Nawrocki s.nawro...@samsung.com
--
Thanks,
Sylwester
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On 15/01/15 02:50, Chanwoo Choi wrote:
This patch adds the divider clock id for Exynos4 memory bus frequency.
The clock id is used fo DVFS (Dynamic Voltage/Frequency Scaling)
feature of exynos memory bus frequency.
Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Tomasz Figa tomasz.f
Hi Tuashar,
On 17/01/15 06:21, Tushar Behera wrote:
On Thu, Jan 15, 2015 at 3:42 AM, Sylwester Nawrocki
s.nawro...@samsung.com wrote:
Ensure the I2SMOD, I2SPSR registers, which are also exposed through
clk API are only accessed with the i2s-spinlock spinlock held.
Signed-off-by: Sylwester
Hi Mike,
Please find below a few clk updates for exynos7 SoC. I kept them on
a separate branch as there will likely be depending dts patches.
Please pull for 3.20.
The following changes since commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672:
Linux 3.19-rc1 (2014-12-20 17:08:50 -0800)
are
Hi,
On 15/01/15 06:49, Padma Venkat wrote:
I posted patches after re-basing on your tree and after incorporating
all comments from Vivek.
Below is the link
http://www.spinics.net/lists/linux-samsung-soc/msg40992.html
Can you pick the patches?
Sure, I'm not forgetting it. I've updated the
Tidy up the samsung_i2s_get_driver_data() function by using
IS_ENABLE() instead of #ifdef and add missing braces for
the 'else' part. Also ensure we are not dereferencing NULL
'match' pointer.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
sound/soc/samsung/i2s.c |9
These functions may fail so let's properly report any errors.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
sound/soc/samsung/i2s.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index e5473ee
(0x100) register region size in the driver.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
sound/soc/samsung/i2s.c | 45 +++--
1 file changed, 7 insertions(+), 38 deletions(-)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
The code to get pointer to the other DAI is repeated multiple
times. Add a helper function and use it instead.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
sound/soc/samsung/i2s.c | 24 +++-
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git
is enabled it can idle the device by turning off the clock.
Correcting this issue is left for a separate patch series, as we need to
ensure the BUSCLK clock is always enabled when required.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
sound/soc/samsung/i2s.c | 25
Acquire the I2S interface clock in driver probe() callback
as it's a per-device not a per-DAI clock. While at it switch
to the resource managed clk_get().
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
---
sound/soc/samsung/i2s.c | 19 +++
1 file changed, 7 insertions
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