[linux-sunxi] [PATCH v2 20/26] drm: sun4i: tv: Add PAL output standard

Now that we have support for the composite output, we can start adding new supported standards. Start with PAL, and we will add other eventually. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_tv.c | 42 1

[linux-sunxi] [PATCH v2 08/26] clk: sun5i: add DRAM gates

The Allwinner SoCs have a gate controller to gate the access to the DRAM clock to the some devices that need to access the DRAM directly (mostly display / image related IPs). Use a simple gates driver to support the one found in the A13 / R8 SoCs. Signed-off-by: Maxime Ripard

[linux-sunxi] [PATCH v2 07/26] clk: sunxi: Add TCON channel1 clock

The TCON is a controller generating the timings to output videos signals, acting like both a CRTC and an encoder. It has two channels depending on the output, each channel being driven by its own clock (and own clock controller). Add a driver for the channel 1 clock. Signed-off-by: Maxime

[linux-sunxi] [PATCH v2 18/26] drm: sun4i: Add RGB output

One of the A10 display pipeline possible output is an RGB interface to drive LCD panels directly. This is done through the first channel of the TCON that will output our video signals directly. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/Makefile

[linux-sunxi] [PATCH v2 11/26] ARM: sun5i: Add DRAM gates

The DRAM gates control whether the image / display devices on the SoC have access to the DRAM clock or not. Enable it. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a10s.dtsi | 7 --- arch/arm/boot/dts/sun5i-a13.dtsi | 2 +-

[linux-sunxi] [PATCH v2 05/26] clk: sunxi: Add display and TCON0 clocks driver

The A10 SoCs and its relatives has a special clock controller to drive the display engines (both frontend and backend), that have a lot in common with the clock to drive the first TCON channel. Add a driver to support both. Signed-off-by: Maxime Ripard ---

[linux-sunxi] [PATCH v2 02/26] reset: Make reset_control_ops const

The ops pointer is holding a pointer to a structure that is usually not modified. Make it const. Signed-off-by: Maxime Ripard --- include/linux/reset-controller.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[linux-sunxi] [PATCH v2 09/26] ARM: sun5i: dt: Add pll3 and pll7 clocks

Enable the pll3 and pll7 clocks in the DT that are used to drive the display-related clocks. Signed-off-by: Maxime Ripard Acked-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun5i.dtsi | 43 +++ 1 file changed,

[linux-sunxi] [PATCH v2 26/26] DO NOT MERGE: ARM: sun5i: chip: Enable the LCD panel

Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-r8-chip.dts | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts index c26c095b42c6..147c39106f63 100644 ---

[linux-sunxi] [PATCH v2 23/26] ARM: sun5i: chip: Enable the TV Encoder

The CHIP has a composite output available muxed with the microphone in the micro-jack plug. Enable the composite output in its DTS. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-r8-chip.dts | 12 1 file changed, 12 insertions(+) diff

[linux-sunxi] [PATCH v2 25/26] drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS

Add support for the Olimex LCD-OLinuXino-4.3TS panel to the DRM simple panel driver. It is a 480x272 panel connected through a 24-bits RGB interface. Signed-off-by: Maxime Ripard --- .../display/panel/olimex,lcd-olinuxino-43-ts.txt | 7 ++

[linux-sunxi] [PATCH v2 01/26] reset: Move DT cell size check to the core

The core currently doesn't check that the DT cell size matches what the driver declares, which means that every xlate function needs to duplicate that check. Make sure that of_reset_control_get checks for this to avoid duplication and errors. Signed-off-by: Maxime Ripard

[linux-sunxi] [PATCH v2 21/26] drm: sun4i: tv: Add NTSC output standard

Add the settings to support the NTSC standard. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_tv.c | 45 1 file changed, 45 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c

[linux-sunxi] [PATCH v2 06/26] clk: sunxi: Add PLL3 clock

The A10 SoCs and relatives have a PLL controller to drive the PLL3 and PLL7, clocked from a 3MHz oscillator, that drives the display related clocks (GPU, display engine, TCON, etc.) Add a driver for it. Signed-off-by: Maxime Ripard ---

[linux-sunxi] [PATCH v2 17/26] drm: sun4i: Add DT bindings documentation

The display pipeline of the Allwinner A10 is involving several loosely coupled components. Add a documentation for the bindings. Signed-off-by: Maxime Ripard --- .../bindings/display/sunxi/sun4i-drm.txt | 228 + 1 file changed,

[linux-sunxi] [PATCH v2 19/26] drm: sun4i: Add composite output

Some Allwinner SoCs have an IP called the TV encoder that is used to output composite and VGA signals. In such a case, we need to use the second TCON channel. Add support for that TV encoder. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/Makefile |

[linux-sunxi] [PATCH v2 22/26] ARM: sun5i: r8: Add display blocks to the DTSI

The TCON, tv-encoder and display engine backends and frontends are combined to create our display pipeline. Add them to the R8 DTSI. It's supposed to be perfectly compatible with the A10s and A13, but since we haven't tested it on them yet, it's safer to just enable it on the R8. Eventually, it

[linux-sunxi] [PATCH v2 15/26] drm/modes: Support modes names on the command line

The drm subsystem also uses the video= kernel parameter, and in the documentation refers to the fbdev documentation for that parameter. However, that documentation also says that instead of giving the mode using its resolution we can also give a name. However, DRM doesn't handle that case at the

[linux-sunxi] [PATCH v2 00/26] drm: Add Allwinner A10 display engine support

Hi everyone, The Allwinner SoCs (except for the very latest ones) all share the same set of controllers, loosely coupled together to form the display pipeline. Depending on the SoC, the number of instances of the controller will change (2 instances of each in the A10, only one in the A13, for

[linux-sunxi] [PATCH v2 03/26] clk: Add regmap support

From: Matthias Brugger Some devices like SoCs from Mediatek need to use the clock through a regmap interface. This patch adds regmap support for the simple multiplexer clock, the divider clock and the clock gate code. Signed-off-by: Matthias Brugger

[linux-sunxi] [PATCH v2 13/26] drm/fb_cma_helper: Remove implicit call to disable_unused_functions

The drm_fbdev_cma_init function always calls the drm_helper_disable_unused_functions. Since it's part of the usual probe process, all the drivers using that helper will end up having their encoder and CRTC disable functions called at probe if their device has not been reported as enabled. This

[linux-sunxi] [PATCH v2 24/26] devicetree: Add olimex vendor prefix

Olimex is an open source hardware boards vendors based in Bulgaria. Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt

[linux-sunxi] [PATCH v2 10/26] ARM: sun5i: a13: Add display and TCON clocks

Enable the display and TCON (channel 0 and channel 1) clocks that are going to be needed to drive the display engine, tcon and TV encoders. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13.dtsi | 38 +-

[linux-sunxi] [PATCH v2 04/26] clk: composite: Add unregister function

The composite clock didn't have any unregistration function, which forced us to use clk_unregister directly on it. While it was already not great from an API point of view, it also meant that we were leaking the clk_composite structure allocated in clk_register_composite. Add a

[linux-sunxi] [PATCH v2 14/26] drm/modes: Rewrite the command line parser

Rewrite the command line parser in order to get away from the state machine parsing the video mode lines. Hopefully, this will allow to extend it more easily to support named modes and / or properties set directly on the command line. Signed-off-by: Maxime Ripard

[linux-sunxi] [PATCH v2 16/26] drm: Add Allwinner A10 Display Engine support

The Allwinner A10 and subsequent SoCs share the same display pipeline, with variations in the number of controllers (1 or 2), or the presence or not of some output (HDMI, TV, VGA) or not. Add a driver with a limited set of features for now, and we will hopefully support all of them eventually

[linux-sunxi][PATCH v3 3/5] ARM: dts: sun7i: Add Itead Ibox support

From: Marcus Cooper The Itead Ibox is a multi board device based on the Allwinner A20 SoC. It contains the A20 Itead Core module and a base board for the external interfaces. The core module comes with 4GB NAND and 1GB DDR RAM. The base board to which the core board is

[linux-sunxi][PATCH v3 4/5] ARM: dts: sun4i: Add Itead A10 Core support

From: Marcus Cooper The A10 Itead Core module comes with 4GB NAND and 1GB DDR RAM. All of the I/O interfaces are exposed via 4 groups of 2*30 1mm pitched female headers. Signed-off-by: Marcus Cooper --- arch/arm/boot/dts/sun4i-a10-itead-core.dtsi |

[linux-sunxi][PATCH v3 1/5] ARM: dts: sunxi: Add sunxi-itead-core-common.dtsi

From: Marcus Cooper Itead have a core module board that can be populated with either an Allwinner A10 or A20 SoC. This patch creates a common dtsi which these boards can use. Signed-off-by: Marcus Cooper ---

[linux-sunxi] Re: [PATCH] clk: sunxi: Fix mod0 clock calculation to return stable results and check divisor size limits

Hi, 2016-01-13 12:18 GMT+01:00 Maxime Ripard : > Sorry for the reviewing delay. No problem at all, thanks for the review! > On Mon, Dec 28, 2015 at 06:31:32PM +0100, Marcus Weseloh wrote: >> This patch fixes some problems in the mod0 clock calculation. It has >>

[linux-sunxi] Re: orangepi mirror

On Thu, Jan 14, 2016 at 8:40 AM, Thomas Kaiser wrote: > Benjamin Henrion wrote: > >> The few images I tested were full of bugs and needed a kernel update >> to get latest Loboris.eu version. > > > Maybe it's a good idea to point out that while loboris' images/settings

[linux-sunxi][PATCH v3 0/5] ARM: dt: sunxi: Add Itead Ibox support

From: Marcus Cooper Hi All, this patch series is an extension of the initial patch delivery for the Itead Ibox as found here https://groups.google.com/d/msg/linux-sunxi/GR_co3ObW8s/0BTPQljmAAAJ. There seems to be a few Itead variants out there based on their A10/A20 core

[linux-sunxi][PATCH v3 5/5] ARM: dts: sun4i: Itead Iteaduino to use common code

From: Marcus Cooper Convert the Itead Iteaduino A10 to use the new common itead core dtsi. Signed-off-by: Marcus Cooper --- .../boot/dts/sun4i-a10-itead-iteaduino-plus.dts| 93 +- 1 file changed, 2 insertions(+), 91

[linux-sunxi][PATCH v3 2/5] ARM: dts: sun7i: Add Itead A20 Core support

From: Marcus Cooper The A20 Itead Core module comes with 4GB NAND and 1GB DDR RAM. All of the I/O interfaces are exposed via 4 groups of 2*30 1mm pitched female headers. Signed-off-by: Marcus Cooper --- arch/arm/boot/dts/sun7i-a20-itead-core.dtsi |

[linux-sunxi] Re: patch for I2S test on 'mripard' A20 wip-i2s branch

On Wednesday, January 13, 2016 at 6:49:03 AM UTC+1, Andrea Venturi wrote: > hello, > > > i've tested the experimental github branch for I2S DAI mainline linux driver > on: >  https://github.com/mripard/linux/tree/sunxi/wip/a20-i2s > > > > my HW setup actually is: > an Olimex A20-SOM with

[linux-sunxi] Re: orangepi mirror

Benjamin Henrion wrote: > The naming convention (OrangePi 2, Plus, Minus, etc...) is just a > nightmare, especially to understand which image is compatible with > which, considering that the SOC is the same for all. And it won't get better with the new H3 based Orange Pi One/Lite ;) But

[linux-sunxi] ATTN Maxime: ASoC: sun4i-codec: Remove redundant SND_PCM_RATE_KNOT

Maxime, Can I ask what the real purpose of this patch was? ASoC: sun4i-codec: Remove redundant SND_PCM_RATE_KNOT All it does is stop the codec

[linux-sunxi] [PATCH] fexc: do not abort on a huge version number

Some A33 evb boards have fex files with version = "100", even in the official SDK. It seems that it's not a error at all. Now only a warning will be printed in this situation. --- script_bin.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/script_bin.c b/script_bin.c index

[linux-sunxi] Re: [PATCH v2 05/26] clk: sunxi: Add display and TCON0 clocks driver

On Thu, Jan 14, 2016 at 04:24:48PM +0100, Maxime Ripard wrote: > The A10 SoCs and its relatives has a special clock controller to drive the > display engines (both frontend and backend), that have a lot in common with > the clock to drive the first TCON channel. > > Add a driver to support both.

[linux-sunxi] Re: [PATCH v2 06/26] clk: sunxi: Add PLL3 clock

On Thu, Jan 14, 2016 at 04:24:49PM +0100, Maxime Ripard wrote: > The A10 SoCs and relatives have a PLL controller to drive the PLL3 and > PLL7, clocked from a 3MHz oscillator, that drives the display related > clocks (GPU, display engine, TCON, etc.) > > Add a driver for it. > > Signed-off-by:

[linux-sunxi] Re: [PATCH v2 17/26] drm: sun4i: Add DT bindings documentation

On Thu, Jan 14, 2016 at 04:25:00PM +0100, Maxime Ripard wrote: > The display pipeline of the Allwinner A10 is involving several loosely > coupled components. > > Add a documentation for the bindings. > > Signed-off-by: Maxime Ripard > --- >

[linux-sunxi] Re: [PATCH v2 24/26] devicetree: Add olimex vendor prefix

On Thu, Jan 14, 2016 at 04:25:07PM +0100, Maxime Ripard wrote: > Olimex is an open source hardware boards vendors based in Bulgaria. > > Signed-off-by: Maxime Ripard > --- > Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + > 1 file changed, 1

[linux-sunxi] Re: [PATCH 1/5] power: axp818: Remove duplicate register definition macros

Hello Wens, Thanks for correcting it. Regards, Vishnu On Tue, Jan 12, 2016 at 2:42 PM, Chen-Yu Tsai wrote: > Some of the register definitions are duplicated. Drop them. > > Signed-off-by: Chen-Yu Tsai > --- > include/axp818.h | 8 > 1 file changed, 8

[linux-sunxi] Re: [PATCH v2 07/26] clk: sunxi: Add TCON channel1 clock

On Thu, Jan 14, 2016 at 04:24:50PM +0100, Maxime Ripard wrote: > The TCON is a controller generating the timings to output videos signals, > acting like both a CRTC and an encoder. > > It has two channels depending on the output, each channel being driven by > its own clock (and own clock

[linux-sunxi] Re: [PATCH v2 08/26] clk: sun5i: add DRAM gates

On Thu, Jan 14, 2016 at 04:24:51PM +0100, Maxime Ripard wrote: > The Allwinner SoCs have a gate controller to gate the access to the DRAM > clock to the some devices that need to access the DRAM directly (mostly > display / image related IPs). > > Use a simple gates driver to support the one

[linux-sunxi] Re: [PATCH v2 25/26] drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS

On Thu, Jan 14, 2016 at 04:25:08PM +0100, Maxime Ripard wrote: > Add support for the Olimex LCD-OLinuXino-4.3TS panel to the DRM simple > panel driver. > > It is a 480x272 panel connected through a 24-bits RGB interface. > > Signed-off-by: Maxime Ripard > --- >