Signed-off-by: Luc Verhaegen l...@skynet.be
---
meminfo.c | 37 +
1 files changed, 21 insertions(+), 16 deletions(-)
diff --git a/meminfo.c b/meminfo.c
index b29da38..6d87897 100644
--- a/meminfo.c
+++ b/meminfo.c
@@ -19,6 +19,7 @@
#include sys/stat.h
I noticed that tpr4 was never filled in when using meminfo. Tpr4 is
only used on sun7i, so i needed to do some SoC version poking as well.
I then also wanted proper printing, which could immediately be piped into
a dram_something.c file for u-boot.
A few hours later, and I ended up completely
Now we write out a dram file for u-boot directly.
Signed-off-by: Luc Verhaegen l...@skynet.be
---
meminfo.c | 59 ---
1 files changed, 40 insertions(+), 19 deletions(-)
diff --git a/meminfo.c b/meminfo.c
index 6d87897..f926380 100644
---
No functional changes.
Signed-off-by: Luc Verhaegen l...@skynet.be
---
meminfo.c | 39 +--
1 files changed, 21 insertions(+), 18 deletions(-)
diff --git a/meminfo.c b/meminfo.c
index 44d5c78..0b7bfe2 100644
--- a/meminfo.c
+++ b/meminfo.c
@@ -1,29 +1,32 @@
Signed-off-by: Luc Verhaegen l...@skynet.be
---
meminfo.c |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/meminfo.c b/meminfo.c
index 5610bb1..9d4f894 100644
--- a/meminfo.c
+++ b/meminfo.c
@@ -182,6 +182,7 @@ dram_clock_read(struct dram_para *dram_para)
#define
Signed-off-by: Luc Verhaegen l...@skynet.be
---
meminfo.c | 172 -
1 files changed, 68 insertions(+), 104 deletions(-)
diff --git a/meminfo.c b/meminfo.c
index f926380..d27af71 100644
--- a/meminfo.c
+++ b/meminfo.c
@@ -20,19 +20,9 @@
And bail if it fails to match anything we support.
Signed-off-by: Luc Verhaegen l...@skynet.be
---
meminfo.c | 68 +
1 files changed, 68 insertions(+), 0 deletions(-)
diff --git a/meminfo.c b/meminfo.c
index 0b7bfe2..5610bb1 100644
Signed-off-by: Luc Verhaegen l...@skynet.be
---
meminfo.c | 188 +++-
1 files changed, 85 insertions(+), 103 deletions(-)
diff --git a/meminfo.c b/meminfo.c
index d27af71..44d5c78 100644
--- a/meminfo.c
+++ b/meminfo.c
@@ -22,67 +22,7 @@
Master or slave is determine in the ALSA set_fmt call which is made to
both drivers.
/* master or slave selection */
switch(fmt SND_SOC_DAIFMT_MASTER_MASK){
case SND_SOC_DAIFMT_CBM_CFM: /* codec clk frm master */
break;
case SND_SOC_DAIFMT_CBS_CFS: /* codec clk frm slave */
On Mon, Aug 18, 2014 at 10:27 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
On Sun, Aug 17, 2014 at 11:20:44PM +0800, Chen-Yu Tsai wrote:
Hi,
On Sun, Aug 17, 2014 at 4:02 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
Hi,
On Sun, Aug 17, 2014 at 11:52:17AM +0800,
I'm working on my new Baseboard design which has a Microchip 4-port USB Hub
chip on it. This chip uses only a SMBus Write and Read command. I upgraded
the kernel to 3.4.90 since 3.4.75 was still using 200kHz as the I2C default
speed.
I'm using Python to issue commands and looking at a
Hi Maxime,
This is v2 of the remaining sun8i series. I've dropped the patches you
merged. The remaining patches have been rebased onto sunxi-next.
This series enables all the controllers on sun8i that we already have
drivers for, excluding SPI as the tablet I have does not use it and
I cannot
i2c0 is connected to the gsl1680 capacitive touch panel controller.
i2c1 is connected to an mma7660 3-axis accelerometer.
i2c2 is connected to the front and back gc0309 camera sensors.
The camera sensors require additional regulators be enabled before
they are available.
All these peripherals are
Add nodes for the 3 i2c controllers found on A23 SoCs to the sun8i DTSI.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/boot/dts/sun8i-a23.dtsi | 33 +
1 file changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi
Add the sunxi NAND Flash Controller dt bindings documentation.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
.../devicetree/bindings/mtd/sunxi-nand.txt | 45 ++
1 file changed, 45 insertions(+)
create mode 100644
Add support for the sunxi NAND Flash Controller (NFC).
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
drivers/mtd/nand/Kconfig |6 +
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/sunxi_nand.c | 1362 +
3 files
Do you know about the GL850G? It is about $0.30. The chip is
automatic, no need for SMBUS.
http://www.kean.com.au/oshw/WR703N/GL850G%20USB%20Hub%201.07.pdf
http://www.aliexpress.com/item/new-hope-GL850G-GL850-SSOP28-100pcs-lots/1860488763.html
On Mon, Aug 18, 2014 at 12:20 PM, George Ioakimedes
Hi,
This patch series adds support for the sunxi NAND Flash Controller (NFC)
block.
These two patches only add support for the basic NAND stuff:
- NAND controller operations
- SW and HW ECC handling (with both syndrome and normal ECC scheme)
If you want support for advanced features you can
On Tue, Aug 19, 2014 at 12:51:49AM +0800, Chen-Yu Tsai wrote:
Hi Maxime,
This is v2 of the remaining sun8i series. I've dropped the patches you
merged. The remaining patches have been rebased onto sunxi-next.
This series enables all the controllers on sun8i that we already have
drivers
The clock-frequency values of the i2c controller nodes match the
defaults of the driver. Remove the properties to use the defaults,
and be consistent with sun8i.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/boot/dts/sun4i-a10.dtsi | 3 ---
arch/arm/boot/dts/sun5i-a10s.dtsi | 3 ---
On Tue, Aug 19, 2014 at 01:45:45AM +0800, Chen-Yu Tsai wrote:
The clock-frequency values of the i2c controller nodes match the
defaults of the driver. Remove the properties to use the defaults,
and be consistent with sun8i.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Merged, thanks!
Maxime
found on Allwinner SoCs.x
Signed-off-by: Jon Smirl jonsm...@gmail.com
---
drivers/pwm/Kconfig | 11 +
drivers/pwm/Makefile|1
drivers/pwm/pwm-sunxi.c | 517 +++
3 files changed, 529 insertions(+)
create mode 100644
Hi everyone,
Given that the firm pencils down date for GSoC 2014 is today, I need
to give the project a bit of formal closure. I will keep on working on
this (as well as DMA and related clocking), but it won't be as part of
GSoC any longer. For this reason, I've pushed a branch with the
current
Hi Boris,
On Mon, Aug 18, 2014 at 07:26:28PM +0200, Boris BREZILLON wrote:
Add the sunxi NAND Flash Controller dt bindings documentation.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
.../devicetree/bindings/mtd/sunxi-nand.txt | 45
++
Hi Emilio,
Sending it to GKH and LAKML would have been nice :)
On Mon, Aug 18, 2014 at 03:54:07PM -0300, Emilio López wrote:
Hi everyone,
Given that the firm pencils down date for GSoC 2014 is today, I need
to give the project a bit of formal closure. I will keep on working on
this (as
On Mon, Aug 18, 2014 at 3:23 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
Hi,
On Mon, Aug 18, 2014 at 02:03:16PM -0400, Jon Smirl wrote:
found on Allwinner SoCs.x
Signed-off-by: Jon Smirl jonsm...@gmail.com
Is there any notable difference with Alexandre's driver?
No, I didn't look at that part but the board is already designed with the
USB2514B and I'm working on the prototypes. If the GL850G is really that
cost I might have to look into it later though.
On Monday, August 18, 2014 10:33:08 AM UTC-7, Jon Smirl wrote:
Do you know about the GL850G? It is
On Mon, Aug 18, 2014 at 4:29 PM, George Ioakimedes georgei...@gmail.com wrote:
No, I didn't look at that part but the board is already designed with the
USB2514B and I'm working on the prototypes. If the GL850G is really that
cost I might have to look into it later though.
I have an A20 board
On 17/08/14 21:18, jonsm...@gmail.com wrote:
I think I found the bug, my sgtl5000 is happy now at lower clock
speeds. I was missing a 'L' and a value got truncated to 32 bits.
Sorry for the late reply, I guess we're in different timezones :)
Yes, that seems to work here too, giving expected
For now I need to get my board design up and running but getting help from
Microchip is not working out so far
On Monday, August 18, 2014 1:44:00 PM UTC-7, Jon Smirl wrote:
On Mon, Aug 18, 2014 at 4:29 PM, George Ioakimedes georg...@gmail.com
javascript: wrote:
No, I didn't look at that
As I'm starting to work on porting Replicant 4.2 to various Sunxi
tablets, I have started playing around with the linux-sunxi kernel, on
the sunxi-3.4 branch.
I wish to suggest/discuss a few cleanups to the current tree:
* get rid of deprecated build scripts (all the relevant info is on the
wiki
Signed-off-by: Paul Kocialkowski cont...@paulk.fr
---
include/drm/drm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/drm/drm.h b/include/drm/drm.h
index 64ff02d..33ed74a 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -36,7 +36,7 @@
#ifndef _DRM_H_
Hi Luc,
El 18/08/14 a las 03:34, Luc Verhaegen escibió:
Now we write out a dram file for u-boot directly.
Signed-off-by: Luc Verhaegen l...@skynet.be
---
meminfo.c | 59 ---
1 files changed, 40 insertions(+), 19 deletions(-)
diff
On Mon, Aug 18, 2014 at 5:36 PM, selsin...@gmail.com wrote:
On 17/08/14 21:18, jonsm...@gmail.com wrote:
I think I found the bug, my sgtl5000 is happy now at lower clock
speeds. I was missing a 'L' and a value got truncated to 32 bits.
Sorry for the late reply, I guess we're in different
El 18/08/14 a las 03:34, Luc Verhaegen escibió:
No functional changes.
Signed-off-by: Luc Verhaegen l...@skynet.be
---
meminfo.c | 39 +--
1 files changed, 21 insertions(+), 18 deletions(-)
diff --git a/meminfo.c b/meminfo.c
index 44d5c78..0b7bfe2
I see you are making an expansion board the the Cubieboard. Does it
have a UART to USB chip on it? PL2303 is $0.30
http://www.aliexpress.com/item/Free-Shipping-PL-2303HX-PL2303HX-usb-to-serial-control-chip/1911511366.html
What other chips are you using?
On Mon, Aug 18, 2014 at 5:46 PM, George
Yes, it has the FTDI FT230XQ-T part on it
On Monday, August 18, 2014 4:11:01 PM UTC-7, Jon Smirl wrote:
I see you are making an expansion board the the Cubieboard. Does it
have a UART to USB chip on it? PL2303 is $0.30
My experience on Aliexpress is that 19 out of 20 vendors are honest.
One of out 20 the product will not be what you ordered. There is a
free, automatic escrow service as part of every Aliexpress order. You
should immediately inspect the chips that are sent to you. If they
don't work use the escrow
Changes since v4:
- move generic pinmux into a20 dtsi
- add the board name as suffix
Changes since v3:
- adjust dtb file in alphabetic order
Changes since v2:
- fixed mistake about uart3/4/5 pinctrl config
Changes since v1:
- add Signed-off-by and commit msg
- add uart2/3/4/5,
This adds support for the A20 Hummingbird:
http://www.merrii.com/en/pla_d.asp?id=171
This patch enable most on-board peripherals supported on current kernel,
such as uart, i2c, spi, pwm, ohci/ehci, gmac and mmc.
Signed-off-by: Wills Wang wills.wang.o...@gmail.com
---
arch/arm/boot/dts/Makefile
Hi,
On Tue, Aug 19, 2014 at 11:44 AM, Wills Wang wills.wang.o...@gmail.com wrote:
This adds support for the A20 Hummingbird:
http://www.merrii.com/en/pla_d.asp?id=171
This patch enable most on-board peripherals supported on current kernel,
such as uart, i2c, spi, pwm, ohci/ehci, gmac and
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