Re: [linux-sunxi] Re: GSL3680 thread

> It fails before FW loading as below. > > > Maybe you could do some testing with https://github.com/rastersoft/gsl1680 > and > see if you can get it working by skipping the GPIO stuff? > > > I did a try with Joe's one

[linux-sunxi] Re: [PATCH sunxi-tools 7/7] fel: Add fel spl command support for Allwinner A64

On Mon, 25 Jan 2016 06:50:54 +0200 Siarhei Siamashka wrote: > The SCTLR bits are somewhat different because the V bit is set > to 0 on A64 (Low exception vectors, base address 0x) and > the UNK bit (Reads of this bit return an UNKNOWN value) is also not > the

[linux-sunxi] [PATCH RFC 06/11] clk: sunxi: factors: Consolidate get_factors parameters into a struct

The .get_factors callback of factors_clk has 6 parameters. To extend factors_clk in any way that requires adding parameters to .get_factors would make that list even longer, not to mention changing all the function declarations. Do this once now and consolidate all the parameters into a struct.

[linux-sunxi] [PATCH RFC 01/11] clk: composite: Add unregister function

From: Maxime Ripard The composite clock didn't have any unregistration function, which forced us to use clk_unregister directly on it. While it was already not great from an API point of view, it also meant that we were leaking the clk_composite structure

[linux-sunxi] [PATCH RFC 07/11] clk: sunxi: factors: Support custom formulas

Some clocks cannot be modelled using the standard factors clk formula, such as clocks with special pre-dividers on one parent, or clocks with all power-of-two dividers. Add support for a custom .recalc callback for factors clk. Also pass the current parent index to the .get_factor and .recalc

[linux-sunxi] [PATCH RFC 04/11] clk: sunxi: factors: Add unregister function

sunxi's factors clk did not have an unregister function. This means multiple structs were leaked whenever a factors clk was unregistered. Add an unregister function for it. Also keep pointers to the mux and gate structs so they can be freed. Signed-off-by: Chen-Yu Tsai ---

[linux-sunxi] [PATCH RFC 05/11] clk: sunxi: unmap registers in sunxi_factors_clk_setup if register call fails

sunxi_factors_clk_setup() does not unmap registers when sunxi_factors_register() fails. This patch adds proper error handling, and also an error message when sunxi_factors_register() fails. Also use the full DT node name in error messages, as the node name is often just "clk", which is useless.

[linux-sunxi] [PATCH RFC 09/11] clk: sunxi: rewrite sun6i-a31-ahb1-clk using factors clk with custom recalc

The factors clk implementation has been extended to support custom recalc callbacks to support clocks that use one factor for certain parents only, like a pre-divider. Signed-off-by: Chen-Yu Tsai --- drivers/clk/sunxi/clk-sunxi.c | 291 --

[linux-sunxi] [PATCH RFC 02/11] clk: sunxi: factors: Make struct clk_factors_config table const

struct clk_factors_config contains shifts/widths for the factors of the factors clk. This is used to read out the factors from the register value. In no case is it written to, so make it const. Signed-off-by: Chen-Yu Tsai --- drivers/clk/sunxi/clk-factors.c| 4 ++--

[linux-sunxi] [PATCH RFC 10/11] clk: sunxi: rewrite sun6i-ar100 using factors clk

sun6i's AR100 clock is a classic factors clk case: AR100 = ((parent mux) >> p) / (m + 1) Signed-off-by: Chen-Yu Tsai --- drivers/clk/sunxi/clk-sun6i-ar100.c | 235 ++-- 1 file changed, 61 insertions(+), 174 deletions(-) diff --git

[linux-sunxi] [PATCH RFC 11/11] clk: sunxi: rewrite sun8i-a23-mbus-clk using the simpler composite clk

sun8i-a23-mbus-clk used sunxi's factors clk, which is nice for very complicated clocks, but is not really needed here. Convert sun8i-a23-mbus-clk to use clk_composite, as it is a gate + mux + divider. This makes the code easier to understand. Signed-off-by: Chen-Yu Tsai --- This

[linux-sunxi] [PATCH RFC 03/11] clk: sunxi: factors: Add clk cleanup in sunxi_factors_register() error path

sunxi_factors_register() does not check for failures or cleanup after clk_register_composite() or other clk-related calls. Signed-off-by: Chen-Yu Tsai --- drivers/clk/sunxi/clk-factors.c | 43 +++-- 1 file changed, 28 insertions(+), 15

[linux-sunxi] [PATCH RFC 00/11] clk: sunxi: factors clk clean up and refactor

Hi everyone, This series cleans up and reworks parts of sunxi's factors clk. The goal is to support non-standard formulas for clock rate calculation, such as pre-dividers on some parents, or all power-of-2 dividers. One such clock is the AHB1 clock on A31/A31s. Patch 1 is Maxime's patch adding

[linux-sunxi] Re: [PATCH v7 04/10] mfd: axp20x: Add missing copyright notice

Hi Lee, On Mon, Jan 25, 2016 at 02:39:57PM +, Lee Jones wrote: > On Wed, 13 Jan 2016, Chen-Yu Tsai wrote: > > > When the driver was merged, the original author did not include a proper > > copyright notice. This patch adds the notice, backdated to when the > > driver was merged. > > This is

[linux-sunxi] Re: [PATCH v7 04/10] mfd: axp20x: Add missing copyright notice

On Wed, 13 Jan 2016, Chen-Yu Tsai wrote: > When the driver was merged, the original author did not include a proper > copyright notice. This patch adds the notice, backdated to when the > driver was merged. This is very wordy. "Supply a backdated copyright notice." > Cc: Carlo Caione

[linux-sunxi] Re: [PATCH v7 05/10] mfd: axp20x: Split the driver into core and i2c bits

On Wed, 13 Jan 2016, Chen-Yu Tsai wrote: > The axp20x driver assumes the device is i2c based. This is not the > case with later chips, which use a proprietary 2 wire serial bus > by Allwinner called "Reduced Serial Bus". > > This patch follows the example of mfd/wm831x and splits it into > an

[linux-sunxi] Re: [PATCH v2 13/26] drm/fb_cma_helper: Remove implicit call to disable_unused_functions

Hi Daniel, On Monday 25 January 2016 08:29:38 Daniel Vetter wrote: > On Mon, Jan 25, 2016 at 12:19:27AM +0200, Laurent Pinchart wrote: > > On Friday 15 January 2016 11:17:30 Daniel Vetter wrote: > >> On Fri, Jan 15, 2016 at 01:13:05AM +0200, Laurent Pinchart wrote: > >>> On Thursday 14 January

Re: [linux-sunxi] Re: GSL3680 thread

Le lundi 25 janvier 2016 19:06:53 UTC+1, Gregor Riepl a écrit : > > > According to the very limited knowledge I have about Silead controllers, > the > GSL3680 should have roughly the same interface as the GSL1680, even if it > doesn't have a control pin. That also applies to the firmware

[linux-sunxi] Re: [PATCH v3 00/12] pwm: add support for atomic update

On Mon, Jan 25, 2016 at 08:28:31AM -0800, Doug Anderson wrote: > Thierry and Boris, > > On Tue, Nov 10, 2015 at 9:34 AM, Thierry Reding > wrote: > > On Mon, Oct 19, 2015 at 12:12:12PM +0200, Heiko Stübner wrote: > >> Hi Thierry, > >> > >> Am Montag, 21. September 2015,

[linux-sunxi] Re: [PATCH v3 00/12] pwm: add support for atomic update

Thierry and Boris, On Tue, Nov 10, 2015 at 9:34 AM, Thierry Reding wrote: > On Mon, Oct 19, 2015 at 12:12:12PM +0200, Heiko Stübner wrote: >> Hi Thierry, >> >> Am Montag, 21. September 2015, 11:33:17 schrieb Boris Brezillon: >> > Hello, >> > >> > This series adds

[linux-sunxi] Re: [PATCH v7 07/10] mfd: axp20x: Add support for RSB based AXP223 PMIC

On Wed, 13 Jan 2016, Chen-Yu Tsai wrote: > The AXP223 is a new PMIC commonly paired with Allwinner A23/A33 SoCs. > It is functionally identical to AXP221; only the regulator default > voltage/status and the external host interface are different. > > Signed-off-by: Chen-Yu Tsai >

[linux-sunxi] Re: [PATCH v3 00/12] pwm: add support for atomic update

Hi Thierry, On Mon, 25 Jan 2016 18:08:55 +0100 Thierry Reding wrote: > On Mon, Jan 25, 2016 at 08:28:31AM -0800, Doug Anderson wrote: > > Thierry and Boris, > > > > On Tue, Nov 10, 2015 at 9:34 AM, Thierry Reding > > wrote: > > > On Mon, Oct

Re: [linux-sunxi] Re: GSL3680 thread

> The only information I found came from the datasheet I found on your site, I > have translated using Google and some Chinese friends. > Clearly, GSL1680's firmware loading procedure doesn't apply as the control pin > doesn't exists. > > So, for them moment, it's a dead end :( According to the

[linux-sunxi] Re: [PATCH v3 00/12] pwm: add support for atomic update

Hi, On Mon, Jan 25, 2016 at 9:08 AM, Thierry Reding wrote: > I really don't understand this design decision. I presume that the PWM > controlling this system-critical logic is driven by the SoC? So if the > regulator is system-critical, doesn't that make it a chicken

[linux-sunxi] Re: [PATCH] clk: sunxi: usb: Sort clk providers by chip family and name

On Mon, Jan 25, 2016 at 01:55:00PM +0800, Chen-Yu Tsai wrote: > The latest addition of H3 USB clocks placed them at the bottom. Move it > before A80 (sun9i), so they are sorted by SoC family then name. > > Signed-off-by: Chen-Yu Tsai Applied, thanks! Maxime -- Maxime Ripard,