Hi Uwe,
On Thu, 21 Nov 2019 at 22:06, Uwe Kleine-König
wrote:
>
> On Thu, Nov 21, 2019 at 08:58:59PM +0100, Clément Péron wrote:
> > From: Jernej Skrabec
> >
> > H6 PWM core needs bus clock to be enabled in order to work.
> >
> > Add an optional probe for it.
> >
> > Signed-off-by: Jernej
Hi Uwe,
On Thu, 21 Nov 2019 at 22:16, Uwe Kleine-König
wrote:
>
> On Thu, Nov 21, 2019 at 08:59:01PM +0100, Clément Péron wrote:
> > From: Jernej Skrabec
> >
> > PWM core has an option to bypass whole logic and output unchanged source
> > clock as PWM output. This is achieved by enabling bypass
On Thu, Nov 21, 2019 at 08:59:01PM +0100, Clément Péron wrote:
> From: Jernej Skrabec
>
> PWM core has an option to bypass whole logic and output unchanged source
> clock as PWM output. This is achieved by enabling bypass bit.
>
> Note that when bypass is enabled, no other setting has any
On Thu, Nov 21, 2019 at 08:59:00PM +0100, Clément Péron wrote:
> Bypass mode will require to be re-calculated when the pwm state
> is changed.
>
> Remove the condition so pwm_sun4i_calculate is always called.
>
> Signed-off-by: Clément Péron
When applying this patch and looking at it using git
On Thu, Nov 21, 2019 at 08:58:59PM +0100, Clément Péron wrote:
> From: Jernej Skrabec
>
> H6 PWM core needs bus clock to be enabled in order to work.
>
> Add an optional probe for it.
>
> Signed-off-by: Jernej Skrabec
> Signed-off-by: Clément Péron
> ---
> drivers/pwm/pwm-sun4i.c | 23
From: Jernej Skrabec
Now that sun4i PWM driver supports deasserting reset line and enabling
bus clock, support for H6 PWM can be added.
Note that while H6 PWM has two channels, only first one is wired to
output pin. Second channel is used as a clock source to companion AC200
chip which is
From: Jernej Skrabec
PWM core has an option to bypass whole logic and output unchanged source
clock as PWM output. This is achieved by enabling bypass bit.
Note that when bypass is enabled, no other setting has any meaning, not
even enable bit.
This mode of operation is needed to achieve high
New device tree bindings called the source clock of the module
"mod" when several clocks are defined.
Try to get a clock called "mod" if nothing is found try to get
an unnamed clock.
Reviewed-by: Uwe Kleine-König
Signed-off-by: Clément Péron
---
drivers/pwm/pwm-sun4i.c | 29
Bypass mode will require to be re-calculated when the pwm state
is changed.
Remove the condition so pwm_sun4i_calculate is always called.
Signed-off-by: Clément Péron
---
drivers/pwm/pwm-sun4i.c | 52 ++---
1 file changed, 23 insertions(+), 29 deletions(-)
From: Jernej Skrabec
H6 PWM core needs bus clock to be enabled in order to work.
Add an optional probe for it.
Signed-off-by: Jernej Skrabec
Signed-off-by: Clément Péron
---
drivers/pwm/pwm-sun4i.c | 23 +++
1 file changed, 23 insertions(+)
diff --git
From: Jernej Skrabec
H6 PWM core needs deasserted reset line in order to work.
Add an optional probe for it.
Signed-off-by: Jernej Skrabec
Reviewed-by: Uwe Kleine-König
Signed-off-by: Clément Péron
---
drivers/pwm/pwm-sun4i.c | 34 --
1 file changed, 32
Hi,
This is a rework of Jernej's previous work[1] taking account all the
previous remarks.
Bindings is still strict but probe in the driver are now optionnals.
If someone could confirm that the PWM is not broken, as my board
doesn't output it.
Thanks,
Clément
Jernej's cover:
Allwinner H6 SoC
Hi Maxime,
On Sun, Nov 3, 2019 at 11:02 PM Maxime Ripard wrote:
>
> On Fri, Nov 01, 2019 at 07:42:55PM +0530, Jagan Teki wrote:
> > Hi Maxime,
> >
> > On Tue, Oct 29, 2019 at 2:24 PM Maxime Ripard wrote:
> > >
> > > On Tue, Oct 29, 2019 at 04:03:56AM +0530, Jagan Teki wrote:
> > > > > >
Hi Uwe,
On Thu, 21 Nov 2019 at 08:36, Uwe Kleine-König
wrote:
>
> Hello Clément,
>
> On Tue, Nov 19, 2019 at 06:53:16PM +0100, Clément Péron wrote:
> > From: Jernej Skrabec
> >
> > PWM core has an option to bypass whole logic and output unchanged source
> > clock as PWM output. This is achieved
Hi Uwe,
On Thu, 21 Nov 2019 at 08:28, Uwe Kleine-König
wrote:
>
> Hello Clément,
>
> On Tue, Nov 19, 2019 at 06:53:15PM +0100, Clément Péron wrote:
> > + /*
> > + * We're keeping the bus clock on for the sake of simplicity.
> > + * Actually it only needs to be on for hardware
On Thu, 21 Nov 2019 08:22:30 +0100
Maxime Ripard wrote:
Hi,
> On Thu, Nov 21, 2019 at 01:18:33AM +, Andre Przywara wrote:
> > Add the Performance Monitoring Unit (PMU) device tree node to the H6
> > .dtsi, which tells DT users which interrupts are triggered by PMU
> > overflow events on
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