Now that HDMI sound node is available in the SoC dtsi.
Enable it for this board.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
b/arch
The FIFO TX reg is volatile and sun8i i2s register
mapping is different from sun4i.
Even if in this case it's doesn't create an issue,
Avoid setting some regs that are undefined in sun8i.
Signed-off-by: Clément Péron
Acked-by: Maxime Ripard
---
sound/soc/sunxi/sun4i-i2s.c | 15
,
Clement
Change since v1:
- rebase on next-20200828
- add revert LRCK polarity
- remove all simple-audio-card,frame-inversion in dts
- add Ondrej patches for Orange Pi board
- Add arm64 defconfig patch
Clément Péron (4):
Revert "ASoC: sun4i-i2s: Fix the LRCK polarity"
ASoC: sun4
From: Marcus Cooper
Enable HDMI audio on the Orange Pi 2.
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
b/arch/arm/boot/dts/sun8i
Hi Maxime,
On Tue, 25 Aug 2020 at 15:35, Maxime Ripard wrote:
>
> Hi Clement,
>
> On Mon, Aug 03, 2020 at 09:54:05AM +0200, Clément Péron wrote:
> > Hi Maxime and All,
> >
> > On Sat, 4 Jul 2020 at 16:56, Clément Péron wrote:
> > >
> > > Hi
Hi Maxime and All,
On Sat, 4 Jul 2020 at 16:56, Clément Péron wrote:
>
> Hi Maxime,
>
> On Sat, 4 Jul 2020 at 14:13, Maxime Ripard wrote:
> >
> > Hi,
> >
> > On Sat, Jul 04, 2020 at 12:25:34PM +0200, Clément Péron wrote:
> > > Add an O
Hi Samuel,
On Fri, 10 Jul 2020 at 07:44, Samuel Holland wrote:
>
> On 7/4/20 6:38 AM, Clément Péron wrote:
> > From: Marcus Cooper
> >
> > On the newer SoCs such as the H3 and A64 this is set by default
> > to transfer a 0 after each sample in each slot. Ho
Hi Samuel,
On Fri, 10 Jul 2020 at 07:44, Samuel Holland wrote:
>
> On 7/4/20 6:38 AM, Clément Péron wrote:
> > From: Jernej Skrabec
> >
> > H6 I2S is very similar to that in H3, except it supports up to 16
> > channels.
> >
> > Signed-off-by: Jernej
Hi,
On Fri, 10 Jul 2020 at 15:45, Piotr Oniszczuk wrote:
>
>
>
> > Wiadomość napisana przez Clément Péron w dniu
> > 09.07.2020, o godz. 16:03:
> >
> > Add an Operating Performance Points table for the GPU to
> > enable Dynamic Voltage & Frequency S
From: Marcus Cooper
Extend the functionality of the driver to include support of 20 and
24 bits per sample.
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
sound/soc/sunxi/sun4i-i2s.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/sound/soc
From: Jernej Skrabec
Add a simple-soundcard to link audio between HDMI and I2S.
Signed-off-by: Jernej Skrabec
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 33
1 file changed, 33 insertions(+)
diff --git
llect tags
Clément Péron (2):
ASoC: sun4i-i2s: Fix sun8i volatile regs
arm64: dts: allwinner: h6: Enable HDMI sound for Beelink GS1
Jernej Skrabec (3):
ASoC: sun4i-i2s: Add support for H6 I2S
dt-bindings: ASoC: sun4i-i2s: Add H6 compatible
arm64: dts: allwinner: h6: Add HDMI audio node
Marcus
Now that HDMI sound node is available in the SoC dtsi.
Enable it for this board.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
b/arch
From: Marcus Cooper
Enable HDMI audio on the Beelink X2.
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
b/arch/arm/boot/dts/sun8i-h3
From: Jernej Skrabec
H6 I2S is very similar to H3, except that it supports up to 16 channels
and thus few registers have fields on different position.
Signed-off-by: Jernej Skrabec
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
Acked-by: Maxime Ripard
Acked-by: Rob Herring
From: Marcus Cooper
Add the new DAI block for I2S2 which is used for HDMI audio.
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch/arm
From: Marcus Cooper
Enable HDMI audio on Pine64.
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
b/arch/arm64
From: Jernej Skrabec
H6 I2S is very similar to that in H3, except it supports up to 16
channels.
Signed-off-by: Jernej Skrabec
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
sound/soc/sunxi/sun4i-i2s.c | 227
1 file changed, 227 insertions
From: Marcus Cooper
Enable HDMI audio on the Orange Pi 2.
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
b/arch/arm/boot/dts/sun8i
Signed-off-by: Clément Péron
Acked-by: Maxime Ripard
---
sound/soc/sunxi/sun4i-i2s.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
index 9690389cb68e..8bae97efea30 100644
--- a/sound/soc/sunxi/sun4i-i2s.c
+++ b/sound/soc/sunxi
From: Marcus Cooper
Add a simple-soundcard to link audio between HDMI and I2S.
Signed-off-by: Jernej Skrabec
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 21 +++
1 file changed, 21 insertions(+)
diff --git
From: Marcus Cooper
Bypass the regmap cache when flushing or reading the i2s FIFOs.
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
sound/soc/sunxi/sun4i-i2s.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
index
The FIFO TX reg is volatile and sun8i i2s register
mapping is different from sun4i.
Even if in this case it's doesn't create an issue,
Avoid setting some regs that are undefined in sun8i.
Signed-off-by: Clément Péron
---
sound/soc/sunxi/sun4i-i2s.c | 15 +++
1 file changed, 11
From: Marcus Cooper
Add the new DAI block for I2S2 which is used for HDMI audio.
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner
From: Marcus Cooper
Add a simple-soundcard to link audio between HDMI and I2S.
Signed-off-by: Jernej Skrabec
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm
and avoid relying on
default.
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
sound/soc/sunxi/sun4i-i2s.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
index 8bae97efea30..f78167e152ce 100644
Enable CPU opp tables for Tanix TX6.
Also add the fixed regulator that provided vdd-cpu-gpu required for
CPU opp tables.
This voltage has been found using a voltmeter and could be wrong.
Tested-by: Jernej Škrabec
Signed-off-by: Clément Péron
---
.../boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
Some boards have a fixed regulator and can't reach the voltage set
by the OPP table.
Add a range where the minimal voltage is the target and the maximal
voltage is 1.2V.
Suggested-by: Ondřej Jirman
Signed-off-by: Clément Péron
---
.../boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi | 60
Hi Ondrej,
On Mon, 4 May 2020 at 14:27, Ondřej Jirman wrote:
>
> Hi Clément,
>
>
> So I guess ignoring the voltage and not disabling this OPP may or may not work
> based on SoC bin.
>
> On Orange Pi One, there's a regulator that supports two voltages (that can't
> support all the listed OPPs
Hi Maxime,
On Tue, 28 Apr 2020 at 18:45, Maxime Ripard wrote:
>
> On Tue, Apr 28, 2020 at 06:23:35PM +0200, Clément Péron wrote:
> > Hi Robin,
> >
> > On Tue, 28 Apr 2020 at 17:21, Robin Murphy wrote:
> > >
> > > On 2020-04-28 3:26 pm, Clément
Hi,
On Wed, 29 Apr 2020 at 10:17, Maxime Ripard wrote:
>
> On Wed, Apr 29, 2020 at 02:24:00PM +0800, Chen-Yu Tsai wrote:
> > On Wed, Apr 29, 2020 at 1:11 AM Robin Murphy wrote:
> > >
> > > On 2020-04-28 5:49 pm, Clément Péron wrote:
> > > > Hi Mark
Hi Mark, Rob,
On Tue, 28 Apr 2020 at 18:04, Maxime Ripard wrote:
>
> On Tue, Apr 28, 2020 at 10:54:00AM +0200, Clément Péron wrote:
> > Hi Maxime,
> >
> > On Tue, 28 Apr 2020 at 10:00, Maxime Ripard wrote:
> > >
> > > On Sun, Apr 26, 2020 at 02:04:39P
Hi Robin,
On Tue, 28 Apr 2020 at 17:21, Robin Murphy wrote:
>
> On 2020-04-28 3:26 pm, Clément Péron wrote:
> > Tanix TX6 has a fixed regulator. As DVFS is instructed to change
> > voltage to meet OPP table, the DVFS is not working as expected.
>
> Hmm, isn't that reall
s Cooper
Without any value :
Acked-by: Clément Péron
Regards,
Clement
>
> This reverts commit 78e071370a86473f25923e03b51cbbadacf8be0f.
>
> Signed-off-by: Samuel Holland
> ---
>
> Changes since v1:
> - Remove the node instead of disabling it
> - Also remove the codec DA
Hi Maxime, Warpme,
On Tue, 28 Apr 2020 at 16:26, Clément Péron wrote:
>
> Tanix TX6 has a fixed regulator. As DVFS is instructed to change
> voltage to meet OPP table, the DVFS is not working as expected.
>
> Avoid to introduce a new dedicated OPP Table where voltage are
> e
so the DVFS framework will create
dummy regulator and will have the same behavior.
Add some comments to explain this in the device-tree.
Reported-by: Piotr Oniszczuk
Fixes: add1e27fb703 ("arm64: dts: allwinner: h6: Enable CPU opp tables for
Tanix TX6")
Signed-off-by: Clément Péron
---
Hi Maxime,
On Tue, 28 Apr 2020 at 10:00, Maxime Ripard wrote:
>
> On Sun, Apr 26, 2020 at 02:04:39PM +0200, Clément Péron wrote:
> > From: Marcus Cooper
> >
> > Add a simple-soundcard to link audio between HDMI and I2S.
> >
> > Signed-off-by: Jernej Skrab
Hi Maxime,
On Tue, 28 Apr 2020 at 09:52, Maxime Ripard wrote:
>
> On Sun, Apr 26, 2020 at 02:17:09PM +0200, Clément Péron wrote:
> > Tanix TX6 has a fixed regulator. As DVFS is instructed to change
> > voltage to meet OPP table. The DVFS is not working as expected.
> >
&
Hi Warpme,
On Sun, 26 Apr 2020 at 14:17, Clément Péron wrote:
>
> Tanix TX6 has a fixed regulator. As DVFS is instructed to change
> voltage to meet OPP table. The DVFS is not working as expected.
>
> Introduce a dedicated OPP Table where voltage are equals to
> the fixed regul
nable CPU opp tables for
Tanix TX6")
Signed-off-by: Clément Péron
---
.../sun50i-h6-tanix-tx6-cpu-opp.dtsi | 116 ++
.../dts/allwinner/sun50i-h6-tanix-tx6.dts | 2 +-
2 files changed, 117 insertions(+), 1 deletion(-)
create mode 100644
arch/arm64/boot/dts
From: Marcus Cooper
Enable HDMI audio on the Beelink X2.
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
b/arch/arm/boot/dts/sun8i-h3
From: Marcus Cooper
Add the new DAI block for I2S2 which is used for HDMI audio.
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch/arm
From: Marcus Cooper
Enable HDMI audio on Pine64.
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
b/arch/arm64
From: Marcus Cooper
Add the new DAI block for I2S2 which is used for HDMI audio.
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner
Hi,
This is some work done by Marcus Cooper and Jernej Škrabec.
These patches are present in LibreElec kernel and have been
tested by LE users.
I have rework them to follow kernel rules but I can't test
them as I don't have H3, H5 or A64 boards.
If some sunxi users could confirm they worked as
From: Marcus Cooper
Add a simple-soundcard to link audio between HDMI and I2S.
Signed-off-by: Jernej Skrabec
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 21 +++
1 file changed, 21 insertions(+)
diff --git
From: Marcus Cooper
Add a simple-soundcard to link audio between HDMI and I2S.
Signed-off-by: Jernej Skrabec
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/arm
From: Marcus Cooper
Enable HDMI audio on the Orange Pi 2.
Signed-off-by: Marcus Cooper
Signed-off-by: Clément Péron
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
b/arch/arm/boot/dts/sun8i
Hi Maxime,
On Mon, 20 Apr 2020 at 16:30, Clément Péron wrote:
>
> We define cooling-cells property for CPUs only for board including
> the sun50i-h6-cpu-opp.dtsi. As not all boards have the CPU OPP
> dtsi file included this create a warning because the cooling-maps
Hi Samuel, Maxime,
On Thu, 23 Apr 2020 at 01:50, Samuel Holland wrote:
>
> Maxime,
>
> On 4/22/20 10:16 AM, Maxime Ripard wrote:
> > On Tue, Apr 21, 2020 at 11:15:02PM -0500, Samuel Holland wrote:
> >> As of v5.7-rc2, Linux now prints the following message at boot:
> >>
> >> [ 33.848525]
Hi Samuel,
On Wed, 22 Apr 2020 at 06:11, Samuel Holland wrote:
>
> As of v5.7-rc2, Linux now prints the following message at boot:
>
> [ 33.848525] platform sound_spdif: deferred probe pending
>
> This is because _spdif is waiting on its DAI link component
> to probe, but is disabled in
.dtsi instead of the
sun50i-h6-cpu-opp.dtsi
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi | 4
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 4
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner
Hi Ondrej,
On Mon, 20 Apr 2020 at 15:46, Ondřej Jirman wrote:
>
> Hi,
>
> On Mon, Apr 20, 2020 at 03:00:14PM +0200, Clément Péron wrote:
> > From: Ondrej Jirman
> >
> > This enables passive cooling by down-regulating CPU voltage
> > and frequency.
>
&g
.
There is no such information for AXP805 but similar PMIC (AXP813)
has a DVM (Dynamic Voltage scaling Management) ramp rate equal
to 2500uV/us.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git
.
There is no such information for AXP805 but similar PMIC (AXP813)
has a DVM (Dynamic Voltage scaling Management) ramp rate equal
to 2500uV/us.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts
Enable CPU opp tables for Tanix TX6.
Also add the fixed regulator that provided vdd-cpu-gpu required for
CPU opp tables.
This voltage has been found using a voltmeter and could be wrong.
Signed-off-by: Clément Péron
---
.../boot/dts/allwinner/sun50i-h6-tanix-tx6.dts | 13 +
1
From: Ondrej Jirman
This enables passive cooling by down-regulating CPU voltage
and frequency.
Signed-off-by: Ondrej Jirman
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot
Pine H64 device-tree have some nodes not properly sorted.
Fix this.
Signed-off-by: Clément Péron
---
.../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 34 +--
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
b
Hi,
This is the same as v4 and v3 on top.
I have also fix the commit title for Pine H64 as we now only enable CPU DVFS.
Sorry for the noise,
Clément
Clément Péron (6):
arm64: configs: Enable sun50i cpufreq nvmem
arm64: dts: allwinner: h6: Enable CPU opp tables for Beelink GS1
arm64: dts
.
There is no such information for AXP805 but similar PMIC (AXP813)
has a DVM (Dynamic Voltage scaling Management) ramp rate equal
to 2500uV/us.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git
Allwinner H6 needs this driver to be able to get
the correct speed_bin required for DVFS.
Enable this option in arm64 defconfig.
Signed-off-by: Clément Péron
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs
From: Ondrej Jirman
Add an Operating Performance Points table for the CPU cores to
enable Dynamic Voltage & Frequency Scaling on the H6.
Signed-off-by: Ondrej Jirman
Signed-off-by: Clément Péron
---
.../boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi | 121 ++
arch/arm64/boot
From: Yangtao Li
The ARM CPU cores are fed by the CPU clock from the CCU. Add a
reference to the clock for each CPU core, along with the clock
transition latency.
Signed-off-by: Yangtao Li
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 8
1 file
Hi Maxime
On Mon, 20 Apr 2020 at 14:47, Maxime Ripard wrote:
>
> On Mon, Apr 20, 2020 at 02:36:32PM +0200, Clément Péron wrote:
> > Hi Ondrej, Maxime,
> >
> > On Mon, 20 Apr 2020 at 12:39, Ondřej Jirman wrote:
> > >
> > > Hi Maxime,
> > >
>
From: Ondrej Jirman
This enables passive cooling by down-regulating CPU voltage
and frequency.
Signed-off-by: Ondrej Jirman
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot
Hi Maxime,
I have sent the v3 serie with the same command as used for the v2.
$> git send-email --to= HEAD~7
Which is now wrong because I have introduced 2 new commits.
Sorry for that I should have used:
$> git send-email --to= next/master
Could you apply these patches before the
From: Yangtao Li
The ARM CPU cores are fed by the CPU clock from the CCU. Add a
reference to the clock for each CPU core, along with the clock
transition latency.
Signed-off-by: Yangtao Li
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 8
1 file
Hi Ondrej, Maxime,
On Mon, 20 Apr 2020 at 12:39, Ondřej Jirman wrote:
>
> Hi Maxime,
>
> On Mon, Apr 20, 2020 at 10:45:47AM +0200, Maxime Ripard wrote:
> > Hi,
> >
> > On Sun, Apr 19, 2020 at 03:50:04PM +0200, Clément Péron wrote:
> > > Now that requi
.
There is no such information for AXP805 but similar PMIC (AXP813)
has a DVM (Dynamic Voltage scaling Management) ramp rate equal
to 2500uV/us.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts
Enable CPU opp tables for Tanix TX6.
Also add the fixed regulator that provided vdd-cpu-gpu required for
CPU opp tables.
This voltage has been found using a voltmeter and could be wrong.
Signed-off-by: Clément Péron
---
.../boot/dts/allwinner/sun50i-h6-tanix-tx6.dts | 13 +
1
Pine H64 device-tree have some nodes not properly sorted.
Fix this.
Signed-off-by: Clément Péron
---
.../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 34 +--
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
b
(Dynamic Voltage scaling Management) ramp rate equal
to 2500uV/us.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
b/arch/arm64/boot/dts/allwinner
From: Ondrej Jirman
Add an Operating Performance Points table for the CPU cores to
enable Dynamic Voltage & Frequency Scaling on the H6.
Signed-off-by: Ondrej Jirman
Signed-off-by: Clément Péron
---
.../boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi | 121 ++
arch/arm64/boot
Allwinner H6 needs this driver to be able to get
the correct speed_bin required for DVFS.
Enable this option in arm64 defconfig.
Signed-off-by: Clément Péron
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs
- Add ramp-deplay for GPU and CPU regulators
- Push to thermal point to 85°C (Allwinner set them to 100°C and 115°C)
- Added 1.6GHz and 1.7GHz to OPP table.
Clément Péron (6):
arm64: configs: Enable sun50i cpufreq nvmem
arm64: dts: allwinner: h6: Enable CPU opp tables for Beelink GS1
.
There is no such information for AXP805 but similar PMIC (AXP813)
has a DVM (Dynamic Voltage scaling Management) ramp rate equal
to 2500uV/us.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git
Hi Maxime,
On Mon, 6 Apr 2020 at 11:07, Clément Péron wrote:
>
> Hi Maxime,
>
> On Mon, 6 Apr 2020 at 10:10, Maxime Ripard wrote:
> >
> > Hi,
> >
> > On Sun, Apr 05, 2020 at 07:35:54PM +0200, Clément Péron wrote:
> > > Now that required drivers are
Hi Laurent,
On Mon, 6 Apr 2020 at 21:33, 'destroyedlolo' via linux-sunxi
wrote:
>
> Hi,
>
> Unfortunately, patches doesn't work as they are.
> For exemple :
> https://patchwork.kernel.org/patch/10672845/
>
> The patch is expecting in arch/arm/boot/dts/sun7i-a20.dtsi, around line 811,
>
Hi,
On Mon, 6 Apr 2020 at 10:14, Maxime Ripard wrote:
>
> On Sun, Apr 05, 2020 at 07:35:57PM +0200, Clément Péron wrote:
> > From: Ondrej Jirman
> >
> > Add an Operating Performance Points table for the CPU cores to
> > enable Dynamic Voltage & Frequency Sca
Hi,
On Sun, 5 Apr 2020 at 19:36, Clément Péron wrote:
>
> Enable CPU and GPU opp tables for Orange Pi boards.
>
> This needs to change the CPU regulator max voltage to fit
> the OPP table.
>
> Also add the ramp-delay information to avoid any out of spec
> running as
Hi Maxime,
On Mon, 6 Apr 2020 at 10:10, Maxime Ripard wrote:
>
> Hi,
>
> On Sun, Apr 05, 2020 at 07:35:54PM +0200, Clément Péron wrote:
> > Now that required drivers are merged we can contibute on DVFS
> > support for Allwinner H6.
> >
> > This serie is bas
Hi Maxime,
On Mon, 6 Apr 2020 at 10:16, Maxime Ripard wrote:
>
> On Sun, Apr 05, 2020 at 07:35:58PM +0200, Clément Péron wrote:
> > Add an Operating Performance Points table for the GPU to
> > enable Dynamic Voltage & Frequency Scaling on the H6.
> >
>
Hi Laurent,
On Mon, 6 Apr 2020 at 01:00, 'destroyedlolo' via linux-sunxi
wrote:
>
> Hello,
>
> I'm trying to upgrade my BananaPI to latest 5.x kernel. Unfortunately, it
> doesn't support 3.5 LCD display as per it's DTS.
>
> A found a patch from Paul Kocialkowski :
.
There is no such information for AXP805 but similar PMIC (AXP813)
has a DVM (Dynamic Voltage scaling Management) ramp rate equal
to 2500uV/us.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 10 +-
1 file changed, 9 insertions(+), 1 deletion
change for Beelink GS1
- Add ramp-deplay for GPU and CPU regulators
- Push to thermal point to 85°C (Allwinner set them to 100°C and 115°C)
- Added 1.6GHz and 1.7GHz to OPP table.
Clément Péron (4):
arm64: dts: allwinner: h6: Add GPU Operating Performance Points table
arm64: configs
Allwinner H6 needs this driver to be able to get
the correct speed_bin required for DVFS.
Enable this option in arm64 defconfig.
Signed-off-by: Clément Péron
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs
Add an Operating Performance Points table for the GPU to
enable Dynamic Voltage & Frequency Scaling on the H6.
Signed-off-by: Clément Péron
---
.../boot/dts/allwinner/sun50i-h6-gpu-opp.dtsi | 74 +++
1 file changed, 74 insertions(+)
create mode 100644 arch/arm64/boot
.
There is no such information for AXP805 but similar PMIC (AXP813)
has a DVM (Dynamic Voltage scaling Management) ramp rate equal
to 2500uV/us.
Signed-off-by: Clément Péron
---
.../arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 10 +-
1 file changed, 9 insertions(+), 1 deletion
From: Ondrej Jirman
This enables passive cooling by down-regulating CPU voltage
and frequency.
Signed-off-by: Ondrej Jirman
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot
From: Ondrej Jirman
Add an Operating Performance Points table for the CPU cores to
enable Dynamic Voltage & Frequency Scaling on the H6.
Signed-off-by: Ondrej Jirman
Signed-off-by: Clément Péron
---
.../boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi | 121 ++
arch/arm64/boot
From: Yangtao Li
The ARM CPU cores are fed by the CPU clock from the CCU. Add a
reference to the clock for each CPU core, along with the clock
transition latency.
Signed-off-by: Yangtao Li
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 8
1 file
Hi,
On Sun, 5 Apr 2020 at 12:49, Clément Péron wrote:
>
> Hi Sunxi maintainers and members,
>
> Now that required drivers are merged we can contibute on DVFS support for
> Allwinner H6.
>
> This serie is based on Yangtao Li serie[0] and Megous works[1].
>
> Most of th
Hi,
On Sun, 5 Apr 2020 at 16:54, Ondřej Jirman wrote:
>
> Hi,
>
> On Sun, Apr 05, 2020 at 04:33:37PM +0200, Clément Péron wrote:
> > Hi Ondřej,
>
> [ ... ]
>
> > Good point, this information should be added for both CPU and GPU regulator.
> > This could be
Hi Ondřej,
On Sun, 5 Apr 2020 at 13:24, Ondřej Jirman wrote:
>
> Hello,
>
> On Sun, Apr 05, 2020 at 12:49:09PM +0200, Clément Péron wrote:
> > Add reasonable thermal polling time for Allwinner H6.
> >
> > Signed-off-by: Clément Péron
> > ---
> > arch/a
Hi Ondřej,
On Sun, 5 Apr 2020 at 13:51, Ondřej Jirman wrote:
>
> Hello Clément,
>
> On Sun, Apr 05, 2020 at 12:49:06PM +0200, Clément Péron wrote:
> > Hi Sunxi maintainers and members,
> >
> > Now that required drivers are merged we can contibute on DVF
Enable CPU and GPU opp tables for Beelink GS1.
This needs also to change the CPU regulator min/max voltage to fit
the OPP table.
Signed-off-by: Clément Péron
---
.../arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git
Add reasonable thermal polling time for Allwinner H6.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-h6
From: Yangtao Li
The ARM CPU cores are fed by the CPU clock from the CCU. Add a
reference to the clock for each CPU core, along with the clock
transition latency.
Signed-off-by: Yangtao Li
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 8
1 file
Allwinner H6 needs this driver to be able to get
the correct speed_bin required for DVFS.
Enable this option in arm64 defconfig.
Signed-off-by: Clément Péron
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs
From: Ondrej Jirman
This enables passive cooling by down-regulating CPU voltage
and frequency.
Signed-off-by: Ondrej Jirman
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot
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