[PATCH] MAINTAINERS: Update maintainer for dwc2

[John Youn]

Update to show Minas Harutyunyan as the new maintainer for dwc2.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 MAINTAINERS | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 93a12af4f180..fc23eb016198 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4119,7 +4119,7 @@ S:Supported
 F: drivers/mtd/nand/denali*
 
 DESIGNWARE USB2 DRD IP DRIVER
-M:     John Youn <johny...@synopsys.com>
+M: Minas Harutyunyan <hmi...@synopsys.com>
 L: linux-usb@vger.kernel.org
 T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
 S: Maintained
-- 
2.11.0

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DWC2 maintainership change

[John Youn]

Hi Felipe, Greg,

I won't be able to continue maintainership of dwc2.

Minas Harutyunyan, has been doing most of the communication on linux-usb lately 
and much of the maintenance and development work. He has excellent knowledge of 
the controller, having worked with it since its inception many years ago.

I propose that he take over as the new maintainer.

Regards,
John


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Re: [PATCH 11/11] usb: dwc2: Enable LPM

[John Youn]

On 03/09/2018 12:06 AM, Felipe Balbi wrote:


Hi,

Grigor Tovmasyan <grigor.tovmas...@synopsys.com> writes:

From: John Youn <johny...@synopsys.com>

Set 'lpm_capable' flag in the gadget structure so
indicating that LPM is supported.

Signed-off-by: Sevak Arakelyan <sev...@synopsys.com>
Signed-off-by: Grigor Tovmasyan <tovma...@synopsys.com>


Missing John's Signed-off-by. What gives? I'll drop this from my queue
for now.



Sorry, it must have gotten dropped somehow.

Do you need me to resend?

If not please add:

Signed-off-by: John Youn <johny...@synopsys.com>


John
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Re: [PATCH 3/7] usb: dwc3: pci: Store device properties dynamically

[John Youn]

On 03/01/2018 12:25 AM, Felipe Balbi wrote:


Hi,

John Youn <john.y...@synopsys.com> writes:

On 02/22/2018 07:20 AM, Andy Shevchenko wrote:

On Thu, Feb 22, 2018 at 1:57 AM, Thinh Nguyen <thinh.ngu...@synopsys.com> wrote:

On 2/21/2018 6:46 AM, Andy Shevchenko wrote:

On Tue, Feb 20, 2018 at 11:12 PM, Thinh Nguyen
<thinh.ngu...@synopsys.com> wrote:

On 2/17/2018 7:29 AM, Andy Shevchenko wrote:

On Fri, Feb 16, 2018 at 11:55 PM, Thinh Nguyen
<thinh.ngu...@synopsys.com> wrote:

Add the ability to add device properties dynamically. Currently, device
properties are added to platform device using
platform_device_add_properties(). However, this function does not allow
adding properties incrementally. It is useful to have this ability when
the driver needs to set common device properties across different HW


I'm not sure it's useful anyhow.


or
if IP and FPGA validation test different configurations for different
HW.


Shouldn't be a separate stuff for FPGA exclusively?


Can you clarify/expand your question?


FPGA is the one which might have different properties at run time for
the same device.
So, why do we care on driver / generic level of it?

Shouldn't be FPGA manager take care of it (via DT overlays, for example)?


Normally it is handled using DT overlays. But for using FPGA as PCI
device, I'm not aware of a better solution.


If it's a PCI device, it may utilize PCI (hot plug if you would like
to change IP at run time) with appropriate IDs and stuff, right?


Introduce two new functions to do so:
 * dwc3_pci_add_one_property() - this function adds one property to
   dwc->properties array and increase its size as needed
 * dwc3_pci_add_properties() - this function takes a null terminated
   array of device properties and add them to dwc->properties


So, why you can't use ACPI / DT here?



dwc3_pci_add_properties() is a convenient function that takes statically
allocated array of (quirks) properties for different HW and store them
to dwc->properties. The idea is to add more properties on top of these
required quirks.


Yes, I understand that. What's wrong with DT? The built-in device
properties have the same nature as usual properties for DT.
Whenever driver calls device_property_read_uXX() or alike it would
check all property provides for asked one.


I may not have explained fully in my commit message the purpose of this
change. That's why I think I misinterpreted your previous question.



With this new debugging feature, we want to delay adding device
properties until the user initiates it.


So, see above.
When user wants to enable this IP at run time it will be a PCI hot
plug event which makes device appear behind PCI switch.
When device appears it would have it's own VndrID/DevID + sub pair.

Based on that IDs you may apply hard coded quirks (though I am against
quirks in new hardware) as it's done right now.



Hi Andy,

Using VID/PID is not really feasible for our use case. If we only had
a few concrete devices then it would be ok.


Agreed. VID/PID would not scale at all :-)


But understand that this an IP running on an FPGA validation
platform. The IP is very large and flexible with *many* parameters
that we must test against.  It is also deployed by our customers with
widely varying configurations. So we are constantly testing these as
well.

One of the last pieces for moving our FPGA validation completely to
the in-kernel Linux stack is the ability to configure the driver to
set parameters that are not visible to the driver, or with parameters
that we want to constrain for testing.


I'm very much interested in helping you guys validate your IP with
upstream Linux :-) My concern with this patch is that it makes dwc3-pci
super complex even for users who are not interested in IP validation.

So, instead, how about we introduce dwc3-snps.c where you guys can put
all the controls you need? We remove HAPS from current dwc3-pci.c and
move everything to dwc3-snps.c. Sure, we'd have a little duplication,
but I guess that'd be very minor.

While doing that, we can make dwc3-snps.c depend on EXPERT, so that
distros don't enable it by default.



Sure, we'll make the changes. I seem to recall we came to this same
conclusion a while back... forgot about that!

Regards,
John

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Re: [PATCH 3/7] usb: dwc3: pci: Store device properties dynamically

[John Youn]

On 02/22/2018 07:20 AM, Andy Shevchenko wrote:

On Thu, Feb 22, 2018 at 1:57 AM, Thinh Nguyen  wrote:

On 2/21/2018 6:46 AM, Andy Shevchenko wrote:

On Tue, Feb 20, 2018 at 11:12 PM, Thinh Nguyen
 wrote:

On 2/17/2018 7:29 AM, Andy Shevchenko wrote:

On Fri, Feb 16, 2018 at 11:55 PM, Thinh Nguyen
 wrote:

Add the ability to add device properties dynamically. Currently, device
properties are added to platform device using
platform_device_add_properties(). However, this function does not allow
adding properties incrementally. It is useful to have this ability when
the driver needs to set common device properties across different HW


I'm not sure it's useful anyhow.


or
if IP and FPGA validation test different configurations for different
HW.


Shouldn't be a separate stuff for FPGA exclusively?


Can you clarify/expand your question?


FPGA is the one which might have different properties at run time for
the same device.
So, why do we care on driver / generic level of it?

Shouldn't be FPGA manager take care of it (via DT overlays, for example)?


Normally it is handled using DT overlays. But for using FPGA as PCI
device, I'm not aware of a better solution.


If it's a PCI device, it may utilize PCI (hot plug if you would like
to change IP at run time) with appropriate IDs and stuff, right?


Introduce two new functions to do so:
* dwc3_pci_add_one_property() - this function adds one property to
  dwc->properties array and increase its size as needed
* dwc3_pci_add_properties() - this function takes a null terminated
  array of device properties and add them to dwc->properties


So, why you can't use ACPI / DT here?



dwc3_pci_add_properties() is a convenient function that takes statically
allocated array of (quirks) properties for different HW and store them
to dwc->properties. The idea is to add more properties on top of these
required quirks.


Yes, I understand that. What's wrong with DT? The built-in device
properties have the same nature as usual properties for DT.
Whenever driver calls device_property_read_uXX() or alike it would
check all property provides for asked one.


I may not have explained fully in my commit message the purpose of this
change. That's why I think I misinterpreted your previous question.



With this new debugging feature, we want to delay adding device
properties until the user initiates it.


So, see above.
When user wants to enable this IP at run time it will be a PCI hot
plug event which makes device appear behind PCI switch.
When device appears it would have it's own VndrID/DevID + sub pair.

Based on that IDs you may apply hard coded quirks (though I am against
quirks in new hardware) as it's done right now.



Hi Andy,

Using VID/PID is not really feasible for our use case. If we only had
a few concrete devices then it would be ok.

But understand that this an IP running on an FPGA validation
platform. The IP is very large and flexible with *many* parameters
that we must test against.  It is also deployed by our customers with
widely varying configurations. So we are constantly testing these as
well.

One of the last pieces for moving our FPGA validation completely to
the in-kernel Linux stack is the ability to configure the driver to
set parameters that are not visible to the driver, or with parameters
that we want to constrain for testing.

For example, consider the maximum_speed property. We could create a
PID for each speed. But what if we want test a configuration with
maximum_speed in combination with some other parameters, say nump,
burst size, fifo size, fifo thresholding, etc.

The amount of PIDs we would need for our validation would get out of
hand quickly and would be a pain to maintain. And it wouldn't help for
testing with fine variations, like increasing the thresholding value
by 1.

The other part of this is that we don't necessarily need an entirely
new device to perform all testing with different parameters. So we
wouldn't even have an opportunity to change the VID/PID.

Regards,
John

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Re: [PATCH 00/17] usb: dwc2: improvements

[John Youn]

On 01/19/2018 02:39 AM, Grigor Tovmasyan wrote:

This series contains patches which are already have been sent in
"usb: dwc2: fixes, enhancements and new features" series.

That patch series was too large, and based on community feedbacks decided to
split that series into small pieces. This is a second part.

In this series we included only improvements for dwc2 driver, such as moving
functions or deleting unused parts of code.

Patches 2-3 and 14-17 are logically linked.

All patches were tested on HAPS-DX7 platform.


Changes after first submission:

usb: dwc2: Set AHB burst size to INCR
 
 Because of containing two non-related modifications this patch divided into two patches:

 - "usb: dwc2: Set AHB burst size to INCR"
 - "usb: dwc2: Use AHB burst size parameter"

"usb: dwc2: pci: Fix error handling in dwc2_pci_probe"
 
 Divided into 4 patches:

 - "usb: dwc2: pci: Handle error cleanup in probe"
 - "usb: dwc2: pci: Move devm_kzalloc() before platform_device_add()"
 - "usb: dwc2: pci: Move usb_phy_generic_register()"
 - "usb: dwc2: pci: Replace kzalloc() with devm_kzalloc()"

"usb: dwc2: Update bit polling functionality":
 
 - This patch is a merging of "usb: dwc2: Move polling function to core.c."

   and "usb: dwc2: Use common polling function.".
 - Added dwc2_hsotg_wait_bit_clear() function, because in some cases,
   we should wait for bit would be cleared not set.
  


usb: dwc2: host: Fix transaction errors in host mode

 - Renamed patch name from "usb: dwc2: host: Setting TOUTCAL and USBTRDTIM 
fields in host mode".
 - Removed programming of USBTRDTIM bitfiled, because this field available
   only in Device mode.
 - Added comment with description of TOUTCAL bitfiled in comment.
 - In description added platforms for which this patch fixes transactions 
error.


usb: dwc2: Change TxFIFO and RxFIFO flushing flow

 Rewritten loop for waiting AHB master in IDLE state.





Grigor Tovmasyan (2):
   usb: dwc2: Delete unused functionality
   usb: dwc2: Make dwc2_force_mode() static

Minas Harutyunyan (3):
   usb: dwc2: hcd: Fix host channel halt flow
   usb: dwc2: host: Fix transaction errors in host mode
   usb: dwc2: Change TxFIFO and RxFIFO flushing flow

Razmik Karapetyan (7):
   usb: dwc2: Use AHB burst size parameter
   usb: dwc2: Set AHB burst size to INCR
   usb: dwc2: Update dwc2_handle_incomplete_isoc_in() function
   usb: dwc2: Update dwc2_handle_incomplete_isoc_out() function
   usb: dwc2: Update GINTSTS_GOUTNAKEFF interrupt handling
   usb: dwc2: Rename bit set/clear function names
   usb: dwc2: Remove unnecessary debug prints

Sevak Arakelyan (1):
   usb: dwc2: Update bit polling functionality

Vardan Mikayelyan (4):
   usb: dwc2: pci: Replace kzalloc() with devm_kzalloc()
   usb: dwc2: pci: Move usb_phy_generic_register()
   usb: dwc2: pci: Move devm_kzalloc() before platform_device_add()
   usb: dwc2: pci: Handle error cleanup in probe

  drivers/usb/dwc2/core.c   | 120 +---
  drivers/usb/dwc2/core.h   |  25 ++---
  drivers/usb/dwc2/gadget.c | 116 +++
  drivers/usb/dwc2/hcd.c| 136 +-
  drivers/usb/dwc2/hcd.h|  56 ---
  drivers/usb/dwc2/params.c |   2 +-
  drivers/usb/dwc2/pci.c|  27 +
  7 files changed, 189 insertions(+), 293 deletions(-)



For this series:

Acked-by: John Youn <johny...@synopsys.com>

John
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Re: [PATCH 0/6] usb: dwc2: minor fixes

[John Youn]

On 01/16/2018 04:03 AM, Grigor Tovmasyan wrote:

This series contains patches which are already have been sent in
"usb: dwc2: fixes, enhancements and new features" series.

That patch series was too large, and based on community feedbacks decided to
split that series into small pieces. This is a first one.

In this series we included only minor fixes for dwc2 driver.

All patches were tested on HAPS-DX7 platform.


Changes after first submission:

usb: dwc2: Add safety check in setting of descriptor chain pointer
   
 Updated description of patch.





Gevorg Sahakyan (1):
   usb: dwc2: Remove version check in GSNPSID

Minas Harutyunyan (2):
   usb: dwc2: Add safety check in setting of descriptor chain pointers
   usb: dwc2: Add safety check for STSPHSERCVD intr

Vardan Mikayelyan (3):
   usb: dwc2: Fix dwc2_hsotg_core_init_disconnected()
   usb: dwc2: eliminate irq parameter from dwc2_gadget_init
   usb: dwc2: Force mode optimizations

  drivers/usb/dwc2/core.c | 61 +++--
  drivers/usb/dwc2/core.h | 13 ++
  drivers/usb/dwc2/gadget.c   | 33 +---
  drivers/usb/dwc2/hcd.c  |  6 ++---
  drivers/usb/dwc2/hw.h   |  1 +
  drivers/usb/dwc2/params.c   | 23 ++---
  drivers/usb/dwc2/platform.c | 11 ++--
  7 files changed, 61 insertions(+), 87 deletions(-)




For this series:

Acked-by: John Youn <johny...@synopsys.com>

John
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Re: [PATCH] usb: dwc2: gadget: Use true and false for boolean values

[John Youn]

On 01/23/2018 07:45 AM, Gustavo A. R. Silva wrote:

Assign true or false to boolean variables instead of an integer value.

This issue was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <gust...@embeddedor.com>
---
  drivers/usb/dwc2/gadget.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index e4c3ce0..1f684dd 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -116,10 +116,10 @@ static inline void dwc2_gadget_incr_frame_num(struct 
dwc2_hsotg_ep *hs_ep)
  {
hs_ep->target_frame += hs_ep->interval;
if (hs_ep->target_frame > DSTS_SOFFN_LIMIT) {
-   hs_ep->frame_overrun = 1;
+   hs_ep->frame_overrun = true;
hs_ep->target_frame &= DSTS_SOFFN_LIMIT;
} else {
-   hs_ep->frame_overrun = 0;
+   hs_ep->frame_overrun = false;
    }
  }
  



+Felipe

Acked-by: John Youn <johny...@synopsys.com>

Regards,
John
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Re: [PATCH] usb: dwc2: add optional usb ecc reset bit

[John Youn]

On 11/01/2017 08:35 AM, Dinh Nguyen wrote:
> The dwc2 USB controller in Stratix10 has an additional ECC reset bit that
> needs to get de-asserted in order for the controller to work properly.
>
> Signed-off-by: Dinh Nguyen <dingu...@kernel.org>
> ---
>  drivers/usb/dwc2/core.h |  1 +
>  drivers/usb/dwc2/platform.c | 10 ++
>  2 files changed, 11 insertions(+)
>
> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
> index 8367d4f9..a4b5f4e 100644
> --- a/drivers/usb/dwc2/core.h
> +++ b/drivers/usb/dwc2/core.h
> @@ -920,6 +920,7 @@ struct dwc2_hsotg {
>   int irq;
>   struct clk *clk;
>   struct reset_control *reset;
> + struct reset_control *reset_ecc;
>
>   unsigned int queuing_high_bandwidth:1;
>   unsigned int srp_success:1;
> diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
> index daf0d37..d466e03 100644
> --- a/drivers/usb/dwc2/platform.c
> +++ b/drivers/usb/dwc2/platform.c
> @@ -220,6 +220,15 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg 
> *hsotg)
>
>   reset_control_deassert(hsotg->reset);
>
> + hsotg->reset_ecc = devm_reset_control_get_optional(hsotg->dev, 
> "dwc2-ecc");
> + if (IS_ERR(hsotg->reset_ecc)) {
> + ret = PTR_ERR(hsotg->reset_ecc);
> + dev_err(hsotg->dev, "error getting reset control for ecc %d\n", 
> ret);
> + return ret;
> + }
> +
> + reset_control_deassert(hsotg->reset_ecc);
> +
>   /* Set default UTMI width */
>   hsotg->phyif = GUSBCFG_PHYIF16;
>
> @@ -318,6 +327,7 @@ static int dwc2_driver_remove(struct platform_device *dev)
>   dwc2_lowlevel_hw_disable(hsotg);
>
>   reset_control_assert(hsotg->reset);
> + reset_control_assert(hsotg->reset_ecc);
>
>   return 0;
>  }
>

Acked-by: John Youn <johny...@synopsys.com>

John
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Re: [PATCH] usb: dwc2: Fix TxFIFOn sizes and total TxFIFO size issues

[John Youn]

_tx_fifo_total_depth - return total FIFO depth available for
>   * device mode TX FIFOs
>   */
>  int dwc2_hsotg_tx_fifo_total_depth(struct dwc2_hsotg *hsotg)
>  {
> - int ep_info_size;
>   int addr;
>   int tx_addr_max;
>   u32 np_tx_fifo_size;
> @@ -255,8 +218,7 @@ int dwc2_hsotg_tx_fifo_total_depth(struct dwc2_hsotg 
> *hsotg)
>   hsotg->params.g_np_tx_fifo_size);
>
>   /* Get Endpoint Info Control block size in DWORDs. */
> - ep_info_size = dwc2_hsotg_ep_info_size(hsotg);
> - tx_addr_max = hsotg->hw_params.total_fifo_size - ep_info_size;
> + tx_addr_max = hsotg->hw_params.total_fifo_size;
>
>   addr = hsotg->params.g_rx_fifo_size + np_tx_fifo_size;
>   if (tx_addr_max <= addr)
> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
> index a3ffe97170ff..ad2ebff74924 100644
> --- a/drivers/usb/dwc2/params.c
> +++ b/drivers/usb/dwc2/params.c
> @@ -469,8 +469,7 @@ static void dwc2_check_param_tx_fifo_sizes(struct 
> dwc2_hsotg *hsotg)
>   }
>
>   for (fifo = 1; fifo <= fifo_count; fifo++) {
> - dptxfszn = (dwc2_readl(hsotg->regs + DPTXFSIZN(fifo)) &
> - FIFOSIZE_DEPTH_MASK) >> FIFOSIZE_DEPTH_SHIFT;
> + dptxfszn = hsotg->hw_params.g_tx_fifo_size[fifo];
>
>   if (hsotg->params.g_tx_fifo_size[fifo] < min ||
>   hsotg->params.g_tx_fifo_size[fifo] >  dptxfszn) {
> @@ -594,6 +593,7 @@ static void dwc2_get_dev_hwparams(struct dwc2_hsotg 
> *hsotg)
>   struct dwc2_hw_params *hw = >hw_params;
>   bool forced;
>   u32 gnptxfsiz;
> + int fifo, fifo_count;
>
>   if (hsotg->dr_mode == USB_DR_MODE_HOST)
>   return;
> @@ -602,6 +602,14 @@ static void dwc2_get_dev_hwparams(struct dwc2_hsotg 
> *hsotg)
>
>   gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ);
>
> + fifo_count = dwc2_hsotg_tx_fifo_count(hsotg);
> +
> + for (fifo = 1; fifo <= fifo_count; fifo++) {
> + hw->g_tx_fifo_size[fifo] =
> + (dwc2_readl(hsotg->regs + DPTXFSIZN(fifo)) &
> +  FIFOSIZE_DEPTH_MASK) >> FIFOSIZE_DEPTH_SHIFT;
> + }
> +
>   if (forced)
>   dwc2_clear_force_mode(hsotg);
>
> @@ -646,14 +654,6 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
>   hwcfg4 = dwc2_readl(hsotg->regs + GHWCFG4);
>   grxfsiz = dwc2_readl(hsotg->regs + GRXFSIZ);
>
> - /*
> -  * Host specific hardware parameters. Reading these parameters
> -  * requires the controller to be in host mode. The mode will
> -  * be forced, if necessary, to read these values.
> -  */
> - dwc2_get_host_hwparams(hsotg);
> - dwc2_get_dev_hwparams(hsotg);
> -
>   /* hwcfg1 */
>   hw->dev_ep_dirs = hwcfg1;
>
> @@ -696,6 +696,8 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
>   hw->en_multiple_tx_fifo = !!(hwcfg4 & GHWCFG4_DED_FIFO_EN);
>   hw->num_dev_perio_in_ep = (hwcfg4 & GHWCFG4_NUM_DEV_PERIO_IN_EP_MASK) >>
> GHWCFG4_NUM_DEV_PERIO_IN_EP_SHIFT;
> + hw->num_dev_in_eps = (hwcfg4 & GHWCFG4_NUM_IN_EPS_MASK) >>
> +      GHWCFG4_NUM_IN_EPS_SHIFT;
>   hw->dma_desc_enable = !!(hwcfg4 & GHWCFG4_DESC_DMA);
>   hw->power_optimized = !!(hwcfg4 & GHWCFG4_POWER_OPTIMIZ);
>   hw->utmi_phy_data_width = (hwcfg4 & GHWCFG4_UTMI_PHY_DATA_WIDTH_MASK) >>
> @@ -704,6 +706,13 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
>   /* fifo sizes */
>   hw->rx_fifo_size = (grxfsiz & GRXFSIZ_DEPTH_MASK) >>
>   GRXFSIZ_DEPTH_SHIFT;
> + /*
> +  * Host specific hardware parameters. Reading these parameters
> +  * requires the controller to be in host mode. The mode will
> +  * be forced, if necessary, to read these values.
> +  */
> + dwc2_get_host_hwparams(hsotg);
> + dwc2_get_dev_hwparams(hsotg);
>
>   return 0;
>  }
>


Acked-by: John Youn <johny...@synopsys.com>


John


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Re: [PATCH v3 1/2] usb: dwc2: host: Don't retry NAKed transactions right away

[John Youn]

On 12/05/2017 08:18 AM, Stefan Wahren wrote:
> Hi Felipe,
> Hi John,
>
>
> Am 30.10.2017 um 18:08 schrieb Douglas Anderson:
>> On rk3288-veyron devices on Chrome OS it was found that plugging in an
>> Arduino-based USB device could cause the system to lockup, especially
>> if the CPU Frequency was at one of the slower operating points (like
>> 100 MHz / 200 MHz).
>>
>> Upon tracing, I found that the following was happening:
>> * The USB device (full speed) was connected to a high speed hub and
>>then to the rk3288.  Thus, we were dealing with split transactions,
>>which is all handled in software on dwc2.
>> * Userspace was initiating a BULK IN transfer
>> * When we sent the SSPLIT (to start the split transaction), we got an
>>ACK.  Good.  Then we issued the CSPLIT.
>> * When we sent the CSPLIT, we got back a NAK.  We immediately (from
>>the interrupt handler) started to retry and sent another SSPLIT.
>> * The device kept NAKing our CSPLIT, so we kept ping-ponging between
>>sending a SSPLIT and a CSPLIT, each time sending from the interrupt
>>handler.
>> * The handling of the interrupts was (because of the low CPU speed and
>>the inefficiency of the dwc2 interrupt handler) was actually taking
>>_longer_ than it took the other side to send the ACK/NAK.  Thus we
>>were _always_ in the USB interrupt routine.
>> * The fact that USB interrupts were always going off was preventing
>>other things from happening in the system.  This included preventing
>>the system from being able to transition to a higher CPU frequency.
>>
>> As I understand it, there is no requirement to retry super quickly
>> after a NAK, we just have to retry sometime in the future.  Thus one
>> solution to the above is to just add a delay between getting a NAK and
>> retrying the transmission.  If this delay is sufficiently long to get
>> out of the interrupt routine then the rest of the system will be able
>> to make forward progress.  Even a 25 us delay would probably be
>> enough, but we'll be extra conservative and try to delay 1 ms (the
>> exact amount depends on HZ and the accuracy of the jiffy and how close
>> the current jiffy is to ticking, but could be as much as 20 ms or as
>> little as 1 ms).
>>
>> Presumably adding a delay like this could impact the USB throughput,
>> so we only add the delay with repeated NAKs.
>>
>> NOTE: Upon further testing of a pl2303 serial adapter, I found that
>> this fix may help with problems there.  Specifically I found that the
>> pl2303 serial adapters tend to respond with a NAK when they have
>> nothing to say and thus we end with this same sequence.
>>
>> Signed-off-by: Douglas Anderson <diand...@chromium.org>
>> Cc: sta...@vger.kernel.org
>> Reviewed-by: Julius Werner <jwer...@chromium.org>
>> Tested-by: Stefan Wahren <stefan.wah...@i2se.com>
>> ---
>>
>> Changes in v3:
>> - Add tested-by for Stefan Wahren
>> - Sent to Felipe Balbi as candiate to land this.
>> - Add Cc for stable (it's always been broken so go as far is as easy)
>>
>> Changes in v2:
>> - Address 
>> https://urldefense.proofpoint.com/v2/url?u=http-3A__crosreview.com_737520=DwICaQ=DPL6_X_6JkXFx7AXWqB0tg=U3o8uKoKhWme5_V9D-eeCkB11BFwt4KvWztBgdE9ZpA=Y_xpJ6Ks0XAK5_bQgmeQEvgKThZtPBQJ3cejNCGfEvM=olyPwyYvn_072esVwYxrCduKOKKJPUgc1YHX-CNhM1s=
>>  feedback
>>
>
> does it need a resend?
>

You can add my acked-by:

Acked-by: John Youn <johny...@synopsys.com>

Regards,
John

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Re: [PATCHv2 2/7] usb: dwc2: add support for STM32F7 USB OTG HS

[John Youn]

On 09/29/2017 07:22 AM, Amelie DELAUNAY wrote:
> Hi,
>
> Gentle ping for driver review submitted on August 28th.
>
> Thanks,
> Amelie
>
> On 08/28/2017 04:20 PM, Amelie Delaunay wrote:
>> This patch adds the dwc2_set_params function for STM32F7 USB OTG HS.
>>
>> Signed-off-by: Amelie Delaunay <amelie.delau...@st.com>
>> ---
>>   drivers/usb/dwc2/params.c | 11 +++
>>   1 file changed, 11 insertions(+)
>>
>> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
>> index a3ffe97..d5b672d 100644
>> --- a/drivers/usb/dwc2/params.c
>> +++ b/drivers/usb/dwc2/params.c
>> @@ -136,6 +136,15 @@ static void dwc2_set_stm32f4x9_fsotg_params(struct 
>> dwc2_hsotg *hsotg)
>>  p->activate_stm_fs_transceiver = true;
>>   }
>>
>> +static void dwc2_set_stm32f7_hsotg_params(struct dwc2_hsotg *hsotg)
>> +{
>> +struct dwc2_core_params *p = >params;
>> +
>> +p->host_rx_fifo_size = 622;
>> +p->host_nperio_tx_fifo_size = 128;
>> +p->host_perio_tx_fifo_size = 256;
>> +}
>> +
>>   const struct of_device_id dwc2_of_match_table[] = {
>>  { .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params },
>>  { .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params  },
>> @@ -154,6 +163,8 @@ const struct of_device_id dwc2_of_match_table[] = {
>>  { .compatible = "st,stm32f4x9-fsotg",
>>.data = dwc2_set_stm32f4x9_fsotg_params },
>>  { .compatible = "st,stm32f4x9-hsotg" },
>> +{ .compatible = "st,stm32f7-hsotg",
>> +  .data = dwc2_set_stm32f7_hsotg_params },
>>  {},
>>   };
>>   MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
>>


Acked-by: John Youn <johny...@synopsys.com>


John

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Re: [RESEND x2][PATCH 0/3] dwc2 fixes for edge cases on hikey

[John Youn]

On 09/20/2017 12:57 PM, John Stultz wrote:
> So here are a few dwc2 fixes that I've been using with HiKey.
> I'm not totally sure these are all ideal, but they avoid edge case
> issues that we have been running into with switching between
> gadget mode and host mode.
>
> I'd guess the first two are potentially -stable material, and
> the last might be worth sending to -stable too, as its a relatively
> simple fix, but to my understanding the UDC state tracking has
> always been broken so its not really a regression. But still.
>
> I'd love to get some feedback on the patches and consideration
> to be merged upstream.
>
> thanks
> -john
>
> Cc: Wei Xu <xuw...@hisilicon.com>
> Cc: Guodong Xu <guodong...@linaro.org>
> Cc: Amit Pundir <amit.pun...@linaro.org>
> Cc: YongQin Liu <yongqin@linaro.org>
> Cc: John Youn <johny...@synopsys.com>
> Cc: Minas Harutyunyan <minas.harutyun...@synopsys.com>
> Cc: Douglas Anderson <diand...@chromium.org>
> Cc: Chen Yu <cheny...@huawei.com>
> Cc: Felipe Balbi <felipe.ba...@linux.intel.com>
> Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
> Cc: linux-usb@vger.kernel.org
>
> John Stultz (3):
>   usb: dwc2: Improve gadget state disconnection handling
>   usb: dwc2: Error out of dwc2_hsotg_ep_disable() if we're in host mode
>   usb: dwc2: Fix UDC state tracking
>
>  drivers/usb/dwc2/gadget.c | 7 +++
>  drivers/usb/dwc2/hcd.c| 8 ++--
>  2 files changed, 13 insertions(+), 2 deletions(-)
>

Hi John,

I think we have something that fixes these issues.

Minas,

Could you take a look at this? I was not able to find the patches we
talked about. If possible, please post them so that John can try them
out.

Thanks,
John
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Re: [PATCH] usb: dwc2: gadget: On USB RESET reset device address to zero

[John Youn]

On 07/11/2017 03:25 AM, Minas Harutyunyan wrote:
> Reseted DEVADDR field in DCFG to zero on USB RESET.
>
> Device address in DCFG register does not reset to zero,
> which required to pass enumeration, after disconnect and
> reconnect.
>
> Signed-off-by: Minas Harutyunyan <hmi...@synopsys.com>
> ---
>  drivers/usb/dwc2/gadget.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
> index 98a4a79e7f6e..c5c0a26a4d66 100644
> --- a/drivers/usb/dwc2/gadget.c
> +++ b/drivers/usb/dwc2/gadget.c
> @@ -3561,6 +3561,9 @@ static irqreturn_t dwc2_hsotg_irq(int irq, void *pw)
>   /* Report disconnection if it is not already done. */
>   dwc2_hsotg_disconnect(hsotg);
>
> + /* Reset device address to zero */
> + __bic32(hsotg->regs + DCFG, DCFG_DEVADDR_MASK);
> +
>   if (usb_status & GOTGCTL_BSESVLD && connected)
>   dwc2_hsotg_core_init_disconnected(hsotg, true);
>   }
>

Acked-by: John Youn <johny...@synopsys.com>


John

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Re: [PATCH 2/3] usb: dwc3: gadget: Fix early exit in set/clear ep halt

[John Youn]

On 6/21/2017 3:38 AM, Felipe Balbi wrote:
>
> Hi,
>
> John Youn <john.y...@synopsys.com> writes:
>
> 
>
>>>> I haven't checked, but Thinh looked and couldn't find anything
>>>> relating to the macOS issue. Which is why we want more information
>>>> about the problem.
>>>>
>>>> I can take a look at it too later today when I get a chance.
>>>>
>>>> When you say you fixed the issue in the vendor driver, do you mean the
>>>> macOS problem (multiple clear stalls) or the regression that it caused
>>>> when it was fixed (the MSC data sequence issue)?
>>>
>>> Hi John,
>>>
>>> The issue was with the host sending a CLEAR_FEATURE(ENDPOINT_HALT) when the
>>> EP was not actually halted. The host does this to reset the EP data toggle /
>>> sequence number to 0, and it is allowed by some USB spec. The problem was
>>> that for DWC3 if you issue a Clear Stall when the EP is not halted, nothing
>>> happens. I *think* the fix was to issue a Set EP Config command instead,
>>> which does reset the sequence number, but I'm not 100% sure about that.
>>>
>>
>> Hi Paul,
>>
>> Ok thanks, that will definitely help looking into it.
>>
>> Though our issue seems the opposite. Since Felipe's macOS patch
>> prevents the clear stall when already halted, but *without* that, the
>
>> controller doesn't clear the sequence number and fails the MSC CV
>> test.
>
> I can see this failure here. We really need a way to reset Data
> toggle/seqNum without issuing Clear Stall command. I tried issuing
> set_ep_config instead, but there's still something wrong going on. It
> seems like g_mass_storage won't requeue a new request for the following
> CBW.
>
> John, can you check on your list of STARS if there's anything related to
> issuing Clear Halt when the endpoint is not halted?

Hi Felipe,

We tried Paul's workaround but it also does not work for us. We're
looking into why. We're also investigating other possible workarounds
and searching our list of STARs. We'll get back to you once we have
some more information.

Thanks,
John
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Re: [PATCH 2/3] usb: dwc3: gadget: Fix early exit in set/clear ep halt

[John Youn]

On 6/13/2017 3:31 PM, Paul Zimmerman wrote:
> On Tue, 13 Jun 2017 21:57:42 +0000, John Youn <john.y...@synopsys.com> wrote:
>
>> On 6/13/2017 2:39 PM, Paul Zimmerman wrote:
>>> On Tue, 13 Jun 2017 18:33:09 +, John Youn <john.y...@synopsys.com> 
>>> wrote:
>>>
>>>> On 6/13/2017 12:32 AM, Felipe Balbi wrote:
>>>>>
>>>>> Hi,
>>>>>
>>>>> Thinh Nguyen <thinh.ngu...@synopsys.com> writes:
>>>>>>>>>>>>>>>> this could be, I don't remember if I checked this or not :-)
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> Really, the best way here, IMHO, would be to re-verify what's 
>>>>>>>>>>>>>>>> going on
>>>>>>>>>>>>>>>> with macOS and revert my orignal patch since it's, rather 
>>>>>>>>>>>>>>>> clearly,
>>>>>>>>>>>>>>>> wrong.
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>> Sure. Are you going to make a revert patch or I am?
>>>>>>>>>>>>>>
>>>>>>>>>>>>>> Well, after we really know what's going on with macOS and have a 
>>>>>>>>>>>>>> better
>>>>>>>>>>>>>> fix, then who makes the revert is less important as long as 
>>>>>>>>>>>>>> problems get
>>>>>>>>>>>>>> sorted out :-) Either way is fine for me.
>>>>>>>>>>>>>>
>>>>>>>>>>>>>
>>>>>>>>>>>>> Do you have any update on this issue?
>>>>>>>>>>>>>
>>>>>>>>>>>>
>>>>>>>>>>>> The patch ffb80fc672c3 ("usb: dwc3: gadget: skip Set/Clear Halt 
>>>>>>>>>>>> when
>>>>>>>>>>>> invalid") still causes a regression for us. As there hasn't any 
>>>>>>>>>>>> update
>>>>>>>>>>>> for the macOS issue, can I submit a revert patch for this?
>>>>>>>>>>>
>>>>>>>>>>> I just came back from vacations ;-) I'll get back to this. Reverting
>>>>>>>>>>> that commit won't do any good as we'd be exchanging one regression 
>>>>>>>>>>> for
>>>>>>>>>>> another. We really need to understand what's going on.
>>>>>>>>>>
>>>>>>>>>> Hi Felipe,
>>>>>>>>>>
>>>>>>>>>> I think we worked around this same issue in the Synopsys vendor 
>>>>>>>>>> driver
>>>>>>>>>> after a customer reported a problem with 
>>>>>>>>>> CLEAR_FEATURE(ENDPOINT_HALT).
>>>>>>>>>> I no longer have access to either the databook or the codebase, so I
>>>>>>>>>> can't be sure about what the workaround was, but if either John or 
>>>>>>>>>> Thinh
>>>>>>>>>> can have a look at the Clear Stall code in the vendor driver they 
>>>>>>>>>> should
>>>>>>>>>> be able to figure it out.
>>>>>>>>
>>>>>>>> Thanks a lot Paul :-) Good to see you still have a look here every once
>>>>>>>> in a while :-)
>>>>>>>>
>>>>>>>> John, Thinh could either of you check what Paul mentions here?
>>>>>>>>
>>>>>>>> cheers
>>>>>>>>
>>>>>>>
>>>>>>> Can you provide more detail on the issue you see on MAC OS? and how to
>>>>>>> reproduce the issue?
>>>>>>>
>>>>>>
>>>>>> This issue has been a regression for us for a few months now, do you
>>>>>> have any update on this?
>>>>>
>>>>> ordered a mac to test this again. It'll take a few days.
>>>>>
>>>>
>>>> Thanks Felipe.
>>>>
>>>> Let us know if we can help in any way. If you can give details on your
>>>> setup with macOS we can look into running it as well.
>>>>
>>>> Also curious whether or not you are seeing the same regression? It
>>>> should apply to anyone using dwc3 running USB mass-storage CV.
>>>
>>> Hi John,
>>>
>>> Did you have a look at the Synopsys driver like I mentioned above?
>>> I'm pretty sure I fixed something similar to this there.
>>>
>>
>> Hi Paul,
>>
>> I haven't checked, but Thinh looked and couldn't find anything
>> relating to the macOS issue. Which is why we want more information
>> about the problem.
>>
>> I can take a look at it too later today when I get a chance.
>>
>> When you say you fixed the issue in the vendor driver, do you mean the
>> macOS problem (multiple clear stalls) or the regression that it caused
>> when it was fixed (the MSC data sequence issue)?
>
> Hi John,
>
> The issue was with the host sending a CLEAR_FEATURE(ENDPOINT_HALT) when the
> EP was not actually halted. The host does this to reset the EP data toggle /
> sequence number to 0, and it is allowed by some USB spec. The problem was
> that for DWC3 if you issue a Clear Stall when the EP is not halted, nothing
> happens. I *think* the fix was to issue a Set EP Config command instead,
> which does reset the sequence number, but I'm not 100% sure about that.
>

Hi Paul,

Ok thanks, that will definitely help looking into it.

Though our issue seems the opposite. Since Felipe's macOS patch
prevents the clear stall when already halted, but *without* that, the
controller doesn't clear the sequence number and fails the MSC CV
test.

John

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Re: [PATCH 2/3] usb: dwc3: gadget: Fix early exit in set/clear ep halt

[John Youn]

On 6/13/2017 2:39 PM, Paul Zimmerman wrote:
> On Tue, 13 Jun 2017 18:33:09 +0000, John Youn <john.y...@synopsys.com> wrote:
>
>> On 6/13/2017 12:32 AM, Felipe Balbi wrote:
>>>
>>> Hi,
>>>
>>> Thinh Nguyen <thinh.ngu...@synopsys.com> writes:
>>>>>>>>>>>>>> this could be, I don't remember if I checked this or not :-)
>>>>>>>>>>>>>>
>>>>>>>>>>>>>> Really, the best way here, IMHO, would be to re-verify what's 
>>>>>>>>>>>>>> going on
>>>>>>>>>>>>>> with macOS and revert my orignal patch since it's, rather 
>>>>>>>>>>>>>> clearly,
>>>>>>>>>>>>>> wrong.
>>>>>>>>>>>>>>
>>>>>>>>>>>>>
>>>>>>>>>>>>> Sure. Are you going to make a revert patch or I am?
>>>>>>>>>>>>
>>>>>>>>>>>> Well, after we really know what's going on with macOS and have a 
>>>>>>>>>>>> better
>>>>>>>>>>>> fix, then who makes the revert is less important as long as 
>>>>>>>>>>>> problems get
>>>>>>>>>>>> sorted out :-) Either way is fine for me.
>>>>>>>>>>>>
>>>>>>>>>>>
>>>>>>>>>>> Do you have any update on this issue?
>>>>>>>>>>>
>>>>>>>>>>
>>>>>>>>>> The patch ffb80fc672c3 ("usb: dwc3: gadget: skip Set/Clear Halt when
>>>>>>>>>> invalid") still causes a regression for us. As there hasn't any 
>>>>>>>>>> update
>>>>>>>>>> for the macOS issue, can I submit a revert patch for this?
>>>>>>>>>
>>>>>>>>> I just came back from vacations ;-) I'll get back to this. Reverting
>>>>>>>>> that commit won't do any good as we'd be exchanging one regression for
>>>>>>>>> another. We really need to understand what's going on.
>>>>>>>>
>>>>>>>> Hi Felipe,
>>>>>>>>
>>>>>>>> I think we worked around this same issue in the Synopsys vendor driver
>>>>>>>> after a customer reported a problem with CLEAR_FEATURE(ENDPOINT_HALT).
>>>>>>>> I no longer have access to either the databook or the codebase, so I
>>>>>>>> can't be sure about what the workaround was, but if either John or 
>>>>>>>> Thinh
>>>>>>>> can have a look at the Clear Stall code in the vendor driver they 
>>>>>>>> should
>>>>>>>> be able to figure it out.
>>>>>>
>>>>>> Thanks a lot Paul :-) Good to see you still have a look here every once
>>>>>> in a while :-)
>>>>>>
>>>>>> John, Thinh could either of you check what Paul mentions here?
>>>>>>
>>>>>> cheers
>>>>>>
>>>>>
>>>>> Can you provide more detail on the issue you see on MAC OS? and how to
>>>>> reproduce the issue?
>>>>>
>>>>
>>>> This issue has been a regression for us for a few months now, do you
>>>> have any update on this?
>>>
>>> ordered a mac to test this again. It'll take a few days.
>>>
>>
>> Thanks Felipe.
>>
>> Let us know if we can help in any way. If you can give details on your
>> setup with macOS we can look into running it as well.
>>
>> Also curious whether or not you are seeing the same regression? It
>> should apply to anyone using dwc3 running USB mass-storage CV.
>
> Hi John,
>
> Did you have a look at the Synopsys driver like I mentioned above?
> I'm pretty sure I fixed something similar to this there.
>

Hi Paul,

I haven't checked, but Thinh looked and couldn't find anything
relating to the macOS issue. Which is why we want more information
about the problem.

I can take a look at it too later today when I get a chance.

When you say you fixed the issue in the vendor driver, do you mean the
macOS problem (multiple clear stalls) or the regression that it caused
when it was fixed (the MSC data sequence issue)?

Regards,
John
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Re: [PATCH 2/3] usb: dwc3: gadget: Fix early exit in set/clear ep halt

[John Youn]

On 6/13/2017 12:32 AM, Felipe Balbi wrote:
>
> Hi,
>
> Thinh Nguyen  writes:
 this could be, I don't remember if I checked this or not :-)

 Really, the best way here, IMHO, would be to re-verify what's 
 going on
 with macOS and revert my orignal patch since it's, rather clearly,
 wrong.

>>>
>>> Sure. Are you going to make a revert patch or I am?
>>
>> Well, after we really know what's going on with macOS and have a 
>> better
>> fix, then who makes the revert is less important as long as problems 
>> get
>> sorted out :-) Either way is fine for me.
>>
>
> Do you have any update on this issue?
>

 The patch ffb80fc672c3 ("usb: dwc3: gadget: skip Set/Clear Halt when
 invalid") still causes a regression for us. As there hasn't any update
 for the macOS issue, can I submit a revert patch for this?
>>>
>>> I just came back from vacations ;-) I'll get back to this. Reverting
>>> that commit won't do any good as we'd be exchanging one regression for
>>> another. We really need to understand what's going on.
>>
>> Hi Felipe,
>>
>> I think we worked around this same issue in the Synopsys vendor driver
>> after a customer reported a problem with CLEAR_FEATURE(ENDPOINT_HALT).
>> I no longer have access to either the databook or the codebase, so I
>> can't be sure about what the workaround was, but if either John or Thinh
>> can have a look at the Clear Stall code in the vendor driver they should
>> be able to figure it out.

 Thanks a lot Paul :-) Good to see you still have a look here every once
 in a while :-)

 John, Thinh could either of you check what Paul mentions here?

 cheers

>>>
>>> Can you provide more detail on the issue you see on MAC OS? and how to
>>> reproduce the issue?
>>>
>>
>> This issue has been a regression for us for a few months now, do you
>> have any update on this?
>
> ordered a mac to test this again. It'll take a few days.
>

Thanks Felipe.

Let us know if we can help in any way. If you can give details on your
setup with macOS we can look into running it as well.

Also curious whether or not you are seeing the same regression? It
should apply to anyone using dwc3 running USB mass-storage CV.

Regards,
John


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Re: [PATCH] usb: dwc2: add support for the DWC2 controller on Meson8 SoCs

[John Youn]

On 5/25/2017 10:39 AM, Martin Blumenstingl wrote:
> Hi John,
>
> On Sat, May 6, 2017 at 7:37 PM, Martin Blumenstingl
> <martin.blumensti...@googlemail.com> wrote:
>> USB support in the Meson8 SoCs is provided by a DWC2 controller which
>> works with the same settings as Meson8b and GXBB. Using the generic
>> "snps,dwc2" binding results in an endless stream of "Overcurrent change
>> detected" messages.
>>
>> Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com>
> do you want me to re-send this with Rob's ACK?
> also please let me know if something is still missing in this patch
>
>> ---
>>  Documentation/devicetree/bindings/usb/dwc2.txt | 1 +
>>  drivers/usb/dwc2/params.c  | 2 ++
>>  2 files changed, 3 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt 
>> b/Documentation/devicetree/bindings/usb/dwc2.txt
>> index 6c7c2bce6d0c..b55be381ae85 100644
>> --- a/Documentation/devicetree/bindings/usb/dwc2.txt
>> +++ b/Documentation/devicetree/bindings/usb/dwc2.txt
>> @@ -10,6 +10,7 @@ Required properties:
>>- "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 
>> Soc;
>>- "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX 
>> SoCs;
>>- "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX 
>> SoCs;
>> +  - "amlogic,meson8-usb": The DWC2 USB controller instance in Amlogic 
>> Meson8 SoCs;
>>- "amlogic,meson8b-usb": The DWC2 USB controller instance in Amlogic 
>> Meson8b SoCs;
>>- "amlogic,meson-gxbb-usb": The DWC2 USB controller instance in Amlogic 
>> S905 SoCs;
>>- "amcc,dwc-otg": The DWC2 USB controller instance in AMCC Canyonlands 
>> 460EX SoCs;
>> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
>> index 2990c347289f..0d6290ed66ea 100644
>> --- a/drivers/usb/dwc2/params.c
>> +++ b/drivers/usb/dwc2/params.c
>> @@ -128,6 +128,8 @@ const struct of_device_id dwc2_of_match_table[] = {
>> { .compatible = "lantiq,xrx200-usb", .data = dwc2_set_ltq_params },
>> { .compatible = "snps,dwc2" },
>> { .compatible = "samsung,s3c6400-hsotg" },
>> +   { .compatible = "amlogic,meson8-usb",
>> + .data = dwc2_set_amlogic_params },
>> { .compatible = "amlogic,meson8b-usb",
>>   .data = dwc2_set_amlogic_params },
>> { .compatible = "amlogic,meson-gxbb-usb",
>> --
>> 2.12.2
>>
>

Adding Felipe


Acked-by: John Youn <johny...@synopsys.com>

John

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Re: [PATCH 1/3] usb: dwc3: gadget: Prevent losing events in event cache

[John Youn]

On 04/18/2017 05:47 AM, Felipe Balbi wrote:
>
> Hi,
>
> Thinh Nguyen  writes:
>>> (Thinh, for whatever I didn't receive your email via the list, replying
>>> to myself)
>>
>> Could it be because of the attached file?
>>
>>>
>>> Felipe Balbi  writes:
> Hmm, can you apply this patch and provide output when the failure
> happens? I suggest setting up a 100MiB trace buffer. You don't need to
> enable any tracers nor any event. trace_printk() is always enabled.

 Sure.

 Attached is a 7z with the full kernel trace with the failure.
>>>
>>> Thank you :-)
>>>
 More often than not, we will see something like below, where the TH
 coming in back to back with 0 event count on the second TH.

 2990.496588: dwc3_interrupt: TH
 2990.496588: dwc3_interrupt: evt->flags 
 2990.496590: dwc3_readl: addr c90001b2840c value 0004
 2990.496590: dwc3_interrupt: GEVNTCOUNT 0004
 2990.496590: dwc3_interrupt: 4 events pending
 2990.496591: dwc3_readl: addr c90001b28408 value 1000
 2990.496591: dwc3_interrupt: GEVNTSIZ 1000
 2990.496592: dwc3_writel: addr c90001b28408 value 80001000
 2990.496592: dwc3_interrupt: copying events to cache
 2990.496592: dwc3_writel: addr c90001b2840c value 0004
 2990.496614: dwc3_interrupt: TH
 2990.496614: dwc3_interrupt: evt->flags 0001
 2990.496615: dwc3_readl: addr c90001b2840c value 
 2990.496615: dwc3_interrupt: GEVNTCOUNT 
 2990.496616: dwc3_interrupt: 0 events pending
 2990.496616: dwc3_thread_interrupt: BH
 2990.496616: dwc3_event: event (6084): ep1out: Transfer In-Progress


 Here is the snippet of the attached trace where the TH is called twice
 with a new event coming in and overwrite the old one:

 2990.601357: dwc3_readl: addr c90001b2883c value 00030007
 2990.601357: dwc3_gadget_ep_cmd: ep1in: cmd 'Update Transfer' [196615]..
 2990.601360: dwc3_interrupt: TH
 2990.601360: dwc3_interrupt: evt->flags 
 2990.601362: dwc3_readl: addr c90001b2840c value 0004
 2990.601362: dwc3_interrupt: GEVNTCOUNT 0004
 2990.601362: dwc3_interrupt: 4 events pending
 2990.601364: dwc3_readl: addr c90001b28408 value 1000
 2990.601364: dwc3_interrupt: GEVNTSIZ 1000
 2990.601364: dwc3_writel: addr c90001b28408 value 80001000
 2990.601364: dwc3_interrupt: copying events to cache
 2990.601364: dwc3_writel: addr c90001b2840c value 0004
 2990.601369: dwc3_interrupt: TH
 2990.601369: dwc3_interrupt: evt->flags 0001
 2990.601369: dwc3_readl: addr c90001b2840c value 0004
 2990.601370: dwc3_interrupt: GEVNTCOUNT 0004
 2990.601370: dwc3_interrupt: 4 events pending
 2990.601372: dwc3_readl: addr c90001b28408 value 80001000
 2990.601372: dwc3_interrupt: GEVNTSIZ 80001000
 2990.601372: dwc3_writel: addr c90001b28408 value 80001000
 2990.601372: dwc3_interrupt: copying events to cache
 2990.601372: dwc3_writel: addr c90001b2840c value 0004
 2990.601375: dwc3_thread_interrupt: BH
 2990.601376: dwc3_event: event (4086): ep1in: Transfer In-Progress..

 The device hangs at the end of the log.
>>
>> I repeated the test with USB 3.0 IP version 2.90a and USB 3.1 IP version
>> 1.60, and I found the same result where the TH is occasionally called
>> twice back-to-back.
>>
>>>
>>> Right, found this in the logs. So the only thing that I can think of
>>> here, is that we need to flush posted writes. Does this help?
>>>
>>> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
>>> index 79e7a3480d51..6f06738273f2 100644
>>> --- a/drivers/usb/dwc3/gadget.c
>>> +++ b/drivers/usb/dwc3/gadget.c
>>> @@ -3099,6 +3099,10 @@ static irqreturn_t dwc3_check_event_buf(struct 
>>> dwc3_event_buffer *evt)
>>>
>>>  dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), count);
>>>
>>> +   /* flush posted writes */
>>> +   dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0));
>>> +   dwc3_readl(dwc->regs, DWC3_GEVNTSIZ(0));
>>> +
>>>  return IRQ_WAKE_THREAD;
>>>   }
>>>
>>>
>>
>> With the change above, I don't see the TH get called twice in in a row.
>> However, I also tested with replacing the code above with a udelay(4),
>> from reading the kernel trace, to take in account the latency of reading
>> the registers. I also don't see TH get called twice in a row.
>>
>> The extra latency from reading the registers above can mask this issue.
>
> okay, so it is a problem with posted writes. Can you send above as a
> formal patch? That's something we can backport to every stable
> kernel. And the real reason here _IS_ caused by posted writes. There's
> no spurious interrupt happening.
>

Hi Felipe,

I only mentioned spurious interrupts as something the driver needs to
account for anyways. They are not the cause of 

Re: [PATCH 1/3] usb: dwc3: gadget: Prevent losing events in event cache

[John Youn]

On 04/11/2017 11:14 PM, Felipe Balbi wrote:
>
> Hi,
>
> John Youn <john.y...@synopsys.com> writes:
>>>> John Youn <john.y...@synopsys.com> writes:
>>>>>> Thinh Nguyen <thinh.ngu...@synopsys.com> writes:
>>>>>>> The dwc3 driver can overwite its previous events if its top half IRQ
>>>>>>> handler gets invoked again before processing the events in the cache. We
>>>>>>
>>>>>> interrupts are masked, why would top half get invoked again? Is this,
>>>>>> perhaps, related to DWC3 3.00a which has the "Interrupt line doesn't
>>>>>> lower when masked" problem? We've added a lot of code to workaround that
>>>>>> problem and, apparently, it wasn't enough.
>>>>>
>>>>> No, it is not related to that. We verified with PCIe traces. The
>>>>> interrupt line gets deasserted after we mask it. And we put the
>>>>> masking as close to the beginning of the top-half as possible.
>>>>>
>>>>>>
>>>>>> In any case, there's no way top half would be invoked again in a
>>>>>> properly working DWC3.
>>>>>
>>>>> Yet we still see it sometimes. Usually it doesn't create a problem,
>>>>
>>>> that's fair, but it's not for the reason you're describing :-) There
>>>> might be another problem going on, because since we masked the interrupt
>>>> and cleared all events, IRQ shouldn't be raised at all; unless, as I
>>>> mentioned on the other subthread, the IRQ line is shared.
>>>>
>>>>> but if there happens to be a new event there, we get the failure.
>>>>>
>>>>> We didn't trace into that part of the kernel so we can't explain why.
>>>>> But if there is any chance the interrupt line deassertion wasn't
>>>>> detected in time, whatever part of the kernel that thinks it is still
>>>>> asserted might just call our top-half again. This could be a totally
>>>>> wrong assumption, but it doesn't seem too far-fetched.
>>>>
>>>> The kernel doesn't detect IRQ line assertion/deassertion. CPU gets an
>>>> exception when that happens and calls Kernel IRQ handler vector. That
>>>> will, in turn, figure out which line triggered, call the handler and so
>>>> on.
>>>
>>> We're talking about PCIe though, where interrupt assertion and
>>> deassertion are packets. So I would imagine the kernel has to do
>>> something and there could be some latency associated with that.
>>
>> Also, another thing is that the device uses legacy, level-triggered,
>> PCIe interrupts, so for as long as the interrupt is asserted, the TH
>> is called repeatedly.
>
> yes, and that's why we have:
>
>> static irqreturn_t dwc3_check_event_buf(struct dwc3_event_buffer *evt)
>> {
>>  struct dwc3 *dwc = evt->dwc;
>>  u32 amount;
>>  u32 count;
>>  u32 reg;
>
>>  if (pm_runtime_suspended(dwc->dev)) {
>>  pm_runtime_get(dwc->dev);
>>  disable_irq_nosync(dwc->irq_gadget);
>>  dwc->pending_events = true;
>>  return IRQ_HANDLED;
>>  }
>>
>>  count = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0));
>>  count &= DWC3_GEVNTCOUNT_MASK;
>
> check how many events are pending in the event buffer.
>
>>  if (!count)
>>  return IRQ_NONE;
>>
>>  evt->count = count;
>>  evt->flags |= DWC3_EVENT_PENDING;
>>
>>  /* Mask interrupt */
>>  reg = dwc3_readl(dwc->regs, DWC3_GEVNTSIZ(0));
>>  reg |= DWC3_GEVNTSIZ_INTMASK;
>
> mask interrupt generation
>
>>  dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), reg);
>>
>>  amount = min(count, evt->length - evt->lpos);
>>  memcpy(evt->cache + evt->lpos, evt->buf + evt->lpos, amount);
>>
>>  if (amount < count)
>>  memcpy(evt->cache, evt->buf, count - amount);
>>
>>  dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), count);
>
> clear ALL events from event buffer. This brings the line down, so we
> shouldn't re-enter.

Right, I get all that, but you're not addressing the fact that the
"interrupts" are just packets on the PCIe and there could be some
latency in detecting the de-assertion. The "line" doesn't go down
immediately when we mask it. I don't see any obvious way to guarantee
tha

Re: [PATCH 1/3] usb: dwc3: gadget: Prevent losing events in event cache

[John Youn]

On 04/11/2017 09:31 AM, John Youn wrote:
> On 04/11/2017 12:45 AM, Felipe Balbi wrote:
>>
>> Hi,
>>
>> John Youn <john.y...@synopsys.com> writes:
>>>> Thinh Nguyen <thinh.ngu...@synopsys.com> writes:
>>>>> The dwc3 driver can overwite its previous events if its top half IRQ
>>>>> handler gets invoked again before processing the events in the cache. We
>>>>
>>>> interrupts are masked, why would top half get invoked again? Is this,
>>>> perhaps, related to DWC3 3.00a which has the "Interrupt line doesn't
>>>> lower when masked" problem? We've added a lot of code to workaround that
>>>> problem and, apparently, it wasn't enough.
>>>
>>> No, it is not related to that. We verified with PCIe traces. The
>>> interrupt line gets deasserted after we mask it. And we put the
>>> masking as close to the beginning of the top-half as possible.
>>>
>>>>
>>>> In any case, there's no way top half would be invoked again in a
>>>> properly working DWC3.
>>>
>>> Yet we still see it sometimes. Usually it doesn't create a problem,
>>
>> that's fair, but it's not for the reason you're describing :-) There
>> might be another problem going on, because since we masked the interrupt
>> and cleared all events, IRQ shouldn't be raised at all; unless, as I
>> mentioned on the other subthread, the IRQ line is shared.
>>
>>> but if there happens to be a new event there, we get the failure.
>>>
>>> We didn't trace into that part of the kernel so we can't explain why.
>>> But if there is any chance the interrupt line deassertion wasn't
>>> detected in time, whatever part of the kernel that thinks it is still
>>> asserted might just call our top-half again. This could be a totally
>>> wrong assumption, but it doesn't seem too far-fetched.
>>
>> The kernel doesn't detect IRQ line assertion/deassertion. CPU gets an
>> exception when that happens and calls Kernel IRQ handler vector. That
>> will, in turn, figure out which line triggered, call the handler and so
>> on.
>
> We're talking about PCIe though, where interrupt assertion and
> deassertion are packets. So I would imagine the kernel has to do
> something and there could be some latency associated with that.

Also, another thing is that the device uses legacy, level-triggered,
PCIe interrupts, so for as long as the interrupt is asserted, the TH
is called repeatedly.

So we mask the interrupt in the TH and a short time later, the
interrupt de-assertion packet is sent on PCIe bus and if that's not
seen right away we may already have another call to TH before the BH
gets scheduled.

Unfortunately the device controller does not support MSI interrupts,
where it would be edge triggered and you would only see an assertion
packet (no de-assertion). With that you would probably not see this
behavior.

Regards,
John
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Re: [PATCH 1/3] usb: dwc3: gadget: Prevent losing events in event cache

[John Youn]

On 04/11/2017 12:45 AM, Felipe Balbi wrote:
>
> Hi,
>
> John Youn <john.y...@synopsys.com> writes:
>>> Thinh Nguyen <thinh.ngu...@synopsys.com> writes:
>>>> The dwc3 driver can overwite its previous events if its top half IRQ
>>>> handler gets invoked again before processing the events in the cache. We
>>>
>>> interrupts are masked, why would top half get invoked again? Is this,
>>> perhaps, related to DWC3 3.00a which has the "Interrupt line doesn't
>>> lower when masked" problem? We've added a lot of code to workaround that
>>> problem and, apparently, it wasn't enough.
>>
>> No, it is not related to that. We verified with PCIe traces. The
>> interrupt line gets deasserted after we mask it. And we put the
>> masking as close to the beginning of the top-half as possible.
>>
>>>
>>> In any case, there's no way top half would be invoked again in a
>>> properly working DWC3.
>>
>> Yet we still see it sometimes. Usually it doesn't create a problem,
>
> that's fair, but it's not for the reason you're describing :-) There
> might be another problem going on, because since we masked the interrupt
> and cleared all events, IRQ shouldn't be raised at all; unless, as I
> mentioned on the other subthread, the IRQ line is shared.
>
>> but if there happens to be a new event there, we get the failure.
>>
>> We didn't trace into that part of the kernel so we can't explain why.
>> But if there is any chance the interrupt line deassertion wasn't
>> detected in time, whatever part of the kernel that thinks it is still
>> asserted might just call our top-half again. This could be a totally
>> wrong assumption, but it doesn't seem too far-fetched.
>
> The kernel doesn't detect IRQ line assertion/deassertion. CPU gets an
> exception when that happens and calls Kernel IRQ handler vector. That
> will, in turn, figure out which line triggered, call the handler and so
> on.

We're talking about PCIe though, where interrupt assertion and
deassertion are packets. So I would imagine the kernel has to do
something and there could be some latency associated with that.

John
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Re: [PATCH 1/3] usb: dwc3: gadget: Prevent losing events in event cache

[John Youn]

On 04/10/2017 11:58 PM, Felipe Balbi wrote:
>
> Hi,
>
> John Youn <john.y...@synopsys.com> writes:
>>>> Yes it will re-assert. The interrupt line will remain asserted as long
>>>> events remain in the buffer and it is not masked. So when we
>>>> eventually unmask, the interrupt will be reasserted again immediately.
>>>>
>>>>> BTW, other option here could be using (like Baolin propose some time
>>>>> ago) dwc->lock in top half while this is held for BH.
>>>>> Question how long spin_lock() will be held in top half...
>>>>> I am not sure what option is the best.
>>>>
>>>> That won't help in this case since you can still have two calls top
>>>> top-half before a call to bottom. The lock only prevents the two from
>>>> stepping on each other, but that should already be the case without
>>>> needing the lock.
>>>>
>>> Really can we have two TH calls before BH?
>>> Interesting case :)
>>
>> That's what we seem to be seeing. I'm not sure if it is normal or not.
>
> no, that's not normal. If this is happening, there's either a HW bug
> somewhere, or we're not clearing events properly.
>
> Can you provide tracepoints of the failure? Perhaps add a trace_printk()
> call on both BH and TH just so we see when they're both called.
>
>>> You suggest we have something like this:
>>> dwc3 IRQ
>>>kernel irq_mask
>>>   dwc3 TH
>>>  mask dwc3 interrupts
>>>  get evt->count, evt->cache
>>>  write to hw (count)
>>>  return WAKE_THREAD
>>>kernel irq_unmask
>>> a) Before BH start we get another dwc3 IRQ?
>>> b) CPU0 starts with BH while we get dwc3 IRQ on CPU1?
>>>
>>> *) in normal case BH should start and in the end unmask
>>> dwc3_interrupts and after that we could get new irq
>>>
>>> If this could happen then for sure you need dwc->lock protection in TH
>>> while base on your description CPU0 can execute BH and CPU1 can handle
>>> TH - so you have to protect dwc3_event_buffer.
>>>
>>> Could you describe this more? How to reproduce?
>>
>> We can reproduce by running a file transfer continuously. It fails
>> fairly reliably, but it can take a while to hit the condition. We are
>> using our PCIe based HAPS FPGA on x86_64 using mainline kernel.
>
> Okay, please provide tracepoints of the problem in question.
>
>> Thinh can provide which IP versions we tried with.
>
> Thank you
>
>>> Do you think we introduce this when adding evt->cache in TH?
>>> Even without evt->cache we still could overwrite evt->count - so, was
>>> that seen before evt->cache?
>>
>> The multiple TH calls could have happened even before we introduced
>> evt->cache, but only with the cache would it have caused a failure due
>> to overwriting the cached events on multiple calls.
>
> Right, multiple TH calls should NEVER happen, because our IRQ line is
> masked. Unless, and this is a long shot, IRQ line is shared and ANOTHER
> device is causing IRQ to be raised. Can you show the output of:

We thought about this and ensured that there is no sharing of the IRQ.
We still see the dual calls to the top-half.

>
> # grep dwc3 /proc/interrupts
>
> If another device raises the interrupt, then we will get into our TH,
> however we should just return IRQ_HANDLED in that case because we
> shouldn't be generating events.

No, we will still be generating events. The masking of the interrupt
just deasserts the interrupt line. Events are still written out as
usual.

>
> Hmm, can you apply this patch and provide output when the failure
> happens? I suggest setting up a 100MiB trace buffer. You don't need to
> enable any tracers nor any event. trace_printk() is always enabled.

Sure we can do that.

Regards,
John


>
> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
> index 6f6f0b3be3ad..3b8185d81f9f 100644
> --- a/drivers/usb/dwc3/gadget.c
> +++ b/drivers/usb/dwc3/gadget.c
> @@ -3005,6 +3005,7 @@ static irqreturn_t dwc3_thread_interrupt(int irq, void 
> *_evt)
>   unsigned long flags;
>   irqreturn_t ret = IRQ_NONE;
>
> + trace_printk("BH\n");
>   spin_lock_irqsave(>lock, flags);
>   ret = dwc3_process_event_buf(evt);
>   spin_unlock_irqrestore(>lock, flags);
> @@ -3019,6 +3020,8 @@ static irqreturn_t dwc3_check_event_buf(struct 
> dwc3_event_buffer *evt)
>   u32 count;
>   u32 reg;
>
> + trace_printk("evt->

Re: [PATCH 1/3] usb: dwc3: gadget: Prevent losing events in event cache

[John Youn]

On 04/10/2017 11:17 PM, Janusz Dziedzic wrote:
> On 10 April 2017 at 20:43, John Youn <john.y...@synopsys.com> wrote:
>> On 04/08/2017 12:38 PM, Janusz Dziedzic wrote:
>>> 2017-04-08 1:57 GMT+02:00 Thinh Nguyen <thinh.ngu...@synopsys.com>:
>>>> The dwc3 driver can overwite its previous events if its top half IRQ
>>>> handler gets invoked again before processing the events in the cache. We
>>>> see this as a hang in the file transfer and the host will attempt to
>>>> reset the device. This shouldn't be possible in the dwc3 implementation
>>>> if the HW and the SW are in sync. However, through testing and reading
>>>> the pcie trace, the top half IRQ handler occasionally still gets invoked
>>>> one more time after HW interrupt deassertion. We suspect that there is a
>>>> small detection delay in the SW.
>>>>
>>>> Top half IRQ handler deasserts the interrupt line after it gets the
>>>> event count by writing DWC3_GEVNTSIZ_INTMASK to DWC3_GEVNTSIZ. There's a
>>>> small window for a new event coming in between reading the event count
>>>> and the interrupt deassertion. More generally, we will see 0 event
>>>> count, which should not affect anything.
>>>>
>>>> To avoid this issue, we ensure that the events in the cache are
>>>> processed before checking for the new ones. The bottom half IRQ will
>>>> unmask the DWC3_GEVNTSIZ_INTMASK once it finishes processing the events.
>>>> Top half IRQ handler needs to check whether the DWC3_GEVNTSIZ_INTMASK is
>>>> still set before storing the new events. It also should return
>>>> IRQ_HANDLED if the mask is still set since IRQ handler was invoked for
>>>> our usb interrupt.
>>>>
>>>> Signed-off-by: Thinh Nguyen <thi...@synopsys.com>
>>>> ---
>>>>  drivers/usb/dwc3/gadget.c | 5 -
>>>>  1 file changed, 4 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
>>>> index 4dc80729ae11..93d98fb7215e 100644
>>>> --- a/drivers/usb/dwc3/gadget.c
>>>> +++ b/drivers/usb/dwc3/gadget.c
>>>> @@ -3045,6 +3045,10 @@ static irqreturn_t dwc3_check_event_buf(struct 
>>>> dwc3_event_buffer *evt)
>>>> return IRQ_HANDLED;
>>>> }
>>>>
>>>> +   reg = dwc3_readl(dwc->regs, DWC3_GEVNTSIZ(0));
>>>> +   if (reg & DWC3_GEVNTSIZ_INTMASK)
>>>> +   return IRQ_HANDLED;
>>>> +
>>>> count = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0));
>>>> count &= DWC3_GEVNTCOUNT_MASK;
>>>> if (!count)
>>>> @@ -3054,7 +3058,6 @@ static irqreturn_t dwc3_check_event_buf(struct 
>>>> dwc3_event_buffer *evt)
>>>> evt->flags |= DWC3_EVENT_PENDING;
>>>>
>>>> /* Mask interrupt */
>>>> -   reg = dwc3_readl(dwc->regs, DWC3_GEVNTSIZ(0));
>>>> reg |= DWC3_GEVNTSIZ_INTMASK;
>>>> dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), reg);
>>>>
>>>> --
>>>> 2.11.0
>>>>
>>> This seems like a workaround, while when we mask interrupts we should
>>> not get IRQ before BH will done. Current driver implementation base on
>>> this.
>>> We are using 2.60a and didn't see problem you describe. Is it specyfic
>>> for some HW revision?
>>
>> Doesn't seem to be. We can try other HW versions.
>>
>>>
>>> I can imagine we can have the "last" interrupt and you will return
>>> IRQ_HANDLED. Will HW issue this interrupt once again? If not will we
>>> loose this IRQ (eg. disconnect event)?
>>>
>>
>> Yes it will re-assert. The interrupt line will remain asserted as long
>> events remain in the buffer and it is not masked. So when we
>> eventually unmask, the interrupt will be reasserted again immediately.
>>
>>> BTW, other option here could be using (like Baolin propose some time
>>> ago) dwc->lock in top half while this is held for BH.
>>> Question how long spin_lock() will be held in top half...
>>> I am not sure what option is the best.
>>
>> That won't help in this case since you can still have two calls top
>> top-half before a call to bottom. The lock only prevents the two from
>> stepping on each other, but that should already be the case without
>> needing the lock.
>>

Re: [PATCH 1/3] usb: dwc3: gadget: Prevent losing events in event cache

[John Youn]

On 04/09/2017 11:59 PM, Felipe Balbi wrote:
>
> Hi,
>
> Thinh Nguyen  writes:
>> The dwc3 driver can overwite its previous events if its top half IRQ
>> handler gets invoked again before processing the events in the cache. We
>
> interrupts are masked, why would top half get invoked again? Is this,
> perhaps, related to DWC3 3.00a which has the "Interrupt line doesn't
> lower when masked" problem? We've added a lot of code to workaround that
> problem and, apparently, it wasn't enough.

No, it is not related to that. We verified with PCIe traces. The
interrupt line gets deasserted after we mask it. And we put the
masking as close to the beginning of the top-half as possible.

>
> In any case, there's no way top half would be invoked again in a
> properly working DWC3.

Yet we still see it sometimes. Usually it doesn't create a problem,
but if there happens to be a new event there, we get the failure.

We didn't trace into that part of the kernel so we can't explain why.
But if there is any chance the interrupt line deassertion wasn't
detected in time, whatever part of the kernel that thinks it is still
asserted might just call our top-half again. This could be a totally
wrong assumption, but it doesn't seem too far-fetched.

If you have any insight on how to debug this, we can investigate this
more.


>
>> see this as a hang in the file transfer and the host will attempt to
>> reset the device. This shouldn't be possible in the dwc3 implementation
>> if the HW and the SW are in sync. However, through testing and reading
>
> it's not about SW and HW being in sync, it's about the HW being quirky,
> right?

No, we don't see any problem in the hardware. Here, being out of
"sync" just means the device hangs because of lost events. There are a
number of pretty bad failure scenarios that could happen due to this.

>
>> the pcie trace, the top half IRQ handler occasionally still gets invoked
>> one more time after HW interrupt deassertion. We suspect that there is a
>> small detection delay in the SW.
>
> so you don't really know what's going on :-) Why send a patch if you
> don't understand the problem fully?
>
>> Top half IRQ handler deasserts the interrupt line after it gets the
>> event count by writing DWC3_GEVNTSIZ_INTMASK to DWC3_GEVNTSIZ. There's a
>> small window for a new event coming in between reading the event count
>> and the interrupt deassertion. More generally, we will see 0 event
>> count, which should not affect anything.
>
> this new event can come, and it'll remain in the event buffer. We have
> masked the IRQ line and this should be enough to make sure IRQ isn't
> generated again. Why is the IRQ raising again? Which kernel version are
> you testing? Which DWC3 revision? Do you have interrupt moderation?

It's not about the new event. We see the case where the top-half is
called again just after we mask the interrupt without any events too.
That's probably the majority of the time it occurs. It's just that if
this case happens to coincide with a new event, everything gets
screwed up.

An alternative fix is to not allow the top-half to overwrite the event
cache. Just append and update it. The top and bottom are already
mutually exclusive so it should be fine.

Regards,
John
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Re: [PATCH 1/3] usb: dwc3: gadget: Prevent losing events in event cache

[John Youn]

On 04/08/2017 12:38 PM, Janusz Dziedzic wrote:
> 2017-04-08 1:57 GMT+02:00 Thinh Nguyen :
>> The dwc3 driver can overwite its previous events if its top half IRQ
>> handler gets invoked again before processing the events in the cache. We
>> see this as a hang in the file transfer and the host will attempt to
>> reset the device. This shouldn't be possible in the dwc3 implementation
>> if the HW and the SW are in sync. However, through testing and reading
>> the pcie trace, the top half IRQ handler occasionally still gets invoked
>> one more time after HW interrupt deassertion. We suspect that there is a
>> small detection delay in the SW.
>>
>> Top half IRQ handler deasserts the interrupt line after it gets the
>> event count by writing DWC3_GEVNTSIZ_INTMASK to DWC3_GEVNTSIZ. There's a
>> small window for a new event coming in between reading the event count
>> and the interrupt deassertion. More generally, we will see 0 event
>> count, which should not affect anything.
>>
>> To avoid this issue, we ensure that the events in the cache are
>> processed before checking for the new ones. The bottom half IRQ will
>> unmask the DWC3_GEVNTSIZ_INTMASK once it finishes processing the events.
>> Top half IRQ handler needs to check whether the DWC3_GEVNTSIZ_INTMASK is
>> still set before storing the new events. It also should return
>> IRQ_HANDLED if the mask is still set since IRQ handler was invoked for
>> our usb interrupt.
>>
>> Signed-off-by: Thinh Nguyen 
>> ---
>>  drivers/usb/dwc3/gadget.c | 5 -
>>  1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
>> index 4dc80729ae11..93d98fb7215e 100644
>> --- a/drivers/usb/dwc3/gadget.c
>> +++ b/drivers/usb/dwc3/gadget.c
>> @@ -3045,6 +3045,10 @@ static irqreturn_t dwc3_check_event_buf(struct 
>> dwc3_event_buffer *evt)
>> return IRQ_HANDLED;
>> }
>>
>> +   reg = dwc3_readl(dwc->regs, DWC3_GEVNTSIZ(0));
>> +   if (reg & DWC3_GEVNTSIZ_INTMASK)
>> +   return IRQ_HANDLED;
>> +
>> count = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0));
>> count &= DWC3_GEVNTCOUNT_MASK;
>> if (!count)
>> @@ -3054,7 +3058,6 @@ static irqreturn_t dwc3_check_event_buf(struct 
>> dwc3_event_buffer *evt)
>> evt->flags |= DWC3_EVENT_PENDING;
>>
>> /* Mask interrupt */
>> -   reg = dwc3_readl(dwc->regs, DWC3_GEVNTSIZ(0));
>> reg |= DWC3_GEVNTSIZ_INTMASK;
>> dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), reg);
>>
>> --
>> 2.11.0
>>
> This seems like a workaround, while when we mask interrupts we should
> not get IRQ before BH will done. Current driver implementation base on
> this.
> We are using 2.60a and didn't see problem you describe. Is it specyfic
> for some HW revision?

Doesn't seem to be. We can try other HW versions.

>
> I can imagine we can have the "last" interrupt and you will return
> IRQ_HANDLED. Will HW issue this interrupt once again? If not will we
> loose this IRQ (eg. disconnect event)?
>

Yes it will re-assert. The interrupt line will remain asserted as long
events remain in the buffer and it is not masked. So when we
eventually unmask, the interrupt will be reasserted again immediately.

> BTW, other option here could be using (like Baolin propose some time
> ago) dwc->lock in top half while this is held for BH.
> Question how long spin_lock() will be held in top half...
> I am not sure what option is the best.

That won't help in this case since you can still have two calls top
top-half before a call to bottom. The lock only prevents the two from
stepping on each other, but that should already be the case without
needing the lock.

Regards,
John
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Re: [PATCH] usb: dwc3: gadget: skip Set/Clear Halt when invalid

[John Youn]

On 04/04/2017 01:09 AM, Felipe Balbi wrote:
>
> Hi John,
>
> Felipe Balbi  writes:
>> At least macOS seems to be sending
>> ClearFeature(ENDPOINT_HALT) to endpoints which
>> aren't Halted. This makes DWC3's CLEARSTALL command
>> time out which causes several issues for the driver.
>>
>> Instead, let's just return 0 and bail out early.
>>
>> Cc: 
>> Signed-off-by: Felipe Balbi 
>> ---
>>
>> this falls into "has never worked before" category, so I'll be sending
>> it together with other patches for v4.11 merge window. Still, it's a
>> valid bug that's likely needed for stable trees.
>>
>>  drivers/usb/dwc3/gadget.c | 5 +
>>  1 file changed, 5 insertions(+)
>>
>> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
>> index 6faf484e5dfc..0a664d8eba3f 100644
>> --- a/drivers/usb/dwc3/gadget.c
>> +++ b/drivers/usb/dwc3/gadget.c
>> @@ -1379,6 +1379,9 @@ int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int 
>> value, int protocol)
>>  unsigned transfer_in_flight;
>>  unsigned started;
>>
>> +if (dep->flags & DWC3_EP_STALL)
>> +return 0;
>> +
>>  if (dep->number > 1)
>>  trb = dwc3_ep_prev_trb(dep, dep->trb_enqueue);
>>  else
>> @@ -1400,6 +1403,8 @@ int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int 
>> value, int protocol)
>>  else
>>  dep->flags |= DWC3_EP_STALL;
>>  } else {
>> +if (!(dep->flags & DWC3_EP_STALL))
>> +return 0;
>>
>>  ret = dwc3_send_clear_stall_ep_cmd(dep);
>>  if (ret)
>
> Reviving this old thread here. While $subject allowed dwc3 to work when
> attached to macOS Host, I fear that we might have more issues than not
> in the future. The reason is that USB20 spec allows hosts to use
> ClearFeature(ENDPOINT_HALT) as a "Reset Data Toggle/SeqN" hint.
>
> With this, we're basically blocking that possibility. Still, without
> $subject, ClearStall commands were timing out. I'll try to do a local
> revert here and check what happens in this case, but would you have any
> idea why ClearStall would time out like that?
>

Hi Felipe,

I think Thinh Nguyen e-mailed you about this before saying it caused a
regression for us. But he has not had time to look into it further and
follow-up yet.

No idea about the timing out on Mac though. We can try to reproduce
this when we have some time and take a look. Do you have a USB trace?

Regards,
John
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Re: [PATCH v2 3/4] usb: dwc3: add dual-role support

[John Youn]

On 03/30/2017 02:27 AM, Felipe Balbi wrote:
>
> Hi
>
> Roger Quadros  writes:
> For something that simple, we wouldn't even need to use OTG FSM layer
> because that brings no benefit for such a simple requirement.

 no no. I think you got it wrong. I'm not using the OTG FSM layer at all :).
>>>
>>> what are all the otg_fsm mentions then? Also you have:
>>>
>>>  +  struct usb_otg  otg;
>>>  +  struct otg_fsm  otg_fsm;
>>>
>>
>> I'll get rid of them. They aren't really needed.
>> Now I see why you thought I was using the otg_fsm layer. :)
>
> fair enough
>
> Can you either confirm or refute the statement above?

 The real problem was that if host adapter was removed during a system 
 suspend
 then while resuming XHCI was locking up like below. This is probably 
 because
 we're trying to remove/Halt the HCD in the otg_irq_handler before XHCI 
 driver has resumed?

 How can we ensure that we call dwc3_host_exit() only *after* XHCI driver 
 has resumed?
>>>
>>> Well, xHCI is our child, so driver model should *already* be
>>> guaranteeing that, no? Specially since you're calling this from
>>> ->complete() which happens after ->resume() has been called for the
>>> entire tree. It's true, however, that dwc3's ->complete() will be called
>>> before xhci's ->complete(). Is this the problem you're pointing at? Or
>>> do you mean xHCI is runtime suspended (or runtime resuming) while you
>>> call dwc3_host_exit()? If that's the case, then there's a bug in xHCI
>>> itself.
>>
>> Yes dwc3->complete() being called before xhci->complete(), and so HCD being
>> removed before xhci->complete() causes the lockup.
>>
>> It could be a bug in xHCI driver as well.
>
> I see...
>
 We need a way to mask the OTG events without loosing them while they are 
 masked.
 Do you know how that could be achieved?
>>>
>>> masking doesn't clear events. It just masks them. Look at gadget.c for
>>> how we do it. Basically, the code we have here is racy, really racy and
>>> will cause hard-to-debug lockups. Your code can only work with
>>> IRQF_ONESHOT, which we don't want to add back.
>>>
>>> In any case, to mask events, you set BIT 31 in GEVNTSIZ register. Just
>>> copy it from gadget.c ;-)
>>
>> Isn't GEVNTSIZ specific to device side? We're talking about the OTG block 
>> here.
>
> that's true, sorry.
>
>> Are you sure that setting bit 31 of GEVNTSIZ will mask OTG_irq? I don't 
>> think so.
>>
>> Note that OTG_IRQ is a separate IRQ line than PERIPHERAL_IRQ.
>
> man, there's really no way to mask OTG events. This can be bad :-)
>
> John, can you confirm if there's really no way of masking OTG events
> without loosing them?

Not sure. I'll have to verify.

If the IP version is 3.00a or higher you could experiment with using
interrupt moderation as a global mask.

John
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Re: dwc2_hc_chhltd_intr_dma - ChHltd set errors?

[John Youn]

On 03/31/2017 04:04 PM, John Stultz wrote:
> On Thu, Mar 2, 2017 at 12:00 PM, John Stultz  wrote:
>> Hey John,
>>   We've noticed that when using usb ethernet adapters on HiKey, we
>> occasionally see errors like:
>>
>> dwc2 f72c.usb: dwc2_hc_chhltd_intr_dma: Channel 0 - ChHltd set,
>> but reason is unknown
>> dwc2 f72c.usb: hcint 0x0002, intsts 0x06200029
>>
>> dwc2 f72c.usb: dwc2_hc_chhltd_intr_dma: Channel 11 - ChHltd set,
>> but reason is unknown
>> dwc2 f72c.usb: hcint 0x0002, intsts 0x04200029
>>
>> Sometimes followed up by a usb error in the driver, something like:
>> asix 1-1.2:1.0 eth0: asix_rx_fixup() Bad Header Length 0x36000807, offset 68
>>
>> Curious if you've seen any reports like this?
>
> Hey John,
>   Just wanted to check in again on this to see if you've seen anything
> like it? I've not had too much time to debug it, but my attempts so
> far haven't been productive.
>

I don't think I've seen that.

We'll try to take a look this week.

Thanks,
John


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Re: [PATCH v2] usb: dwc2: Make sure we disconnect the gadget state

[John Youn]

On 03/29/2017 08:23 PM, John Stultz wrote:
> I had seen some odd behavior with HiKey's usb-gadget interface
> that I finally seemed to have chased down. Basically every other
> time I plugged in the OTG port, the gadget interface would
> properly initialize. The other times, I'd get a big WARN_ON
> in dwc2_hsotg_init_fifo() about the fifo_map not being clear.
>
> Ends up if we don't disconnect the gadget state, the fifo-map
> doesn't get cleared properly, which causes WARN_ON messages and
> also results in the device not properly being setup as a gadget
> every other time the OTG port is connected.
>
> So this patch adds a call to dwc2_hsotg_disconnect() in the
> reset path so the state is properly cleared.
>
> With it, the gadget interface initializes properly on every
> plug in.
>
> Cc: Wei Xu <xuw...@hisilicon.com>
> Cc: Guodong Xu <guodong...@linaro.org>
> Cc: Amit Pundir <amit.pun...@linaro.org>
> Cc: Rob Herring <robh...@kernel.org>
> Cc: John Youn <johny...@synopsys.com>
> Cc: Douglas Anderson <diand...@chromium.org>
> Cc: Chen Yu <cheny...@huawei.com>
> Cc: Felipe Balbi <felipe.ba...@linux.intel.com>
> Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
> Cc: linux-usb@vger.kernel.org
> Acked-by: John Youn <johny...@synopsys.com>
> Signed-off-by: John Stultz <john.stu...@linaro.org>
> ---
> v2: Minor typo fix suggested by Sergei Shtylyov
> ---
>  drivers/usb/dwc2/hcd.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
> index a73722e..91ed5b6 100644
> --- a/drivers/usb/dwc2/hcd.c
> +++ b/drivers/usb/dwc2/hcd.c
> @@ -3264,6 +3264,7 @@ static void dwc2_conn_id_status_change(struct 
> work_struct *work)
>   dwc2_core_init(hsotg, false);
>   dwc2_enable_global_interrupts(hsotg);
>   spin_lock_irqsave(>lock, flags);
> + dwc2_hsotg_disconnect(hsotg);
>   dwc2_hsotg_core_init_disconnected(hsotg, false);
>   spin_unlock_irqrestore(>lock, flags);
>   dwc2_hsotg_core_connect(hsotg);
>


Hi Felipe,

You may want to use this patch to replace the one in your testing/next
as this has a cleaner commit message.

Thanks,
John
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Re: bug? dwc2: insufficient fifo memory

[John Youn]

+linux-usb

On 2/24/2017 2:46 PM, John Stultz wrote:
> Hey John,
>   So after the USB tree landed in 4.11-rc, I've been seeing the
> following warning at bootup.
>
> It seems the fifo_mem/total_fifo_size value on hikey is 1920, but I'm
> seeing the addresses zip upward quickly as the txfsz values are all
> 2048.  Not exactly sure whats wrong here.  Things still seem to work
> properly.
>

Hi John,

Could you send us a register dump before and after you load the
function? You can get this through debugfs.

Regards,
John
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Re: [RESEND PATCH v2 0/2] add multiple clock handling for dwc2 driver

[John Youn]

On 2/21/2017 5:30 PM, Frank Wang wrote:
> Hi John and Greg,
>
> Friendly ping... :-)
>

Hi Frank,

We'll take a look at this and get back to you soon.

Regards,
John


> On 2017/2/10 11:06, Frank Wang wrote:
>> Resend this series to involve device tree maintainer and add 'Reviewed-by' 
>> tag for driver.
>>
>> The Current default dwc2 just handle one clock named otg, however, it may 
>> have
>> two or more clock need to manage for some new SoCs(such as RK3328), so this
>> adds change clk to clk's array of dwc2_hsotg to handle more clocks operation.
>>
>> Changes in v2:
>>   - amend dwc2 clocks property in DT.
>>   - change DWC2_MAX_CLKS to 5 and amend commit message.
>>
>> Frank Wang (2):
>>Documentation: dt: dwc2: amend clocks property
>>usb: dwc2: add multiple clocks handling
>>
>>   Documentation/devicetree/bindings/usb/dwc2.txt | 13 +++--
>>   drivers/usb/dwc2/core.h|  5 +++-
>>   drivers/usb/dwc2/platform.c| 39 
>> +-
>>   3 files changed, 40 insertions(+), 17 deletions(-)
>>
>
> BR.
> Frank
>
>

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Re: [PATCH 15/15] usb: dwc2: Replace msleep with mdelay in dwc2_clear_force_mode()

[John Youn]

On 2/21/2017 5:16 AM, David Laight wrote:
> From: Vardan Mikayelyan
>> Sent: 20 February 2017 15:15
>> dwc2_clear_force_mode() can be called in hibernation exit flow which
>> can occur in interrupt context.
>>
>> Signed-off-by: Vardan Mikayelyan 
>> ---
>>  drivers/usb/dwc2/core.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
>> index 2c90d8e..c7c76e8 100644
>> --- a/drivers/usb/dwc2/core.c
>> +++ b/drivers/usb/dwc2/core.c
>> @@ -634,7 +634,7 @@ void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg)
>>  dwc2_writel(gusbcfg, hsotg->regs + GUSBCFG);
>>
>>  if (dwc2_iddig_filter_enabled(hsotg))
>> -msleep(100);
>> +mdelay(100);
>
> Spinning for 100ms isn't good at all.
>

Agreed.

Vardan, I thought you had a change that avoided this issue entirely?

Thanks,
John
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Re: [RFC][PATCH] usb: dwc2: Make sure we disconnect the gadget state

[John Youn]

On 2/13/2017 8:08 PM, John Stultz wrote:
> Just wanted to get some early feedback on this before I submit
> it for real for the 4.12 timeframe. This is the last patch, that
> isn't already queued, which I need to get hikey's USB working
> properly.
>
> Feedback would be greatly appreciated!
>


It looks good to me.

Acked-by: John Youn <johny...@synopsys.com>

Regards,
John



> thanks
> -john
>
>
> I had seen some odd behavior with HiKey's usb-gadget interface
> that I finally seemed to have chased down. Basically every other
> time I pluged in the OTG port, the gadget interface would
> properly initialize. The other times, I'd get a big WARN_ON
> in dwc2_hsotg_init_fifo() about the fifo_map not being clear.
>
> Ends up if we don't disconnect the gadget state, the fifo-map
> doesn't get cleared properly, which causes WARN_ON messages and
> also results in the device not properly being setup as a gadget
> every other time the OTG port is connected.
>
> So this patch adds a call to dwc2_hsotg_disconnect() in the
> reset path so the state is properly cleared.
>
> With it, the gadget interface initializes properly on every
> plug in.
>
> Cc: Wei Xu <xuw...@hisilicon.com>
> Cc: Guodong Xu <guodong...@linaro.org>
> Cc: Amit Pundir <amit.pun...@linaro.org>
> Cc: Rob Herring <robh...@kernel.org>
> Cc: John Youn <johny...@synopsys.com>
> Cc: Douglas Anderson <diand...@chromium.org>
> Cc: Chen Yu <cheny...@huawei.com>
> Cc: Felipe Balbi <felipe.ba...@linux.intel.com>
> Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
> Cc: linux-usb@vger.kernel.org
> Signed-off-by: John Stultz <john.stu...@linaro.org>
> ---
>  drivers/usb/dwc2/hcd.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
> index 90bd248..067202d 100644
> --- a/drivers/usb/dwc2/hcd.c
> +++ b/drivers/usb/dwc2/hcd.c
> @@ -3266,6 +3266,7 @@ static void dwc2_conn_id_status_change(struct 
> work_struct *work)
>   dwc2_core_init(hsotg, false);
>   dwc2_enable_global_interrupts(hsotg);
>   spin_lock_irqsave(>lock, flags);
> + dwc2_hsotg_disconnect(hsotg);
>   dwc2_hsotg_core_init_disconnected(hsotg, false);
>   spin_unlock_irqrestore(>lock, flags);
>   dwc2_hsotg_core_connect(hsotg);
>

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Re: [RESEND PATCH 1/1] usb: dwc2: add multiple clock handling

[John Youn]

On 2/6/2017 7:18 PM, Frank Wang wrote:
> Hi Heiko, John and Greg,
>
> On 2017/2/7 8:06, Heiko Stuebner wrote:
>> Hi Frank,
>>
>> Am Sonntag, 5. Februar 2017, 10:51:01 CET schrieb Frank Wang:
>>> Originally, dwc2 just handle one clock named otg, however, it may have
>>> two or more clock need to manage for some new SoCs, so this adds
>>> change clk to clk's array of dwc2_hsotg to handle more clocks operation.
>>>
>>> Signed-off-by: Frank Wang 
>>> ---
>>>   drivers/usb/dwc2/core.h |  5 -
>>>   drivers/usb/dwc2/platform.c | 39 ++-
>>>   2 files changed, 30 insertions(+), 14 deletions(-)
>>>
>>> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
>>> index 1a7e830..d10a466 100644
>>> --- a/drivers/usb/dwc2/core.h
>>> +++ b/drivers/usb/dwc2/core.h
>>> @@ -121,6 +121,9 @@ static inline void dwc2_writel(u32 value, void __iomem
>>> *addr) /* Maximum number of Endpoints/HostChannels */
>>>   #define MAX_EPS_CHANNELS  16
>>>
>>> +/* Maximum number of dwc2 clocks */
>>> +#define DWC2_MAX_CLKS 3
>> why 3 clocks?
>
> Showing from the chapter 2.4 of dwc otg databook v3.10, it seems there
> should be five clocks, am I right?
> hclk/pmu_hclk/utmi_clk/ulpi_clk/utmifs_clk48
>
>> I.e. the binding currently only specifies the "otg" clock, so you should
>> definitly amend it to also specifiy this "pmu" clock - in a separate patch
>> before this one of course :-) .
>> "pmu" also looks like a good name for that clock-binding and these new clocks
>> of course should be optional in the binding.
>
> No problem, I will amend the binding when the implementation scheme is
> clear.
>
>> And ideally also just specify this mysterious third clock as well while 
>> you're
>> at it.
>>
>>> +
>>>   /* dwc2-hsotg declarations */
>>>   static const char * const dwc2_hsotg_supply_names[] = {
>>> "vusb_d",   /* digital USB supply, 1.2V */
>>> @@ -913,7 +916,7 @@ struct dwc2_hsotg {
>>> spinlock_t lock;
>>> void *priv;
>>> int irq;
>>> -   struct clk *clk;
>>> +   struct clk *clks[DWC2_MAX_CLKS];
>>> struct reset_control *reset;
>>>
>>> unsigned int queuing_high_bandwidth:1;
>> [...]
>>
>>> @@ -123,17 +123,20 @@ static int dwc2_get_dr_mode(struct dwc2_hsotg *hsotg)
>>>   static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
>>>   {
>>> struct platform_device *pdev = to_platform_device(hsotg->dev);
>>> -   int ret;
>>> +   int clk, ret;
>>>
>>> ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
>>> hsotg->supplies);
>>> if (ret)
>>> return ret;
>>>
>>> -   if (hsotg->clk) {
>>> -   ret = clk_prepare_enable(hsotg->clk);
>>> -   if (ret)
>>> +   for (clk = 0; clk < DWC2_MAX_CLKS && hsotg->clks[clk]; clk++) {
>>> +   ret = clk_prepare_enable(hsotg->clks[clk]);
>>> +   if (ret) {
>>> +   while (--clk >= 0)
>>> +   clk_disable_unprepare(hsotg->clks[clk]);
>>> return ret;
>>> +   }
>>> }
>>>
>>> if (hsotg->uphy) {
>>> @@ -168,7 +171,7 @@ int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
>>>   static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
>>>   {
>>> struct platform_device *pdev = to_platform_device(hsotg->dev);
>>> -   int ret = 0;
>>> +   int clk, ret = 0;
>>>
>>> if (hsotg->uphy) {
>>> usb_phy_shutdown(hsotg->uphy);
>>> @@ -182,8 +185,9 @@ static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg
>>> *hsotg) if (ret)
>>> return ret;
>>>
>>> -   if (hsotg->clk)
>>> -   clk_disable_unprepare(hsotg->clk);
>>> +   for (clk = DWC2_MAX_CLKS - 1; clk >= 0; clk--)
>>> +   if (hsotg->clks[clk])
>>> +   clk_disable_unprepare(hsotg->clks[clk]);
>>> ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies),
>>>  hsotg->supplies);
>>> @@ -209,7 +213,7 @@ int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
>>>
>>>   static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
>>>   {
>>> -   int i, ret;
>>> +   int i, clk, ret;
>>>
>>> hsotg->reset = devm_reset_control_get_optional(hsotg->dev, "dwc2");
>>> if (IS_ERR(hsotg->reset)) {
>>> @@ -282,11 +286,20 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg
>>> *hsotg) hsotg->phyif = GUSBCFG_PHYIF8;
>>> }
>>>
>>> -   /* Clock */
>>> -   hsotg->clk = devm_clk_get(hsotg->dev, "otg");
>>> -   if (IS_ERR(hsotg->clk)) {
>>> -   hsotg->clk = NULL;
>>> -   dev_dbg(hsotg->dev, "cannot get otg clock\n");
>>> +   /* Clocks */
>>> +   for (clk = 0; clk < DWC2_MAX_CLKS; clk++) {
>>> +   hsotg->clks[clk] = of_clk_get(hsotg->dev->of_node, clk);
>>> +   if (IS_ERR(hsotg->clks[clk])) {
>>> +   ret = PTR_ERR(hsotg->clks[clk]);
>>> +   if (ret == -EPROBE_DEFER) {
>>> +   while (--clk >= 0)
>>> +

Re: [PATCH v5 1/5] usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

[John Youn]

On 1/31/2017 5:26 PM, Bruno Herrera wrote:
> This patch introduces a new parameter to activate USB OTG HS/FS core
> embedded phy transceiver. The STM32F4x9 SoC uses the GGPIO register
> to enable the transceiver.
> Also add the dwc2_set_params function for stm32f4 otg fs.
>
> Signed-off-by: Bruno Herrera <bruherr...@gmail.com>

Acked-by: John Youn <johny...@synopsys.com>

Regards,
John


> ---
>  drivers/usb/dwc2/core.h   |  5 +
>  drivers/usb/dwc2/hcd.c| 15 ++-
>  drivers/usb/dwc2/hw.h |  2 ++
>  drivers/usb/dwc2/params.c | 19 +++
>  4 files changed, 40 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
> index b9b62f1..252400b 100644
> --- a/drivers/usb/dwc2/core.h
> +++ b/drivers/usb/dwc2/core.h
> @@ -423,6 +423,10 @@ enum dwc2_ep0_state {
>   *   needed.
>   *   0 - No (default)
>   *   1 - Yes
> + * @activate_stm_fs_transceiver: Activate internal transceiver using GGPIO
> + *   register.
> + *   0 - Deactivate the transceiver (default)
> + *   1 - Activate the transceiver
>   * @g_dma:  Enables gadget dma usage (default: autodetect).
>   * @g_dma_desc: Enables gadget descriptor DMA (default: autodetect).
>   * @g_rx_fifo_size:  The periodic rx fifo size for the device, in
> @@ -477,6 +481,7 @@ struct dwc2_core_params {
>   bool uframe_sched;
>   bool external_id_pin_ctl;
>   bool hibernation;
> + bool activate_stm_fs_transceiver;
>   u16 max_packet_count;
>   u32 max_transfer_size;
>   u32 ahbcfg;
> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
> index a73722e..b5a70b6 100644
> --- a/drivers/usb/dwc2/hcd.c
> +++ b/drivers/usb/dwc2/hcd.c
> @@ -121,7 +121,7 @@ static void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg 
> *hsotg)
>
>  static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
>  {
> - u32 usbcfg, i2cctl;
> + u32 usbcfg, ggpio, i2cctl;
>   int retval = 0;
>
>   /*
> @@ -145,6 +145,19 @@ static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, 
> bool select_phy)
>   return retval;
>   }
>   }
> +
> + if (hsotg->params.activate_stm_fs_transceiver) {
> + ggpio = dwc2_readl(hsotg->regs + GGPIO);
> + if (!(ggpio & GGPIO_STM32_OTG_GCCFG_PWRDWN)) {
> + dev_dbg(hsotg->dev, "Activating transceiver\n");
> + /*
> +  * STM32F4x9 uses the GGPIO register as general
> +  * core configuration register.
> +  */
> + ggpio |= GGPIO_STM32_OTG_GCCFG_PWRDWN;
> + dwc2_writel(ggpio, hsotg->regs + GGPIO);
> + }
> + }
>   }
>
>   /*
> diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h
> index bde7248..4592012 100644
> --- a/drivers/usb/dwc2/hw.h
> +++ b/drivers/usb/dwc2/hw.h
> @@ -225,6 +225,8 @@
>
>  #define GPVNDCTL HSOTG_REG(0x0034)
>  #define GGPIOHSOTG_REG(0x0038)
> +#define GGPIO_STM32_OTG_GCCFG_PWRDWN BIT(16)
> +
>  #define GUID HSOTG_REG(0x003c)
>  #define GSNPSID  HSOTG_REG(0x0040)
>  #define GHWCFG1  HSOTG_REG(0x0044)
> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
> index 2990c34..9cd8722 100644
> --- a/drivers/usb/dwc2/params.c
> +++ b/drivers/usb/dwc2/params.c
> @@ -120,6 +120,22 @@ static void dwc2_set_amcc_params(struct dwc2_hsotg 
> *hsotg)
>   p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT;
>  }
>
> +static void dwc2_set_stm32f4x9_fsotg_params(struct dwc2_hsotg *hsotg)
> +{
> + struct dwc2_core_params *p = >params;
> +
> + p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
> + p->speed = DWC2_SPEED_PARAM_FULL;
> + p->host_rx_fifo_size = 128;
> + p->host_nperio_tx_fifo_size = 96;
> + p->host_perio_tx_fifo_size = 96;
> + p->max_packet_count = 256;
> + p->phy_type = DWC2_PHY_TYPE_PARAM_FS;
> + p->i2c_enable = false;
> + p->uframe_sched = false;
> + p->activate_stm_fs_transceiver = true;
> +}
> +
>  const struct of_device_id dwc2_of_match_table[] = {
>   { .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params },
>   { .compatible = "hisilic

Re: [PATCH v4 1/5] usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

[John Youn]

On 1/28/2017 6:21 PM, Bruno Herrera wrote:
> This patch introduces a new parameter to activate USB OTG HS/FS core embedded
> phy transceiver. The STM32F4x9 SoC uses the GGPIO register to enable the 
> transceiver.
> Also add the dwc2_core_params structure for stm32f4 otg fs.
>
> Signed-off-by: Bruno Herrera 
> ---
>  drivers/usb/dwc2/core.h   |  4 
>  drivers/usb/dwc2/hcd.c| 13 -
>  drivers/usb/dwc2/hw.h |  2 ++
>  drivers/usb/dwc2/params.c | 20 
>  4 files changed, 38 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
> index b9b62f1..ed8ce42 100644
> --- a/drivers/usb/dwc2/core.h
> +++ b/drivers/usb/dwc2/core.h
> @@ -423,6 +423,9 @@ enum dwc2_ep0_state {
>   *   needed.
>   *   0 - No (default)
>   *   1 - Yes
> + * @activate_transceiver: Activate internal transceiver using GGPIO register.
> + *   0 - Deactivate the transceiver (default)
> + *   1 - Activate the transceiver
>   * @g_dma:  Enables gadget dma usage (default: autodetect).
>   * @g_dma_desc: Enables gadget descriptor DMA (default: autodetect).
>   * @g_rx_fifo_size:  The periodic rx fifo size for the device, in
> @@ -477,6 +480,7 @@ struct dwc2_core_params {
>   bool uframe_sched;
>   bool external_id_pin_ctl;
>   bool hibernation;
> + bool activate_transceiver;

Seeing as this is very specific to the STM FS platform using a GGPIO
register bit that only exists for it, maybe call it something like:

activate_stm_fs_transceiver


>   u16 max_packet_count;
>   u32 max_transfer_size;
>   u32 ahbcfg;
> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
> index a73722e..190a441 100644
> --- a/drivers/usb/dwc2/hcd.c
> +++ b/drivers/usb/dwc2/hcd.c
> @@ -121,7 +121,7 @@ static void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg 
> *hsotg)
>
>  static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
>  {
> - u32 usbcfg, i2cctl;
> + u32 usbcfg, ggpio, i2cctl;
>   int retval = 0;
>
>   /*
> @@ -145,6 +145,17 @@ static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, 
> bool select_phy)
>   return retval;
>   }
>   }
> +
> + ggpio = dwc2_readl(hsotg->regs + GGPIO);
> + if (!(ggpio & GGPIO_STM32_OTG_GCCFG_PWRDWN) &&
> + (hsotg->params.activate_transceiver > 0)) {

This is bool so no need to check > 0.

> + dev_dbg(hsotg->dev, "Activating transceiver\n");
> + /* STM32F4x9 uses the GGPIO register as general core

Use '/*' by itself to start multi-line comments.

> +  * configuration register.
> +  */
> + ggpio |= GGPIO_STM32_OTG_GCCFG_PWRDWN;
> + dwc2_writel(ggpio, hsotg->regs + GGPIO);
> + }

Make this whole block conditional on the parameter.

>   }
>
>   /*
> diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h
> index bde7248..9b432c1 100644
> --- a/drivers/usb/dwc2/hw.h
> +++ b/drivers/usb/dwc2/hw.h
> @@ -225,6 +225,8 @@
>
>  #define GPVNDCTL HSOTG_REG(0x0034)
>  #define GGPIOHSOTG_REG(0x0038)
> +#define GGPIO_STM32_OTG_GCCFG_PWRDWN (1 << 16)
> +

Use BIT macro

>  #define GUID HSOTG_REG(0x003c)
>  #define GSNPSID  HSOTG_REG(0x0040)
>  #define GHWCFG1  HSOTG_REG(0x0044)
> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
> index 2990c34..a35abba 100644
> --- a/drivers/usb/dwc2/params.c
> +++ b/drivers/usb/dwc2/params.c
> @@ -120,6 +120,23 @@ static void dwc2_set_amcc_params(struct dwc2_hsotg 
> *hsotg)
>   p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT;
>  }
>
> +static void dwc2_set_stm32f4x9_fsotg_params(struct dwc2_hsotg *hsotg)
> +{
> + struct dwc2_core_params *p = >params;
> +
> + p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
> + p->speed = DWC2_SPEED_PARAM_FULL;
> + p->host_rx_fifo_size = 128;
> + p->host_nperio_tx_fifo_size = 96;
> + p->host_perio_tx_fifo_size = 96;
> + p->max_packet_count = 256;
> + p->phy_type = DWC2_PHY_TYPE_PARAM_FS;
> + p->i2c_enable = false;
> + p->uframe_sched = false;
> + p->activate_transceiver = true;
> +

Remove newline

[snip]

Regards,
John
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Re: [PATCH] usb: dwc2: remove deprecated comment in definition of struct dwc2_core_params

[John Youn]

On 1/31/2017 10:55 AM, John Youn wrote:
> On 1/28/2017 1:42 PM, Heiner Kallweit wrote:
>> Since commit 0a7d0d7fa820 "usb: dwc2: Remove dwc2_set_all_params function"
>> this comment isn't applicable any longer.
>>
>> Signed-off-by: Heiner Kallweit <hkallwe...@gmail.com>
>> ---
>>  drivers/usb/dwc2/core.h | 4 
>>  1 file changed, 4 deletions(-)
>>
>> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
>> index 570a8004..a708e4fa 100644
>> --- a/drivers/usb/dwc2/core.h
>> +++ b/drivers/usb/dwc2/core.h
>> @@ -461,10 +461,6 @@ enum dwc2_ep0_state {
>>   * default described above.
>>   */
>>  struct dwc2_core_params {
>> -/*
>> - * Don't add any non-int members here, this will break
>> - * dwc2_set_all_params!
>> - */
>>  int otg_cap;
>>  #define DWC2_CAP_PARAM_HNP_SRP_CAPABLE  0
>>  #define DWC2_CAP_PARAM_SRP_ONLY_CAPABLE 1
>>
>
> Acked-by: John Youn <johny...@synopsys.com>
>
> John
>

Actually this is already removed and queued for 4.11.

Please disregard.

Thanks,
John

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Re: [PATCH] usb: dwc2: remove deprecated comment in definition of struct dwc2_core_params

[John Youn]

On 1/28/2017 1:42 PM, Heiner Kallweit wrote:
> Since commit 0a7d0d7fa820 "usb: dwc2: Remove dwc2_set_all_params function"
> this comment isn't applicable any longer.
>
> Signed-off-by: Heiner Kallweit <hkallwe...@gmail.com>
> ---
>  drivers/usb/dwc2/core.h | 4 
>  1 file changed, 4 deletions(-)
>
> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
> index 570a8004..a708e4fa 100644
> --- a/drivers/usb/dwc2/core.h
> +++ b/drivers/usb/dwc2/core.h
> @@ -461,10 +461,6 @@ enum dwc2_ep0_state {
>   * default described above.
>   */
>  struct dwc2_core_params {
> - /*
> -  * Don't add any non-int members here, this will break
> -  * dwc2_set_all_params!
> -  */
>   int otg_cap;
>  #define DWC2_CAP_PARAM_HNP_SRP_CAPABLE   0
>  #define DWC2_CAP_PARAM_SRP_ONLY_CAPABLE  1
>

Acked-by: John Youn <johny...@synopsys.com>

John

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Re: [PATCH] usb: dwc2: introduce config parameter to ignore supplies vusb_a and vusb_d

[John Youn]

On 1/30/2017 11:13 PM, Heiner Kallweit wrote:
> Am 31.01.2017 um 03:32 schrieb John Youn:
>> On 1/28/2017 2:06 PM, Heiner Kallweit wrote:
>>> Supplies for vusb_a and vusb_d are needed only on a minority of systems
>>> supported by the dwc2 driver (AFAIK systems with Samsung SoCs).
>>>
>>> On all other systems this results in these harmless but annoying
>>> warnings:
>>>
>>> c900.usb supply vusb_d not found, using dummy regulator
>>> c900.usb supply vusb_a not found, using dummy regulator
>>>
>>> Introduce a configuration parameter to ignore the supplies on
>>> systems not needing it.
>>
>> You can probably just check for the existence of those bindings. Or
>> possibly use devm_regulator_get_optional().
>>
> Right, that we could do to silence the warning. But then we would
> loose the warning on systems where these supplies are mandatory
> (in case somebody adds a system with such a SoC and forgets to define
> the supplies in the DT).

I don't think the dwc2 driver should be doing that though. It should
treat these as optional properties and use them if available, just
like it does now for the reset control, phy, clocks, etc. Otherwise
you could make the case for adding the same flag for these other
components as well.

But really, I just don't want to add new parameters, if anything I
want to remove more of them.

Regards,
John
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Re: [PATCH v4 1/5] usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

[John Youn]

On 1/28/2017 6:21 PM, Bruno Herrera wrote:
> This patch introduces a new parameter to activate USB OTG HS/FS core embedded
> phy transceiver. The STM32F4x9 SoC uses the GGPIO register to enable the 
> transceiver.
> Also add the dwc2_core_params structure for stm32f4 otg fs.
>

Could you fix the "checkpatch --strict" issues?

Thanks,
John


> Signed-off-by: Bruno Herrera 
> ---
>  drivers/usb/dwc2/core.h   |  4 
>  drivers/usb/dwc2/hcd.c| 13 -
>  drivers/usb/dwc2/hw.h |  2 ++
>  drivers/usb/dwc2/params.c | 20 
>  4 files changed, 38 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
> index b9b62f1..ed8ce42 100644
> --- a/drivers/usb/dwc2/core.h
> +++ b/drivers/usb/dwc2/core.h
> @@ -423,6 +423,9 @@ enum dwc2_ep0_state {
>   *   needed.
>   *   0 - No (default)
>   *   1 - Yes
> + * @activate_transceiver: Activate internal transceiver using GGPIO register.
> + *   0 - Deactivate the transceiver (default)
> + *   1 - Activate the transceiver
>   * @g_dma:  Enables gadget dma usage (default: autodetect).
>   * @g_dma_desc: Enables gadget descriptor DMA (default: autodetect).
>   * @g_rx_fifo_size:  The periodic rx fifo size for the device, in
> @@ -477,6 +480,7 @@ struct dwc2_core_params {
>   bool uframe_sched;
>   bool external_id_pin_ctl;
>   bool hibernation;
> + bool activate_transceiver;
>   u16 max_packet_count;
>   u32 max_transfer_size;
>   u32 ahbcfg;
> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
> index a73722e..190a441 100644
> --- a/drivers/usb/dwc2/hcd.c
> +++ b/drivers/usb/dwc2/hcd.c
> @@ -121,7 +121,7 @@ static void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg 
> *hsotg)
>
>  static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
>  {
> - u32 usbcfg, i2cctl;
> + u32 usbcfg, ggpio, i2cctl;
>   int retval = 0;
>
>   /*
> @@ -145,6 +145,17 @@ static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, 
> bool select_phy)
>   return retval;
>   }
>   }
> +
> + ggpio = dwc2_readl(hsotg->regs + GGPIO);
> + if (!(ggpio & GGPIO_STM32_OTG_GCCFG_PWRDWN) &&
> + (hsotg->params.activate_transceiver > 0)) {
> + dev_dbg(hsotg->dev, "Activating transceiver\n");
> + /* STM32F4x9 uses the GGPIO register as general core
> +  * configuration register.
> +  */
> + ggpio |= GGPIO_STM32_OTG_GCCFG_PWRDWN;
> + dwc2_writel(ggpio, hsotg->regs + GGPIO);
> + }
>   }
>
>   /*
> diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h
> index bde7248..9b432c1 100644
> --- a/drivers/usb/dwc2/hw.h
> +++ b/drivers/usb/dwc2/hw.h
> @@ -225,6 +225,8 @@
>
>  #define GPVNDCTL HSOTG_REG(0x0034)
>  #define GGPIOHSOTG_REG(0x0038)
> +#define GGPIO_STM32_OTG_GCCFG_PWRDWN (1 << 16)
> +
>  #define GUID HSOTG_REG(0x003c)
>  #define GSNPSID  HSOTG_REG(0x0040)
>  #define GHWCFG1  HSOTG_REG(0x0044)
> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
> index 2990c34..a35abba 100644
> --- a/drivers/usb/dwc2/params.c
> +++ b/drivers/usb/dwc2/params.c
> @@ -120,6 +120,23 @@ static void dwc2_set_amcc_params(struct dwc2_hsotg 
> *hsotg)
>   p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT;
>  }
>
> +static void dwc2_set_stm32f4x9_fsotg_params(struct dwc2_hsotg *hsotg)
> +{
> + struct dwc2_core_params *p = >params;
> +
> + p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
> + p->speed = DWC2_SPEED_PARAM_FULL;
> + p->host_rx_fifo_size = 128;
> + p->host_nperio_tx_fifo_size = 96;
> + p->host_perio_tx_fifo_size = 96;
> + p->max_packet_count = 256;
> + p->phy_type = DWC2_PHY_TYPE_PARAM_FS;
> + p->i2c_enable = false;
> + p->uframe_sched = false;
> + p->activate_transceiver = true;
> +
> +}
> +
>  const struct of_device_id dwc2_of_match_table[] = {
>   { .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params },
>   { .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params  },
> @@ -133,6 +150,9 @@ const struct of_device_id dwc2_of_match_table[] = {
>   { .compatible = "amlogic,meson-gxbb-usb",
> .data = dwc2_set_amlogic_params },
>   { .compatible = "amcc,dwc-otg", .data = dwc2_set_amcc_params },
> + { .compatible = "st,stm32f4x9-fsotg",
> +   .data = dwc2_set_stm32f4x9_fsotg_params },
> + { .compatible = "st,stm32f4x9-hsotg" },
>   {},
>  };
>  MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
>

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Re: [PATCH] usb: dwc2: introduce config parameter to ignore supplies vusb_a and vusb_d

[John Youn]

On 1/28/2017 2:06 PM, Heiner Kallweit wrote:
> Supplies for vusb_a and vusb_d are needed only on a minority of systems
> supported by the dwc2 driver (AFAIK systems with Samsung SoCs).
>
> On all other systems this results in these harmless but annoying
> warnings:
>
> c900.usb supply vusb_d not found, using dummy regulator
> c900.usb supply vusb_a not found, using dummy regulator
>
> Introduce a configuration parameter to ignore the supplies on
> systems not needing it.

You can probably just check for the existence of those bindings. Or
possibly use devm_regulator_get_optional().

Also, reviewing this code, it looks like vusb_d and vusb_a should have
been documented as dwc2 bindings but never were...

John
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Re: XHCI regression on v4.10-rc1

[John Youn]

On 1/27/2017 6:53 AM, Felipe Balbi wrote:
>
> Hi,
>
> Patrice CHOTARD  writes:
 I am working on ARM STi platform, since v4.10-rc1, when booting
 B2260 or B2120 STi boards platform
 with nothing plugged on USB3 connector, i observed the following
 kernel logs :

 
 [  801.953836] usb usb6-port1: Cannot enable. Maybe the USB
 cable is bad?
>>>
>>> That's odd, why does it try to reset the port if there's nothing
>>> there?
>>>
 [  801.960455] xhci-hcd xhci-hcd.0.auto: Cannot set link state.
>>>
>>> This makes sense, nothing is connected, and we try to set link to
>>> U3 (PORT_PE == 0)
>>>
 [  801.966611] usb usb6-port1: cannot disable (err = -32)
>>> xhci reutns -EPIPE as we try to set link state to U3 while port
>>> is not enabled (PORT_PE == 0)
>>>
 [  806.083772] usb usb6-port1: Cannot enable. Maybe the USB
 cable is bad?
>>>
>>> Again, about 5 seconds later the same port is reset, while
>>> nothing is connected.
>>> Odd
>>>
 [  806.090370] xhci-hcd xhci-hcd.0.auto: Cannot set link state.
 [  806.096494] usb usb6-port1: cannot disable (err = -32)
 [  810.208766] usb usb6-port1: Cannot enable. Maybe the USB
 cable is bad?
 [  810.215374] xhci-hcd xhci-hcd.0.auto: Cannot set link state.
 [  810.221478] usb usb6-port1: cannot disable (err = -32)
 [  814.333767] usb usb6-port1: Cannot enable. Maybe the USB
 cable is bad?
 [  814.340364] xhci-hcd xhci-hcd.0.auto: Cannot set link state.
 .

 Another interesting thing is even if i plugged a device (a mass
 storage device in my case) on the USB3 connector,
 the above logs continue to appear.

 This is due to commit 37be66767e3ca "usb: hub: Fix auto-remount
 of safely removed or ejected USB-3 devices".

 I don't know if STi platforms are the only impacted by this issue.

 On v4.9 everything was ok.

>>>
>>> Was there not a single "Cannot enable. Maybe USB cable is bad"
>>> message with 4.9?
>>
>> There is no "Cannot enable. Maybe USB cable is bad" message with 4.9
>>
>>>
>>> Before commit 37be66767e3ca we forced the port to RxDetect state
>>> via Disabled state,
>>> and cleared port change flags when a usb3_port_disable() was called.
>>>
>>> after we just set the port to U3. Maybe those STi platforms
>>> depend on that cycle somehow?
>>
>> I really don't know :-(
>>
>>>
>>> Could you take logs (dmesg) of both 4.9 and 4.10-rc1 with both
>>> usb core and xhci debugging enabled:
>>>
>>> echo -n 'module xhci_hcd =p' >
>>> /sys/kernel/debug/dynamic_debug/control
>>> echo 'module usbcore =p' >/sys/kernel/debug/dynamic_debug/control
>>
>>
>> You will find below the 2 requested logs, in both case , no USB
>> cable are plugged.
>>
>> v4.9 dmesg logs :
>>
>> .
>> [   31.368022] hub 6-0:1.0: hub_resume
>> [   31.368064] xhci-hcd xhci-hcd.0.auto: get port status, actual
>> port 0 status  = 0x400340
>> [   31.368071] xhci-hcd xhci-hcd.0.auto: Get port status returned
>> 0x400340
>> [   31.368224] hub 6-0:1.0: state 7 ports 1 chg  evt 
>
> Looks like port is stuck in Compliance mode, this should only
> happen if a connect was detected,
> moving the port from RxDetect to Polling, and then timeout on
> polling to get to compliance.
>
> 4.9 is then stuck in a hub_suspend/resume loop with a port in
> compliance mode.
>>
>>
>> v4.10-rc1 dmesg logs :
>>
>> 
>> [  269.436617] usb usb6-port1: cannot disable (err = -32)
>> [  269.464728] hub 6-0:1.0: state 7 ports 1 chg  evt 0002
>> [  269.464756] xhci-hcd xhci-hcd.0.auto: get port status, actual
>> port 0 status  = 0x340
>
> I 4.10-rc1  we are again stuck in Compliance mode, but this time
> there was a event (2) visible, maybe because
> the flags were not cleared or some other reason. Now are stuck in a
> port reset loop with the
> port in compliance mode.
> So the real question is why is the port in compliance mode when
> there are no devices connected.?
>
> I'll continue looking at this more tomorrow

 So with both 4.9 and 4.10-rc the 

[PATCH] usb: dwc3: gadget: Fix starting microframe for ISOC

[John Youn]

The gadget wants to set the starting microframe for the first ISOC TRB
to 4 microframes in the future, but it does so by multiplying the
dep->interval. This only works if dep->interval = 1. For other intervals
it will put it 4 *intervals* in the future which may be way too much.

Fix so that it always adds just one interval or at least 4 microframes.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc3/gadget.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 4db97ecae885..1431bc0886fe 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -1171,8 +1171,11 @@ static void __dwc3_gadget_start_isoc(struct dwc3 *dwc,
return;
}
 
-   /* 4 micro frames in the future */
-   uf = cur_uf + dep->interval * 4;
+   /*
+* Schedule the first trb for one interval in the future or at
+* least 4 microframes.
+*/
+   uf = cur_uf + max_t(u32, 4, dep->interval);
 
__dwc3_gadget_kick_transfer(dep, uf);
 }
-- 
2.11.0

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Re: [GIT PULL] USB for v4.11

[John Youn]

On 1/26/2017 6:40 AM, Greg Kroah-Hartman wrote:
> On Thu, Jan 26, 2017 at 04:23:00PM +0200, Felipe Balbi wrote:
>>
>> Hi Greg,
>>
>> here's my pull request for v4.11. Patches tested with Intel Joule, SKL
>> and KBL.
>>
>> Let me know if you want anything to be changed.
>>
>> cheers
>>
>> The following changes since commit 49def1853334396f948dcb4cedb9347abb318df5:
>>
>>   Linux 4.10-rc4 (2017-01-15 16:21:59 -0800)
>>
>> are available in the git repository at:
>>
>>   git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git 
>> tags/usb-for-v4.11
>
> There was a merge conflict with drivers/usb/dwc2/params.c which I think
> I fixed up properly, but if you could verify it, that would be great.
>

The merge looks good to me.

Thanks,
John


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Re: [PATCH v2] usb: dwc3: handle DWC_USB3_NUM == DWC_USB3_NUM_IN_EPS

[John Youn]

On 1/24/2017 3:14 PM, Bryan O'Donoghue wrote:
>
>
> On 24/01/17 19:25, John Youn wrote:
>> On 1/24/2017 3:05 AM, Bryan O'Donoghue wrote:
>>> On 23/01/17 22:34, John Youn wrote:
>>>> On 1/23/2017 2:10 PM, Alan Stern wrote:
>>>>> On Mon, 23 Jan 2017, John Youn wrote:
>>>>>
>>>>>> On 1/22/2017 5:29 PM, Bryan O'Donoghue wrote:
>>>>>>> - DWC_USB3_NUM indicates the number of Device mode single directional
>>>>>>>   endpoints, including OUT and IN endpoint 0.
>>>>>>>
>>>>>>> - DWC_USB3_NUM_IN_EPS indicates the maximum number of Device mode IN
>>>>>>>   endpoints active at any time, including control endpoint 0.
>>>>>>>
>>>>>>> It's possible to configure RTL such that DWC_USB3_NUM_EPS is equal to
>>>>>>> DWC_USB3_NUM_IN_EPS.
>>>>>>>
>>>>>>> dwc3-core calculates the number of OUT endpoints as DWC_USB3_NUM minus
>>>>>>> DWC_USB3_NUM_IN_EPS. If RTL has been configured with DWC_USB3_NUM_IN_EPS
>>>>>>> equal to DWC_USB3_NUM then dwc3-core will calculate the number of OUT
>>>>>>> endpoints as zero.
>>>>>>>
>>>>>>> For example a from dwc3_core_num_eps() shows:
>>>>>>> [1.565000]  /usb0@f01d: found 8 IN and 0 OUT endpoints
>>>>>>>
>>>>>>> This patch works around this case by detecting when DWC_USB3_NUM_EPS is
>>>>>>> equal to DWC3_USB3_NUM_IN_EPS and over-rides the calculation of the 
>>>>>>> number
>>>>>>
>>>>>> What if NUM_IN_EPS=7 and NUM_EPS=8? You will still have a problem.
>>>>>>
>>>>>> It's possible to fix this for the general case rather than for this
>>>>>> specific case.
>>>>>
>>>>> What is the reason for computing NUM_OUT_EPS in the first place?
>>>>> Isn't it true that any endpoint can be used as an OUT endpoint?
>>>>>
>>>>> So the real restrictions on a configuration are:
>>>>>
>>>>>   number of IN endpoints <= NUM_IN_EPS, and
>>>>>
>>>>>   number of IN endpoints + number of OUT endpoints <= NUM_EPS,
>>>>>
>>>>> where ep0 must be counted twice, as both an IN and an OUT endpoint.
>>>>> The value of NUM_OUT_EPS isn't used and shouldn't matter.
>>>>>
>>>>
>>>> Yes that's correct. The general fix should take all that into account
>>>> so that any combination of NUM_EPS and NUM_IN_EPS will work fine.
>>>>
>>>> However it must also account for FPGA configs where each HW endpoint
>>>> has a fixed number/direction, which the current code is compatible
>>>> with.
>>>
>>> I'm not scanning something here..
>>>
>>> If FPGA configurations can have fixed endpoint directions then you could
>>> conceivably have a control IN/OUT pair plus a number a fixed
>>> configuration of all IN or all OUT endpoints, even checking
>>> GHWPARAMS6.EN_FPGA wouldn't let you know which direction those endpoints
>>> had been configured to.
>>>
>>> If I understand you correctly an FPGA could have pretty much any bit-map
>>> of fixed endpoint directions - so just calculating the number of IN/OUT
>>> endpoints based on some combination of DWC_USB3_NUM_IN_EPS and
>>> DWC_USB3_NUM_EPS wouldn't inform you of the fixed direction of an
>>> individual endpoint ... You'd need a descriptor specifying the fixed
>>> direction of each endpoint right ?
>>>
>>
>> Hi Bryan,
>>
>> The EP num and direction are fixed in a predefined way.
>
> Fair enough.
>
> See
>> DWC_USB3_EN_LOG_PHYS_EP_SUPT in the databook and my earlier reply to
>> Felipe.
>
> Thanks, I'll take a look tomorrow when I have the databook in front of me.
>
>> Unfortunately GHWPARAMS6.EN_FPGA doesn't directly tell you that
>> DWC_USB3_EN_LOG_PHYS_EP_SUPT is disabled. We just have to make that
>> assumption. Or add a quirk.
>
> So, if I'm understanding the conclusion.
>
> 1. We'll go ahead and make a change to just grab the # of endpoints
> I'll send out that patch once its tested.
> 2. For 4.12 Filipe will do something for the # of IN endpoints

Up to here, it should be fine, and it will fix your case. It will work
with all cores but in a more limited fashion by not allowing endpoints
to be truly bidirectional.

> 3. A quirk may eventually be required for DWC_USB3_EN_LOG_PHYS_EP_SUPT
> but lets no do anything on that unless someone actually complains.

I think it should be that if someone complains about the above
limitations:

3. Rework endpoint code to remove the limitations and work correctly
for any direction. This should be the default behavior.

4. Then based on EN_FPGA and/or a quirk, revert to previous behavior.

Regards,
John
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Re: [PATCH v2] usb: dwc2: fix "iomem 0x00000000" message

[John Youn]

On 1/25/2017 2:14 PM, Heiner Kallweit wrote:
> Set the iomem parameters in the usb_hcd to fix this misleading
> message during driver load:
> dwc2 c910.usb: irq 22, io mem 0x
>
> Signed-off-by: Heiner Kallweit <hkallwe...@gmail.com>
> ---
> v2:
> - get info from hsotg->dev instead of adding a function parameter
> ---
>  drivers/usb/dwc2/hcd.c | 7 +++
>  1 file changed, 7 insertions(+)
>
> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
> index 98249be1..fa8a9f27 100644
> --- a/drivers/usb/dwc2/hcd.c
> +++ b/drivers/usb/dwc2/hcd.c
> @@ -42,6 +42,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -4966,6 +4967,8 @@ static void dwc2_hcd_release(struct dwc2_hsotg *hsotg)
>   */
>  int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
>  {
> + struct platform_device *pdev = to_platform_device(hsotg->dev);
> + struct resource *res;
>   struct usb_hcd *hcd;
>   struct dwc2_host_chan *channel;
>   u32 hcfg;
> @@ -5021,6 +5024,10 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
>
>   hcd->has_tt = 1;
>
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + hcd->rsrc_start = res->start;
> + hcd->rsrc_len = resource_size(res);
> +
>   ((struct wrapper_priv_data *)>hcd_priv)->hsotg = hsotg;
>   hsotg->priv = hcd;
>
>


Acked-by: John Youn <johny...@synopsys.com>

Thanks,
John

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Re: [PATCH] usb: dwc2: eliminate irq parameter from dwc2_hcd_init

[John Youn]

On 1/25/2017 2:14 PM, Heiner Kallweit wrote:
> The irq is available in hsotg already, so there's no need to
> pass it as separate function parameter.
>
> Signed-off-by: Heiner Kallweit <hkallwe...@gmail.com>
> ---
>  drivers/usb/dwc2/core.h | 2 +-
>  drivers/usb/dwc2/hcd.c  | 4 ++--
>  drivers/usb/dwc2/hcd.h  | 2 +-
>  drivers/usb/dwc2/platform.c | 2 +-
>  4 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
> index 570a8004..e89943ff 100644
> --- a/drivers/usb/dwc2/core.h
> +++ b/drivers/usb/dwc2/core.h
> @@ -1245,7 +1245,7 @@ static inline void dwc2_hcd_connect(struct dwc2_hsotg 
> *hsotg) {}
>  static inline void dwc2_hcd_disconnect(struct dwc2_hsotg *hsotg, bool force) 
> {}
>  static inline void dwc2_hcd_start(struct dwc2_hsotg *hsotg) {}
>  static inline void dwc2_hcd_remove(struct dwc2_hsotg *hsotg) {}
> -static inline int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
> +static inline int dwc2_hcd_init(struct dwc2_hsotg *hsotg)
>  { return 0; }
>  static inline int dwc2_backup_host_registers(struct dwc2_hsotg *hsotg)
>  { return 0; }
> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
> index fa8a9f27..ef568c46 100644
> --- a/drivers/usb/dwc2/hcd.c
> +++ b/drivers/usb/dwc2/hcd.c
> @@ -4965,7 +4965,7 @@ static void dwc2_hcd_release(struct dwc2_hsotg *hsotg)
>   * USB bus with the core and calls the hc_driver->start() function. It 
> returns
>   * a negative error on failure.
>   */
> -int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
> +int dwc2_hcd_init(struct dwc2_hsotg *hsotg)
>  {
>   struct platform_device *pdev = to_platform_device(hsotg->dev);
>   struct resource *res;
> @@ -5168,7 +5168,7 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
>* allocates the DMA buffer pool, registers the USB bus, requests the
>* IRQ line, and calls hcd_start method.
>*/
> - retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
> + retval = usb_add_hcd(hcd, hsotg->irq, IRQF_SHARED);
>   if (retval < 0)
>   goto error4;
>
> diff --git a/drivers/usb/dwc2/hcd.h b/drivers/usb/dwc2/hcd.h
> index 58bfe9f5..11c3c145 100644
> --- a/drivers/usb/dwc2/hcd.h
> +++ b/drivers/usb/dwc2/hcd.h
> @@ -521,7 +521,7 @@ static inline u8 dwc2_hcd_is_pipe_out(struct 
> dwc2_hcd_pipe_info *pipe)
>   return !dwc2_hcd_is_pipe_in(pipe);
>  }
>
> -int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq);
> +int dwc2_hcd_init(struct dwc2_hsotg *hsotg);
>  void dwc2_hcd_remove(struct dwc2_hsotg *hsotg);
>
>  /* Transaction Execution Functions */
> diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
> index 3f59a73d..9564bc76 100644
> --- a/drivers/usb/dwc2/platform.c
> +++ b/drivers/usb/dwc2/platform.c
> @@ -445,7 +445,7 @@ static int dwc2_driver_probe(struct platform_device *dev)
>   }
>
>   if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
> - retval = dwc2_hcd_init(hsotg, hsotg->irq);
> + retval = dwc2_hcd_init(hsotg);
>   if (retval) {
>   if (hsotg->gadget_enabled)
>   dwc2_hsotg_remove(hsotg);
>

Acked-by: John Youn <johny...@synopsys.com>

John

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Re: [PATCH] usb: dwc2: fix "iomem 0x00000000" message by setting iomem parameters in usb_hcd

[John Youn]

On 1/15/2017 12:37 PM, Heiner Kallweit wrote:
> Set the iomem parameters in the usb_hcd to fix this misleading
> message during driver load:
> dwc2 c910.usb: irq 22, io mem 0x
>
> Signed-off-by: Heiner Kallweit 
> ---
>  drivers/usb/dwc2/core.h | 3 ++-
>  drivers/usb/dwc2/hcd.c  | 5 -
>  drivers/usb/dwc2/hcd.h  | 3 ++-
>  drivers/usb/dwc2/platform.c | 2 +-
>  4 files changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
> index 9548d3e0..b66eaeea 100644
> --- a/drivers/usb/dwc2/core.h
> +++ b/drivers/usb/dwc2/core.h
> @@ -1229,7 +1229,8 @@ static inline void dwc2_hcd_connect(struct dwc2_hsotg 
> *hsotg) {}
>  static inline void dwc2_hcd_disconnect(struct dwc2_hsotg *hsotg, bool force) 
> {}
>  static inline void dwc2_hcd_start(struct dwc2_hsotg *hsotg) {}
>  static inline void dwc2_hcd_remove(struct dwc2_hsotg *hsotg) {}
> -static inline int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
> +static inline int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq,
> + struct resource *res)
>  { return 0; }
>  static inline int dwc2_backup_host_registers(struct dwc2_hsotg *hsotg)
>  { return 0; }
> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
> index 911c3b36..2cfbd10e 100644
> --- a/drivers/usb/dwc2/hcd.c
> +++ b/drivers/usb/dwc2/hcd.c
> @@ -4964,7 +4964,7 @@ static void dwc2_hcd_release(struct dwc2_hsotg *hsotg)
>   * USB bus with the core and calls the hc_driver->start() function. It 
> returns
>   * a negative error on failure.
>   */
> -int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
> +int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq, struct resource *res)
>  {
>   struct usb_hcd *hcd;
>   struct dwc2_host_chan *channel;
> @@ -5021,6 +5021,9 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
>
>   hcd->has_tt = 1;
>
> + hcd->rsrc_start = res->start;
> + hcd->rsrc_len = resource_size(res);

You should be able to get the same from hsotg->dev instead of adding a
paramter.

In fact, looks like the irq parameter is not needed either since it is 
already stored in hsotg and can anyway get it from dev as well.

John
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Re: [PATCH] usb: dwc2: fix "iomem 0x00000000" message by setting iomem parameters in usb_hcd

[John Youn]

On 1/25/2017 12:37 PM, Heiner Kallweit wrote:
> Am 24.01.2017 um 09:46 schrieb Felipe Balbi:
>>
>> Hi,
>>
>> John Youn <john.y...@synopsys.com> writes:
>>>> John Youn <john.y...@synopsys.com> writes:
>>>>>>>>> @@ -1229,7 +1229,8 @@ static inline void dwc2_hcd_connect(struct 
>>>>>>>>> dwc2_hsotg *hsotg) {}
>>>>>>>>>  static inline void dwc2_hcd_disconnect(struct dwc2_hsotg *hsotg, 
>>>>>>>>> bool force) {}
>>>>>>>>>  static inline void dwc2_hcd_start(struct dwc2_hsotg *hsotg) {}
>>>>>>>>>  static inline void dwc2_hcd_remove(struct dwc2_hsotg *hsotg) {}
>>>>>>>>> -static inline int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
>>>>>>>>> +static inline int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq,
>>>>>>>>> + struct resource *res)
>>>>>>>>>  { return 0; }
>>>>>>>>>  static inline int dwc2_backup_host_registers(struct dwc2_hsotg 
>>>>>>>>> *hsotg)
>>>>>>>>>  { return 0; }
>>>>>>>>> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
>>>>>>>>> index 911c3b36..2cfbd10e 100644
>>>>>>>>> --- a/drivers/usb/dwc2/hcd.c
>>>>>>>>> +++ b/drivers/usb/dwc2/hcd.c
>>>>>>>>> @@ -4964,7 +4964,7 @@ static void dwc2_hcd_release(struct dwc2_hsotg 
>>>>>>>>> *hsotg)
>>>>>>>>>   * USB bus with the core and calls the hc_driver->start() function. 
>>>>>>>>> It returns
>>>>>>>>>   * a negative error on failure.
>>>>>>>>>   */
>>>>>>>>> -int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
>>>>>>>>> +int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq, struct resource 
>>>>>>>>> *res)
>>>>>>>>>  {
>>>>>>>>>   struct usb_hcd *hcd;
>>>>>>>>>   struct dwc2_host_chan *channel;
>>>>>>>>> @@ -5021,6 +5021,9 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int 
>>>>>>>>> irq)
>>>>>>>>>
>>>>>>>>>   hcd->has_tt = 1;
>>>>>>>>>
>>>>>>>>> + hcd->rsrc_start = res->start;
>>>>>>>>> + hcd->rsrc_len = resource_size(res);
>>>>>>>>> +
>>>>>>>>>   ((struct wrapper_priv_data *) >hcd_priv)->hsotg = hsotg;
>>>>>>>>>   hsotg->priv = hcd;
>>>>>>>>>
>>>>>>>>> diff --git a/drivers/usb/dwc2/hcd.h b/drivers/usb/dwc2/hcd.h
>>>>>>>>> index 1ed5fa2b..2305b5fb 100644
>>>>>>>>> --- a/drivers/usb/dwc2/hcd.h
>>>>>>>>> +++ b/drivers/usb/dwc2/hcd.h
>>>>>>>>> @@ -521,7 +521,8 @@ static inline u8 dwc2_hcd_is_pipe_out(struct 
>>>>>>>>> dwc2_hcd_pipe_info *pipe)
>>>>>>>>>   return !dwc2_hcd_is_pipe_in(pipe);
>>>>>>>>>  }
>>>>>>>>>
>>>>>>>>> -extern int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq);
>>>>>>>>> +extern int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq,
>>>>>>>>> +  struct resource *res);
>>>>>>>>>  extern void dwc2_hcd_remove(struct dwc2_hsotg *hsotg);
>>>>>>>>>
>>>>>>>>>  /* Transaction Execution Functions */
>>>>>>>>> diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
>>>>>>>>> index 4fc8c603..5ddc8860 100644
>>>>>>>>> --- a/drivers/usb/dwc2/platform.c
>>>>>>>>> +++ b/drivers/usb/dwc2/platform.c
>>>>>>>>> @@ -445,7 +445,7 @@ static int dwc2_driver_probe(struct 
>>>>>>>>> platform_device *dev)
>>>>>>>>>   }
>>>>>>>>>
>>>>>>>>>   if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
>>>>>>>>> - retval 

Re: [PATCH v2] usb: dwc3: handle DWC_USB3_NUM == DWC_USB3_NUM_IN_EPS

[John Youn]

On 1/24/2017 11:39 AM, Felipe Balbi wrote:
> Hi,
>
> (sorry if formatting sucks, using web interface)
>
> On Tue, Jan 24, 2017 at 9:21 PM John Youn <john.y...@synopsys.com
> <mailto:john.y...@synopsys.com>> wrote:
>
> On 1/24/2017 12:53 AM, Felipe Balbi wrote:
> >
> > Hi,
> >
> > John Youn <john.y...@synopsys.com <mailto:john.y...@synopsys.com>>
> writes:
> >>>> Bryan O'Donoghue <pure.lo...@nexus-software.ie
> <mailto:pure.lo...@nexus-software.ie>> writes:
> >>>>> - DWC_USB3_NUM indicates the number of Device mode single
> directional
> >>>>>   endpoints, including OUT and IN endpoint 0.
> >>>>>
> >>>>> - DWC_USB3_NUM_IN_EPS indicates the maximum number of Device
> mode IN
> >>>>>   endpoints active at any time, including control endpoint 0.
> >>>>>
> >>>>> It's possible to configure RTL such that DWC_USB3_NUM_EPS is
> equal to
> >>>>> DWC_USB3_NUM_IN_EPS.
> >>>>>
> >>>>> dwc3-core calculates the number of OUT endpoints as
> DWC_USB3_NUM minus
> >>>>> DWC_USB3_NUM_IN_EPS. If RTL has been configured with
> DWC_USB3_NUM_IN_EPS
> >>>>> equal to DWC_USB3_NUM then dwc3-core will calculate the number
> of OUT
> >>>>> endpoints as zero.
> >>>>>
> >>>>> For example a from dwc3_core_num_eps() shows:
> >>>>> [1.565000]  /usb0@f01d: found 8 IN and 0 OUT endpoints
> >>>>>
> >>>>> This patch works around this case by detecting when
> DWC_USB3_NUM_EPS is
> >>>>> equal to DWC3_USB3_NUM_IN_EPS and over-rides the calculation
> of the number
> >>>>> of OUT and IN endpoints to make dwc->num_in_eps equal to half
> >>>>> DWC_USB3_NUM_EPS.
> >>>>>
> >>>>> If DWC_USB3_NUM_EPS is equal to DWC3_USB3_NUM_IN_EPS and the
> endpoint count
> >>>>> is an odd number then dwc->num_out_eps will be assigned the
> extra endpoint.
> >>>>
> >>>> sorry, now that I spent some more time with this. Isn't
> something like
> >>>> below solving all problems?
> >>>>
> >>>> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> >>>> index 369bab16a824..68c9c84b7216 100644
> >>>> --- a/drivers/usb/dwc3/core.c
> >>>> +++ b/drivers/usb/dwc3/core.c
> >>>> @@ -397,8 +397,7 @@ static void dwc3_core_num_eps(struct dwc3 *dwc)
> >>>>  {
> >>>>struct dwc3_hwparams*parms = >hwparams;
> >>>>
> >>>> -  dwc->num_in_eps = DWC3_NUM_IN_EPS(parms);
> >>>> -  dwc->num_out_eps = DWC3_NUM_EPS(parms) - dwc->num_in_eps;
> >>>> +  dwc->num_eps = DWC3_NUM_EPS(parms);
> >>>>  }
> >>>>
> >>>>  static void dwc3_cache_hwparams(struct dwc3 *dwc)
> >>>> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
> >>>> index 0a664d8eba3f..8c187df0aa42 100644
> >>>> --- a/drivers/usb/dwc3/gadget.c
> >>>> +++ b/drivers/usb/dwc3/gadget.c
> >>>> @@ -2001,23 +2002,7 @@ static int
> dwc3_gadget_init_hw_endpoints(struct dwc3 *dwc,
> >>>>
> >>>>  static int dwc3_gadget_init_endpoints(struct dwc3 *dwc)
> >>>>  {
> >>>> -  int ret;
> >>>> -
> >>>> -  INIT_LIST_HEAD(>gadget.ep_list);
> >>>> -
> >>>> -  ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_out_eps, 0);
> >>>> -  if (ret < 0) {
> >>>> -  dev_err(dwc->dev, "failed to initialize OUT
> endpoints\n");
> >>>> -  return ret;
> >>>> -  }
> >>>> -
> >>>> -  ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_in_eps, 1);
> >>>> -  if (ret < 0) {
> >>>> -  dev_err(dwc->dev, "failed to initialize IN
> endpoints\n");
> >>>> -  return ret;
> >>>> -  }
> >>>>

Re: [PATCH v3 00/24] usb: dwc2: Rework params, FIFO, and other changes

[John Youn]

On 1/23/2017 2:52 PM, John Youn wrote:
> Hi Felipe,
>
> This is a consolidation, rebase, and resend of several dwc2 patch
> series that were submitted to this list in the past month or so. See
> v2 [1] of this series for a summary.
>
> This latest revision is rebased to apply cleanly to your latest
> testing/next.
>
> This series also rebases the FIFO series from Sevak [2]. So there's no
> need to pick that up separately.
>
> The first 4 patches revert commits that were mistakenly added to your
> next branch.
>
> Regards,
> John
>
> [1] https://www.spinics.net/lists/linux-usb/msg152258.html
> [2] https://www.spinics.net/lists/linux-usb/msg152322.html
>


Hi Felipe,

Thanks for adding to your testing/next. It looks good so far.

Can you rebase it on -rc5 or later? There might be merge conflicts
otherwise

Thanks,
John
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Re: [PATCH v2] usb: dwc3: handle DWC_USB3_NUM == DWC_USB3_NUM_IN_EPS

[John Youn]

On 1/24/2017 3:05 AM, Bryan O'Donoghue wrote:
> On 23/01/17 22:34, John Youn wrote:
>> On 1/23/2017 2:10 PM, Alan Stern wrote:
>>> On Mon, 23 Jan 2017, John Youn wrote:
>>>
>>>> On 1/22/2017 5:29 PM, Bryan O'Donoghue wrote:
>>>>> - DWC_USB3_NUM indicates the number of Device mode single directional
>>>>>   endpoints, including OUT and IN endpoint 0.
>>>>>
>>>>> - DWC_USB3_NUM_IN_EPS indicates the maximum number of Device mode IN
>>>>>   endpoints active at any time, including control endpoint 0.
>>>>>
>>>>> It's possible to configure RTL such that DWC_USB3_NUM_EPS is equal to
>>>>> DWC_USB3_NUM_IN_EPS.
>>>>>
>>>>> dwc3-core calculates the number of OUT endpoints as DWC_USB3_NUM minus
>>>>> DWC_USB3_NUM_IN_EPS. If RTL has been configured with DWC_USB3_NUM_IN_EPS
>>>>> equal to DWC_USB3_NUM then dwc3-core will calculate the number of OUT
>>>>> endpoints as zero.
>>>>>
>>>>> For example a from dwc3_core_num_eps() shows:
>>>>> [1.565000]  /usb0@f01d: found 8 IN and 0 OUT endpoints
>>>>>
>>>>> This patch works around this case by detecting when DWC_USB3_NUM_EPS is
>>>>> equal to DWC3_USB3_NUM_IN_EPS and over-rides the calculation of the number
>>>>
>>>> What if NUM_IN_EPS=7 and NUM_EPS=8? You will still have a problem.
>>>>
>>>> It's possible to fix this for the general case rather than for this
>>>> specific case.
>>>
>>> What is the reason for computing NUM_OUT_EPS in the first place?
>>> Isn't it true that any endpoint can be used as an OUT endpoint?
>>>
>>> So the real restrictions on a configuration are:
>>>
>>> number of IN endpoints <= NUM_IN_EPS, and
>>>
>>> number of IN endpoints + number of OUT endpoints <= NUM_EPS,
>>>
>>> where ep0 must be counted twice, as both an IN and an OUT endpoint.
>>> The value of NUM_OUT_EPS isn't used and shouldn't matter.
>>>
>>
>> Yes that's correct. The general fix should take all that into account
>> so that any combination of NUM_EPS and NUM_IN_EPS will work fine.
>>
>> However it must also account for FPGA configs where each HW endpoint
>> has a fixed number/direction, which the current code is compatible
>> with.
>
> I'm not scanning something here..
>
> If FPGA configurations can have fixed endpoint directions then you could
> conceivably have a control IN/OUT pair plus a number a fixed
> configuration of all IN or all OUT endpoints, even checking
> GHWPARAMS6.EN_FPGA wouldn't let you know which direction those endpoints
> had been configured to.
>
> If I understand you correctly an FPGA could have pretty much any bit-map
> of fixed endpoint directions - so just calculating the number of IN/OUT
> endpoints based on some combination of DWC_USB3_NUM_IN_EPS and
> DWC_USB3_NUM_EPS wouldn't inform you of the fixed direction of an
> individual endpoint ... You'd need a descriptor specifying the fixed
> direction of each endpoint right ?
>

Hi Bryan,

The EP num and direction are fixed in a predefined way. See
DWC_USB3_EN_LOG_PHYS_EP_SUPT in the databook and my earlier reply to
Felipe.

Unfortunately GHWPARAMS6.EN_FPGA doesn't directly tell you that
DWC_USB3_EN_LOG_PHYS_EP_SUPT is disabled. We just have to make that
assumption. Or add a quirk.

Regards,
John
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Re: [PATCH v2] usb: dwc3: handle DWC_USB3_NUM == DWC_USB3_NUM_IN_EPS

[John Youn]

On 1/24/2017 12:53 AM, Felipe Balbi wrote:
>
> Hi,
>
> John Youn <john.y...@synopsys.com> writes:
>>>> Bryan O'Donoghue <pure.lo...@nexus-software.ie> writes:
>>>>> - DWC_USB3_NUM indicates the number of Device mode single directional
>>>>>   endpoints, including OUT and IN endpoint 0.
>>>>>
>>>>> - DWC_USB3_NUM_IN_EPS indicates the maximum number of Device mode IN
>>>>>   endpoints active at any time, including control endpoint 0.
>>>>>
>>>>> It's possible to configure RTL such that DWC_USB3_NUM_EPS is equal to
>>>>> DWC_USB3_NUM_IN_EPS.
>>>>>
>>>>> dwc3-core calculates the number of OUT endpoints as DWC_USB3_NUM minus
>>>>> DWC_USB3_NUM_IN_EPS. If RTL has been configured with DWC_USB3_NUM_IN_EPS
>>>>> equal to DWC_USB3_NUM then dwc3-core will calculate the number of OUT
>>>>> endpoints as zero.
>>>>>
>>>>> For example a from dwc3_core_num_eps() shows:
>>>>> [1.565000]  /usb0@f01d: found 8 IN and 0 OUT endpoints
>>>>>
>>>>> This patch works around this case by detecting when DWC_USB3_NUM_EPS is
>>>>> equal to DWC3_USB3_NUM_IN_EPS and over-rides the calculation of the number
>>>>> of OUT and IN endpoints to make dwc->num_in_eps equal to half
>>>>> DWC_USB3_NUM_EPS.
>>>>>
>>>>> If DWC_USB3_NUM_EPS is equal to DWC3_USB3_NUM_IN_EPS and the endpoint 
>>>>> count
>>>>> is an odd number then dwc->num_out_eps will be assigned the extra 
>>>>> endpoint.
>>>>
>>>> sorry, now that I spent some more time with this. Isn't something like
>>>> below solving all problems?
>>>>
>>>> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
>>>> index 369bab16a824..68c9c84b7216 100644
>>>> --- a/drivers/usb/dwc3/core.c
>>>> +++ b/drivers/usb/dwc3/core.c
>>>> @@ -397,8 +397,7 @@ static void dwc3_core_num_eps(struct dwc3 *dwc)
>>>>  {
>>>>struct dwc3_hwparams*parms = >hwparams;
>>>>
>>>> -  dwc->num_in_eps = DWC3_NUM_IN_EPS(parms);
>>>> -  dwc->num_out_eps = DWC3_NUM_EPS(parms) - dwc->num_in_eps;
>>>> +  dwc->num_eps = DWC3_NUM_EPS(parms);
>>>>  }
>>>>
>>>>  static void dwc3_cache_hwparams(struct dwc3 *dwc)
>>>> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
>>>> index 0a664d8eba3f..8c187df0aa42 100644
>>>> --- a/drivers/usb/dwc3/gadget.c
>>>> +++ b/drivers/usb/dwc3/gadget.c
>>>> @@ -2001,23 +2002,7 @@ static int dwc3_gadget_init_hw_endpoints(struct 
>>>> dwc3 *dwc,
>>>>
>>>>  static int dwc3_gadget_init_endpoints(struct dwc3 *dwc)
>>>>  {
>>>> -  int ret;
>>>> -
>>>> -  INIT_LIST_HEAD(>gadget.ep_list);
>>>> -
>>>> -  ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_out_eps, 0);
>>>> -  if (ret < 0) {
>>>> -  dev_err(dwc->dev, "failed to initialize OUT endpoints\n");
>>>> -  return ret;
>>>> -  }
>>>> -
>>>> -  ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_in_eps, 1);
>>>> -  if (ret < 0) {
>>>> -  dev_err(dwc->dev, "failed to initialize IN endpoints\n");
>>>> -  return ret;
>>>> -  }
>>>> -
>>>> -  return 0;
>>>> +  return dwc3_gadget_init_hw_endpoints(dwc, dwc->num_eps);
>>>
>>> Well I hadn't considered that level of change myself but, it should work.
>>>
>>
>> It should work for ASICS.
>>
>> But it won't work for our FPGA platform. It needs to work the
>> existing, more limited, way. You can check this with the
>> GHWPARAMS6.EN_FPGA.
>
> Can you clarify a little more? Why wouldn't above work for FPGA?
>

Actually my mistake, this should still work fine as long as you are
predefining the number and direction the same as before.

See DWC_USB3_EN_LOG_PHYS_EP_SUPT for the FPGA configuration.

This configuration should be enabled (the default), but can be
disabled for FPGA configs to meet timing and save space. Looks like
DWC3 driver is currently programming as if this is always disabled,
which should be fine, it will just be more limiting than necessary.

Regards,
John
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Re: [PATCH v3 24/24] usb: dwc2: gadget: Add checking for g-tx-fifo-size parameter

[John Youn]

On 1/24/2017 10:40 AM, Stefan Wahren wrote:
> Hi John,
>
> could you please push this series to the github synopsys-usb repo?
>
> I didn't have the chance to test combination of your last series.
>
> Stefan
>

Updated.

Regards,
John

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[PATCH v3 24/24] usb: dwc2: gadget: Add checking for g-tx-fifo-size parameter

[John Youn]

From: Sevak Arakelyan <sev...@synopsys.com>

Add dwc2_check_param_tx_fifo_sizes function which validates
the members of g_tx_fifo_size array and sets to average or
default values if it is needed.

Cc: Stefan Wahren <stefan.wah...@i2se.com>
Signed-off-by: Sevak Arakelyan <sev...@synopsys.com>
Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/params.c | 35 +++
 1 file changed, 35 insertions(+)

diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index 016fff0cb887..2990c347289f 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -427,6 +427,40 @@ static void dwc2_check_param_phy_utmi_width(struct 
dwc2_hsotg *hsotg)
dwc2_set_param_phy_utmi_width(hsotg);
 }
 
+static void dwc2_check_param_tx_fifo_sizes(struct dwc2_hsotg *hsotg)
+{
+   int fifo_count;
+   int fifo;
+   int min;
+   u32 total = 0;
+   u32 dptxfszn;
+
+   fifo_count = dwc2_hsotg_tx_fifo_count(hsotg);
+   min = hsotg->hw_params.en_multiple_tx_fifo ? 16 : 4;
+
+   for (fifo = 1; fifo <= fifo_count; fifo++)
+   total += hsotg->params.g_tx_fifo_size[fifo];
+
+   if (total > dwc2_hsotg_tx_fifo_total_depth(hsotg) || !total) {
+   dev_warn(hsotg->dev, "%s: Invalid parameter g-tx-fifo-size, 
setting to default average\n",
+__func__);
+   dwc2_set_param_tx_fifo_sizes(hsotg);
+   }
+
+   for (fifo = 1; fifo <= fifo_count; fifo++) {
+   dptxfszn = (dwc2_readl(hsotg->regs + DPTXFSIZN(fifo)) &
+   FIFOSIZE_DEPTH_MASK) >> FIFOSIZE_DEPTH_SHIFT;
+
+   if (hsotg->params.g_tx_fifo_size[fifo] < min ||
+   hsotg->params.g_tx_fifo_size[fifo] >  dptxfszn) {
+   dev_warn(hsotg->dev, "%s: Invalid parameter 
g_tx_fifo_size[%d]=%d\n",
+__func__, fifo,
+hsotg->params.g_tx_fifo_size[fifo]);
+   hsotg->params.g_tx_fifo_size[fifo] = dptxfszn;
+   }
+   }
+}
+
 #define CHECK_RANGE(_param, _min, _max, _def) do { \
if ((hsotg->params._param) < (_min) ||  \
(hsotg->params._param) > (_max)) {  \
@@ -496,6 +530,7 @@ static void dwc2_check_params(struct dwc2_hsotg *hsotg)
CHECK_RANGE(g_np_tx_fifo_size,
16, hw->dev_nperio_tx_fifo_size,
hw->dev_nperio_tx_fifo_size);
+   dwc2_check_param_tx_fifo_sizes(hsotg);
}
 }
 
-- 
2.11.0

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[PATCH v3 22/24] usb: dwc2: host: Correct snpsid checking for GDFIFOCFG

[John Youn]

From: Sevak Arakelyan <sev...@synopsys.com>

GDFIFOCFG is available from IP version 2.91a. Fix the code to reflect
this.

Signed-off-by: Sevak Arakelyan <sev...@synopsys.com>
Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/core.h | 1 +
 drivers/usb/dwc2/hcd.c  | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index a473853ca39c..5370e6429f28 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -940,6 +940,7 @@ struct dwc2_hsotg {
/* DWC OTG HW Release versions */
 #define DWC2_CORE_REV_2_71a0x4f54271a
 #define DWC2_CORE_REV_2_90a0x4f54290a
+#define DWC2_CORE_REV_2_91a0x4f54291a
 #define DWC2_CORE_REV_2_92a0x4f54292a
 #define DWC2_CORE_REV_2_94a0x4f54294a
 #define DWC2_CORE_REV_3_00a0x4f54300a
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index 751f0ddd741b..a2d4997d822c 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -494,8 +494,9 @@ static void dwc2_config_fifos(struct dwc2_hsotg *hsotg)
dwc2_readl(hsotg->regs + HPTXFSIZ));
 
if (hsotg->params.en_multiple_tx_fifo &&
-   hsotg->hw_params.snpsid <= DWC2_CORE_REV_2_94a) {
+   hsotg->hw_params.snpsid >= DWC2_CORE_REV_2_91a) {
/*
+* This feature was implemented in 2.91a version
 * Global DFIFOCFG calculation for Host mode -
 * include RxFIFO, NPTXFIFO and HPTXFIFO
 */
-- 
2.11.0

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[PATCH v3 23/24] usb: dwc2: gadget: Set TX FIFO depths to calculated defaults

[John Youn]

From: Sevak Arakelyan <sev...@synopsys.com>

Remove legacy DWC2_G_P_LEGACY_TX_FIFO_SIZE array for TX FIFOs.
Update dwc2_set_param_tx_fifo_sizes function to calculate
and assign default average FIFO depth to each member of
g_tx_fifo_size array. Total FIFO size, EP Info block's size,
FIFO operation mode and device operation mode are taken into
consideration during the calculation.

Cc: Stefan Wahren <stefan.wah...@i2se.com>
Signed-off-by: Sevak Arakelyan <sev...@synopsys.com>
Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/core.h   | 16 
 drivers/usb/dwc2/gadget.c | 93 +++
 drivers/usb/dwc2/params.c | 12 --
 3 files changed, 110 insertions(+), 11 deletions(-)

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 5370e6429f28..f10eca91d2be 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -274,13 +274,6 @@ enum dwc2_lx_state {
DWC2_L3,/* Off state */
 };
 
-/*
- * Gadget periodic tx fifo sizes as used by legacy driver
- * EP0 is not included
- */
-#define DWC2_G_P_LEGACY_TX_FIFO_SIZE {256, 256, 256, 256, 768, 768, 768, \
-  768, 0, 0, 0, 0, 0, 0, 0}
-
 /* Gadget ep0 states */
 enum dwc2_ep0_state {
DWC2_EP0_SETUP,
@@ -1180,6 +1173,9 @@ int dwc2_hsotg_set_test_mode(struct dwc2_hsotg *hsotg, 
int testmode);
 #define dwc2_is_device_connected(hsotg) (hsotg->connected)
 int dwc2_backup_device_registers(struct dwc2_hsotg *hsotg);
 int dwc2_restore_device_registers(struct dwc2_hsotg *hsotg);
+int dwc2_hsotg_tx_fifo_count(struct dwc2_hsotg *hsotg);
+int dwc2_hsotg_tx_fifo_total_depth(struct dwc2_hsotg *hsotg);
+int dwc2_hsotg_tx_fifo_average_depth(struct dwc2_hsotg *hsotg);
 #else
 static inline int dwc2_hsotg_remove(struct dwc2_hsotg *dwc2)
 { return 0; }
@@ -1201,6 +1197,12 @@ static inline int dwc2_backup_device_registers(struct 
dwc2_hsotg *hsotg)
 { return 0; }
 static inline int dwc2_restore_device_registers(struct dwc2_hsotg *hsotg)
 { return 0; }
+static inline int dwc2_hsotg_tx_fifo_count(struct dwc2_hsotg *hsotg)
+{ return 0; }
+static inline int dwc2_hsotg_tx_fifo_total_depth(struct dwc2_hsotg *hsotg)
+{ return 0; }
+static inline int dwc2_hsotg_tx_fifo_average_depth(struct dwc2_hsotg *hsotg)
+{ return 0; }
 #endif
 
 #if IS_ENABLED(CONFIG_USB_DWC2_HOST) || IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 30ff51eab35c..eb579b6f68f0 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -191,6 +191,99 @@ static void dwc2_hsotg_ctrl_epint(struct dwc2_hsotg *hsotg,
local_irq_restore(flags);
 }
 
+/**
+ * dwc2_hsotg_tx_fifo_count - return count of TX FIFOs in device mode
+ */
+int dwc2_hsotg_tx_fifo_count(struct dwc2_hsotg *hsotg)
+{
+   if (hsotg->hw_params.en_multiple_tx_fifo)
+   /* In dedicated FIFO mode we need count of IN EPs */
+   return (dwc2_readl(hsotg->regs + GHWCFG4)  &
+   GHWCFG4_NUM_IN_EPS_MASK) >> GHWCFG4_NUM_IN_EPS_SHIFT;
+   else
+   /* In shared FIFO mode we need count of Periodic IN EPs */
+   return hsotg->hw_params.num_dev_perio_in_ep;
+}
+
+/**
+ * dwc2_hsotg_ep_info_size - return Endpoint Info Control block size in DWORDs
+ */
+static int dwc2_hsotg_ep_info_size(struct dwc2_hsotg *hsotg)
+{
+   int val = 0;
+   int i;
+   u32 ep_dirs;
+
+   /*
+* Don't need additional space for ep info control registers in
+* slave mode.
+*/
+   if (!using_dma(hsotg)) {
+   dev_dbg(hsotg->dev, "Buffer DMA ep info size 0\n");
+   return 0;
+   }
+
+   /*
+* Buffer DMA mode - 1 location per endpoit
+* Descriptor DMA mode - 4 locations per endpoint
+*/
+   ep_dirs = hsotg->hw_params.dev_ep_dirs;
+
+   for (i = 0; i <= hsotg->hw_params.num_dev_ep; i++) {
+   val += ep_dirs & 3 ? 1 : 2;
+   ep_dirs >>= 2;
+   }
+
+   if (using_desc_dma(hsotg))
+   val = val * 4;
+
+   return val;
+}
+
+/**
+ * dwc2_hsotg_tx_fifo_total_depth - return total FIFO depth available for
+ * device mode TX FIFOs
+ */
+int dwc2_hsotg_tx_fifo_total_depth(struct dwc2_hsotg *hsotg)
+{
+   int ep_info_size;
+   int addr;
+   int tx_addr_max;
+   u32 np_tx_fifo_size;
+
+   np_tx_fifo_size = min_t(u32, hsotg->hw_params.dev_nperio_tx_fifo_size,
+   hsotg->params.g_np_tx_fifo_size);
+
+   /* Get Endpoint Info Control block size in DWORDs. */
+   ep_info_size = dwc2_hsotg_ep_info_size(hsotg);
+   tx_addr_max = hsotg->hw_params.total_fifo_size - ep_info_size;
+
+   addr = hsotg->params.g_rx_fifo_size + np_tx_fifo_size;
+   if (tx_addr_max <= addr)
+   return 0;
+
+   retu

[PATCH v3 21/24] usb: dwc2: host: use msleep() for long delay

[John Youn]

From: Nicholas Mc Guire <hof...@osadl.org>

ulseep_range() uses hrtimers and provides no advantage over msleep()
for larger delays. Fix up the 100ms delays here passing the adjusted "min"
value to msleep(). This helps reduce the load on the hrtimer subsystem.

Link: http://lkml.org/lkml/2017/1/11/377
Fixes: commit 2938fc63e0c2 ("usb: dwc2: Properly account for the force mode 
delays")
Signed-off-by: Nicholas Mc Guire <hof...@osadl.org>
Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index 7195366e26bf..1b6612c2cdda 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -455,7 +455,7 @@ void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg)
dwc2_writel(gusbcfg, hsotg->regs + GUSBCFG);
 
if (dwc2_iddig_filter_enabled(hsotg))
-   usleep_range(10, 11);
+   msleep(100);
 }
 
 /*
-- 
2.11.0

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[PATCH v3 19/24] usb: dwc2: Force port resume on switching to device mode

[John Youn]

From: Chen Yu <cheny...@huawei.com>

We've seen failures when switching between host and gadget mode,
which was diagnosed as being caused due to the bus being
auto-suspended when we switched.

So this patch forces a port resume when switching to device
mode if the bus is suspended.

Cc: Wei Xu <xuw...@hisilicon.com>
Cc: Guodong Xu <guodong...@linaro.org>
Cc: Amit Pundir <amit.pun...@linaro.org>
Cc: Rob Herring <robh...@kernel.org>
Cc: John Youn <johny...@synopsys.com>
Cc: Douglas Anderson <diand...@chromium.org>
Cc: Chen Yu <cheny...@huawei.com>
Cc: Vardan Mikayelyan <mvar...@synopsys.com>
Cc: Kishon Vijay Abraham I <kis...@ti.com>
Cc: Felipe Balbi <felipe.ba...@linux.intel.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: linux-usb@vger.kernel.org
Signed-off-by: Chen Yu <cheny...@huawei.com>
Signed-off-by: John Stultz <john.stu...@linaro.org>
Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/hcd.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index e0d152f2c81b..1f670c3429a6 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -54,6 +54,8 @@
 #include "core.h"
 #include "hcd.h"
 
+static void dwc2_port_resume(struct dwc2_hsotg *hsotg);
+
 /*
  * =
  *  Host Core Layer Functions
@@ -3231,6 +3233,11 @@ static void dwc2_conn_id_status_change(struct 
work_struct *work)
if (gotgctl & GOTGCTL_CONID_B) {
/* Wait for switch to device mode */
dev_dbg(hsotg->dev, "connId B\n");
+   if (hsotg->bus_suspended) {
+   dev_info(hsotg->dev,
+"Do port resume before switching to device 
mode\n");
+   dwc2_port_resume(hsotg);
+   }
while (!dwc2_is_device_mode(hsotg)) {
dev_info(hsotg->dev,
 "Waiting for Peripheral Mode, Mode=%s\n",
-- 
2.11.0

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[PATCH v3 20/24] usb: dwc2: Add a quirk to allow speed negotiation for Hisilicon Hi6220

[John Youn]

From: Chen Yu <cheny...@huawei.com>

The Hi6220's usb controller is limited in that it does not
support "Split Transactions", so it does not support communicating
with low-speed and full-speed devices behind a high-speed hub.

Thus it requires a quirk so that we can manually drop the usb
speed when low/full-speed are attached, and bump back to high
speed when they are removed.

Cc: Wei Xu <xuw...@hisilicon.com>
Cc: Guodong Xu <guodong...@linaro.org>
Cc: Amit Pundir <amit.pun...@linaro.org>
Cc: Rob Herring <robh...@kernel.org>
Cc: John Youn <johny...@synopsys.com>
Cc: Douglas Anderson <diand...@chromium.org>
Cc: Chen Yu <cheny...@huawei.com>
Cc: Vardan Mikayelyan <mvar...@synopsys.com>
Cc: Kishon Vijay Abraham I <kis...@ti.com>
Cc: Felipe Balbi <felipe.ba...@linux.intel.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: linux-usb@vger.kernel.org
Signed-off-by: Chen Yu <cheny...@huawei.com>
[jstultz: Reworked to simplify the patch, and made
 commit log to be more specific about the issue]
Signed-off-by: John Stultz <john.stu...@linaro.org>
Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/core.h   |  7 ++
 drivers/usb/dwc2/hcd.c| 60 +++
 drivers/usb/dwc2/params.c |  1 +
 3 files changed, 68 insertions(+)

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index b07bf7be2034..a473853ca39c 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -444,6 +444,11 @@ enum dwc2_ep0_state {
  * in DWORDS with possible values from from
  * 16-32768 (default: 256, 256, 256, 256, 768,
  * 768, 768, 768, 0, 0, 0, 0, 0, 0, 0).
+ * @change_speed_quirk: Change speed configuration to DWC2_SPEED_PARAM_FULL
+ *  while full speed device connect. And change speed
+ *  back to DWC2_SPEED_PARAM_HIGH while device is gone.
+ * 0 - No (default)
+ * 1 - Yes
  *
  * The following parameters may be specified when starting the module. These
  * parameters define how the DWC_otg controller should be configured. A
@@ -501,6 +506,8 @@ struct dwc2_core_params {
u32 g_rx_fifo_size;
u32 g_np_tx_fifo_size;
u32 g_tx_fifo_size[MAX_EPS_CHANNELS];
+
+   bool change_speed_quirk;
 };
 
 /**
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index 1f670c3429a6..751f0ddd741b 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -4868,6 +4868,61 @@ static void _dwc2_hcd_clear_tt_buffer_complete(struct 
usb_hcd *hcd,
spin_unlock_irqrestore(>lock, flags);
 }
 
+/*
+ * HPRT0_SPD_HIGH_SPEED: high speed
+ * HPRT0_SPD_FULL_SPEED: full speed
+ */
+static void dwc2_change_bus_speed(struct usb_hcd *hcd, int speed)
+{
+   struct dwc2_hsotg *hsotg = dwc2_hcd_to_hsotg(hcd);
+
+   if (hsotg->params.speed == speed)
+   return;
+
+   hsotg->params.speed = speed;
+   queue_work(hsotg->wq_otg, >wf_otg);
+}
+
+static void dwc2_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
+{
+   struct dwc2_hsotg *hsotg = dwc2_hcd_to_hsotg(hcd);
+
+   if (!hsotg->params.change_speed_quirk)
+   return;
+
+   /*
+* On removal, set speed to default high-speed.
+*/
+   if (udev->parent && udev->parent->speed > USB_SPEED_UNKNOWN &&
+   udev->parent->speed < USB_SPEED_HIGH) {
+   dev_info(hsotg->dev, "Set speed to default high-speed\n");
+   dwc2_change_bus_speed(hcd, HPRT0_SPD_HIGH_SPEED);
+   }
+}
+
+static int dwc2_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
+{
+   struct dwc2_hsotg *hsotg = dwc2_hcd_to_hsotg(hcd);
+
+   if (!hsotg->params.change_speed_quirk)
+   return 0;
+
+   if (udev->speed == USB_SPEED_HIGH) {
+   dev_info(hsotg->dev, "Set speed to high-speed\n");
+   dwc2_change_bus_speed(hcd, HPRT0_SPD_HIGH_SPEED);
+   } else if ((udev->speed == USB_SPEED_FULL ||
+   udev->speed == USB_SPEED_LOW)) {
+   /*
+* Change speed setting to full-speed if there's
+* a full-speed or low-speed device plugged in.
+*/
+   dev_info(hsotg->dev, "Set speed to full-speed\n");
+   dwc2_change_bus_speed(hcd, HPRT0_SPD_FULL_SPEED);
+   }
+
+   return 0;
+}
+
 static struct hc_driver dwc2_hc_driver = {
.description = "dwc2_hsotg",
.product_desc = "DWC OTG Controller",
@@ -5023,6 +5078,11 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
dev_warn(hsotg->dev, "can't set coherent DMA mask\n");
}
 
+   if (hso

[PATCH v3 18/24] usb: dwc2: Workaround case where GOTGCTL state is wrong

[John Youn]

From: John Stultz <john.stu...@linaro.org>

When removing a USB-A to USB-otg adapter cable, we get a change
status irq, and then in dwc2_conn_id_status_change, we
erroniously see the GOTGCTL_CONID_B flag set. This causes us to
get  stuck in the "while (!dwc2_is_device_mode(hsotg))" loop,
spitting out "Waiting for Peripheral Mode, Mode=Host" warnings
until it fails out many seconds later.

This patch works around the issue by re-reading the GOTGCTL
state to check if the GOTGCTL_CONID_B is still set and if not
restarting the change status logic.

I suspect this isn't the best solution, but it seems to work
well for me.

Feedback would be greatly appreciated!

Cc: Wei Xu <xuw...@hisilicon.com>
Cc: Guodong Xu <guodong...@linaro.org>
Cc: Amit Pundir <amit.pun...@linaro.org>
Cc: Rob Herring <robh...@kernel.org>
Cc: John Youn <johny...@synopsys.com>
Cc: Douglas Anderson <diand...@chromium.org>
Cc: Chen Yu <cheny...@huawei.com>
Cc: Vardan Mikayelyan <mvar...@synopsys.com>
Cc: Kishon Vijay Abraham I <kis...@ti.com>
Cc: Felipe Balbi <felipe.ba...@linux.intel.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: linux-usb@vger.kernel.org
Reviewed-by: Vardan Mikayelyan <mvar...@synopsys.com>
Signed-off-by: John Stultz <john.stu...@linaro.org>
Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/hcd.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index 8b688b041696..e0d152f2c81b 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -3237,6 +3237,14 @@ static void dwc2_conn_id_status_change(struct 
work_struct *work)
 dwc2_is_host_mode(hsotg) ? "Host" :
 "Peripheral");
msleep(20);
+   /*
+* Sometimes the initial GOTGCTRL read is wrong, so
+* check it again and jump to host mode if that was
+* the case.
+*/
+   gotgctl = dwc2_readl(hsotg->regs + GOTGCTL);
+   if (!(gotgctl & GOTGCTL_CONID_B))
+   goto host;
if (++count > 250)
break;
}
@@ -3251,6 +3259,7 @@ static void dwc2_conn_id_status_change(struct work_struct 
*work)
spin_unlock_irqrestore(>lock, flags);
dwc2_hsotg_core_connect(hsotg);
} else {
+host:
/* A-Device connector (Host Mode) */
dev_dbg(hsotg->dev, "connId A\n");
while (!dwc2_is_host_mode(hsotg)) {
-- 
2.11.0

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[PATCH v3 17/24] usb: dwc2: Avoid sleeping while holding hsotg->lock

[John Youn]

From: John Stultz <john.stu...@linaro.org>

Basically when plugging in various cables in different orders, I'm
occasionally seeing the following BUG splat:

[   86.215403] BUG: scheduling while atomic: kworker/u16:2/53/0x0002
[   86.219164] usb 1-1: USB disconnect, device number 9
[   86.226845] Preemption disabled at:[   86.230218]
[] dwc2_conn_id_status_change+0x120/0x250
[   86.236894] CPU: 0 PID: 53 Comm: kworker/u16:2 Tainted: GW
 4.9.0-rc8-00051-gd5a7979-dirty #1702
[   86.246836] Hardware name: HiKey Development Board (DT)
[   86.252100] Workqueue: dwc2 dwc2_conn_id_status_change
[   86.257279] Call trace:
[   86.259771] [] dump_backtrace+0x0/0x1a0
[   86.265210] [] show_stack+0x14/0x20
[   86.270308] [] dump_stack+0x90/0xb0
[   86.275401] [] __schedule_bug+0x6c/0xb8
[   86.280841] [] __schedule+0x4f8/0x5b0
[   86.286099] [] schedule+0x38/0xa0
[   86.291017] [] schedule_hrtimeout_range_clock+0x8c/0xf0
[   86.297846] [] schedule_hrtimeout_range+0x10/0x18
[   86.304150] [] usleep_range+0x50/0x58
[   86.309418] [] dwc2_wait_for_mode.isra.4+0x54/0xd0
[   86.315815] [] dwc2_core_reset+0xe0/0x168
[   86.321431] [] dwc2_hsotg_core_init_disconnected+0x2c/0x310
[   86.328602] [] dwc2_conn_id_status_change+0x130/0x250
[   86.335254] [] process_one_work+0x118/0x370
[   86.341035] [] worker_thread+0x48/0x498
[   86.346473] [] kthread+0xd0/0xe8
[   86.351299] [] ret_from_fork+0x10/0x50

This seems to be caused by the dwc2_wait_for_mode() calling
usleep_range() while the hstog->lock spinlock is held, since
we take that before calling dwc2_hsotg_core_init_disconnected().

This patch avoids the issue by adding an extra argument to
dwc2_core_reset(), as suggested by John Youn, which allows us to
skip the waiting, which should be unnecessary when calling from
dwc2_hsotg_core_init_disconnected().

Cc: Wei Xu <xuw...@hisilicon.com>
Cc: Guodong Xu <guodong...@linaro.org>
Cc: Amit Pundir <amit.pun...@linaro.org>
Cc: Rob Herring <robh...@kernel.org>
Cc: John Youn <johny...@synopsys.com>
Cc: Douglas Anderson <diand...@chromium.org>
Cc: Chen Yu <cheny...@huawei.com>
Cc: Vardan Mikayelyan <mvar...@synopsys.com>
Cc: Kishon Vijay Abraham I <kis...@ti.com>
Cc: Felipe Balbi <felipe.ba...@linux.intel.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: linux-usb@vger.kernel.org
Signed-off-by: John Stultz <john.stu...@linaro.org>
Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/core.c   | 6 +++---
 drivers/usb/dwc2/core.h   | 2 +-
 drivers/usb/dwc2/gadget.c | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index c987547a1e7b..7195366e26bf 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -313,7 +313,7 @@ static bool dwc2_iddig_filter_enabled(struct dwc2_hsotg 
*hsotg)
  * Do core a soft reset of the core.  Be careful with this because it
  * resets all the internal state machines of the core.
  */
-int dwc2_core_reset(struct dwc2_hsotg *hsotg)
+int dwc2_core_reset(struct dwc2_hsotg *hsotg, bool skip_wait)
 {
u32 greset;
int count = 0;
@@ -369,7 +369,7 @@ int dwc2_core_reset(struct dwc2_hsotg *hsotg)
}
} while (!(greset & GRSTCTL_AHBIDLE));
 
-   if (wait_for_host_mode)
+   if (wait_for_host_mode && !skip_wait)
dwc2_wait_for_mode(hsotg, true);
 
return 0;
@@ -500,7 +500,7 @@ int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg 
*hsotg)
 {
int retval;
 
-   retval = dwc2_core_reset(hsotg);
+   retval = dwc2_core_reset(hsotg, false);
if (retval)
return retval;
 
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 2bd3ea624cfc..b07bf7be2034 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -1088,7 +1088,7 @@ static inline bool dwc2_is_hs_iot(struct dwc2_hsotg 
*hsotg)
  * The following functions support initialization of the core driver component
  * and the DWC_otg controller
  */
-int dwc2_core_reset(struct dwc2_hsotg *hsotg);
+int dwc2_core_reset(struct dwc2_hsotg *hsotg, bool skip_wait);
 int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg *hsotg);
 int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg);
 int dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, bool restore);
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 1a1355429c1a..30ff51eab35c 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -3164,7 +3164,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg 
*hsotg,
kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET);
 
if (!is_usb_reset)
-   if (dwc2_core_reset(hsotg))
+   if (dwc2_core_reset(hsotg, true))
return;
 
/*
-- 
2.11.0

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[PATCH v3 12/24] usb: dwc2: Fix usage of bool params

[John Youn]

Check these parameters only for true or false. There is no need to check
for greater or less than 0.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/core.c  |   4 +-
 drivers/usb/dwc2/core.h  |   5 --
 drivers/usb/dwc2/core_intr.c |   2 +-
 drivers/usb/dwc2/gadget.c|   2 +-
 drivers/usb/dwc2/hcd.c   | 113 +--
 drivers/usb/dwc2/hcd_ddma.c  |   4 +-
 drivers/usb/dwc2/hcd_intr.c  |  45 +
 drivers/usb/dwc2/hcd_queue.c |  14 +++---
 drivers/usb/dwc2/params.c|   4 +-
 9 files changed, 93 insertions(+), 100 deletions(-)

diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index 0d322b7d4b28..c987547a1e7b 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -541,7 +541,7 @@ void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg)
addr = hsotg->regs + HAINTMSK;
dev_dbg(hsotg->dev, "HAINTMSK@0x%08lX : 0x%08X\n",
(unsigned long)addr, dwc2_readl(addr));
-   if (hsotg->params.dma_desc_enable > 0) {
+   if (hsotg->params.dma_desc_enable) {
addr = hsotg->regs + HFLBADDR;
dev_dbg(hsotg->dev, "HFLBADDR @0x%08lX : 0x%08X\n",
(unsigned long)addr, dwc2_readl(addr));
@@ -571,7 +571,7 @@ void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg)
addr = hsotg->regs + HCDMA(i);
dev_dbg(hsotg->dev, "HCDMA   @0x%08lX : 0x%08X\n",
(unsigned long)addr, dwc2_readl(addr));
-   if (hsotg->params.dma_desc_enable > 0) {
+   if (hsotg->params.dma_desc_enable) {
addr = hsotg->regs + HCDMAB(i);
dev_dbg(hsotg->dev, "HCDMAB  @0x%08lX : 0x%08X\n",
(unsigned long)addr, dwc2_readl(addr));
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 011e88017ce8..2bd3ea624cfc 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -470,9 +470,6 @@ struct dwc2_core_params {
u8 phy_utmi_width;
bool phy_ulpi_ddr;
bool phy_ulpi_ext_vbus;
-#define DWC2_PHY_ULPI_INTERNAL_VBUS0
-#define DWC2_PHY_ULPI_EXTERNAL_VBUS1
-
bool enable_dynamic_fifo;
bool en_multiple_tx_fifo;
bool i2c_enable;
@@ -492,8 +489,6 @@ struct dwc2_core_params {
bool dma_desc_fs_enable;
bool host_support_fs_ls_low_power;
bool host_ls_low_power_phy_clk;
-#define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ 0
-#define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ  1
 
u8 host_channels;
u16 host_rx_fifo_size;
diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
index 2f161bcf5f83..b8bcb007c92a 100644
--- a/drivers/usb/dwc2/core_intr.c
+++ b/drivers/usb/dwc2/core_intr.c
@@ -160,7 +160,7 @@ static void dwc2_handle_otg_intr(struct dwc2_hsotg *hsotg)
gotgctl = dwc2_readl(hsotg->regs + GOTGCTL);
if (gotgctl & GOTGCTL_SESREQSCS) {
if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS &&
-   hsotg->params.i2c_enable > 0) {
+   hsotg->params.i2c_enable) {
hsotg->srp_success = 1;
} else {
/* Clear Session Request */
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 4e15ff2f59db..1a1355429c1a 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -3227,7 +3227,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg 
*hsotg,
if (!using_desc_dma(hsotg))
intmsk |= GINTSTS_INCOMPL_SOIN | GINTSTS_INCOMPL_SOOUT;
 
-   if (hsotg->params.external_id_pin_ctl <= 0)
+   if (!hsotg->params.external_id_pin_ctl)
intmsk |= GINTSTS_CONIDSTSCHNG;
 
dwc2_writel(intmsk, hsotg->regs + GINTMSK);
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index c08c07a46bc6..8b688b041696 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -79,9 +79,9 @@ static void dwc2_enable_common_interrupts(struct dwc2_hsotg 
*hsotg)
/* Enable the interrupts in the GINTMSK */
intmsk = GINTSTS_MODEMIS | GINTSTS_OTGINT;
 
-   if (hsotg->params.host_dma <= 0)
+   if (!hsotg->params.host_dma)
intmsk |= GINTSTS_RXFLVL;
-   if (hsotg->params.external_id_pin_ctl <= 0)
+   if (!hsotg->params.external_id_pin_ctl)
intmsk |= GINTSTS_CONIDSTSCHNG;
 
intmsk |= GINTSTS_WKUPINT | GINTSTS_USBSUSP |
@@ -100,7 +100,7 @@ static void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg 
*hsotg)
 
if ((hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI &&
 hsotg->h

[PATCH v3 16/24] usb: dwc2: Show dr_mode via debugfs

[John Youn]

Show the value of dr_mode via a debufs file.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/debugfs.c | 29 +
 1 file changed, 29 insertions(+)

diff --git a/drivers/usb/dwc2/debugfs.c b/drivers/usb/dwc2/debugfs.c
index 57747b0df595..794b959a7c8c 100644
--- a/drivers/usb/dwc2/debugfs.c
+++ b/drivers/usb/dwc2/debugfs.c
@@ -839,6 +839,29 @@ static const struct file_operations hw_params_fops = {
.release= single_release,
 };
 
+static int dr_mode_show(struct seq_file *seq, void *v)
+{
+   struct dwc2_hsotg *hsotg = seq->private;
+   const char *dr_mode = "";
+
+   device_property_read_string(hsotg->dev, "dr_mode", _mode);
+   seq_printf(seq, "%s\n", dr_mode);
+   return 0;
+}
+
+static int dr_mode_open(struct inode *inode, struct file *file)
+{
+   return single_open(file, dr_mode_show, inode->i_private);
+}
+
+static const struct file_operations dr_mode_fops = {
+   .owner  = THIS_MODULE,
+   .open   = dr_mode_open,
+   .read   = seq_read,
+   .llseek = seq_lseek,
+   .release= single_release,
+};
+
 int dwc2_debugfs_init(struct dwc2_hsotg *hsotg)
 {
int ret;
@@ -863,6 +886,12 @@ int dwc2_debugfs_init(struct dwc2_hsotg *hsotg)
dev_err(hsotg->dev, "%s: failed to create hw_params\n",
__func__);
 
+   file = debugfs_create_file("dr_mode", 0444,
+  hsotg->debug_root,
+  hsotg, _mode_fops);
+   if (IS_ERR(file))
+   dev_err(hsotg->dev, "%s: failed to create dr_mode\n", __func__);
+
/* Add gadget debugfs nodes */
dwc2_hsotg_create_debug(hsotg);
 
-- 
2.11.0

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[PATCH v3 15/24] usb: dwc2: Remove debug prints in params.c

[John Youn]

Remove debugging prints to show params.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/params.c | 56 ---
 1 file changed, 56 deletions(-)

diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index 0e7f0f92c18f..620b02723f0d 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -513,8 +513,6 @@ static void dwc2_get_host_hwparams(struct dwc2_hsotg *hsotg)
 
gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ);
hptxfsiz = dwc2_readl(hsotg->regs + HPTXFSIZ);
-   dev_dbg(hsotg->dev, "gnptxfsiz=%08x\n", gnptxfsiz);
-   dev_dbg(hsotg->dev, "hptxfsiz=%08x\n", hptxfsiz);
 
if (forced)
dwc2_clear_force_mode(hsotg);
@@ -542,7 +540,6 @@ static void dwc2_get_dev_hwparams(struct dwc2_hsotg *hsotg)
forced = dwc2_force_mode_if_needed(hsotg, false);
 
gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ);
-   dev_dbg(hsotg->dev, "gnptxfsiz=%08x\n", gnptxfsiz);
 
if (forced)
dwc2_clear_force_mode(hsotg);
@@ -588,12 +585,6 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
hwcfg4 = dwc2_readl(hsotg->regs + GHWCFG4);
grxfsiz = dwc2_readl(hsotg->regs + GRXFSIZ);
 
-   dev_dbg(hsotg->dev, "hwcfg1=%08x\n", hwcfg1);
-   dev_dbg(hsotg->dev, "hwcfg2=%08x\n", hwcfg2);
-   dev_dbg(hsotg->dev, "hwcfg3=%08x\n", hwcfg3);
-   dev_dbg(hsotg->dev, "hwcfg4=%08x\n", hwcfg4);
-   dev_dbg(hsotg->dev, "grxfsiz=%08x\n", grxfsiz);
-
/*
 * Host specific hardware parameters. Reading these parameters
 * requires the controller to be in host mode. The mode will
@@ -653,53 +644,6 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
hw->rx_fifo_size = (grxfsiz & GRXFSIZ_DEPTH_MASK) >>
GRXFSIZ_DEPTH_SHIFT;
 
-   dev_dbg(hsotg->dev, "Detected values from hardware:\n");
-   dev_dbg(hsotg->dev, "  op_mode=%d\n",
-   hw->op_mode);
-   dev_dbg(hsotg->dev, "  arch=%d\n",
-   hw->arch);
-   dev_dbg(hsotg->dev, "  dma_desc_enable=%d\n",
-   hw->dma_desc_enable);
-   dev_dbg(hsotg->dev, "  power_optimized=%d\n",
-   hw->power_optimized);
-   dev_dbg(hsotg->dev, "  i2c_enable=%d\n",
-   hw->i2c_enable);
-   dev_dbg(hsotg->dev, "  hs_phy_type=%d\n",
-   hw->hs_phy_type);
-   dev_dbg(hsotg->dev, "  fs_phy_type=%d\n",
-   hw->fs_phy_type);
-   dev_dbg(hsotg->dev, "  utmi_phy_data_width=%d\n",
-   hw->utmi_phy_data_width);
-   dev_dbg(hsotg->dev, "  num_dev_ep=%d\n",
-   hw->num_dev_ep);
-   dev_dbg(hsotg->dev, "  num_dev_perio_in_ep=%d\n",
-   hw->num_dev_perio_in_ep);
-   dev_dbg(hsotg->dev, "  host_channels=%d\n",
-   hw->host_channels);
-   dev_dbg(hsotg->dev, "  max_transfer_size=%d\n",
-   hw->max_transfer_size);
-   dev_dbg(hsotg->dev, "  max_packet_count=%d\n",
-   hw->max_packet_count);
-   dev_dbg(hsotg->dev, "  nperio_tx_q_depth=0x%0x\n",
-   hw->nperio_tx_q_depth);
-   dev_dbg(hsotg->dev, "  host_perio_tx_q_depth=0x%0x\n",
-   hw->host_perio_tx_q_depth);
-   dev_dbg(hsotg->dev, "  dev_token_q_depth=0x%0x\n",
-   hw->dev_token_q_depth);
-   dev_dbg(hsotg->dev, "  enable_dynamic_fifo=%d\n",
-   hw->enable_dynamic_fifo);
-   dev_dbg(hsotg->dev, "  en_multiple_tx_fifo=%d\n",
-   hw->en_multiple_tx_fifo);
-   dev_dbg(hsotg->dev, "  total_fifo_size=%d\n",
-   hw->total_fifo_size);
-   dev_dbg(hsotg->dev, "  rx_fifo_size=%d\n",
-   hw->rx_fifo_size);
-   dev_dbg(hsotg->dev, "  host_nperio_tx_fifo_size=%d\n",
-   hw->host_nperio_tx_fifo_size);
-   dev_dbg(hsotg->dev, "  host_perio_tx_fifo_size=%d\n",
-   hw->host_perio_tx_fifo_size);
-   dev_dbg(hsotg->dev, "\n");
-
return 0;
 }
 
-- 
2.11.0

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[PATCH v3 14/24] usb: dwc2: Add debugfs file to show params

[John Youn]

Show the core params and hardware params.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/debugfs.c | 127 +
 1 file changed, 127 insertions(+)

diff --git a/drivers/usb/dwc2/debugfs.c b/drivers/usb/dwc2/debugfs.c
index cad621f02972..57747b0df595 100644
--- a/drivers/usb/dwc2/debugfs.c
+++ b/drivers/usb/dwc2/debugfs.c
@@ -725,6 +725,120 @@ static const struct debugfs_reg32 dwc2_regs[] = {
dump_register(HCDMAB(15)),
 };
 
+#define print_param(_seq, _ptr, _param) \
+seq_printf((_seq), "%-30s: %d\n", #_param, (_ptr)->_param)
+
+#define print_param_hex(_seq, _ptr, _param) \
+seq_printf((_seq), "%-30s: 0x%x\n", #_param, (_ptr)->_param)
+
+static int params_show(struct seq_file *seq, void *v)
+{
+   struct dwc2_hsotg *hsotg = seq->private;
+   struct dwc2_core_params *p = >params;
+   int i;
+
+   print_param(seq, p, otg_cap);
+   print_param(seq, p, dma_desc_enable);
+   print_param(seq, p, dma_desc_fs_enable);
+   print_param(seq, p, speed);
+   print_param(seq, p, enable_dynamic_fifo);
+   print_param(seq, p, en_multiple_tx_fifo);
+   print_param(seq, p, host_rx_fifo_size);
+   print_param(seq, p, host_nperio_tx_fifo_size);
+   print_param(seq, p, host_perio_tx_fifo_size);
+   print_param(seq, p, max_transfer_size);
+   print_param(seq, p, max_packet_count);
+   print_param(seq, p, host_channels);
+   print_param(seq, p, phy_type);
+   print_param(seq, p, phy_utmi_width);
+   print_param(seq, p, phy_ulpi_ddr);
+   print_param(seq, p, phy_ulpi_ext_vbus);
+   print_param(seq, p, i2c_enable);
+   print_param(seq, p, ulpi_fs_ls);
+   print_param(seq, p, host_support_fs_ls_low_power);
+   print_param(seq, p, host_ls_low_power_phy_clk);
+   print_param(seq, p, ts_dline);
+   print_param(seq, p, reload_ctl);
+   print_param_hex(seq, p, ahbcfg);
+   print_param(seq, p, uframe_sched);
+   print_param(seq, p, external_id_pin_ctl);
+   print_param(seq, p, hibernation);
+   print_param(seq, p, host_dma);
+   print_param(seq, p, g_dma);
+   print_param(seq, p, g_dma_desc);
+   print_param(seq, p, g_rx_fifo_size);
+   print_param(seq, p, g_np_tx_fifo_size);
+
+   for (i = 0; i < MAX_EPS_CHANNELS; i++) {
+   char str[32];
+
+   snprintf(str, 32, "g_tx_fifo_size[%d]", i);
+   seq_printf(seq, "%-30s: %d\n", str, p->g_tx_fifo_size[i]);
+   }
+
+   return 0;
+}
+
+static int params_open(struct inode *inode, struct file *file)
+{
+   return single_open(file, params_show, inode->i_private);
+}
+
+static const struct file_operations params_fops = {
+   .owner  = THIS_MODULE,
+   .open   = params_open,
+   .read   = seq_read,
+   .llseek = seq_lseek,
+   .release= single_release,
+};
+
+static int hw_params_show(struct seq_file *seq, void *v)
+{
+   struct dwc2_hsotg *hsotg = seq->private;
+   struct dwc2_hw_params *hw = >hw_params;
+
+   print_param(seq, hw, op_mode);
+   print_param(seq, hw, arch);
+   print_param(seq, hw, dma_desc_enable);
+   print_param(seq, hw, enable_dynamic_fifo);
+   print_param(seq, hw, en_multiple_tx_fifo);
+   print_param(seq, hw, rx_fifo_size);
+   print_param(seq, hw, host_nperio_tx_fifo_size);
+   print_param(seq, hw, dev_nperio_tx_fifo_size);
+   print_param(seq, hw, host_perio_tx_fifo_size);
+   print_param(seq, hw, nperio_tx_q_depth);
+   print_param(seq, hw, host_perio_tx_q_depth);
+   print_param(seq, hw, dev_token_q_depth);
+   print_param(seq, hw, max_transfer_size);
+   print_param(seq, hw, max_packet_count);
+   print_param(seq, hw, host_channels);
+   print_param(seq, hw, hs_phy_type);
+   print_param(seq, hw, fs_phy_type);
+   print_param(seq, hw, i2c_enable);
+   print_param(seq, hw, num_dev_ep);
+   print_param(seq, hw, num_dev_perio_in_ep);
+   print_param(seq, hw, total_fifo_size);
+   print_param(seq, hw, power_optimized);
+   print_param(seq, hw, utmi_phy_data_width);
+   print_param_hex(seq, hw, snpsid);
+   print_param_hex(seq, hw, dev_ep_dirs);
+
+   return 0;
+}
+
+static int hw_params_open(struct inode *inode, struct file *file)
+{
+   return single_open(file, hw_params_show, inode->i_private);
+}
+
+static const struct file_operations hw_params_fops = {
+   .owner  = THIS_MODULE,
+   .open   = hw_params_open,
+   .read   = seq_read,
+   .llseek = seq_lseek,
+   .release= single_release,
+};
+
 int dwc2_debugfs_init(struct dwc2_hsotg *hsotg)
 {
int ret;
@@ -736,6 +850,19 @@ int dwc2_debugfs_init(struct dwc2_hsotg *hsotg)
goto err0;
}
 
+   file = debugfs_crea

[PATCH v3 13/24] usb: dwc2: Remove unnecessary parameters

[John Youn]

Further reduce the set of parameters set by platforms. Many of them are
unnecessary as they should be reported by hardware. They should only
need to be overridden if there is a problem.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/params.c | 11 ---
 1 file changed, 11 deletions(-)

diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index b872f6128cc2..0e7f0f92c18f 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -42,19 +42,9 @@ static void dwc2_set_bcm_params(struct dwc2_hsotg *hsotg)
 {
struct dwc2_core_params *p = >params;
 
-   p->otg_cap = DWC2_CAP_PARAM_HNP_SRP_CAPABLE;
-   p->speed = DWC2_SPEED_PARAM_HIGH;
p->host_rx_fifo_size = 774;
-   p->host_nperio_tx_fifo_size = 256;
-   p->host_perio_tx_fifo_size = 512;
p->max_transfer_size = 65535;
p->max_packet_count = 511;
-   p->host_channels = 8;
-   p->phy_type = 1;
-   p->phy_utmi_width = 8;
-   p->i2c_enable = false;
-   p->host_ls_low_power_phy_clk = false;
-   p->reload_ctl = false;
p->ahbcfg = 0x10;
p->uframe_sched = false;
 }
@@ -74,7 +64,6 @@ static void dwc2_set_his_params(struct dwc2_hsotg *hsotg)
p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI;
p->phy_utmi_width = 8;
p->i2c_enable = false;
-   p->host_ls_low_power_phy_clk = false;
p->reload_ctl = false;
p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
GAHBCFG_HBSTLEN_SHIFT;
-- 
2.11.0

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[PATCH v3 11/24] usb: dwc2: Remove platform static params

[John Youn]

Remove the platform-specific static param structs and set only those
params that are necessary for each platform.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/params.c | 262 +++---
 1 file changed, 108 insertions(+), 154 deletions(-)

diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index 6ea9d2dafd74..949d988f13cc 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -38,166 +38,111 @@
 
 #include "core.h"
 
-static const struct dwc2_core_params params_hi6220 = {
-   .otg_cap= 2,/* No HNP/SRP capable */
-   .dma_desc_enable= 0,
-   .dma_desc_fs_enable = 0,
-   .speed  = 0,/* High Speed */
-   .enable_dynamic_fifo= 1,
-   .en_multiple_tx_fifo= 1,
-   .host_rx_fifo_size  = 512,
-   .host_nperio_tx_fifo_size   = 512,
-   .host_perio_tx_fifo_size= 512,
-   .max_transfer_size  = 65535,
-   .max_packet_count   = 511,
-   .host_channels  = 16,
-   .phy_type   = 1,/* UTMI */
-   .phy_utmi_width = 8,
-   .phy_ulpi_ddr   = 0,/* Single */
-   .phy_ulpi_ext_vbus  = 0,
-   .i2c_enable = 0,
-   .ulpi_fs_ls = 0,
-   .host_support_fs_ls_low_power   = 0,
-   .host_ls_low_power_phy_clk  = 0,/* 48 MHz */
-   .ts_dline   = 0,
-   .reload_ctl = 0,
-   .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
- GAHBCFG_HBSTLEN_SHIFT,
-   .uframe_sched   = 0,
-   .external_id_pin_ctl= -1,
-   .hibernation= -1,
-};
+static void dwc2_set_bcm_params(struct dwc2_hsotg *hsotg)
+{
+   struct dwc2_core_params *p = >params;
 
-static const struct dwc2_core_params params_bcm2835 = {
-   .otg_cap= 0,/* HNP/SRP capable */
-   .dma_desc_enable= 0,
-   .dma_desc_fs_enable = 0,
-   .speed  = 0,/* High Speed */
-   .enable_dynamic_fifo= 1,
-   .en_multiple_tx_fifo= 1,
-   .host_rx_fifo_size  = 774,  /* 774 DWORDs */
-   .host_nperio_tx_fifo_size   = 256,  /* 256 DWORDs */
-   .host_perio_tx_fifo_size= 512,  /* 512 DWORDs */
-   .max_transfer_size  = 65535,
-   .max_packet_count   = 511,
-   .host_channels  = 8,
-   .phy_type   = 1,/* UTMI */
-   .phy_utmi_width = 8,/* 8 bits */
-   .phy_ulpi_ddr   = 0,/* Single */
-   .phy_ulpi_ext_vbus  = 0,
-   .i2c_enable = 0,
-   .ulpi_fs_ls = 0,
-   .host_support_fs_ls_low_power   = 0,
-   .host_ls_low_power_phy_clk  = 0,/* 48 MHz */
-   .ts_dline   = 0,
-   .reload_ctl = 0,
-   .ahbcfg = 0x10,
-   .uframe_sched   = 0,
-   .external_id_pin_ctl= -1,
-   .hibernation= -1,
-};
+   p->otg_cap = DWC2_CAP_PARAM_HNP_SRP_CAPABLE;
+   p->speed = DWC2_SPEED_PARAM_HIGH;
+   p->host_rx_fifo_size = 774;
+   p->host_nperio_tx_fifo_size = 256;
+   p->host_perio_tx_fifo_size = 512;
+   p->max_transfer_size = 65535;
+   p->max_packet_count = 511;
+   p->host_channels = 8;
+   p->phy_type = 1;
+   p->phy_utmi_width = 8;
+   p->i2c_enable = false;
+   p->host_ls_low_power_phy_clk = 0;
+   p->reload_ctl = false;
+   p->ahbcfg = 0x10;
+   p->uframe_sched = false;
+}
 
-static const struct dwc2_core_params params_rk3066 = {
-   .otg_cap= 2,/* non-HNP/non-SRP */
-   .dma_desc_enable= 0,
-   .dma_desc_fs_enable = 0,
-   .speed  = -1,
-   .enable_dynamic_fifo= 1,
-   .en_multiple_tx_fifo= -1,
-   .host_rx_fifo_size  = 525,  /* 525 DWORDs */
-   .host_nperio_tx_fifo_size   = 128,  /* 128 DWORDs */
-   .host_perio_tx_fifo_size= 256,  /* 256 DWORDs */
-   .max_transfer_size  = -1,
-   .max_packet_count   = -1,
-   .host_channels  = -1,
-   .phy_type   = -1,
-   .phy_utmi_width = -1,
-   .phy_ulpi_ddr   = -1,
-   .phy_ulpi_ext_vbus  = -1,
-   .i2c_enable 

[PATCH v3 09/24] usb: dwc2: Rearrange param structure members

[John Youn]

Group the members by global, host, and gadget params. Formatting and
organizational change only.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/core.h | 51 ++---
 1 file changed, 23 insertions(+), 28 deletions(-)

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index c6f62648ad97..011e88017ce8 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -457,53 +457,48 @@ struct dwc2_core_params {
 #define DWC2_CAP_PARAM_SRP_ONLY_CAPABLE1
 #define DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE  2
 
-   bool dma_desc_enable;
-   bool dma_desc_fs_enable;
-   u8 speed;
-#define DWC2_SPEED_PARAM_HIGH  0
-#define DWC2_SPEED_PARAM_FULL  1
-#define DWC2_SPEED_PARAM_LOW   2
-
-   bool enable_dynamic_fifo;
-   bool en_multiple_tx_fifo;
-   u16 host_rx_fifo_size;
-   u16 host_nperio_tx_fifo_size;
-   u16 host_perio_tx_fifo_size;
-   u32 max_transfer_size;
-   u16 max_packet_count;
-   u8 host_channels;
u8 phy_type;
 #define DWC2_PHY_TYPE_PARAM_FS 0
 #define DWC2_PHY_TYPE_PARAM_UTMI   1
 #define DWC2_PHY_TYPE_PARAM_ULPI   2
 
+   u8 speed;
+#define DWC2_SPEED_PARAM_HIGH  0
+#define DWC2_SPEED_PARAM_FULL  1
+#define DWC2_SPEED_PARAM_LOW   2
+
u8 phy_utmi_width;
bool phy_ulpi_ddr;
bool phy_ulpi_ext_vbus;
-#define DWC2_PHY_ULPI_INTERNAL_VBUS0
-#define DWC2_PHY_ULPI_EXTERNAL_VBUS1
+#define DWC2_PHY_ULPI_INTERNAL_VBUS0
+#define DWC2_PHY_ULPI_EXTERNAL_VBUS1
 
+   bool enable_dynamic_fifo;
+   bool en_multiple_tx_fifo;
bool i2c_enable;
bool ulpi_fs_ls;
-   bool host_support_fs_ls_low_power;
-   bool host_ls_low_power_phy_clk;
-#define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ 0
-#define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ  1
-
bool ts_dline;
bool reload_ctl;
-   u32 ahbcfg;
bool uframe_sched;
bool external_id_pin_ctl;
bool hibernation;
-
-   /*
-* The following parameters are *only* set via device
-* properties and cannot be set directly in this structure.
-*/
+   u16 max_packet_count;
+   u32 max_transfer_size;
+   u32 ahbcfg;
 
/* Host parameters */
bool host_dma;
+   bool dma_desc_enable;
+   bool dma_desc_fs_enable;
+   bool host_support_fs_ls_low_power;
+   bool host_ls_low_power_phy_clk;
+#define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ 0
+#define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ  1
+
+   u8 host_channels;
+   u16 host_rx_fifo_size;
+   u16 host_nperio_tx_fifo_size;
+   u16 host_perio_tx_fifo_size;
 
/* Gadget parameters */
bool g_dma;
-- 
2.11.0

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[PATCH v3 10/24] usb: dwc2: Check core parameters

[John Youn]

Check that core parameters have valid values and adjust them if they
aren't.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/params.c | 185 ++
 1 file changed, 185 insertions(+)

diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index 4416eae09647..6ea9d2dafd74 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -377,6 +377,189 @@ static void dwc2_get_device_properties(struct dwc2_hsotg 
*hsotg)
}
 }
 
+static void dwc2_check_param_otg_cap(struct dwc2_hsotg *hsotg)
+{
+   int valid = 1;
+
+   switch (hsotg->params.otg_cap) {
+   case DWC2_CAP_PARAM_HNP_SRP_CAPABLE:
+   if (hsotg->hw_params.op_mode != GHWCFG2_OP_MODE_HNP_SRP_CAPABLE)
+   valid = 0;
+   break;
+   case DWC2_CAP_PARAM_SRP_ONLY_CAPABLE:
+   switch (hsotg->hw_params.op_mode) {
+   case GHWCFG2_OP_MODE_HNP_SRP_CAPABLE:
+   case GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE:
+   case GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE:
+   case GHWCFG2_OP_MODE_SRP_CAPABLE_HOST:
+   break;
+   default:
+   valid = 0;
+   break;
+   }
+   break;
+   case DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE:
+   /* always valid */
+   break;
+   default:
+   valid = 0;
+   break;
+   }
+
+   if (!valid)
+   dwc2_set_param_otg_cap(hsotg);
+}
+
+static void dwc2_check_param_phy_type(struct dwc2_hsotg *hsotg)
+{
+   int valid = 0;
+   u32 hs_phy_type;
+   u32 fs_phy_type;
+
+   hs_phy_type = hsotg->hw_params.hs_phy_type;
+   fs_phy_type = hsotg->hw_params.fs_phy_type;
+
+   switch (hsotg->params.phy_type) {
+   case DWC2_PHY_TYPE_PARAM_FS:
+   if (fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED)
+   valid = 1;
+   break;
+   case DWC2_PHY_TYPE_PARAM_UTMI:
+   if ((hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI) ||
+   (hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI_ULPI))
+   valid = 1;
+   break;
+   case DWC2_PHY_TYPE_PARAM_ULPI:
+   if ((hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI) ||
+   (hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI_ULPI))
+   valid = 1;
+   break;
+   default:
+   break;
+   }
+
+   if (!valid)
+   dwc2_set_param_phy_type(hsotg);
+}
+
+static void dwc2_check_param_speed(struct dwc2_hsotg *hsotg)
+{
+   int valid = 1;
+   int phy_type = hsotg->params.phy_type;
+   int speed = hsotg->params.speed;
+
+   switch (speed) {
+   case DWC2_SPEED_PARAM_HIGH:
+   if ((hsotg->params.speed == DWC2_SPEED_PARAM_HIGH) &&
+   (phy_type == DWC2_PHY_TYPE_PARAM_FS))
+   valid = 0;
+   break;
+   case DWC2_SPEED_PARAM_FULL:
+   case DWC2_SPEED_PARAM_LOW:
+   break;
+   default:
+   valid = 0;
+   break;
+   }
+
+   if (!valid)
+   dwc2_set_param_speed(hsotg);
+}
+
+static void dwc2_check_param_phy_utmi_width(struct dwc2_hsotg *hsotg)
+{
+   int valid = 0;
+   int param = hsotg->params.phy_utmi_width;
+   int width = hsotg->hw_params.utmi_phy_data_width;
+
+   switch (width) {
+   case GHWCFG4_UTMI_PHY_DATA_WIDTH_8:
+   valid = (param == 8);
+   break;
+   case GHWCFG4_UTMI_PHY_DATA_WIDTH_16:
+   valid = (param == 16);
+   break;
+   case GHWCFG4_UTMI_PHY_DATA_WIDTH_8_OR_16:
+   valid = (param == 8 || param == 16);
+   break;
+   }
+
+   if (!valid)
+   dwc2_set_param_phy_utmi_width(hsotg);
+}
+
+#define CHECK_RANGE(_param, _min, _max, _def) do { \
+   if ((hsotg->params._param) < (_min) ||  \
+   (hsotg->params._param) > (_max)) {  \
+   dev_warn(hsotg->dev, "%s: Invalid parameter %s=%d\n", \
+__func__, #_param, hsotg->params._param); \
+   hsotg->params._param = (_def);  \
+   }   \
+   } while (0)
+
+#define CHECK_BOOL(_param, _check) do {
\
+   if (hsotg->params._param && !(_check)) {\
+   dev_warn(hsotg->dev, "%s: Invalid parameter %s=%d\n", \
+__func__, #_param, hsotg->params._param); \
+   hsotg->params._param = false;   \

[PATCH v3 07/24] usb: dwc2: Get device properties

[John Youn]

After setting the default core parameter values, read in the device
properties and modify core parameter values if needed.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/params.c | 35 +++
 1 file changed, 35 insertions(+)

diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index 6729f14d25de..4416eae09647 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -343,6 +343,40 @@ static void dwc2_set_default_params(struct dwc2_hsotg 
*hsotg)
}
 }
 
+/**
+ * dwc2_get_device_properties() - Read in device properties.
+ *
+ * Read in the device properties and adjust core parameters if needed.
+ */
+static void dwc2_get_device_properties(struct dwc2_hsotg *hsotg)
+{
+   struct dwc2_core_params *p = >params;
+   int num;
+
+   if ((hsotg->dr_mode == USB_DR_MODE_PERIPHERAL) ||
+   (hsotg->dr_mode == USB_DR_MODE_OTG)) {
+   device_property_read_u32(hsotg->dev, "g-rx-fifo-size",
+>g_rx_fifo_size);
+
+   device_property_read_u32(hsotg->dev, "g-np-tx-fifo-size",
+>g_np_tx_fifo_size);
+
+   num = device_property_read_u32_array(hsotg->dev,
+"g-tx-fifo-size",
+NULL, 0);
+
+   if (num > 0) {
+   num = min(num, 15);
+   memset(p->g_tx_fifo_size, 0,
+  sizeof(p->g_tx_fifo_size));
+   device_property_read_u32_array(hsotg->dev,
+  "g-tx-fifo-size",
+  >g_tx_fifo_size[1],
+  num);
+   }
+   }
+}
+
 /*
  * Gets host hardware parameters. Forces host mode if not currently in
  * host mode. Should be called immediately after a core soft reset in
@@ -555,6 +589,7 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
 int dwc2_init_params(struct dwc2_hsotg *hsotg)
 {
dwc2_set_default_params(hsotg);
+   dwc2_get_device_properties(hsotg);
 
return 0;
 }
-- 
2.11.0

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[PATCH v3 08/24] usb: dwc2: Update parameter types

[John Youn]

Update the param types to appropriately sized ints and bools.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/core.h | 52 -
 1 file changed, 26 insertions(+), 26 deletions(-)

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 7256b9f7097a..c6f62648ad97 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -452,50 +452,50 @@ enum dwc2_ep0_state {
  * default described above.
  */
 struct dwc2_core_params {
-   int otg_cap;
+   u8 otg_cap;
 #define DWC2_CAP_PARAM_HNP_SRP_CAPABLE 0
 #define DWC2_CAP_PARAM_SRP_ONLY_CAPABLE1
 #define DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE  2
 
-   int dma_desc_enable;
-   int dma_desc_fs_enable;
-   int speed;
+   bool dma_desc_enable;
+   bool dma_desc_fs_enable;
+   u8 speed;
 #define DWC2_SPEED_PARAM_HIGH  0
 #define DWC2_SPEED_PARAM_FULL  1
 #define DWC2_SPEED_PARAM_LOW   2
 
-   int enable_dynamic_fifo;
-   int en_multiple_tx_fifo;
-   int host_rx_fifo_size;
-   int host_nperio_tx_fifo_size;
-   int host_perio_tx_fifo_size;
-   int max_transfer_size;
-   int max_packet_count;
-   int host_channels;
-   int phy_type;
+   bool enable_dynamic_fifo;
+   bool en_multiple_tx_fifo;
+   u16 host_rx_fifo_size;
+   u16 host_nperio_tx_fifo_size;
+   u16 host_perio_tx_fifo_size;
+   u32 max_transfer_size;
+   u16 max_packet_count;
+   u8 host_channels;
+   u8 phy_type;
 #define DWC2_PHY_TYPE_PARAM_FS 0
 #define DWC2_PHY_TYPE_PARAM_UTMI   1
 #define DWC2_PHY_TYPE_PARAM_ULPI   2
 
-   int phy_utmi_width;
-   int phy_ulpi_ddr;
-   int phy_ulpi_ext_vbus;
+   u8 phy_utmi_width;
+   bool phy_ulpi_ddr;
+   bool phy_ulpi_ext_vbus;
 #define DWC2_PHY_ULPI_INTERNAL_VBUS0
 #define DWC2_PHY_ULPI_EXTERNAL_VBUS1
 
-   int i2c_enable;
-   int ulpi_fs_ls;
-   int host_support_fs_ls_low_power;
-   int host_ls_low_power_phy_clk;
+   bool i2c_enable;
+   bool ulpi_fs_ls;
+   bool host_support_fs_ls_low_power;
+   bool host_ls_low_power_phy_clk;
 #define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ 0
 #define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ  1
 
-   int ts_dline;
-   int reload_ctl;
-   int ahbcfg;
-   int uframe_sched;
-   int external_id_pin_ctl;
-   int hibernation;
+   bool ts_dline;
+   bool reload_ctl;
+   u32 ahbcfg;
+   bool uframe_sched;
+   bool external_id_pin_ctl;
+   bool hibernation;
 
/*
 * The following parameters are *only* set via device
-- 
2.11.0

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[PATCH v3 06/24] usb: dwc2: Set core parameters to default values

[John Youn]

Initialize the core parameters to their default, auto-detected values.

Remove all the previous dwc2_set_param* methods. Most of what this code
is doing is handling defaults for "not set" values and other trivial
checks. The checking can be simplified and will be done in a later
commit.

This allows us to change only those parameters that won't work with
default settings. It also allows us to use non-int parameters.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/core.h   |   4 -
 drivers/usb/dwc2/params.c | 990 --
 2 files changed, 75 insertions(+), 919 deletions(-)

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 73514f263e40..7256b9f7097a 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -452,10 +452,6 @@ enum dwc2_ep0_state {
  * default described above.
  */
 struct dwc2_core_params {
-   /*
-* Don't add any non-int members here, this will break
-* dwc2_set_all_params!
-*/
int otg_cap;
 #define DWC2_CAP_PARAM_HNP_SRP_CAPABLE 0
 #define DWC2_CAP_PARAM_SRP_ONLY_CAPABLE1
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index 074f4061206a..6729f14d25de 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -187,42 +187,6 @@ static const struct dwc2_core_params params_amlogic = {
.hibernation= -1,
 };
 
-static const struct dwc2_core_params params_default = {
-   .otg_cap= -1,
-
-   /*
-* Disable descriptor dma mode by default as the HW can support
-* it, but does not support it for SPLIT transactions.
-* Disable it for FS devices as well.
-*/
-   .dma_desc_enable= 0,
-   .dma_desc_fs_enable = 0,
-
-   .speed  = -1,
-   .enable_dynamic_fifo= -1,
-   .en_multiple_tx_fifo= -1,
-   .host_rx_fifo_size  = -1,
-   .host_nperio_tx_fifo_size   = -1,
-   .host_perio_tx_fifo_size= -1,
-   .max_transfer_size  = -1,
-   .max_packet_count   = -1,
-   .host_channels  = -1,
-   .phy_type   = -1,
-   .phy_utmi_width = -1,
-   .phy_ulpi_ddr   = -1,
-   .phy_ulpi_ext_vbus  = -1,
-   .i2c_enable = -1,
-   .ulpi_fs_ls = -1,
-   .host_support_fs_ls_low_power   = -1,
-   .host_ls_low_power_phy_clk  = -1,
-   .ts_dline   = -1,
-   .reload_ctl = -1,
-   .ahbcfg = -1,
-   .uframe_sched   = -1,
-   .external_id_pin_ctl= -1,
-   .hibernation= -1,
-};
-
 const struct of_device_id dwc2_of_match_table[] = {
{ .compatible = "brcm,bcm2835-usb", .data = _bcm2835 },
{ .compatible = "hisilicon,hi6220-usb", .data = _hi6220 },
@@ -238,913 +202,131 @@ const struct of_device_id dwc2_of_match_table[] = {
 };
 MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
 
-static void dwc2_get_device_property(struct dwc2_hsotg *hsotg,
-char *property, u8 size, u64 *value)
+static void dwc2_set_param_otg_cap(struct dwc2_hsotg *hsotg)
 {
-   u32 val32;
+   u8 val;
 
-   switch (size) {
-   case 0:
-   *value = device_property_read_bool(hsotg->dev, property);
+   switch (hsotg->hw_params.op_mode) {
+   case GHWCFG2_OP_MODE_HNP_SRP_CAPABLE:
+   val = DWC2_CAP_PARAM_HNP_SRP_CAPABLE;
break;
-   case 1:
-   case 2:
-   case 4:
-   if (device_property_read_u32(hsotg->dev, property, ))
-   return;
-
-   *value = val32;
-   break;
-   case 8:
-   if (device_property_read_u64(hsotg->dev, property, value))
-   return;
-
+   case GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE:
+   case GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE:
+   case GHWCFG2_OP_MODE_SRP_CAPABLE_HOST:
+   val = DWC2_CAP_PARAM_SRP_ONLY_CAPABLE;
break;
default:
-   /*
-* The size is checked by the only function that calls
-* this so this should never happen.
-*/
-   WARN_ON(1);
-   return;
-   }
-}
-
-static void dwc2_set_core_param(void *param, u8 size, u64 value)
-{
-   switch (size) {
-   case 0:
-   *((bool *)param) = !!value;
-   break;
-   case 1:
-   *((u8 *)param) = (u8)value;
-   break;
-   case 2:
-   *((u16 *)param) = (u16)value;
-   break;
-   case 4:
-   *((u32 *)param) =

[PATCH v3 04/24] Revert "usb: dwc2: pci: Add AHB burst property for HAPS"

[John Youn]

This reverts commit e0beae49474c ("usb: dwc2: pci: Add AHB burst
property for HAPS").

This commit was inadvertently applied.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/pci.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/usb/dwc2/pci.c b/drivers/usb/dwc2/pci.c
index f8bffda92495..fdeb8c7bf30a 100644
--- a/drivers/usb/dwc2/pci.c
+++ b/drivers/usb/dwc2/pci.c
@@ -67,7 +67,6 @@ static int dwc2_pci_quirks(struct pci_dev *pdev, struct 
platform_device *dwc2)
if (pdev->vendor == PCI_VENDOR_ID_SYNOPSYS &&
pdev->device == PCI_PRODUCT_ID_HAPS_HSOTG) {
struct property_entry properties[] = {
-   PROPERTY_ENTRY_STRING("snps,ahb-burst", "INCR"),
{ },
};
 
-- 
2.11.0

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[PATCH v3 05/24] usb: dwc2: Remove unused otg_ver parameter

[John Youn]

The otg_ver parameter only controls the SRP pulsing method and defaults
to the 1.3 behavior. It is unused and can be removed.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/core.c   |  5 -
 drivers/usb/dwc2/core.h   |  9 -
 drivers/usb/dwc2/hcd.c|  3 ---
 drivers/usb/dwc2/params.c | 23 ---
 4 files changed, 40 deletions(-)

diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index 0446f3d6d54a..0d322b7d4b28 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -751,11 +751,6 @@ bool dwc2_force_mode_if_needed(struct dwc2_hsotg *hsotg, 
bool host)
return dwc2_force_mode(hsotg, host);
 }
 
-u16 dwc2_get_otg_version(struct dwc2_hsotg *hsotg)
-{
-   return hsotg->params.otg_ver == 1 ? 0x0200 : 0x0103;
-}
-
 bool dwc2_is_controller_alive(struct dwc2_hsotg *hsotg)
 {
if (dwc2_readl(hsotg->regs + GSNPSID) == 0x)
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 2fdd74d502c0..73514f263e40 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -298,9 +298,6 @@ enum dwc2_ep0_state {
  *   1 - SRP Only capable
  *   2 - No HNP/SRP capable (always available)
  *  Defaults to best available option (0, 1, then 2)
- * @otg_ver:OTG version supported
- *   0 - 1.3 (default)
- *   1 - 2.0
  * @host_dma:   Specifies whether to use slave or DMA mode for 
accessing
  *  the data FIFOs. The driver will automatically detect 
the
  *  value for this parameter if none is specified.
@@ -464,7 +461,6 @@ struct dwc2_core_params {
 #define DWC2_CAP_PARAM_SRP_ONLY_CAPABLE1
 #define DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE  2
 
-   int otg_ver;
int dma_desc_enable;
int dma_desc_fs_enable;
int speed;
@@ -1175,11 +1171,6 @@ void dwc2_dump_dev_registers(struct dwc2_hsotg *hsotg);
 void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg);
 void dwc2_dump_global_registers(struct dwc2_hsotg *hsotg);
 
-/*
- * Return OTG version - either 1.3 or 2.0
- */
-u16 dwc2_get_otg_version(struct dwc2_hsotg *hsotg);
-
 /* Gadget defines */
 #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index 2c90b0867ee1..c08c07a46bc6 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -2260,10 +2260,7 @@ static int dwc2_core_init(struct dwc2_hsotg *hsotg, bool 
initial_setup)
/* Program the GOTGCTL register */
otgctl = dwc2_readl(hsotg->regs + GOTGCTL);
otgctl &= ~GOTGCTL_OTGVER;
-   if (hsotg->params.otg_ver > 0)
-   otgctl |= GOTGCTL_OTGVER;
dwc2_writel(otgctl, hsotg->regs + GOTGCTL);
-   dev_dbg(hsotg->dev, "OTG VER PARAM: %d\n", hsotg->params.otg_ver);
 
/* Clear the SRP success bit for FS-I2c */
hsotg->srp_success = 0;
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index bcd1e19b4076..074f4061206a 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -40,7 +40,6 @@
 
 static const struct dwc2_core_params params_hi6220 = {
.otg_cap= 2,/* No HNP/SRP capable */
-   .otg_ver= 0,/* 1.3 */
.dma_desc_enable= 0,
.dma_desc_fs_enable = 0,
.speed  = 0,/* High Speed */
@@ -71,7 +70,6 @@ static const struct dwc2_core_params params_hi6220 = {
 
 static const struct dwc2_core_params params_bcm2835 = {
.otg_cap= 0,/* HNP/SRP capable */
-   .otg_ver= 0,/* 1.3 */
.dma_desc_enable= 0,
.dma_desc_fs_enable = 0,
.speed  = 0,/* High Speed */
@@ -101,7 +99,6 @@ static const struct dwc2_core_params params_bcm2835 = {
 
 static const struct dwc2_core_params params_rk3066 = {
.otg_cap= 2,/* non-HNP/non-SRP */
-   .otg_ver= -1,
.dma_desc_enable= 0,
.dma_desc_fs_enable = 0,
.speed  = -1,
@@ -132,7 +129,6 @@ static const struct dwc2_core_params params_rk3066 = {
 
 static const struct dwc2_core_params params_ltq = {
.otg_cap= 2,/* non-HNP/non-SRP */
-   .otg_ver= -1,
.dma_desc_enable= -1,
.dma_desc_fs_enable = -1,
.speed  = -1,
@@ -163,7 +159,6 @@ static const struct dwc2_core_params params_ltq = {
 
 static const struct dwc2_core_params params_amlogic = {
.otg_cap= DWC2

[PATCH v3 03/24] Revert "usb: dwc2: Use the ahb_burst param"

[John Youn]

This reverts commit 70033c5ec15b ("usb: dwc2: Use the ahb_burst param").

This commit was inadvertently applied.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/gadget.c |  2 +-
 drivers/usb/dwc2/hcd.c|  8 +---
 drivers/usb/dwc2/params.c | 10 ++
 3 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index c7e1ab84a9bc..4e15ff2f59db 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -3234,7 +3234,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg 
*hsotg,
 
if (using_dma(hsotg)) {
dwc2_writel(GAHBCFG_GLBL_INTR_EN | GAHBCFG_DMA_EN |
-   (hsotg->params.ahb_burst << GAHBCFG_HBSTLEN_SHIFT),
+   (GAHBCFG_HBSTLEN_INCR4 << GAHBCFG_HBSTLEN_SHIFT),
hsotg->regs + GAHBCFG);
 
/* Set DDMA mode support in the core if needed */
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index 2173f979705a..2c90b0867ee1 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -273,9 +273,11 @@ static int dwc2_gahbcfg_init(struct dwc2_hsotg *hsotg)
 
case GHWCFG2_INT_DMA_ARCH:
dev_dbg(hsotg->dev, "Internal DMA Mode\n");
-   ahbcfg &= ~GAHBCFG_HBSTLEN_MASK;
-   ahbcfg |= (hsotg->params.ahb_burst <<
-  GAHBCFG_HBSTLEN_SHIFT);
+   if (hsotg->params.ahbcfg != -1) {
+   ahbcfg &= GAHBCFG_CTRL_MASK;
+   ahbcfg |= hsotg->params.ahbcfg &
+ ~GAHBCFG_CTRL_MASK;
+   }
break;
 
case GHWCFG2_SLAVE_ONLY_ARCH:
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index aba8ee83..bcd1e19b4076 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -969,6 +969,15 @@ static void dwc2_set_param_reload_ctl(struct dwc2_hsotg 
*hsotg, int val)
hsotg->params.reload_ctl = val;
 }
 
+static void dwc2_set_param_ahbcfg(struct dwc2_hsotg *hsotg, int val)
+{
+   if (val != -1)
+   hsotg->params.ahbcfg = val;
+   else
+   hsotg->params.ahbcfg = GAHBCFG_HBSTLEN_INCR4 <<
+   GAHBCFG_HBSTLEN_SHIFT;
+}
+
 static void dwc2_set_param_otg_ver(struct dwc2_hsotg *hsotg, int val)
 {
if (DWC2_OUT_OF_BOUNDS(val, 0, 1)) {
@@ -1144,6 +1153,7 @@ static void dwc2_set_parameters(struct dwc2_hsotg *hsotg,
dwc2_set_param_en_multiple_tx_fifo(hsotg,
params->en_multiple_tx_fifo);
dwc2_set_param_reload_ctl(hsotg, params->reload_ctl);
+   dwc2_set_param_ahbcfg(hsotg, params->ahbcfg);
dwc2_set_param_otg_ver(hsotg, params->otg_ver);
dwc2_set_param_uframe_sched(hsotg, params->uframe_sched);
dwc2_set_param_external_id_pin_ctl(hsotg, params->external_id_pin_ctl);
-- 
2.11.0

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[PATCH v3 00/24] usb: dwc2: Rework params, FIFO, and other changes

[John Youn]

Hi Felipe,

This is a consolidation, rebase, and resend of several dwc2 patch
series that were submitted to this list in the past month or so. See
v2 [1] of this series for a summary.

This latest revision is rebased to apply cleanly to your latest
testing/next.

This series also rebases the FIFO series from Sevak [2]. So there's no
need to pick that up separately.

The first 4 patches revert commits that were mistakenly added to your
next branch.

Regards,
John

[1] https://www.spinics.net/lists/linux-usb/msg152258.html
[2] https://www.spinics.net/lists/linux-usb/msg152322.html


Chen Yu (2):
  usb: dwc2: Force port resume on switching to device mode
  usb: dwc2: Add a quirk to allow speed negotiation for Hisilicon Hi6220

John Stultz (2):
  usb: dwc2: Avoid sleeping while holding hsotg->lock
  usb: dwc2: Workaround case where GOTGCTL state is wrong

John Youn (16):
  Revert "Documentation: devictree: dwc2: Add AHB burst binding"
  Revert "usb: dwc2: Read in the AHB burst property"
  Revert "usb: dwc2: Use the ahb_burst param"
  Revert "usb: dwc2: pci: Add AHB burst property for HAPS"
  usb: dwc2: Remove unused otg_ver parameter
  usb: dwc2: Set core parameters to default values
  usb: dwc2: Get device properties
  usb: dwc2: Update parameter types
  usb: dwc2: Rearrange param structure members
  usb: dwc2: Check core parameters
  usb: dwc2: Remove platform static params
  usb: dwc2: Fix usage of bool params
  usb: dwc2: Remove unnecessary parameters
  usb: dwc2: Add debugfs file to show params
  usb: dwc2: Remove debug prints in params.c
  usb: dwc2: Show dr_mode via debugfs

Nicholas Mc Guire (1):
  usb: dwc2: host: use msleep() for long delay

Sevak Arakelyan (3):
  usb: dwc2: host: Correct snpsid checking for GDFIFOCFG
  usb: dwc2: gadget: Set TX FIFO depths to calculated defaults
  usb: dwc2: gadget: Add checking for g-tx-fifo-size parameter

 Documentation/devicetree/bindings/usb/dwc2.txt |2 -
 drivers/usb/dwc2/core.c|   17 +-
 drivers/usb/dwc2/core.h|  118 +-
 drivers/usb/dwc2/core_intr.c   |2 +-
 drivers/usb/dwc2/debugfs.c |  156 +++
 drivers/usb/dwc2/gadget.c  |   99 +-
 drivers/usb/dwc2/hcd.c |  203 +++-
 drivers/usb/dwc2/hcd_ddma.c|4 +-
 drivers/usb/dwc2/hcd_intr.c|   45 +-
 drivers/usb/dwc2/hcd_queue.c   |   14 +-
 drivers/usb/dwc2/params.c  | 1511 ++--
 drivers/usb/dwc2/pci.c |1 -
 12 files changed, 845 insertions(+), 1327 deletions(-)

-- 
2.11.0

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[PATCH v3 02/24] Revert "usb: dwc2: Read in the AHB burst property"

[John Youn]

This reverts commit 605f91f9f5a6 ("usb: dwc2: Read in the AHB burst
property").

This commit was inadvertently applied.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/core.h   |  9 ---
 drivers/usb/dwc2/params.c | 69 ---
 2 files changed, 78 deletions(-)

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 570a8004998c..2fdd74d502c0 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -433,12 +433,6 @@ enum dwc2_ep0_state {
  * needed.
  * 0 - No (default)
  * 1 - Yes
- * @ahb_burst:  Specifies the AHB burst.
- *   0 - Single
- *   1 - INCR
- *   3 - INCR4 (default)
- *   5 - INCR8
- *   7 - INCR16
  * @g_dma:  Enables gadget dma usage (default: autodetect).
  * @g_dma_desc: Enables gadget descriptor DMA (default: autodetect).
  * @g_rx_fifo_size:The periodic rx fifo size for the device, in
@@ -516,9 +510,6 @@ struct dwc2_core_params {
 * properties and cannot be set directly in this structure.
 */
 
-   /* Global parameters */
-   u8 ahb_burst;
-
/* Host parameters */
bool host_dma;
 
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index 014e269f2d64..aba8ee83 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -93,13 +93,6 @@ static const struct dwc2_core_params params_bcm2835 = {
.host_ls_low_power_phy_clk  = 0,/* 48 MHz */
.ts_dline   = 0,
.reload_ctl = 0,
-
-   /*
-* Although this value would normally be invalid, for BCM2835,
-* the GAHBCFG.HBSTLEN field has a different meaning from that
-* defined by Synopsys. See the BCM2835 databook section 15.2
-* for details.
-*/
.ahbcfg = 0x10,
.uframe_sched   = 0,
.external_id_pin_ctl= -1,
@@ -1077,66 +1070,6 @@ static void dwc2_set_param_tx_fifo_sizes(struct 
dwc2_hsotg *hsotg)
}
 }
 
-static const char *const ahb_bursts[] = {
-   [GAHBCFG_HBSTLEN_SINGLE]= "SINGLE",
-   [GAHBCFG_HBSTLEN_INCR]  = "INCR",
-   [GAHBCFG_HBSTLEN_INCR4] = "INCR4",
-   [GAHBCFG_HBSTLEN_INCR8] = "INCR8",
-   [GAHBCFG_HBSTLEN_INCR16]= "INCR16",
-};
-
-static int dwc2_get_property_ahb_burst(struct dwc2_hsotg *hsotg)
-{
-   struct device_node *node = hsotg->dev->of_node;
-   const char *str = NULL;
-   int burst;
-   int ret;
-
-   ret = device_property_read_string(hsotg->dev,
- "snps,ahb-burst", );
-   if (ret < 0) {
-   return ret;
-   } else if (of_device_is_compatible(node, "brcm,bcm2835-usb")) {
-   dev_warn(hsotg->dev,
-"snps,ahb-burst is not supported on this platform");
-   return -EINVAL;
-   }
-
-   burst = match_string(ahb_bursts,
-ARRAY_SIZE(ahb_bursts), str);
-   if (burst < 0) {
-   dev_err(hsotg->dev,
-   "Invalid parameter '%s' for ahb-burst\n", str);
-   }
-
-   return burst;
-}
-
-static void dwc2_set_ahb_burst(struct dwc2_hsotg *hsotg)
-{
-   struct dwc2_core_params *p = >params;
-   int burst;
-   int ret;
-
-   /* Default burst value */
-   burst = GAHBCFG_HBSTLEN_INCR4;
-
-   /* Get the legacy param value, if set. */
-   if (p->ahbcfg != -1) {
-   burst = (p->ahbcfg & GAHBCFG_HBSTLEN_MASK) >>
-   GAHBCFG_HBSTLEN_SHIFT;
-   }
-
-   /* Override it from devicetree, if set. */
-   ret = dwc2_get_property_ahb_burst(hsotg);
-   if (ret >= 0)
-   burst = ret;
-
-   /* Set the parameter */
-   p->ahb_burst = (u8)burst;
-   dev_dbg(hsotg->dev, "Setting ahb-burst to %d\n", burst);
-}
-
 static void dwc2_set_gadget_dma(struct dwc2_hsotg *hsotg)
 {
struct dwc2_hw_params *hw = >hw_params;
@@ -1216,8 +1149,6 @@ static void dwc2_set_parameters(struct dwc2_hsotg *hsotg,
dwc2_set_param_external_id_pin_ctl(hsotg, params->external_id_pin_ctl);
dwc2_set_param_hibernation(hsotg, params->hibernation);
 
-   dwc2_set_ahb_burst(hsotg);
-
/*
 * Set devicetree-only parameters. These parameters do not
 * take any values from @params.
-- 
2.11.0

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[PATCH v3 01/24] Revert "Documentation: devictree: dwc2: Add AHB burst binding"

[John Youn]

This reverts commit d067dad79548 ("Documentation: devictree: dwc2: Add
AHB burst binding").

This commit was inadvertently applied.

Signed-off-by: John Youn <johny...@synopsys.com>
---
 Documentation/devicetree/bindings/usb/dwc2.txt | 2 --
 1 file changed, 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt 
b/Documentation/devicetree/bindings/usb/dwc2.txt
index 9e7b4b4a37ae..6c7c2bce6d0c 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.txt
+++ b/Documentation/devicetree/bindings/usb/dwc2.txt
@@ -26,8 +26,6 @@ Optional properties:
 Refer to phy/phy-bindings.txt for generic phy consumer properties
 - dr_mode: shall be one of "host", "peripheral" and "otg"
   Refer to usb/generic.txt
-- snps,ahb-burst: specifies the ahb burst length. Valid arguments are:
-  "SINGLE", "INCR", "INCR4", "INCR8", "INCR16". Defaults to "INCR4".
 - g-rx-fifo-size: size of rx fifo size in gadget mode.
 - g-np-tx-fifo-size: size of non-periodic tx fifo size in gadget mode.
 - g-tx-fifo-size: size of periodic tx fifo per endpoint (except ep0) in gadget 
mode.
-- 
2.11.0

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Re: [PATCH v2] usb: dwc3: handle DWC_USB3_NUM == DWC_USB3_NUM_IN_EPS

[John Youn]

On 1/23/2017 2:10 PM, Alan Stern wrote:
> On Mon, 23 Jan 2017, John Youn wrote:
>
>> On 1/22/2017 5:29 PM, Bryan O'Donoghue wrote:
>>> - DWC_USB3_NUM indicates the number of Device mode single directional
>>>   endpoints, including OUT and IN endpoint 0.
>>>
>>> - DWC_USB3_NUM_IN_EPS indicates the maximum number of Device mode IN
>>>   endpoints active at any time, including control endpoint 0.
>>>
>>> It's possible to configure RTL such that DWC_USB3_NUM_EPS is equal to
>>> DWC_USB3_NUM_IN_EPS.
>>>
>>> dwc3-core calculates the number of OUT endpoints as DWC_USB3_NUM minus
>>> DWC_USB3_NUM_IN_EPS. If RTL has been configured with DWC_USB3_NUM_IN_EPS
>>> equal to DWC_USB3_NUM then dwc3-core will calculate the number of OUT
>>> endpoints as zero.
>>>
>>> For example a from dwc3_core_num_eps() shows:
>>> [1.565000]  /usb0@f01d: found 8 IN and 0 OUT endpoints
>>>
>>> This patch works around this case by detecting when DWC_USB3_NUM_EPS is
>>> equal to DWC3_USB3_NUM_IN_EPS and over-rides the calculation of the number
>>
>> What if NUM_IN_EPS=7 and NUM_EPS=8? You will still have a problem.
>>
>> It's possible to fix this for the general case rather than for this
>> specific case.
>
> What is the reason for computing NUM_OUT_EPS in the first place?
> Isn't it true that any endpoint can be used as an OUT endpoint?
>
> So the real restrictions on a configuration are:
>
>   number of IN endpoints <= NUM_IN_EPS, and
>
>   number of IN endpoints + number of OUT endpoints <= NUM_EPS,
>
> where ep0 must be counted twice, as both an IN and an OUT endpoint.
> The value of NUM_OUT_EPS isn't used and shouldn't matter.
>

Yes that's correct. The general fix should take all that into account
so that any combination of NUM_EPS and NUM_IN_EPS will work fine.

However it must also account for FPGA configs where each HW endpoint
has a fixed number/direction, which the current code is compatible
with.

John
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Re: [PATCH v2] usb: dwc3: handle DWC_USB3_NUM == DWC_USB3_NUM_IN_EPS

[John Youn]

On 1/22/2017 5:29 PM, Bryan O'Donoghue wrote:
> - DWC_USB3_NUM indicates the number of Device mode single directional
>   endpoints, including OUT and IN endpoint 0.
>
> - DWC_USB3_NUM_IN_EPS indicates the maximum number of Device mode IN
>   endpoints active at any time, including control endpoint 0.
>
> It's possible to configure RTL such that DWC_USB3_NUM_EPS is equal to
> DWC_USB3_NUM_IN_EPS.
>
> dwc3-core calculates the number of OUT endpoints as DWC_USB3_NUM minus
> DWC_USB3_NUM_IN_EPS. If RTL has been configured with DWC_USB3_NUM_IN_EPS
> equal to DWC_USB3_NUM then dwc3-core will calculate the number of OUT
> endpoints as zero.
>
> For example a from dwc3_core_num_eps() shows:
> [1.565000]  /usb0@f01d: found 8 IN and 0 OUT endpoints
>
> This patch works around this case by detecting when DWC_USB3_NUM_EPS is
> equal to DWC3_USB3_NUM_IN_EPS and over-rides the calculation of the number

What if NUM_IN_EPS=7 and NUM_EPS=8? You will still have a problem.

It's possible to fix this for the general case rather than for this
specific case.

Regards,
John
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Re: [PATCH v2] usb: dwc3: handle DWC_USB3_NUM == DWC_USB3_NUM_IN_EPS

[John Youn]

On 1/23/2017 5:34 AM, Bryan O'Donoghue wrote:
> On 23/01/17 12:08, Felipe Balbi wrote:
>>
>> Hi,
>>
>> Bryan O'Donoghue  writes:
>>> - DWC_USB3_NUM indicates the number of Device mode single directional
>>>   endpoints, including OUT and IN endpoint 0.
>>>
>>> - DWC_USB3_NUM_IN_EPS indicates the maximum number of Device mode IN
>>>   endpoints active at any time, including control endpoint 0.
>>>
>>> It's possible to configure RTL such that DWC_USB3_NUM_EPS is equal to
>>> DWC_USB3_NUM_IN_EPS.
>>>
>>> dwc3-core calculates the number of OUT endpoints as DWC_USB3_NUM minus
>>> DWC_USB3_NUM_IN_EPS. If RTL has been configured with DWC_USB3_NUM_IN_EPS
>>> equal to DWC_USB3_NUM then dwc3-core will calculate the number of OUT
>>> endpoints as zero.
>>>
>>> For example a from dwc3_core_num_eps() shows:
>>> [1.565000]  /usb0@f01d: found 8 IN and 0 OUT endpoints
>>>
>>> This patch works around this case by detecting when DWC_USB3_NUM_EPS is
>>> equal to DWC3_USB3_NUM_IN_EPS and over-rides the calculation of the number
>>> of OUT and IN endpoints to make dwc->num_in_eps equal to half
>>> DWC_USB3_NUM_EPS.
>>>
>>> If DWC_USB3_NUM_EPS is equal to DWC3_USB3_NUM_IN_EPS and the endpoint count
>>> is an odd number then dwc->num_out_eps will be assigned the extra endpoint.
>>
>> sorry, now that I spent some more time with this. Isn't something like
>> below solving all problems?
>>
>> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
>> index 369bab16a824..68c9c84b7216 100644
>> --- a/drivers/usb/dwc3/core.c
>> +++ b/drivers/usb/dwc3/core.c
>> @@ -397,8 +397,7 @@ static void dwc3_core_num_eps(struct dwc3 *dwc)
>>  {
>>  struct dwc3_hwparams*parms = >hwparams;
>>
>> -dwc->num_in_eps = DWC3_NUM_IN_EPS(parms);
>> -dwc->num_out_eps = DWC3_NUM_EPS(parms) - dwc->num_in_eps;
>> +dwc->num_eps = DWC3_NUM_EPS(parms);
>>  }
>>
>>  static void dwc3_cache_hwparams(struct dwc3 *dwc)
>> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
>> index 0a664d8eba3f..8c187df0aa42 100644
>> --- a/drivers/usb/dwc3/gadget.c
>> +++ b/drivers/usb/dwc3/gadget.c
>> @@ -2001,23 +2002,7 @@ static int dwc3_gadget_init_hw_endpoints(struct dwc3 
>> *dwc,
>>
>>  static int dwc3_gadget_init_endpoints(struct dwc3 *dwc)
>>  {
>> -int ret;
>> -
>> -INIT_LIST_HEAD(>gadget.ep_list);
>> -
>> -ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_out_eps, 0);
>> -if (ret < 0) {
>> -dev_err(dwc->dev, "failed to initialize OUT endpoints\n");
>> -return ret;
>> -}
>> -
>> -ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_in_eps, 1);
>> -if (ret < 0) {
>> -dev_err(dwc->dev, "failed to initialize IN endpoints\n");
>> -return ret;
>> -}
>> -
>> -return 0;
>> +return dwc3_gadget_init_hw_endpoints(dwc, dwc->num_eps);
>
> Well I hadn't considered that level of change myself but, it should work.
>

It should work for ASICS.

But it won't work for our FPGA platform. It needs to work the
existing, more limited, way. You can check this with the
GHWPARAMS6.EN_FPGA.

John
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Re: [PATCH] usb: dwc2: fix "iomem 0x00000000" message by setting iomem parameters in usb_hcd

[John Youn]

On 1/23/2017 3:50 AM, Felipe Balbi wrote:
>
> Hi,
>
> John Youn <john.y...@synopsys.com> writes:
>>>>>> @@ -1229,7 +1229,8 @@ static inline void dwc2_hcd_connect(struct 
>>>>>> dwc2_hsotg *hsotg) {}
>>>>>>  static inline void dwc2_hcd_disconnect(struct dwc2_hsotg *hsotg, bool 
>>>>>> force) {}
>>>>>>  static inline void dwc2_hcd_start(struct dwc2_hsotg *hsotg) {}
>>>>>>  static inline void dwc2_hcd_remove(struct dwc2_hsotg *hsotg) {}
>>>>>> -static inline int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
>>>>>> +static inline int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq,
>>>>>> +struct resource *res)
>>>>>>  { return 0; }
>>>>>>  static inline int dwc2_backup_host_registers(struct dwc2_hsotg *hsotg)
>>>>>>  { return 0; }
>>>>>> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
>>>>>> index 911c3b36..2cfbd10e 100644
>>>>>> --- a/drivers/usb/dwc2/hcd.c
>>>>>> +++ b/drivers/usb/dwc2/hcd.c
>>>>>> @@ -4964,7 +4964,7 @@ static void dwc2_hcd_release(struct dwc2_hsotg 
>>>>>> *hsotg)
>>>>>>   * USB bus with the core and calls the hc_driver->start() function. It 
>>>>>> returns
>>>>>>   * a negative error on failure.
>>>>>>   */
>>>>>> -int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
>>>>>> +int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq, struct resource 
>>>>>> *res)
>>>>>>  {
>>>>>>  struct usb_hcd *hcd;
>>>>>>  struct dwc2_host_chan *channel;
>>>>>> @@ -5021,6 +5021,9 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int 
>>>>>> irq)
>>>>>>
>>>>>>  hcd->has_tt = 1;
>>>>>>
>>>>>> +hcd->rsrc_start = res->start;
>>>>>> +hcd->rsrc_len = resource_size(res);
>>>>>> +
>>>>>>  ((struct wrapper_priv_data *) >hcd_priv)->hsotg = hsotg;
>>>>>>  hsotg->priv = hcd;
>>>>>>
>>>>>> diff --git a/drivers/usb/dwc2/hcd.h b/drivers/usb/dwc2/hcd.h
>>>>>> index 1ed5fa2b..2305b5fb 100644
>>>>>> --- a/drivers/usb/dwc2/hcd.h
>>>>>> +++ b/drivers/usb/dwc2/hcd.h
>>>>>> @@ -521,7 +521,8 @@ static inline u8 dwc2_hcd_is_pipe_out(struct 
>>>>>> dwc2_hcd_pipe_info *pipe)
>>>>>>  return !dwc2_hcd_is_pipe_in(pipe);
>>>>>>  }
>>>>>>
>>>>>> -extern int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq);
>>>>>> +extern int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq,
>>>>>> + struct resource *res);
>>>>>>  extern void dwc2_hcd_remove(struct dwc2_hsotg *hsotg);
>>>>>>
>>>>>>  /* Transaction Execution Functions */
>>>>>> diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
>>>>>> index 4fc8c603..5ddc8860 100644
>>>>>> --- a/drivers/usb/dwc2/platform.c
>>>>>> +++ b/drivers/usb/dwc2/platform.c
>>>>>> @@ -445,7 +445,7 @@ static int dwc2_driver_probe(struct platform_device 
>>>>>> *dev)
>>>>>>  }
>>>>>>
>>>>>>  if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
>>>>>> -retval = dwc2_hcd_init(hsotg, hsotg->irq);
>>>>>> +retval = dwc2_hcd_init(hsotg, hsotg->irq, res);
>>>>>
>>>>> This is a good idea, but there's more work that can come out of this, if
>>>>> you're interested:
>>>>>
>>>>> i) devm_ioremap_resource() could be called by the generic layer
>>>>> ii) devm_request_irq() could be move to the generic layer
>>>>> iii) dwc2_hcd_init() could also be called generically as long as dr_mode
>>>>>  is set properly.
>>>>> iv) dwc2_debugfs_init() could be called generically as well
>>>>>
>>>>> IOW, dwc2_driver_probe() could be as minimal as:
>>>>>
>>>>> static int dwc2_driver_probe(struct platform_device *dev)
>>>>> {
>>>>&g

Re: [PATCH v2 10/28] usb: dwc2: Remove unused otg_ver parameter

[John Youn]

On 1/23/2017 3:41 AM, Felipe Balbi wrote:
> John Youn <john.y...@synopsys.com> writes:
>
>> The otg_ver parameter only controls the SRP pulsing method and defaults
>> to the 1.3 behavior. It is unused and can be removed.
>>
>> Signed-off-by: John Youn <johny...@synopsys.com>
>
> this patch fails to apply:
>
> checking file drivers/usb/dwc2/core.c
> checking file drivers/usb/dwc2/core.h
> Hunk #2 succeeded at 467 (offset 6 lines).
> Hunk #3 succeeded at 1180 (offset 9 lines).
> checking file drivers/usb/dwc2/hcd.c
> Hunk #1 succeeded at 2258 (offset -2 lines).
> checking file drivers/usb/dwc2/params.c
> Hunk #3 succeeded at 106 (offset 7 lines).
> Hunk #4 succeeded at 136 (offset 7 lines).
> Hunk #5 succeeded at 166 (offset 7 lines).
> Hunk #6 succeeded at 196 (offset 7 lines).
> Hunk #7 succeeded at 970 with fuzz 1 (offset -2 lines).
> Hunk #8 FAILED at 1132.
> 1 out of 8 hunks FAILED
>
> please rebase on testing/next
>

Sure, I'll do that.

But as I mentioned before, you have commits that made it to your next
that need to be removed. I'll send revert commits for those.

Thanks,
John
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Re: [PATCH v3 1/5] usb: dwc2: Add support for STM32F429/439/469 USB OTG HS/FS in FS mode (internal PHY)

[John Youn]

On 1/17/2017 8:13 AM, Bruno Herrera wrote:
> This patch introduces a new parameter to activate USB OTG HS/FS core embedded
> phy transceiver. The STM32F4x9 SoC uses the GGPIO register to enable the 
> transceiver.
> Also add the dwc2_core_params structure for stm32f4 otg fs.
>
> Signed-off-by: Bruno Herrera 
> ---
>  drivers/usb/dwc2/core.h   |  4 
>  drivers/usb/dwc2/hcd.c| 13 +++-
>  drivers/usb/dwc2/hw.h |  2 ++
>  drivers/usb/dwc2/params.c | 51 
> +++
>  4 files changed, 69 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
> index 9548d3e..e3199c5 100644
> --- a/drivers/usb/dwc2/core.h
> +++ b/drivers/usb/dwc2/core.h
> @@ -430,6 +430,9 @@ enum dwc2_ep0_state {
>   *   needed.
>   *   0 - No (default)
>   *   1 - Yes
> + * @activate_transceiver: Activate internal transceiver using GGPIO register.
> + *   0 - Deactivate the transceiver (default)
> + *   1 - Activate the transceiver
>   * @g_dma:  Enables gadget dma usage (default: autodetect).
>   * @g_dma_desc: Enables gadget descriptor DMA (default: autodetect).
>   * @g_rx_fifo_size:  The periodic rx fifo size for the device, in
> @@ -501,6 +504,7 @@ struct dwc2_core_params {
>   int uframe_sched;
>   int external_id_pin_ctl;
>   int hibernation;
> + int activate_transceiver;
>
>   /*
>* The following parameters are *only* set via device
> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
> index 911c3b3..6bee529 100644
> --- a/drivers/usb/dwc2/hcd.c
> +++ b/drivers/usb/dwc2/hcd.c
> @@ -118,7 +118,7 @@ static void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg 
> *hsotg)
>
>  static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
>  {
> - u32 usbcfg, i2cctl;
> + u32 usbcfg, ggpio, i2cctl;
>   int retval = 0;
>
>   /*
> @@ -142,6 +142,17 @@ static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, 
> bool select_phy)
>   return retval;
>   }
>   }
> +
> + ggpio = dwc2_readl(hsotg->regs + GGPIO);
> + if (!(ggpio & GGPIO_STM32_OTG_GCCFG_PWRDWN) &&
> + (hsotg->params.activate_transceiver > 0)) {
> + dev_dbg(hsotg->dev, "Activating transceiver\n");
> + /* STM32F4xx uses the GGPIO register as general core
> +  * configuration register.
> +  */
> + ggpio |= GGPIO_STM32_OTG_GCCFG_PWRDWN;
> + dwc2_writel(ggpio, hsotg->regs + GGPIO);
> + }
>   }
>
>   /*
> diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h
> index 5be056b..a84e93b 100644
> --- a/drivers/usb/dwc2/hw.h
> +++ b/drivers/usb/dwc2/hw.h
> @@ -225,6 +225,8 @@
>
>  #define GPVNDCTL HSOTG_REG(0x0034)
>  #define GGPIOHSOTG_REG(0x0038)
> +#define GGPIO_STM32_OTG_GCCFG_PWRDWN (1 << 16)
> +
>  #define GUID HSOTG_REG(0x003c)
>  #define GSNPSID  HSOTG_REG(0x0040)
>  #define GHWCFG1  HSOTG_REG(0x0044)
> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
> index 11fe68a..dbb054d 100644
> --- a/drivers/usb/dwc2/params.c
> +++ b/drivers/usb/dwc2/params.c
> @@ -192,6 +192,37 @@ static const struct dwc2_core_params params_amlogic = {
>   .hibernation= -1,
>  };
>
> +static const struct dwc2_core_params params_stm32f4_otgfs = {
> + .otg_cap= DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE,
> + .otg_ver= -1,
> + .dma_desc_enable= 0,
> + .dma_desc_fs_enable = 0,
> + .speed  = DWC2_SPEED_PARAM_FULL,
> + .enable_dynamic_fifo= -1,
> + .en_multiple_tx_fifo= -1,
> + .host_rx_fifo_size  = 128,  /* 128 DWORDs */
> + .host_nperio_tx_fifo_size   = 96,   /* 96 DWORDs */
> + .host_perio_tx_fifo_size= 96,   /* 96 DWORDs */
> + .max_transfer_size  = -1,
> + .max_packet_count   = 256,
> + .host_channels  = -1,
> + .phy_type   = DWC2_PHY_TYPE_PARAM_FS,
> + .phy_utmi_width = -1,
> + .phy_ulpi_ddr   = -1,
> + .phy_ulpi_ext_vbus  = -1,
> + .i2c_enable = 0,
> + .ulpi_fs_ls = -1,
> + .host_support_fs_ls_low_power   = -1,
> + .host_ls_low_power_phy_clk  = -1,
> + .ts_dline   = -1,
> + .reload_ctl = -1,
> + .ahbcfg = -1,
> + .uframe_sched   = 0,
> + .external_id_pin_ctl

Re: [PATCH] usb: dwc3: add quirk to handle DWC_USB3_NUM == DWC_USB3_NUM_IN_EPS

[John Youn]

On 1/19/2017 12:17 PM, Felipe Balbi wrote:
>
> Hi,
>
> Bryan O'Donoghue  writes:
>> - DWC_USB3_NUM indicates the number of Device mode single directional
>>   endpoints, including OUT and IN endpoint 0.
>>
>> - DWC_USB3_NUM_IN_EPS indicates the maximum number of Device mode IN
>>   endpoints active at any time, including control endpoint 0.
>>
>> It's possible to configure RTL such that DWC_USB3_NUM_EPS is equal to
>> DWC_USB3_NUM_IN_EPS.
>
> in that case, isn't it so you really don't have OUT eps? Why was your HW
> configured like this? Is this is silicon already or in FPGA or something
> early development-only part?
>
>> dwc3-core calculates the number of OUT endpoints as DWC_USB3_NUM minus
>> DWC_USB3_NUM_IN_EPS. If RTL has been configured with DWC_USB3_NUM_IN_EPS
>
> correctly so.
>
>> equal to DWC_USB3_NUM then dwc3-core will calculate the number of OUT
>> endpoints as zero.
>
> right
>
>> For example a from dwc3_core_num_eps() shows:
>> [1.565000]  /usb0@f01d: found 8 IN and 0 OUT endpoints
>>
>> This patch fixes this case by adding a snps,num_in_eps quirk and an
>
> "This patch works around this case" would've been better here.
>
>> over-ride value for DWC_USB3_NUM_IN_EPS snps,num_in_eps_override. When the
>> quirk is declared then snps,num_in_eps_override will be used instead of
>> DWC_USB3_NUM_IN_EPS as the value of the number active IN endpoints.
>
> you don't need two values. A read of a non-existing property will return
> 0, IIRC.
>
>> The minimum value specified for DWC_USB3_NUM_IN_EPS in the Designware
>> data-book is two, if snps,num_in_eps_quirk is declared but
>> snps,num_in_eps_override is omitted, then the minimum value will be used as
>> the default.
>>
>> Signed-off-by: Bryan O'Donoghue 
>> ---
>>  Documentation/devicetree/bindings/usb/dwc3.txt |  3 +++
>>  drivers/usb/dwc3/core.c| 11 +++
>>  drivers/usb/dwc3/core.h|  6 ++
>>  3 files changed, 20 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt 
>> b/Documentation/devicetree/bindings/usb/dwc3.txt
>> index e3e6983..bb383bf 100644
>> --- a/Documentation/devicetree/bindings/usb/dwc3.txt
>> +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
>> @@ -55,6 +55,9 @@ Optional properties:
>>  fladj_30mhz_sdbnd signal is invalid or incorrect.
>>
>>   -  tx-fifo-resize: determines if the FIFO *has* to be 
>> reallocated.
>> + - snps,num_in_eps_quirk: when set core will over-ride the num_in_eps value.
>> + - snps,num_in_eps_override: the value that will be used for num_in_eps when
>> +num_in_eps_quirk is true
>
> please declare these on the section above. Not below the one deprecated
> property.
>
> And as I said, you only need one property.
>
>>  This is usually a subnode to DWC3 glue to which it is connected.
>>
>> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
>> index 369bab1..d5e472a 100644
>> --- a/drivers/usb/dwc3/core.c
>> +++ b/drivers/usb/dwc3/core.c
>> @@ -398,6 +398,8 @@ static void dwc3_core_num_eps(struct dwc3 *dwc)
>>  struct dwc3_hwparams*parms = >hwparams;
>>
>>  dwc->num_in_eps = DWC3_NUM_IN_EPS(parms);
>> +if (dwc->num_in_eps_quirk)
>> +dwc->num_in_eps = dwc->num_in_eps_override;
>>  dwc->num_out_eps = DWC3_NUM_EPS(parms) - dwc->num_in_eps;
>>  }
>>
>> @@ -908,6 +910,7 @@ static void dwc3_get_properties(struct dwc3 *dwc)
>>  struct device   *dev = dwc->dev;
>>  u8  lpm_nyet_threshold;
>>  u8  tx_de_emphasis;
>> +u8  num_in_eps_override;
>>  u8  hird_threshold;
>>
>>  /* default to highest possible threshold */
>> @@ -922,6 +925,9 @@ static void dwc3_get_properties(struct dwc3 *dwc)
>>   */
>>  hird_threshold = 12;
>>
>> +/* default value of 2 is the minimum RTL parameter value */
>> +num_in_eps_override = 2;
>> +
>>  dwc->maximum_speed = usb_get_maximum_speed(dev);
>>  dwc->dr_mode = usb_get_dr_mode(dev);
>>  dwc->hsphy_mode = of_usb_get_phy_mode(dev->of_node);
>> @@ -981,9 +987,14 @@ static void dwc3_get_properties(struct dwc3 *dwc)
>>  >hsphy_interface);
>>  device_property_read_u32(dev, "snps,quirk-frame-length-adjustment",
>>   >fladj);
>> +dwc->num_in_eps_quirk = device_property_read_bool(dev,
>> +"snps,num_in_eps_quirk");
>> +device_property_read_u8(dev, "snps,num_in_eps_override",
>> +_in_eps_override);
>
> avoid the quirk flag and try like this:
>
>   device_property_read_u8(...);
>
>
>   num_in_eps = NUM_IN_EPS();
>   num_out_eps = total - num_in_eps;
>
>   if (num_out_eps == 0) {
>   num_in_eps = dwc->override;
> num_out_eps = total - num_in_eps;
>   }
>
> John, does this look 

Re: [PATCH] usb: dwc3: core: Disable USB2.0 phy suspend when dwc3 acts as host role

[John Youn]

On 1/18/2017 7:12 PM, Baolin Wang wrote:
> Hi John,
>
> On 19 January 2017 at 09:33, John Youn <john.y...@synopsys.com> wrote:
>> On 1/16/2017 2:38 AM, Felipe Balbi wrote:
>>>
>>> Hi,
>>>
>>> John Youn <john.y...@synopsys.com> writes:
>>>>> Baolin Wang <baolin.w...@linaro.org> writes:
>>>>>>> Baolin Wang <baolin.w...@linaro.org> writes:
>>>>>>>> When dwc3 controller acts as host role with attaching slow speed device
>>>>>>>> (like mouse or keypad). Then if we plugged out the slow speed device,
>>>>>>>> it will timeout to run the deconfiguration endpoint command to drop the
>>>>>>>> endpoint's resources. Some xHCI command timeout log as below when
>>>>>>>> disconnecting one slow device:
>>>>>>>>
>>>>>>>> [   99.807739] c0 xhci-hcd.0.auto: Port Status Change Event for port 1
>>>>>>>> [   99.814699] c0 xhci-hcd.0.auto: resume root hub
>>>>>>>> [   99.819992] c0 xhci-hcd.0.auto: handle_port_status: starting port
>>>>>>>>  polling.
>>>>>>>> [   99.827808] c0 xhci-hcd.0.auto: get port status, actual port 0 
>>>>>>>> status
>>>>>>>>  = 0x202a0
>>>>>>>> [   99.835903] c0 xhci-hcd.0.auto: Get port status returned 0x10100
>>>>>>>> [   99.850052] c0 xhci-hcd.0.auto: clear port connect change, actual
>>>>>>>>  port 0 status  = 0x2a0
>>>>>>>> [   99.859313] c0 xhci-hcd.0.auto: Cancel URB ffc01ed6cd00, dev 1,
>>>>>>>>  ep 0x81, starting at offset 0xc406d210
>>>>>>>> [   99.869645] c0 xhci-hcd.0.auto: // Ding dong!
>>>>>>>> [   99.874776] c0 xhci-hcd.0.auto: Stopped on Transfer TRB
>>>>>>>> [   99.880713] c0 xhci-hcd.0.auto: Removing canceled TD starting at
>>>>>>>>  0xc406d210 (dma).
>>>>>>>> [   99.889012] c0 xhci-hcd.0.auto: Finding endpoint context
>>>>>>>> [   99.895069] c0 xhci-hcd.0.auto: Cycle state = 0x1
>>>>>>>> [   99.900519] c0 xhci-hcd.0.auto: New dequeue segment =
>>>>>>>>  ffc1112f0880 (virtual)
>>>>>>>> [   99.908655] c0 xhci-hcd.0.auto: New dequeue pointer = 0xc406d220 
>>>>>>>> (DMA)
>>>>>>>> [   99.915927] c0 xhci-hcd.0.auto: Set TR Deq Ptr cmd, new deq seg =
>>>>>>>>  ffc1112f0880 (0xc406d000 dma),
>>>>>>>>  new deq ptr = ff8002175220
>>>>>>>>  (0xc406d220 dma), new cycle = 1
>>>>>>>> [   99.931242] c0 xhci-hcd.0.auto: // Ding dong!
>>>>>>>> [   99.936360] c0 xhci-hcd.0.auto: Successful Set TR Deq Ptr cmd,
>>>>>>>>  deq = @c406d220
>>>>>>>> [   99.944458] c0 xhci-hcd.0.auto: xhci_hub_status_data: stopping port
>>>>>>>>  polling.
>>>>>>>> [  100.047619] c0 xhci-hcd.0.auto: xhci_drop_endpoint called for udev
>>>>>>>>  ffc01ae08800
>>>>>>>> [  100.057002] c0 xhci-hcd.0.auto: drop ep 0x81, slot id 1, new drop
>>>>>>>>  flags = 0x8, new add flags = 0x0
>>>>>>>> [  100.067878] c0 xhci-hcd.0.auto: xhci_check_bandwidth called for udev
>>>>>>>>  ffc01ae08800
>>>>>>>> [  100.076868] c0 xhci-hcd.0.auto: New Input Control Context:
>>>>>>>>
>>>>>>>> ..
>>>>>>>>
>>>>>>>> [  100.427252] c0 xhci-hcd.0.auto: // Ding dong!
>>>>>>>> [  105.430728] c0 xhci-hcd.0.auto: Command timeout
>>>>>>>> [  105.436029] c0 xhci-hcd.0.auto: Abort command ring
>>>>>>>> [  113.558223] c0 xhci-hcd.0.auto: Command completion event does not 
>>>>>>>> match
>>>>>>>>  com

[PATCH 4/4] usb: dwc2: gadget: Add checking for g-tx-fifo-size parameter

[John Youn]

From: Sevak Arakelyan <sev...@synopsys.com>

Add dwc2_check_param_tx_fifo_sizes function which validates
the members of g_tx_fifo_size array and sets to average or
default values if it is needed.

Cc: Stefan Wahren <stefan.wah...@i2se.com>
Signed-off-by: Sevak Arakelyan <sev...@synopsys.com>
Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/params.c | 35 +++
 1 file changed, 35 insertions(+)

diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index 016fff0cb887..2990c347289f 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -427,6 +427,40 @@ static void dwc2_check_param_phy_utmi_width(struct 
dwc2_hsotg *hsotg)
dwc2_set_param_phy_utmi_width(hsotg);
 }
 
+static void dwc2_check_param_tx_fifo_sizes(struct dwc2_hsotg *hsotg)
+{
+   int fifo_count;
+   int fifo;
+   int min;
+   u32 total = 0;
+   u32 dptxfszn;
+
+   fifo_count = dwc2_hsotg_tx_fifo_count(hsotg);
+   min = hsotg->hw_params.en_multiple_tx_fifo ? 16 : 4;
+
+   for (fifo = 1; fifo <= fifo_count; fifo++)
+   total += hsotg->params.g_tx_fifo_size[fifo];
+
+   if (total > dwc2_hsotg_tx_fifo_total_depth(hsotg) || !total) {
+   dev_warn(hsotg->dev, "%s: Invalid parameter g-tx-fifo-size, 
setting to default average\n",
+__func__);
+   dwc2_set_param_tx_fifo_sizes(hsotg);
+   }
+
+   for (fifo = 1; fifo <= fifo_count; fifo++) {
+   dptxfszn = (dwc2_readl(hsotg->regs + DPTXFSIZN(fifo)) &
+   FIFOSIZE_DEPTH_MASK) >> FIFOSIZE_DEPTH_SHIFT;
+
+   if (hsotg->params.g_tx_fifo_size[fifo] < min ||
+   hsotg->params.g_tx_fifo_size[fifo] >  dptxfszn) {
+   dev_warn(hsotg->dev, "%s: Invalid parameter 
g_tx_fifo_size[%d]=%d\n",
+__func__, fifo,
+hsotg->params.g_tx_fifo_size[fifo]);
+   hsotg->params.g_tx_fifo_size[fifo] = dptxfszn;
+   }
+   }
+}
+
 #define CHECK_RANGE(_param, _min, _max, _def) do { \
if ((hsotg->params._param) < (_min) ||  \
(hsotg->params._param) > (_max)) {  \
@@ -496,6 +530,7 @@ static void dwc2_check_params(struct dwc2_hsotg *hsotg)
CHECK_RANGE(g_np_tx_fifo_size,
16, hw->dev_nperio_tx_fifo_size,
hw->dev_nperio_tx_fifo_size);
+   dwc2_check_param_tx_fifo_sizes(hsotg);
}
 }
 
-- 
2.11.0

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[PATCH 3/4] usb: dwc2: gadget: Set TX FIFO depths to calculated defaults

[John Youn]

From: Sevak Arakelyan <sev...@synopsys.com>

Remove legacy DWC2_G_P_LEGACY_TX_FIFO_SIZE array for TX FIFOs.
Update dwc2_set_param_tx_fifo_sizes function to calculate
and assign default average FIFO depth to each member of
g_tx_fifo_size array. Total FIFO size, EP Info block's size,
FIFO operation mode and device operation mode are taken into
consideration during the calculation.

Cc: Stefan Wahren <stefan.wah...@i2se.com>
Signed-off-by: Sevak Arakelyan <sev...@synopsys.com>
Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/core.h   | 16 
 drivers/usb/dwc2/gadget.c | 93 +++
 drivers/usb/dwc2/params.c | 12 --
 3 files changed, 110 insertions(+), 11 deletions(-)

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 5370e6429f28..f10eca91d2be 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -274,13 +274,6 @@ enum dwc2_lx_state {
DWC2_L3,/* Off state */
 };
 
-/*
- * Gadget periodic tx fifo sizes as used by legacy driver
- * EP0 is not included
- */
-#define DWC2_G_P_LEGACY_TX_FIFO_SIZE {256, 256, 256, 256, 768, 768, 768, \
-  768, 0, 0, 0, 0, 0, 0, 0}
-
 /* Gadget ep0 states */
 enum dwc2_ep0_state {
DWC2_EP0_SETUP,
@@ -1180,6 +1173,9 @@ int dwc2_hsotg_set_test_mode(struct dwc2_hsotg *hsotg, 
int testmode);
 #define dwc2_is_device_connected(hsotg) (hsotg->connected)
 int dwc2_backup_device_registers(struct dwc2_hsotg *hsotg);
 int dwc2_restore_device_registers(struct dwc2_hsotg *hsotg);
+int dwc2_hsotg_tx_fifo_count(struct dwc2_hsotg *hsotg);
+int dwc2_hsotg_tx_fifo_total_depth(struct dwc2_hsotg *hsotg);
+int dwc2_hsotg_tx_fifo_average_depth(struct dwc2_hsotg *hsotg);
 #else
 static inline int dwc2_hsotg_remove(struct dwc2_hsotg *dwc2)
 { return 0; }
@@ -1201,6 +1197,12 @@ static inline int dwc2_backup_device_registers(struct 
dwc2_hsotg *hsotg)
 { return 0; }
 static inline int dwc2_restore_device_registers(struct dwc2_hsotg *hsotg)
 { return 0; }
+static inline int dwc2_hsotg_tx_fifo_count(struct dwc2_hsotg *hsotg)
+{ return 0; }
+static inline int dwc2_hsotg_tx_fifo_total_depth(struct dwc2_hsotg *hsotg)
+{ return 0; }
+static inline int dwc2_hsotg_tx_fifo_average_depth(struct dwc2_hsotg *hsotg)
+{ return 0; }
 #endif
 
 #if IS_ENABLED(CONFIG_USB_DWC2_HOST) || IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index bfda1cfd4fa6..bc3b3fda5000 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -191,6 +191,99 @@ static void dwc2_hsotg_ctrl_epint(struct dwc2_hsotg *hsotg,
local_irq_restore(flags);
 }
 
+/**
+ * dwc2_hsotg_tx_fifo_count - return count of TX FIFOs in device mode
+ */
+int dwc2_hsotg_tx_fifo_count(struct dwc2_hsotg *hsotg)
+{
+   if (hsotg->hw_params.en_multiple_tx_fifo)
+   /* In dedicated FIFO mode we need count of IN EPs */
+   return (dwc2_readl(hsotg->regs + GHWCFG4)  &
+   GHWCFG4_NUM_IN_EPS_MASK) >> GHWCFG4_NUM_IN_EPS_SHIFT;
+   else
+   /* In shared FIFO mode we need count of Periodic IN EPs */
+   return hsotg->hw_params.num_dev_perio_in_ep;
+}
+
+/**
+ * dwc2_hsotg_ep_info_size - return Endpoint Info Control block size in DWORDs
+ */
+static int dwc2_hsotg_ep_info_size(struct dwc2_hsotg *hsotg)
+{
+   int val = 0;
+   int i;
+   u32 ep_dirs;
+
+   /*
+* Don't need additional space for ep info control registers in
+* slave mode.
+*/
+   if (!using_dma(hsotg)) {
+   dev_dbg(hsotg->dev, "Buffer DMA ep info size 0\n");
+   return 0;
+   }
+
+   /*
+* Buffer DMA mode - 1 location per endpoit
+* Descriptor DMA mode - 4 locations per endpoint
+*/
+   ep_dirs = hsotg->hw_params.dev_ep_dirs;
+
+   for (i = 0; i <= hsotg->hw_params.num_dev_ep; i++) {
+   val += ep_dirs & 3 ? 1 : 2;
+   ep_dirs >>= 2;
+   }
+
+   if (using_desc_dma(hsotg))
+   val = val * 4;
+
+   return val;
+}
+
+/**
+ * dwc2_hsotg_tx_fifo_total_depth - return total FIFO depth available for
+ * device mode TX FIFOs
+ */
+int dwc2_hsotg_tx_fifo_total_depth(struct dwc2_hsotg *hsotg)
+{
+   int ep_info_size;
+   int addr;
+   int tx_addr_max;
+   u32 np_tx_fifo_size;
+
+   np_tx_fifo_size = min_t(u32, hsotg->hw_params.dev_nperio_tx_fifo_size,
+   hsotg->params.g_np_tx_fifo_size);
+
+   /* Get Endpoint Info Control block size in DWORDs. */
+   ep_info_size = dwc2_hsotg_ep_info_size(hsotg);
+   tx_addr_max = hsotg->hw_params.total_fifo_size - ep_info_size;
+
+   addr = hsotg->params.g_rx_fifo_size + np_tx_fifo_size;
+   if (tx_addr_max <= addr)
+   return 0;
+
+   retu

[PATCH 1/4] usb: dwc2: gadget: Set GDFIFOCFG

[John Youn]

From: Sevak Arakelyan <sev...@synopsys.com>

Add programming of GDFIFOCFG register in device mode.
It must contain start address for EP Info block and
total FIFO depth.

Signed-off-by: Sevak Arakelyan <sev...@synopsys.com>
Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/gadget.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 288402d44fce..bfda1cfd4fa6 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -241,6 +241,9 @@ static void dwc2_hsotg_init_fifo(struct dwc2_hsotg *hsotg)
val = dwc2_readl(hsotg->regs + DPTXFSIZN(ep));
}
 
+   dwc2_writel(hsotg->hw_params.total_fifo_size |
+   addr << GDFIFOCFG_EPINFOBASE_SHIFT,
+   hsotg->regs + GDFIFOCFG);
/*
 * according to p428 of the design guide, we need to ensure that
 * all fifos are flushed before continuing
-- 
2.11.0

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[PATCH 0/4] usb: dwc2: FIFO configuration

[John Youn]

This series addresses a couple of FIFO issues in dwc2.

The first it properly configures the GDIFIFOCFG registers in
host/gadget mode.

Next it configures the TX FIFOs to default values in gadget mode.
These values should work for all cores. The old constant values were
incorrect in some cases depending on the core configuration.

These value may still be overridden on a per-platform basis and we add
checks to make sure that overridden values are consistent with the
hardware capabilities and fall-back to defaults if so.

Test on Synopsys HAPS core version 3.30a.

Appreciate any Tested-by's on other platforms.

This series depends on the latest dwc2 patches for next and 4.10-rc5
[1] which you can find applied to my git tree for convenience [2].

Regards,
John

[1] https://www.spinics.net/lists/linux-usb/msg152258.html
[2] https://github.com/synopsys-usb/linux.git


Sevak Arakelyan (4):
  usb: dwc2: gadget: Set GDFIFOCFG
  usb: dwc2: host: Correct snpsid checking for GDFIFOCFG
  usb: dwc2: gadget: Set TX FIFO depths to calculated defaults
  usb: dwc2: gadget: Add checking for g-tx-fifo-size parameter

 drivers/usb/dwc2/core.h   | 17 +
 drivers/usb/dwc2/gadget.c | 96 +++
 drivers/usb/dwc2/hcd.c|  3 +-
 drivers/usb/dwc2/params.c | 47 +--
 4 files changed, 151 insertions(+), 12 deletions(-)

-- 
2.11.0

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[PATCH 2/4] usb: dwc2: host: Correct snpsid checking for GDFIFOCFG

[John Youn]

From: Sevak Arakelyan <sev...@synopsys.com>

GDFIFOCFG is available from IP version 2.91a. Fix the code to reflect
this.

Signed-off-by: Sevak Arakelyan <sev...@synopsys.com>
Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/core.h | 1 +
 drivers/usb/dwc2/hcd.c  | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index a473853ca39c..5370e6429f28 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -940,6 +940,7 @@ struct dwc2_hsotg {
/* DWC OTG HW Release versions */
 #define DWC2_CORE_REV_2_71a0x4f54271a
 #define DWC2_CORE_REV_2_90a0x4f54290a
+#define DWC2_CORE_REV_2_91a0x4f54291a
 #define DWC2_CORE_REV_2_92a0x4f54292a
 #define DWC2_CORE_REV_2_94a0x4f54294a
 #define DWC2_CORE_REV_3_00a0x4f54300a
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index 6d399485501f..aca05ac1514c 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -494,8 +494,9 @@ static void dwc2_config_fifos(struct dwc2_hsotg *hsotg)
dwc2_readl(hsotg->regs + HPTXFSIZ));
 
if (hsotg->params.en_multiple_tx_fifo &&
-   hsotg->hw_params.snpsid <= DWC2_CORE_REV_2_94a) {
+   hsotg->hw_params.snpsid >= DWC2_CORE_REV_2_91a) {
/*
+* This feature was implemented in 2.91a version
 * Global DFIFOCFG calculation for Host mode -
 * include RxFIFO, NPTXFIFO and HPTXFIFO
 */
-- 
2.11.0

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Re: [PATCH] usb: dwc3: core: Disable USB2.0 phy suspend when dwc3 acts as host role

[John Youn]

On 1/16/2017 2:38 AM, Felipe Balbi wrote:
>
> Hi,
>
> John Youn <john.y...@synopsys.com> writes:
>>> Baolin Wang <baolin.w...@linaro.org> writes:
>>>>> Baolin Wang <baolin.w...@linaro.org> writes:
>>>>>> When dwc3 controller acts as host role with attaching slow speed device
>>>>>> (like mouse or keypad). Then if we plugged out the slow speed device,
>>>>>> it will timeout to run the deconfiguration endpoint command to drop the
>>>>>> endpoint's resources. Some xHCI command timeout log as below when
>>>>>> disconnecting one slow device:
>>>>>>
>>>>>> [   99.807739] c0 xhci-hcd.0.auto: Port Status Change Event for port 1
>>>>>> [   99.814699] c0 xhci-hcd.0.auto: resume root hub
>>>>>> [   99.819992] c0 xhci-hcd.0.auto: handle_port_status: starting port
>>>>>>  polling.
>>>>>> [   99.827808] c0 xhci-hcd.0.auto: get port status, actual port 0 status
>>>>>>  = 0x202a0
>>>>>> [   99.835903] c0 xhci-hcd.0.auto: Get port status returned 0x10100
>>>>>> [   99.850052] c0 xhci-hcd.0.auto: clear port connect change, actual
>>>>>>  port 0 status  = 0x2a0
>>>>>> [   99.859313] c0 xhci-hcd.0.auto: Cancel URB ffc01ed6cd00, dev 1,
>>>>>>  ep 0x81, starting at offset 0xc406d210
>>>>>> [   99.869645] c0 xhci-hcd.0.auto: // Ding dong!
>>>>>> [   99.874776] c0 xhci-hcd.0.auto: Stopped on Transfer TRB
>>>>>> [   99.880713] c0 xhci-hcd.0.auto: Removing canceled TD starting at
>>>>>>  0xc406d210 (dma).
>>>>>> [   99.889012] c0 xhci-hcd.0.auto: Finding endpoint context
>>>>>> [   99.895069] c0 xhci-hcd.0.auto: Cycle state = 0x1
>>>>>> [   99.900519] c0 xhci-hcd.0.auto: New dequeue segment =
>>>>>>  ffc1112f0880 (virtual)
>>>>>> [   99.908655] c0 xhci-hcd.0.auto: New dequeue pointer = 0xc406d220 (DMA)
>>>>>> [   99.915927] c0 xhci-hcd.0.auto: Set TR Deq Ptr cmd, new deq seg =
>>>>>>  ffc1112f0880 (0xc406d000 dma),
>>>>>>  new deq ptr = ff8002175220
>>>>>>  (0xc406d220 dma), new cycle = 1
>>>>>> [   99.931242] c0 xhci-hcd.0.auto: // Ding dong!
>>>>>> [   99.936360] c0 xhci-hcd.0.auto: Successful Set TR Deq Ptr cmd,
>>>>>>  deq = @c406d220
>>>>>> [   99.944458] c0 xhci-hcd.0.auto: xhci_hub_status_data: stopping port
>>>>>>  polling.
>>>>>> [  100.047619] c0 xhci-hcd.0.auto: xhci_drop_endpoint called for udev
>>>>>>  ffc01ae08800
>>>>>> [  100.057002] c0 xhci-hcd.0.auto: drop ep 0x81, slot id 1, new drop
>>>>>>  flags = 0x8, new add flags = 0x0
>>>>>> [  100.067878] c0 xhci-hcd.0.auto: xhci_check_bandwidth called for udev
>>>>>>  ffc01ae08800
>>>>>> [  100.076868] c0 xhci-hcd.0.auto: New Input Control Context:
>>>>>>
>>>>>> ..
>>>>>>
>>>>>> [  100.427252] c0 xhci-hcd.0.auto: // Ding dong!
>>>>>> [  105.430728] c0 xhci-hcd.0.auto: Command timeout
>>>>>> [  105.436029] c0 xhci-hcd.0.auto: Abort command ring
>>>>>> [  113.558223] c0 xhci-hcd.0.auto: Command completion event does not 
>>>>>> match
>>>>>>  command
>>>>>> [  113.569778] c0 xhci-hcd.0.auto: Timeout while waiting for configure
>>>>>>  endpoint command
>>>>>>
>>>>>> The reason is it will suspend USB phy to disable phy clock when
>>>>>> disconnecting the slow USB decice, that will hang on the xHCI commands
>>>>>> executing which depends on the phy clock.
>>>>>>
>>>>>> Thus we should disable USB2.0 phy suspend feature when dwc3 acts as host
>>>>>> role.
>>>>>>
>>>>>> Signed-off-by: Baolin Wang &l

Re: [PATCH] usb: dwc2: remove dead function dwc2_pci_quirks

[John Youn]

On 1/17/2017 12:51 PM, Heiner Kallweit wrote:
> Commit 9962b62f1be9 "Deprecate g-use-dma binding" removed the only
> property in dwc2_pci_quirks. This function is dead code now.
>
> Maybe it was kept intentionally to be prepared for the case that
> another quirk-related property needs to be added in future.
> If not it can be removed.
>
> Signed-off-by: Heiner Kallweit 
> ---
>  drivers/usb/dwc2/pci.c | 18 --
>  1 file changed, 18 deletions(-)
>
> diff --git a/drivers/usb/dwc2/pci.c b/drivers/usb/dwc2/pci.c
> index a23329e3..ae419615 100644
> --- a/drivers/usb/dwc2/pci.c
> +++ b/drivers/usb/dwc2/pci.c
> @@ -62,20 +62,6 @@ struct dwc2_pci_glue {
>   struct platform_device *phy;
>  };
>
> -static int dwc2_pci_quirks(struct pci_dev *pdev, struct platform_device 
> *dwc2)
> -{
> - if (pdev->vendor == PCI_VENDOR_ID_SYNOPSYS &&
> - pdev->device == PCI_PRODUCT_ID_HAPS_HSOTG) {
> - struct property_entry properties[] = {
> - { },
> - };
> -
> - return platform_device_add_properties(dwc2, properties);
> - }
> -
> - return 0;
> -}
> -
>  static void dwc2_pci_remove(struct pci_dev *pci)
>  {
>   struct dwc2_pci_glue *glue = pci_get_drvdata(pci);
> @@ -136,10 +122,6 @@ static int dwc2_pci_probe(struct pci_dev *pci,
>   return PTR_ERR(phy);
>   }
>
> - ret = dwc2_pci_quirks(pci, dwc2);
> - if (ret)
> - goto err;
> -
>   ret = platform_device_add(dwc2);
>   if (ret) {
>   dev_err(dev, "failed to register dwc2 device\n");
>

I'd like to leave this in place for now.

We still have stuff in here internally and we have some enhancements
in the works to support IP validation, which will need to set
properties from here.

Regards,
John
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Re: [PATCH v2 25/28] usb: dwc2: Add a quirk to allow speed negotiation for Hisilicon Hi6220

[John Youn]

On 1/17/2017 10:58 PM, Stefan Wahren wrote:
> Hi John,
>
> is there a public git repo where this series is already applied?
>
> Stefan
>

Hi Stefan,

Yes, here:

https://github.com/synopsys-usb/linux.git

I know you're still waiting for the FIFO stuff. We'll send out a first 
version of that tomorrow.

Thanks,
John

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[PATCH v2 22/28] usb: dwc2: Avoid sleeping while holding hsotg->lock

[John Youn]

From: John Stultz <john.stu...@linaro.org>

Basically when plugging in various cables in different orders, I'm
occasionally seeing the following BUG splat:

[   86.215403] BUG: scheduling while atomic: kworker/u16:2/53/0x0002
[   86.219164] usb 1-1: USB disconnect, device number 9
[   86.226845] Preemption disabled at:[   86.230218]
[] dwc2_conn_id_status_change+0x120/0x250
[   86.236894] CPU: 0 PID: 53 Comm: kworker/u16:2 Tainted: GW
 4.9.0-rc8-00051-gd5a7979-dirty #1702
[   86.246836] Hardware name: HiKey Development Board (DT)
[   86.252100] Workqueue: dwc2 dwc2_conn_id_status_change
[   86.257279] Call trace:
[   86.259771] [] dump_backtrace+0x0/0x1a0
[   86.265210] [] show_stack+0x14/0x20
[   86.270308] [] dump_stack+0x90/0xb0
[   86.275401] [] __schedule_bug+0x6c/0xb8
[   86.280841] [] __schedule+0x4f8/0x5b0
[   86.286099] [] schedule+0x38/0xa0
[   86.291017] [] schedule_hrtimeout_range_clock+0x8c/0xf0
[   86.297846] [] schedule_hrtimeout_range+0x10/0x18
[   86.304150] [] usleep_range+0x50/0x58
[   86.309418] [] dwc2_wait_for_mode.isra.4+0x54/0xd0
[   86.315815] [] dwc2_core_reset+0xe0/0x168
[   86.321431] [] dwc2_hsotg_core_init_disconnected+0x2c/0x310
[   86.328602] [] dwc2_conn_id_status_change+0x130/0x250
[   86.335254] [] process_one_work+0x118/0x370
[   86.341035] [] worker_thread+0x48/0x498
[   86.346473] [] kthread+0xd0/0xe8
[   86.351299] [] ret_from_fork+0x10/0x50

This seems to be caused by the dwc2_wait_for_mode() calling
usleep_range() while the hstog->lock spinlock is held, since
we take that before calling dwc2_hsotg_core_init_disconnected().

This patch avoids the issue by adding an extra argument to
dwc2_core_reset(), as suggested by John Youn, which allows us to
skip the waiting, which should be unnecessary when calling from
dwc2_hsotg_core_init_disconnected().

Cc: Wei Xu <xuw...@hisilicon.com>
Cc: Guodong Xu <guodong...@linaro.org>
Cc: Amit Pundir <amit.pun...@linaro.org>
Cc: Rob Herring <robh...@kernel.org>
Cc: John Youn <johny...@synopsys.com>
Cc: Douglas Anderson <diand...@chromium.org>
Cc: Chen Yu <cheny...@huawei.com>
Cc: Vardan Mikayelyan <mvar...@synopsys.com>
Cc: Kishon Vijay Abraham I <kis...@ti.com>
Cc: Felipe Balbi <felipe.ba...@linux.intel.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: linux-usb@vger.kernel.org
Signed-off-by: John Stultz <john.stu...@linaro.org>
Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/core.c   | 6 +++---
 drivers/usb/dwc2/core.h   | 2 +-
 drivers/usb/dwc2/gadget.c | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index c987547a1e7b..7195366e26bf 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -313,7 +313,7 @@ static bool dwc2_iddig_filter_enabled(struct dwc2_hsotg 
*hsotg)
  * Do core a soft reset of the core.  Be careful with this because it
  * resets all the internal state machines of the core.
  */
-int dwc2_core_reset(struct dwc2_hsotg *hsotg)
+int dwc2_core_reset(struct dwc2_hsotg *hsotg, bool skip_wait)
 {
u32 greset;
int count = 0;
@@ -369,7 +369,7 @@ int dwc2_core_reset(struct dwc2_hsotg *hsotg)
}
} while (!(greset & GRSTCTL_AHBIDLE));
 
-   if (wait_for_host_mode)
+   if (wait_for_host_mode && !skip_wait)
dwc2_wait_for_mode(hsotg, true);
 
return 0;
@@ -500,7 +500,7 @@ int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg 
*hsotg)
 {
int retval;
 
-   retval = dwc2_core_reset(hsotg);
+   retval = dwc2_core_reset(hsotg, false);
if (retval)
return retval;
 
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 2bd3ea624cfc..b07bf7be2034 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -1088,7 +1088,7 @@ static inline bool dwc2_is_hs_iot(struct dwc2_hsotg 
*hsotg)
  * The following functions support initialization of the core driver component
  * and the DWC_otg controller
  */
-int dwc2_core_reset(struct dwc2_hsotg *hsotg);
+int dwc2_core_reset(struct dwc2_hsotg *hsotg, bool skip_wait);
 int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg *hsotg);
 int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg);
 int dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, bool restore);
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index ce5a1fb3a8ef..288402d44fce 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -3161,7 +3161,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg 
*hsotg,
kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET);
 
if (!is_usb_reset)
-   if (dwc2_core_reset(hsotg))
+   if (dwc2_core_reset(hsotg, true))
return;
 
/*
-- 
2.11.0

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[PATCH v2 00/28] usb: dwc2: Rework params, checkpatch, and other changes

[John Youn]

Hi Felipe,

This is a consolidation, rebase, and resend of several dwc2 patch
series that were submitted to linux-usb in the past month or so. These
should all be applied to testing/next for 4.11.

See the following links for the original list messages:

https://www.spinics.net/lists/linux-usb/msg151693.html
https://www.spinics.net/lists/linux-usb/msg151872.html
https://www.spinics.net/lists/linux-usb/msg151929.html
https://www.spinics.net/lists/linux-usb/msg151927.html
https://www.spinics.net/lists/linux-usb/msg151923.html

To apply to your testing/next you need the following changes.

This series depends on the dwc2 fixes for 4.10-rc5 in your fixes
branch.

Remove these from testing/next as they aren't needed any more. This
issue is addressed at the end of this series.

  e0beae49474c ("usb: dwc2: pci: Add AHB burst property for HAPS")
  70033c5ec15b ("usb: dwc2: Use the ahb_burst param")
  605f91f9f5a6 ("usb: dwc2: Read in the AHB burst property")
  d067dad79548 ("Documentation: devictree: dwc2: Add AHB burst binding")

Remove these from testing/next as they cause conflict and I have added
fixed-up versions in this series:

  d91a6eb219b8 ("usb: dwc2: host: use true/false for boolean")
  52e3773e1ff9 ("usb: dwc2: host: use msleep() for long delays")

This commit in testing/next is already in fixes:

  20c8ab4105b9 ("usb: dwc2: use u32 for DT binding parameters")

With those changes you should be able to apply this series cleanly.

Regards,
John


Chen Yu (2):
  usb: dwc2: Force port resume on switching to device mode
  usb: dwc2: Add a quirk to allow speed negotiation for Hisilicon Hi6220

John Stultz (2):
  usb: dwc2: Avoid sleeping while holding hsotg->lock
  usb: dwc2: Workaround case where GOTGCTL state is wrong

John Youn (21):
  usb: dwc2: Cleanup some checkpatch issues
  usb: dwc2: Add identifier in prototypes
  usb: dwc2: Fix comment alignment and format
  usb: dwc2: Fix logical continuations
  usb: dwc2: Fix brace usage
  usb: dwc2: Fix lines over 80 characters
  usb: dwc2: Fix code indentation after conditionals
  usb: dwc2: Remove 'return' from void function
  usb: dwc2: Fix sizeof in kzalloc
  usb: dwc2: Remove unused otg_ver parameter
  usb: dwc2: Set core parameters to default values
  usb: dwc2: Get device properties
  usb: dwc2: Update parameter types
  usb: dwc2: Rearrange param structure members
  usb: dwc2: Check core parameters
  usb: dwc2: Remove platform static params
  usb: dwc2: Fix usage of bool params
  usb: dwc2: Remove unnecessary parameters
  usb: dwc2: Add debugfs file to show params
  usb: dwc2: Remove debug prints in params.c
  usb: dwc2: Show dr_mode via debugfs

Nicholas Mc Guire (3):
  usb: dwc2: host: use msleep() for long delay
  usb: dwc2: host: use true/false for boolean
  usb: dwc2: host: use msleep() for long delays

 drivers/usb/dwc2/core.c  |   39 +-
 drivers/usb/dwc2/core.h  |  189 +++---
 drivers/usb/dwc2/core_intr.c |   11 +-
 drivers/usb/dwc2/debug.h |4 +-
 drivers/usb/dwc2/debugfs.c   |  182 +-
 drivers/usb/dwc2/gadget.c|  217 +++
 drivers/usb/dwc2/hcd.c   |  249 +---
 drivers/usb/dwc2/hcd.h   |   76 +--
 drivers/usb/dwc2/hcd_ddma.c  |   23 +-
 drivers/usb/dwc2/hcd_intr.c  |   98 +--
 drivers/usb/dwc2/hcd_queue.c |   40 +-
 drivers/usb/dwc2/hw.h|  596 +-
 drivers/usb/dwc2/params.c| 1437 ++
 drivers/usb/dwc2/pci.c   |2 +-
 drivers/usb/dwc2/platform.c  |   14 +-
 15 files changed, 1318 insertions(+), 1859 deletions(-)

-- 
2.11.0

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[PATCH v2 05/28] usb: dwc2: Fix brace usage

[John Youn]

* Remove braces for one-line statements
* Add missing braces where another arm in if-statement uses braces

Signed-off-by: John Youn <johny...@synopsys.com>
---
 drivers/usb/dwc2/gadget.c   | 10 --
 drivers/usb/dwc2/platform.c | 12 ++--
 2 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 2049afb1ffb1..dd839780da35 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -1644,9 +1644,8 @@ static int dwc2_hsotg_process_req_feature(struct 
dwc2_hsotg *hsotg,
}
 
/* If we have pending request, then start it */
-   if (!ep->req) {
+   if (!ep->req)
dwc2_gadget_start_next_request(ep);
-   }
}
 
break;
@@ -1938,9 +1937,8 @@ static void dwc2_hsotg_complete_request(struct dwc2_hsotg 
*hsotg,
 * so be careful when doing this.
 */
 
-   if (!hs_ep->req && result >= 0) {
+   if (!hs_ep->req && result >= 0)
dwc2_gadget_start_next_request(hs_ep);
-   }
 }
 
 /*
@@ -4043,9 +4041,9 @@ static int dwc2_hsotg_ep_sethalt(struct usb_ep *ep, int 
value, bool now)
epreg = DOEPCTL(index);
epctl = dwc2_readl(hs->regs + epreg);
 
-   if (value)
+   if (value) {
epctl |= DXEPCTL_STALL;
-   else {
+   } else {
epctl &= ~DXEPCTL_STALL;
xfertype = epctl & DXEPCTL_EPTYPE_MASK;
if (xfertype == DXEPCTL_EPTYPE_BULK ||
diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index 649d7b9a714b..3f59a73de248 100644
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -136,11 +136,11 @@ static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg 
*hsotg)
return ret;
}
 
-   if (hsotg->uphy)
+   if (hsotg->uphy) {
ret = usb_phy_init(hsotg->uphy);
-   else if (hsotg->plat && hsotg->plat->phy_init)
+   } else if (hsotg->plat && hsotg->plat->phy_init) {
ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
-   else {
+   } else {
ret = phy_power_on(hsotg->phy);
if (ret == 0)
ret = phy_init(hsotg->phy);
@@ -170,11 +170,11 @@ static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg 
*hsotg)
struct platform_device *pdev = to_platform_device(hsotg->dev);
int ret = 0;
 
-   if (hsotg->uphy)
+   if (hsotg->uphy) {
usb_phy_shutdown(hsotg->uphy);
-   else if (hsotg->plat && hsotg->plat->phy_exit)
+   } else if (hsotg->plat && hsotg->plat->phy_exit) {
ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
-   else {
+   } else {
ret = phy_exit(hsotg->phy);
if (ret == 0)
ret = phy_power_off(hsotg->phy);
-- 
2.11.0

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