Re: [PATHC v2 0/9] ima: carry the measurement list across kexec

Thiago Jung Bauermann writes: > Hello Eric, > > Am Freitag, 16 September 2016, 14:47:13 schrieb Eric W. Biederman: >> Mimi Zohar writes: >> > Hi Andrew, >> > >> > On Wed, 2016-08-31 at 18:38 -0400, Mimi Zohar wrote: >> >> On Wed,

Re: [PATHC v2 0/9] ima: carry the measurement list across kexec

Hello Eric, Am Freitag, 16 September 2016, 14:47:13 schrieb Eric W. Biederman: > Mimi Zohar writes: > > Hi Andrew, > > > > On Wed, 2016-08-31 at 18:38 -0400, Mimi Zohar wrote: > >> On Wed, 2016-08-31 at 13:50 -0700, Andrew Morton wrote: > >> > On Tue, 30 Aug 2016

Re: [PATCH v8 11/13] powerpc: Add support for loading ELF kernels with kexec_file_load.

Hello, This patch causes a warning in GCC 4.6.3: arch/powerpc/kernel/kexec_elf_64.c:211:6: error: 'initrd_load_addr' may be used uninitialized in this function [-Werror=uninitialized] cc1: all warnings being treated as errors make[2]: *** [arch/powerpc/kernel/kexec_elf_64.o] Error 1 make[1]:

Re: [PATHC v2 0/9] ima: carry the measurement list across kexec

ebied...@xmission.com (Eric W. Biederman) writes: > Mimi Zohar writes: > >> Hi Andrew, >> >> On Wed, 2016-08-31 at 18:38 -0400, Mimi Zohar wrote: >>> On Wed, 2016-08-31 at 13:50 -0700, Andrew Morton wrote: >>> > On Tue, 30 Aug 2016 18:40:02 -0400 Mimi Zohar

Re: [PATCH 2/3] corenet: Support gpio power/reset for corenet

On 09/15/2016 03:03 AM, Andy Fleming wrote: > I agree that halt and power off mean and have always meant different > things to the kernel. The problem is that most desktop systems, > having halted, pass control to the BIOS which--usually--shuts off the > power. Am I wrong about this? I've been

[PATCH v14 11/17] powerpc/PCI: Add IORESOURCE_MEM_64 for 64-bit resource in OF parsing

For device resource PREF bit setting under bridge 64-bit pref resource, we need to make sure only set PREF for 64bit resource. This patch set IORESOUCE_MEM_64 for 64bit resource during OF device resource flags parsing. Link: https://bugzilla.kernel.org/show_bug.cgi?id=96261 Link:

[PATCH v14 02/17] PCI: Let pci_mmap_page_range() take resource address

Original pci_mmap_page_range() is taking PCI BAR value aka usr_address. Bjorn found out that it would be much simple to pass resource address directly and avoid extra those __pci_mmap_make_offset. In this patch: 1. in proc path: proc_bus_pci_mmap, try convert back to resource before calling

[PATCH v14 10/17] powerpc/PCI: Keep resource idx order with bridge register number

Same as sparc version. Make resource with consistent sequence like other arch or directly from pci_read_bridge_bases(), even when non-pref mmio is missing, or out of ordering in firmware reporting. Just hold i = 1 for non pref mmio, and i = 2 for pref mmio. Signed-off-by: Yinghai Lu

[PATCH v14 03/17] PCI: Remove __pci_mmap_make_offset()

After PCI: Let pci_mmap_page_range() take resource address No user for __pci_mmap_make_offset in those arch. Remove them. Signed-off-by: Yinghai Lu Cc: linuxppc-dev@lists.ozlabs.org Cc: sparcli...@vger.kernel.org Cc: linux-xte...@linux-xtensa.org ---

Re: [PATHC v2 0/9] ima: carry the measurement list across kexec

Mimi Zohar writes: > Hi Andrew, > > On Wed, 2016-08-31 at 18:38 -0400, Mimi Zohar wrote: >> On Wed, 2016-08-31 at 13:50 -0700, Andrew Morton wrote: >> > On Tue, 30 Aug 2016 18:40:02 -0400 Mimi Zohar >> > wrote: >> > >> > > The TPM PCRs are

Re: [PATCH 5/5] arch/powerpc: Add CONFIG_FSL_DPAA to corenetXX_smp_defconfig

Hi Claudiu, [auto build test ERROR on linus/master] [also build test ERROR on v4.8-rc6 next-20160916] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] [Suggest to use git(>=2.9.0) format-patch --base= (or --base=auto for convenience) to rec

Re: [V2] powerpc/Kconfig: Update config option based on page size.

Balbir Singh writes: > On 14/09/16 20:40, santhosh wrote: >> >>> Michael Ellerman writes: >>> On Fri, 2016-19-02 at 05:38:47 UTC, Rashmica Gupta wrote: > Currently on PPC64 changing kernel pagesize from 4K to 64K leaves >

RE: [PATCH 04/13] powerpc: Use soft_enabled_set api to update paca->soft_enabled

From: Nicholas Piggin > Sent: 16 September 2016 12:59 > On Fri, 16 Sep 2016 11:43:13 + > David Laight wrote: > > > From: Nicholas Piggin > > > Sent: 16 September 2016 10:53 > > > On Thu, 15 Sep 2016 18:31:54 +0530 > > > Madhavan Srinivasan

[PATCH 5/5] arch/powerpc: Add CONFIG_FSL_DPAA to corenetXX_smp_defconfig

Enable the drivers on the powerpc arch. Signed-off-by: Roy Pledge Signed-off-by: Claudiu Manoil --- arch/powerpc/Makefile| 4 ++-- arch/powerpc/configs/dpaa.config | 1 + drivers/soc/Kconfig | 1 + drivers/soc/fsl/Makefile

[PATCH 4/5] soc/qman: Add self-test for QMan driver

Add self tests for the DPAA 1.x Queue Manager driver. The tests ensure that the driver can properly enqueue and dequeue to/from frame queues using the QMan portal infrastructure. Signed-off-by: Roy Pledge Signed-off-by: Claudiu Manoil ---

[PATCH 3/5] soc/bman: Add self-test for BMan driver

Add a self test for the DPAA 1.x Buffer Manager driver. This test ensures that the driver can properly acquire and release buffers using the BMan portal infrastructure. Signed-off-by: Roy Pledge Signed-off-by: Claudiu Manoil ---

[PATCH 1/5] soc/fsl: Introduce DPAA 1.x BMan device driver

This driver enables the Freescale DPAA 1.x Buffer Manager block. BMan is a hardware accelerator that manages buffer pools. It allows CPUs and other accelerators connected to the SoC datapath to acquire and release buffers during data processing. Signed-off-by: Roy Pledge

[PATCH 0/5] Freescale DPAA 1.x QBMan Drivers

Add basic support for the Data Path Acceleration Architecture v1.x (DPAA 1.x) hardware infrastructure and accelerators found on multicore Freescale SoCs, commonly known as the QorIQ series. CC: Roy Pledge Claudiu Manoil (5): soc/fsl: Introduce DPAA 1.x BMan device driver

Re: [PATCH][RFC] Implement arch primitives for busywait loops

On Fri, 16 Sep 2016 22:06:35 +1000 Nicholas Piggin wrote: > On Fri, 16 Sep 2016 11:57:37 + > David Laight wrote: > > > From: Nicholas Piggin > > > Sent: 16 September 2016 12:52 > > > On Fri, 16 Sep 2016 11:30:58 + > > > David Laight

Re: [PATCH][RFC] Implement arch primitives for busywait loops

On Fri, 16 Sep 2016 11:57:37 + David Laight wrote: > From: Nicholas Piggin > > Sent: 16 September 2016 12:52 > > On Fri, 16 Sep 2016 11:30:58 + > > David Laight wrote: > > > > > From: Nicholas Piggin > > > > Sent: 16 September 2016

RE: [PATCH 04/13] powerpc: Use soft_enabled_set api to update paca->soft_enabled

From: Nicholas Piggin > Sent: 16 September 2016 10:53 > On Thu, 15 Sep 2016 18:31:54 +0530 > Madhavan Srinivasan wrote: > > > Force use of soft_enabled_set() wrapper to update paca-soft_enabled > > wherever possisble. Also add a new wrapper function, > >

RE: [PATCH][RFC] Implement arch primitives for busywait loops

From: Nicholas Piggin > Sent: 16 September 2016 12:52 > On Fri, 16 Sep 2016 11:30:58 + > David Laight wrote: > > > From: Nicholas Piggin > > > Sent: 16 September 2016 09:58 > > > Implementing busy wait loops with cpu_relax() in callers poses > > > some difficulties

Re: [PATCH 04/13] powerpc: Use soft_enabled_set api to update paca->soft_enabled

On Fri, 16 Sep 2016 11:43:13 + David Laight wrote: > From: Nicholas Piggin > > Sent: 16 September 2016 10:53 > > On Thu, 15 Sep 2016 18:31:54 +0530 > > Madhavan Srinivasan wrote: > > > > > Force use of soft_enabled_set() wrapper to

Re: [PATCH][RFC] Implement arch primitives for busywait loops

On Fri, 16 Sep 2016 11:30:58 + David Laight wrote: > From: Nicholas Piggin > > Sent: 16 September 2016 09:58 > > Implementing busy wait loops with cpu_relax() in callers poses > > some difficulties for powerpc. > > > > First, we want to put our SMT thread into a low

RE: [PATCH][RFC] Implement arch primitives for busywait loops

From: Nicholas Piggin > Sent: 16 September 2016 09:58 > Implementing busy wait loops with cpu_relax() in callers poses > some difficulties for powerpc. > > First, we want to put our SMT thread into a low priority mode for the > duration of the loop, but then return to normal priority after

Re: [PATCH 00/13] powerpc: "paca->soft_enabled" based local atomic operation implementation

On Thu, 15 Sep 2016 18:31:50 +0530 Madhavan Srinivasan wrote: > Local atomic operations are fast and highly reentrant per CPU counters. > Used for percpu variable updates. Local atomic operations only guarantee > variable modification atomicity wrt the CPU which owns

Re: [PATCH 10/13] powerpc: Add "bitmask" paramater to MASKABLE_* macros

On Thu, 15 Sep 2016 18:32:00 +0530 Madhavan Srinivasan wrote: > Make it explicit the interrupt masking supported > by a gievn interrupt handler. Patch correspondingly > extends the MASKABLE_* macros with an addition's parameter. > "bitmask" parameter is passed to

Re: [PATCH 13/13] powerpc: rewrite local_t using soft_irq

On Thu, 15 Sep 2016 18:32:03 +0530 Madhavan Srinivasan wrote: > Local atomic operations are fast and highly reentrant per CPU counters. > Used for percpu variable updates. Local atomic operations only guarantee > variable modification atomicity wrt the CPU which owns

Re: [PATCH 12/13] powerpc: Add a Kconfig and a functions to set new soft_enabled mask

On Thu, 15 Sep 2016 18:32:02 +0530 Madhavan Srinivasan wrote: > diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c > index 9e5e9a6d4147..ae31b1e85fdb 100644 > --- a/arch/powerpc/kernel/irq.c > +++ b/arch/powerpc/kernel/irq.c > @@ -209,6 +209,10 @@

Re: [PATCH 11/13] powerpc: Add support to mask perf interrupts and replay them

On Thu, 15 Sep 2016 18:32:01 +0530 Madhavan Srinivasan wrote: > To support masking of the PMI interrupts, couple of new interrupt handler > macros are added MASKABLE_EXCEPTION_PSERIES_OOL and > MASKABLE_RELON_EXCEPTION_PSERIES_OOL. > > Couple of new irq #defs

[RFC 3/3] powerpc/powernv: reset any PHBs in CAPI mode during initialisation

If we kexec into a new kernel on a machine where a PHB has been switched into CAPI mode, we need to disable CAPI mode in the new kernel before traffic begins to flow on the PHB and causes a machine checkstop. During PHB initialisation, ask OPAL whether each PHB is in CAPI mode, and if so, do a

[RFC 2/3] powerpc/powernv: add opal_pci_get_phb_capi_mode() call

opal_pci_get_phb_capi_mode() returns OPAL_PHB_CAPI_MODE_CAPI if the PHB is in CAPI mode, and OPAL_PHB_CAPI_MODE_PCIE if it isn't. We're going to use this call to determine if a PHB requires a complete reset during initialisation in order to disable CAPI mode (on sufficiently new skiboots that

[RFC 1/3] powerpc/powernv: fix comment style and spelling

Signed-off-by: Andrew Donnellan --- arch/powerpc/platforms/powernv/pci-ioda.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c index c16d790..ca5e9b5

[RFC 0/3] powerpc/powernv: support CAPI + kexec

Currently, if you attempt to kexec into a new kernel from a machine with a CAPI card and the cxl driver loaded, you are going to have an exceedingly bad time. It turns out that the hardware doesn't really cope very well with going through the standard Linux PCI initialisation process while a PHB

Re: [PATCH 12/13] powerpc: Add a Kconfig and a functions to set new soft_enabled mask

On Thu, 15 Sep 2016 18:32:02 +0530 Madhavan Srinivasan wrote: > New Kconfig is added "CONFIG_IRQ_DEBUG_SUPPORT" to add warn_on > to alert the invalid transitions. Have also moved the code under > the CONFIG_TRACE_IRQFLAGS in arch_local_irq_restore() to new Kconfig > as

Re: [PATCH 09/13] powerpc: Introduce new mask bit for soft_enabled

On Thu, 15 Sep 2016 18:31:59 +0530 Madhavan Srinivasan wrote: > Currently soft_enabled is used as the flag to determine > the interrupt state. Patch extends the soft_enabled > to be used as a mask instead of a flag. This should be the title of the patch, IMO.

Re: [PATCH 08/13] powerpc: Add new _EXCEPTION_PROLOG_1 macro

On Thu, 15 Sep 2016 18:31:58 +0530 Madhavan Srinivasan wrote: > To support addition of "bitmask" to MASKABLE_* macros, > factor out the EXCPETION_PROLOG_1 macro. > > Signed-off-by: Madhavan Srinivasan Really minor nit, but as a matter of

Re: [PATCH 07/13] powerpc: Avoid using EXCEPTION_PROLOG_1 macro in MASKABLE_*

On Thu, 15 Sep 2016 18:31:57 +0530 Madhavan Srinivasan wrote: > Currently we use both EXCEPTION_PROLOG_1 and __EXCEPTION_PROLOG_1 > in the MASKABLE_* macros. As a cleanup, this patch makes MASKABLE_* > to use only __EXCEPTION_PROLOG_1. There is not logic change. > >

Re: [PATCH 06/13] powerpc: reverse the soft_enable logic

On Thu, 15 Sep 2016 18:31:56 +0530 Madhavan Srinivasan wrote: > "paca->soft_enabled" is used as a flag to mask some of interrupts. > Currently supported flags values and their details: > > soft_enabledMSR[EE] > > 0 0 Disabled (PMI and HMI not

Re: powerpc: Discard ffs() function and use builtin_ffs instead

Le 13/05/2016 à 08:53, Christophe Leroy a écrit : Le 13/05/2016 à 08:16, Michael Ellerman a écrit : On Thu, 2016-12-05 at 15:32:22 UTC, Christophe Leroy wrote: With the ffs() function as defined in arch/powerpc/include/asm/bitops.h GCC will not optimise the code in case of constant

Re: [PATCH 05/13] powerpc: Add soft_enabled manipulation functions

On Thu, 15 Sep 2016 18:31:55 +0530 Madhavan Srinivasan wrote: > Add new soft_enabled_* manipulation function and implement > arch_local_* using the soft_enabled_* wrappers. > > Signed-off-by: Madhavan Srinivasan > --- >

Re: [PATCH 04/13] powerpc: Use soft_enabled_set api to update paca->soft_enabled

On Thu, 15 Sep 2016 18:31:54 +0530 Madhavan Srinivasan wrote: > Force use of soft_enabled_set() wrapper to update paca-soft_enabled > wherever possisble. Also add a new wrapper function, > soft_enabled_set_return(), > added to force the paca->soft_enabled updates. > >

Re: [PATCH 03/13] powerpc: move set_soft_enabled() and rename

On Thu, 15 Sep 2016 18:31:53 +0530 Madhavan Srinivasan wrote: > Move set_soft_enabled() from powerpc/kernel/irq.c to > asm/hw_irq.c. and rename it soft_enabled_set(). > THis way paca->soft_enabled updates can be forced. Could you just tidy up the changelog a little?

[PATCH 2/2] powernv:idle:Implement lite variant of power_enter_stop

From: "Gautham R. Shenoy" This patch adds a function named power_enter_stop_lite() that can execute a stop instruction when ESL and EC bits are set to zero in the PSSCR. The function handles the wake-up from idle at the instruction immediately after the stop

[PATCH 1/2] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro

From: "Gautham R. Shenoy" Currently all the low-power idle states are expected to wake up at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ that puts the CPU to an idle state and never returns. On ISA_300, when the ESL and EC bits in the PSSCR are zero,

[PATCH 0/2] powernv: Implement lite variant of stop with ESL=EC=0

From: "Gautham R. Shenoy" Hi, The Power ISA v3.0 allows us to execute the "stop" instruction with ESL and EC of the PSSCR set to 0. This will ensure no loss of state, and the wakeup from the stop will happen at an instruction following the executed stop instruction.

Re: [PATCH 02/13] powerpc: Cleanup to use IRQ_DISABLE_MASK_* macros for paca->soft_enabled update

On Thu, 15 Sep 2016 18:31:52 +0530 Madhavan Srinivasan wrote: > Replace the hardcoded values used when updating > paca->soft_enabled with IRQ_DISABLE_MASK_* #def. > No logic change. This could be folded with patch 1. Reviewed-by: Nicholas Piggin

[PATCH][RFC] Implement arch primitives for busywait loops

Implementing busy wait loops with cpu_relax() in callers poses some difficulties for powerpc. First, we want to put our SMT thread into a low priority mode for the duration of the loop, but then return to normal priority after exiting the loop. Dependong on the CPU design, 'HMT_low() ;

i2c i2c-3: i2c-powermac: modalias failure on /uni-n@f8000000/i2c@f8001000/cereal@1c0

Hi there, Would anyone know why I am getting the following error message in `dmesg` on my PowerMac/Mac Mini G4: [...] [2.090226] PowerMac i2c bus pmu 2 registered [2.095691] PowerMac i2c bus pmu 1 registered [2.101016] PowerMac i2c bus mac-io 0 registered [2.106135] PowerMac i2c

[PATCH v2] powerpc/8xx: add dedicated machine check handler

During a machine check, the 8xx provides indication of whether the check is due to data or instruction access, so let's display it. Lets also move 8xx specific handling into the new handler. Signed-off-by: Christophe Leroy --- v2: moved into the new handler the part

[PATCH v2 3/3] powerpc/8xx: Implement support of hugepages

8xx uses a two level page table with two different linux page size support (4k and 16k). 8xx also support two different hugepage sizes 512k and 8M. In order to support them on linux we define two different page table layout. The size of pages is in the PGD entry, using PS field (bits 28-29): 00 :

[PATCH v2 2/3] powerpc: get hugetlbpage handling more generic

Today there are two implementations of hugetlbpages which are managed by exclusive #ifdefs: * FSL_BOOKE: several directory entries points to the same single hugepage * BOOK3S: one upper level directory entry points to a table of hugepages In preparation of implementation of hugepage support on

[PATCH v2 1/3] powerpc: port 64 bits pgtable_cache to 32 bits

Today powerpc64 uses a set of pgtable_caches while powerpc32 uses standard pages when using 4k pages and a single pgtable_cache if using other size pages. In preparation of implementing huge pages on the 8xx, this patch replaces the specific powerpc32 handling by the 64 bits approach. This is

[PATCH v2 0/3] powerpc: implementation of huge pages for 8xx

This is v2 of patch serie is the implementation of support of hugepages for the 8xx. v1 of the serie was including some other fixes and optimisations/reorganisations for the 8xx. Now the patch has been split and this part only focuses on the implementation of hugepages. Compared the v1, the last

[PATCH v2] Remove duplicate setting of the B field in tlbie

Remove duplicate setting of the the "B" field when doing a tlbie(l). In compute_tlbie_rb(), the "B" field is set again just before returning the rb value to be used for tlbie(l). Signed-off-by: Balbir Singh --- Changelog - Leave the more readable version around

Re: [PATCH] MAINTAINERS: Update cxl maintainers

On 16/09/16 14:28, Michael Neuling wrote: > Fred has taken over the cxl maintenance I was doing. This updates the > MAINTAINERS file to reflect this. > > It also removes a duplicate entry in the files covered. > > Signed-off-by: Michael Neuling Reviewed-by: Andrew Donnellan

Re: [PATCH] MAINTAINERS: Update cxl maintainers

On 16/09/16 14:28, Michael Neuling wrote: Fred has taken over the cxl maintenance I was doing. This updates the MAINTAINERS file to reflect this. It also removes a duplicate entry in the files covered. Signed-off-by: Michael Neuling Reviewed-by: Andrew Donnellan

[PATCH v2 3/3] powerpc/8xx: make user addr DTLB miss the short path

User space DTLB miss represent approximatly 90% of TLB misses so make it the shortest path. Also remove an unneccessary double jump in FixupDAR Before this patch, we spend 3.3 TB ticks in the handler for each user address miss and 3.4 TB ticks for each kernel address miss After this patch, we

[PATCH v2 1/3] powerpc/8xx: use r3 to scratch CR in ITLBmiss

Signed-off-by: Christophe Leroy --- arch/powerpc/kernel/head_8xx.S | 21 + 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index 8632515..fd5b53d 100644 ---

[PATCH RESEND] powerpc: fix usage of _PAGE_RO in hugepage

On some CPUs like the 8xx, _PAGE_RW hence _PAGE_WRITE is defined as 0 and _PAGE_RO has to be set when a page is not writable _PAGE_RO is defined by default in pte-common.h, however BOOK3S/64 doesn't include that file so _PAGE_RO has to be defined explicitly in book3s/64/pgtable.h fixes:

[PATCH v2 0/3] Optimisation on 8xx prior to hugepage implementation

This serie is a prologue of hugepage implementation on the 8xx. It some how optimises the DTLBMiss handler while allowing at the same time to hook the hugepage handling that will be introduced in a subsequent patch serie. v1 of those patches was part of a serie identified "powerpc/8xx:

Re: [V2] powerpc/Kconfig: Update config option based on page size.

On 14/09/16 20:40, santhosh wrote: > >> Michael Ellerman writes: >> >>> On Fri, 2016-19-02 at 05:38:47 UTC, Rashmica Gupta wrote: Currently on PPC64 changing kernel pagesize from 4K to 64K leaves FORCE_MAX_ZONEORDER set to 13 - which produces a compile error.

[PATCH] MAINTAINERS: Update cxl maintainers

Fred has taken over the cxl maintenance I was doing. This updates the MAINTAINERS file to reflect this. It also removes a duplicate entry in the files covered. Signed-off-by: Michael Neuling --- MAINTAINERS | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git

Re: [PATCH] powerpc: do not use kprobe section to exempt exception handlers

Nicholas Piggin writes: > Use the blacklist macros instead. This allows the linker to move > exception handler functions close to callers and avoids trampolines in > larger kernels. Nice, that's been on my todo list for eva. Can you do the asm ones too? See _KPROBE() in