This patch modifies the behaviour of the MPC8xx/8xxx watchdog. On the MPC8xx,
at 133Mhz, the maximum timeout of the watchdog timer is 1s, which means it must
be pinged twice a second. This is not in line with the Linux watchdog concept
which is based on a default watchdog timeout around 60s.
This
Le 26/06/2013 01:04, Scott Wood a écrit :
On Thu, Feb 28, 2013 at 09:52:22AM +0100, LEROY Christophe wrote:
This patch modifies the behaviour of the MPC8xx/8xxx watchdog. On the MPC8xx,
at 133Mhz, the maximum timeout of the watchdog timer is 1s, which means it must
be pinged twice a second.
Hi Fin,
I don't know anything about crypto so I can only critique you on your
patch submission technique :) ...
On Wed, Aug 07, 2013 at 06:15:50PM -0500, Fionnuala Gunter wrote:
This patch fixes a bug that is triggered when cts(cbc(aes)) is used with
nx-crypto driver on input larger than 32
Hi,
The CONFIG_VIRTUALIZATION disabling should be done in the Kconfig not
here.
I'm not that keen on another defconfig. benh is already talking about
having a powernv defconfig. I'm worried we are going to fragment the
defconfigs. If you want something special like LE, then change the
On Tuesday 06 August 2013 09:32 PM, Anton Blanchard wrote:
This is the pseries_defconfig with CONFIG_CPU_LITTLE_ENDIAN enabled
and CONFIG_VIRTUALIZATION disabled (required until we fix some
endian issues in KVM).
Signed-off-by: Anton Blanchard an...@samba.org
---
On 08/07/2013 10:50 PM, leroy christophe wrote:
Le 26/06/2013 01:04, Scott Wood a écrit :
On Thu, Feb 28, 2013 at 09:52:22AM +0100, LEROY Christophe wrote:
This patch modifies the behaviour of the MPC8xx/8xxx watchdog. On the MPC8xx,
at 133Mhz, the maximum timeout of the watchdog timer is 1s,
+CONFIG_SCHED_SMT=y
+CONFIG_PPC_DENORMALISATION=y
+CONFIG_HOTPLUG_PCI=m
Why the value m in the le_config file, when it is y in
pseries_defconfig.
We are out of sync already!?!?! *sigh* ;-)
Also I do see a warning saying invalid value for this symbol.
Mikey
LRAT (Logical to Real Address Translation) present in MMU v2 provides hardware
translation from a logical page number (LPN) to a real page number (RPN) when
tlbwe is executed by a guest or when a page table translation occurs from a
guest virtual address.
Add LRAT error exception handler to
On 08/08/2013 10:21 AM, Paul Mackerras wrote:
On Wed, Aug 07, 2013 at 03:08:15PM +0530, Mahesh J Salgaonkar wrote:
From: Mahesh Salgaonkar mah...@linux.vnet.ibm.com
Move machine check entry point into Linux. So far we were dependent on
firmware to decode MCE error details and handover the
On 08/08/2013 10:44 AM, Paul Mackerras wrote:
On Wed, Aug 07, 2013 at 03:09:13PM +0530, Mahesh J Salgaonkar wrote:
From: Mahesh Salgaonkar mah...@linux.vnet.ibm.com
Now that we handle machine check in linux, the MCE decoding should also
take place in linux host. This info is crucial to log
On Thu, 2013-08-08 at 18:49 +0530, Mahesh Jagannath Salgaonkar wrote:
But, I think I should depend on
evt-disposition==MCE_DISPOSITION_RECOVERED and not play with MSR_RI
and
SRR1. I will fix my code.
If MSR:RI is 0, then you have clobbered SRR0/SRR1 beyond repair and
probably cannot recover.
On Thu, 2013-08-08 at 18:49 +0530, Mahesh Jagannath Salgaonkar wrote:
Secondly, we shouldn't call save_mce_event() if we're not in
hypervisor mode, since per-cpu variables are not in general
accessible
in real mode when running under a hypervisor with a limited
real-mode
area (RMA).
On Aug 7, 2013, at 7:03 PM, Stephen N Chivers wrote:
Add support for the Motorola/Emerson MVME5100 Single Board Computer.
The MVME5100 is a 6U form factor VME64 computer with:
- A single MPC7410 or MPC750 CPU
- A HAWK Processor Host Bridge (CPU to PCI) and
Michael Ellerman mich...@ellerman.id.au writes:
On Wed, Aug 07, 2013 at 09:31:00AM +1000, Michael Neuling wrote:
Anton Blanchard an...@samba.org wrote:
This is the pseries_defconfig with CONFIG_CPU_LITTLE_ENDIAN enabled
and CONFIG_VIRTUALIZATION disabled (required until we fix some
Older kernels has just length information in their header. Handle it
while reading old kernel oops log from pstore.
Applies on top of powerpc/pseries: Fix buffer overflow when reading from pstore
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
---
When reading from pstore there is a buffer overflow during decompression
due to the header added in unzip_oops. Remove unzip_oops and call
pstore_decompress directly in nvram_pstore_read. Allocate buffer of size
report_length of the oops header as header will not be deallocated in pstore.
Since we
On Thu, 2013-08-08 at 10:30 -0500, Kumar Gala wrote:
On Aug 7, 2013, at 7:03 PM, Stephen N Chivers wrote:
Add support for the Motorola/Emerson MVME5100 Single Board Computer.
The MVME5100 is a 6U form factor VME64 computer with:
- A single MPC7410 or MPC750 CPU
- A
On Wed, Aug 07, 2013 at 10:40 -0500, Kumar Gala wrote:
On Aug 6, 2013, at 3:43 PM, Gerhard Sittig wrote:
this series
- fixes several drivers that are used in the MPC512x platform (UART,
SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they
handle clocks (appropriately
On Wed, Aug 07, 2013 at 09:28 +0200, Marc Kleine-Budde wrote:
On 08/06/2013 10:43 PM, Gerhard Sittig wrote:
[ ... ]
diff --git a/drivers/net/can/mscan/mscan.c b/drivers/net/can/mscan/mscan.c
index e6b4095..4f998f5 100644
--- a/drivers/net/can/mscan/mscan.c
+++
On Tue, 6 Aug 2013 22:43:49 +0200
Gerhard Sittig g...@denx.de wrote:
...
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 46ac1dd..549ff08 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
...
+ clk = devm_clk_get(pdev-dev,
On Mon, Aug 5, 2013 at 7:01 PM, David Hawkins d...@ovro.caltech.edu wrote:
I suspect the lack of either the 5V or 3.3V power rail to the card
might be the problem.
Did you probe the PCI edge connect to see what supplies were present?
For those that are interested, we did figure out what was
Hi Pete,
For those that are interested, we did figure out what was going on.
Turns out that the clock buffer driving the PCI connector was, well,
less than adequate. With some cards, the load on the clock line was
large enough that the clock was in horrible shape. Fixing the clock
line and
Until now, the MSI architecture-specific functions could be overloaded
using a fairly complex set of #define and compile-time
conditionals. In order to prepare for the introduction of the msi_chip
infrastructure, it is desirable to switch all those functions to use
the 'weak' mechanism. This
Now that we have weak versions for each of the PCI MSI architecture
functions, we can actually build the MSI support for all platforms,
regardless of whether they provide or not architecture-specific
versions of those functions. For this reason, the ARCH_SUPPORTS_MSI
hidden kconfig boolean becomes
On Fri, 2013-08-09 at 00:17 +0200, Thomas Petazzoni wrote:
Until now, the MSI architecture-specific functions could be overloaded
using a fairly complex set of #define and compile-time
conditionals. In order to prepare for the introduction of the msi_chip
infrastructure, it is desirable to
On Fri, 2013-08-09 at 00:17 +0200, Thomas Petazzoni wrote:
Now that we have weak versions for each of the PCI MSI architecture
functions, we can actually build the MSI support for all platforms,
regardless of whether they provide or not architecture-specific
versions of those functions. For
The following changes since commit 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b:
Linux 3.11-rc2 (2013-07-21 12:05:29 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux.git next
for you to fetch changes up to
Anton Blanchard an...@samba.org wrote:
Hi,
The CONFIG_VIRTUALIZATION disabling should be done in the Kconfig not
here.
I'm not that keen on another defconfig. benh is already talking about
having a powernv defconfig. I'm worried we are going to fragment the
defconfigs. If
On Wed, Jul 31, 2013 at 02:25:27PM +0800, Haijun Zhang wrote:
int num_ranges;
+ u32 ocr_mask;
int i;
int ret = -EINVAL;
@@ -102,26 +103,11 @@ struct mmc_spi_platform_data *mmc_spi_get_pdata(struct
spi_device *spi)
if (!oms)
return NULL;
-
On Wed, Jul 31, 2013 at 02:25:25PM +0800, Haijun Zhang wrote:
Add function to support get voltage from device-tree.
If there are voltage-range specified in device-tree node, this function
will parse it and return the avail voltage mask.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
On Thu, 2013-08-08 at 11:03 +1100, Stephen N Chivers wrote:
Add support for the Motorola/Emerson MVME5100 Single Board Computer.
The MVME5100 is a 6U form factor VME64 computer with:
- A single MPC7410 or MPC750 CPU
- A HAWK Processor Host Bridge (CPU to PCI) and
On Thu, Aug 08, 2013 at 08:49:51PM +1000, Michael Neuling wrote:
+CONFIG_SCHED_SMT=y
+CONFIG_PPC_DENORMALISATION=y
+CONFIG_HOTPLUG_PCI=m
Why the value m in the le_config file, when it is y in
pseries_defconfig.
We are out of sync already!?!?! *sigh* ;-)
That's good, more coverage!
On Fri, Aug 09, 2013 at 09:12:37AM +1000, Michael Neuling wrote:
Anton Blanchard an...@samba.org wrote:
Hi,
The CONFIG_VIRTUALIZATION disabling should be done in the Kconfig not
here.
I'm not that keen on another defconfig. benh is already talking about
having a
On 08/09/2013 08:15 AM, Anton Vorontsov wrote:
On Wed, Jul 31, 2013 at 02:25:25PM +0800, Haijun Zhang wrote:
Add function to support get voltage from device-tree.
If there are voltage-range specified in device-tree node, this function
will parse it and return the avail voltage mask.
powerpc: Add new save_tar() register function.
Add save_tar() function to save the Target Address Register (TAR). This will
be used in a future patch to save the TAR earlier than it currently is.
Signed-off-by: Michael Neuling mi...@neuling.org
Cc: sta...@vger.kernel.org
---
v3: remove
powerpc: Rework setting up H/FSCR bit definitions
This reworks the Facility Status and Control Regsiter (FSCR) config bit
definitions so that we can access the bit numbers. This will be useful when
looking at the status in the facility unavailable interrupt.
HFSCR and FSCR versions are the
POWER8 allows the DSCR to be accessed directly from userspace via a new SPR
number 0x3 (Rather than 0x11. DSCR SPR number 0x11 is still used on POWER8 but
like POWER7, is only accessible in HV and OS modes). Currently, we allow this
by setting H/FSCR DSCR bit on boot.
Unfortunately this doesn't
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