Please pull powerpc.git merge branch
Linus, Please do git pull \ git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc.git merge to get another batch of fixes for powerpc, as listed below. Thanks, Paul. Documentation/powerpc/booting-without-of.txt |5 + arch/powerpc/boot/dts/mpc832x_mds.dts |9 +- arch/powerpc/boot/dts/mpc8544ds.dts| 20 ++-- arch/powerpc/boot/dts/mpc8572ds.dts| 108 ++--- arch/powerpc/boot/dts/mpc8641_hpcn.dts | 126 arch/powerpc/kernel/asm-offsets.c |4 + arch/powerpc/kernel/rtas.c | 111 - arch/powerpc/kernel/time.c |5 + arch/powerpc/kernel/vdso.c | 11 ++ arch/powerpc/kernel/vdso32/cacheflush.S| 41 ++-- arch/powerpc/kernel/vdso64/cacheflush.S| 41 ++-- arch/powerpc/mm/mem.c |2 arch/powerpc/mm/mmu_decl.h |2 arch/powerpc/mm/stab.c |1 arch/powerpc/platforms/40x/walnut.c|3 - arch/powerpc/platforms/44x/bamboo.c|3 - arch/powerpc/platforms/44x/ebony.c |3 - arch/powerpc/platforms/44x/sequoia.c |3 - arch/powerpc/platforms/83xx/mpc832x_mds.c |7 + arch/powerpc/platforms/83xx/mpc836x_mds.c | 31 +- arch/powerpc/platforms/83xx/usb.c |8 +- arch/powerpc/platforms/cell/spufs/inode.c |1 arch/powerpc/platforms/embedded6xx/prpmc2800.c |1 arch/powerpc/platforms/pasemi/setup.c |2 arch/powerpc/platforms/pseries/Kconfig |2 arch/powerpc/platforms/pseries/setup.c |3 - arch/powerpc/sysdev/uic.c | 18 +++ arch/ppc/kernel/setup.c|7 + arch/ppc/mm/init.c |2 arch/ppc/mm/mmu_decl.h |2 arch/ppc/platforms/4xx/yucca.c |1 arch/ppc/syslib/virtex_devices.c | 31 ++ include/asm-powerpc/page_32.h |4 + include/asm-powerpc/pci-bridge.h |5 + include/asm-powerpc/rtas.h |3 - include/asm-powerpc/vdso_datapage.h|8 ++ 36 files changed, 486 insertions(+), 148 deletions(-) Benjamin Herrenschmidt (3): [POWERPC] Fix declaration of pcibios_free_controller [POWERPC] Fix kmalloc alignment on non-coherent DMA platforms [POWERPC] Fix 8xx build breakage due to _tlbie changes Cyrill Gorcunov (1): [POWERPC] Fix potential NULL dereference Jeremy Kerr (1): [POWERPC] spufs: Fix context destroy vs /spu readdir race Joachim Foerster (1): [POWERPC] Xilinx: Register AC97 Controller Reference with the platform bus Jon Loeliger (1): [POWERPC] 4xx: Replace #includes of asm/of_platform.h with linux/of_platform.h. Josh Boyer (1): [POWERPC] 4xx: Use virtual PVR value to init FPU on arch/ppc 440EP Kamalesh Babulal (1): [POWERPC] Fix build failure on legacy iSeries Kim Phillips (4): [POWERPC] 83xx: mpc832x mds: Fix board PHY reset code [POWERPC] 83xx: Fix 2nd UCC entry in mpc832x_mds.dts [POWERPC] Document rgmii-rxid and rgmii-txid phy-connection-types [POWERPC] 83xx: Handle mpc8360 rev. 2.1 RGMII timing erratum Kumar Gala (1): [POWERPC] Fix device tree interrupt map for Freescale ULI1575 boards Linas Vepstas (1): [POWERPC] Fix RTAS os-term usage on kernel panic Mark A. Greer (1): [POWERPC] prpmc2800: Enable L2 cache Michael Neuling (1): [POWERPC] Fix possible division by zero in scaled time accounting Nathan Lynch (1): [POWERPC] Fix multiple bugs in rtas_ibm_suspend_me code Olof Johansson (2): [POWERPC] pasemi: Don't reset mpic at boot [POWERPC] vdso: Fixes for cache block sizes Roel Kluin (1): [POWERPC] 4xx: balance ioremap/ioumap calls for Yucca Stephen Rothwell (1): [POWERPC] pSeries: make pseries_defconfig minus PCI build again Valentine Barshak (1): [POWERPC] 4xx: UIC add mask_ack callback ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: [PATCH 0/5] fixups for mpc8360 rev. 2.1 erratum #2 (RGMII Timing)
-Original Message- From: Phillips Kim Sent: Tuesday, November 06, 2007 2:16 AM To: Li Yang-r58472; Kumar Gala; [EMAIL PROTECTED]; linuxppc-dev@ozlabs.org Cc: [EMAIL PROTECTED]; [EMAIL PROTECTED] Subject: [PATCH 0/5] fixups for mpc8360 rev. 2.1 erratum #2 (RGMII Timing) Hello all, the following patches fix RGMII timing for rev. 2.1 of the mpc8360, according to erratum #2 (erratum text included below). Basically the most intrusive part is the addition of two new RGMII Internal Delay modes; one for TX delay only, and the other for RX delay only (i.e, not both at the same time). Please review, and since this affects both netdev and powerpc trees, one maintainer should ack them for the other to push upstream (i.e, Kumar acks them, and Leo picks them up to go through netdev or the other way around; either way is fine with me). I'm hoping they're trivial enough to go in 2.6.24. Depending on how the review goes, a follow-on patch to u-boot will be sent out that fixes up the phy-connection-type in the device tree (from rgmii-id to rgmii-rxid iff on mpc8360rev2.1). 2-4 Acked-by: Li Yang [EMAIL PROTECTED] ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: [PATCH] powerpc: mpc832x mds: Fix board PHY reset code
-Original Message-
From: Phillips Kim
Sent: Tuesday, November 20, 2007 9:05 AM
To: Kumar Gala; linuxppc-dev@ozlabs.org
Cc: Van Ackeren Peter; Li Yang
Subject: [PATCH] powerpc: mpc832x mds: Fix board PHY reset code
currently the board-level PHY reset code for the mpc832x MDS
messes with reset configuration words source settings which
is plain wrong (it looks like this board code was
cut-n-pasted from the mpc8360 mds code, which has the PHY
reset bits in a different BCSR); this patch points the PHY
reset code to the proper mpc832x mds PHY reset bits in the BCSR.
Signed-off-by: Peter Van Ackeren [EMAIL PROTECTED]
Signed-off-by: Kim Phillips [EMAIL PROTECTED]
Acked-by: Li Yang [EMAIL PROTECTED]
---
arch/powerpc/platforms/83xx/mpc832x_mds.c |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c
b/arch/powerpc/platforms/83xx/mpc832x_mds.c
index 972fa85..9e3bfcc 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c
@@ -90,10 +90,11 @@ static void __init mpc832x_sys_setup_arch(void)
if ((np = of_find_compatible_node(NULL, network, ucc_geth))
!= NULL){
- /* Reset the Ethernet PHY */
- bcsr_regs[9] = ~0x20;
+ /* Reset the Ethernet PHYs */
+#define BCSR8_FETH_RST 0x50
+ bcsr_regs[8] = ~BCSR8_FETH_RST;
udelay(1000);
- bcsr_regs[9] |= 0x20;
+ bcsr_regs[8] |= BCSR8_FETH_RST;
iounmap(bcsr_regs);
of_node_put(np);
}
--
1.5.2.2
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dtc: Don't use env(1) in testsuite
The run_tests.sh script currently invokes the testcase binaries via
env(1). This behaviour is inherited from the libhugetlbfs testsuite
which uses this approach to easily set various configuration
environment variables in testcases.
We don't use that for dtc, and are unlikely to ever want to.
Therefore this patch removes that technique, which substantially
speeds up the testsuite.
Signed-off-by: David Gibson [EMAIL PROTECTED]
Index: dtc/tests/run_tests.sh
===
--- dtc.orig/tests/run_tests.sh 2007-11-20 22:06:12.0 +1100
+++ dtc/tests/run_tests.sh 2007-11-20 22:06:22.0 +1100
@@ -2,8 +2,6 @@
export QUIET_TEST=1
-ENV=/usr/bin/env
-
tot_tests=0
tot_pass=0
tot_fail=0
@@ -13,7 +11,7 @@
run_test () {
tot_tests=$[tot_tests + 1]
echo -n $@:
-if PATH=.:$PATH $ENV $@; then
+if ./$@; then
tot_pass=$[tot_pass + 1]
else
ret=$?
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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Re: libfdt: Abolish fdt_offset_ptr_typed()
So, like, the other day David Gibson mumbled: The fdt_offset_ptr_typed() macro seemed like a good idea at the time. However, it's not actually used all that often, it can silently throw away const qualifications and it uses a gcc extension (typeof) which I'd prefer to avoid for portability. Therefore, this patch gets rid of it (and the fdt_offset_ptr_typed_w() variant which was never used at all). It also makes a few variables const in testcases, which always should have been const, but weren't caught before because of the aforementioned silent discards. Signed-off-by: David Gibson [EMAIL PROTECTED] Applied. jdl ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: libfdt: Abolish _typed() variants, add _cell() variants
So, like, the other day David Gibson mumbled: In a number of places through libfdt and its tests, we have *_typed() macro variants on functions which use gcc's typeof and statement expression extensions to allow passing literals where the underlying function takes a buffer and size. These seemed like a good idea at the time, but in fact they have some problems. They use typeof and statement expressions, extensions I'd prefer to avoid for portability. Plus, they have potential gotchas - although they'll deal with the size of the thing passed, they won't deal with other representation issues (like endianness) and results could be very strange if the type of the expression passed isn't what you think it is. In fact, the only users of these _typed() macros were when the value passed is a single cell (32-bit integer). Therefore, this patch removes all these _typed() macros and replaces them with explicit _cell() variants which handle a single 32-bit integer, and which also perform endian convesions as appropriate. With this in place, it now becomes easy to use standardized big-endian representation for integer valued properties in the testcases, regardless of the platform we're running on. We therefore do that, which has the additional advantage that all the example trees created during a test run are now byte-for-byte identical regardless of platform. Signed-off-by: David Gibson [EMAIL PROTECTED] Applied. jdl ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Please pull from 'for-2.6.24' branch
On Mon, 19 Nov 2007 23:56:23 -0600 (CST) Kumar Gala [EMAIL PROTECTED] wrote: Kim Phillips (4): [POWERPC] 83xx: mpc832x mds: Fix board PHY reset code [POWERPC] 83xx: Fix 2nd UCC entry in mpc832x_mds.dts [POWERPC] Document rgmii-rxid and rgmii-txid phy-connection-types [POWERPC] 83xx: Handle mpc8360 rev. 2.1 RGMII timing erratum Hi Kumar, thanks for applying these, here's one you missed: http://patchwork.ozlabs.org/linuxppc/patch?id=14651 Kim ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] [POWERPC] Emulate isel (Integer Select) instruction
On Nov 20, 2007, at 11:54 AM, Scott Wood wrote: On Mon, Nov 19, 2007 at 09:36:57PM -0600, Kumar Gala wrote: isel (Integer Select) is a new user space instruction in the PowerISA 2.04 spec. Not all processors implement it so lets emulate to ensure code built with isel will run everywhere. Given that the instruction is meant to be a performance enhancement, we should probably warn the first few times it's emulated, so the user knows they should change their toolchain setup if possible. The same is true of mcrxr, popcntb, and possibly string ld/st. Feel free to submit a patch that warns about their usage. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: dtc: Add testcases for tree checks
On Tue, Nov 20, 2007 at 09:09:17AM -0600, Jon Loeliger wrote: So, like, the other day David Gibson mumbled: This patch adds a group of testcases to check that dtc correctly rejects trees with various structural errors. To make things easier to test, we change dtc so that failing checks (as opposed to other errors) result in exit code 2. This patch also fixes an embarrasing bug uncovered by these new tests: check_phandles() worked out if the tree's phandles were valid, then throws that information away and returns success always. Signed-off-by: David Gibson [EMAIL PROTECTED] NOTE! jdl, you'll need to chmod +x tests/dtc-checkfails.sh before you git commit this - it's a new shell script and patch can't encode the permissions info. Index: dtc/tests/dup-nodename.dts === --- /dev/null 1970-01-01 00:00:00.0 + +++ dtc/tests/dup-nodename.dts 2007-11-20 16:02:22.0 +1100 Actually, this is the official third time now that it would have been significantly nicer had you been using git for patches as it does correctly handle excute permissions properly in patches. Well, yes. But, IMO, every time anyone other that you or I has commented on one of these patches as it goes past counts as an occasion when it's better that I've been using patches, rather than pushing to you direct with git. And, it allows for side-band commentary such as your NOTE!, above, to be included in the patch mail, but not in the patch log itself such that it too doesn't have to be git commit --amend'ed out as well. Actually, that should be possible with mails too, it's just that I forgot the --- line. In any event, Applied and Adjusted. -- David Gibson| I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: dtc: Add testcases for tree checks
On Tue, 2007-11-20 at 16:03, David Gibson wrote: Well, yes. But, IMO, every time anyone other that you or I has commented on one of these patches as it goes past counts as an occasion when it's better that I've been using patches, rather than pushing to you direct with git. I am not asking you to stop sending patches. I'm asking you to generate your patches with git. Git's patch format, send through mail, handles the execute permissions. Actually, that should be possible with mails too, it's just that I forgot the --- line. Right. I'm just asking for it to be used. :-) jdl ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: dtc: Add testcases for tree checks
David Gibson wrote: On Tue, Nov 20, 2007 at 09:09:17AM -0600, Jon Loeliger wrote: Actually, this is the official third time now that it would have been significantly nicer had you been using git for patches as it does correctly handle excute permissions properly in patches. Well, yes. But, IMO, every time anyone other that you or I has commented on one of these patches as it goes past counts as an occasion when it's better that I've been using patches, rather than pushing to you direct with git. Generating patches with git-format-patch -M isn't the same as pushing directly... -Scot ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Please pull from 'for-2.6.24' branch (fwd)
didn't cc linuxppc-dev. -- Forwarded message -- Date: Tue, 20 Nov 2007 15:40:57 -0600 (CST) From: Kumar Gala [EMAIL PROTECTED] To: Paul Mackerras [EMAIL PROTECTED] Subject: Please pull from 'for-2.6.24' branch Please pull from 'for-2.6.24' branch of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc.git for-2.6.24 to receive the following updates: arch/powerpc/boot/dts/mpc832x_mds.dts|7 ++ arch/powerpc/boot/dts/mpc834x_mds.dts|9 ++ arch/powerpc/boot/dts/mpc836x_mds.dts|9 ++ arch/powerpc/configs/mpc832x_mds_defconfig | 48 ++ arch/powerpc/configs/mpc832x_rdb_defconfig | 41 +++- arch/powerpc/configs/mpc834x_itx_defconfig |2 arch/powerpc/configs/mpc834x_itxgp_defconfig | 88 ++- arch/powerpc/configs/mpc834x_mds_defconfig | 48 ++ arch/powerpc/configs/mpc836x_mds_defconfig | 48 ++ arch/powerpc/configs/mpc8568mds_defconfig| 48 ++ arch/powerpc/platforms/83xx/mpc832x_mds.c| 24 --- arch/powerpc/platforms/83xx/mpc832x_rdb.c| 14 ++-- arch/powerpc/platforms/83xx/mpc834x_mds.c| 24 --- arch/powerpc/platforms/83xx/mpc836x_mds.c| 24 --- 14 files changed, 346 insertions(+), 88 deletions(-) Anton Vorontsov (2): [POWERPC] 83xx: MPC832x RDB - remove spidev stub, use mmc_spi [POWERPC] 83xx: Update mpc832x_rdb_defconfig to enable MMC-over-SPI Grant Likely (1): [POWERPC] 83xx: Update mpc8349emitx(gp) defconfig for USB Kim Phillips (1): [POWERPC] 8xxx: MDS board RTC fixes ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
dtc: Remove some redundant testcases
This patch removes a number of testcases from the testsuite that are extremely unlikely to find any bugs that won't be found by the other tests. This speeds up the testsuite. - Both loops across the various tree block layouts run the tree1_tests on the basic mangled tree. This is completely redundant, so remove the second copy. This removes 456 testcases. - We currently run tree1_tests on various trees manipulated by move_and_save. We replace those with just a dtbs_equal_ordered test to check that the manipulated tree is equal to the original. What we're testing here is that fdt_move() operates correctly - it's very unlikely it would succeed well enough for the ordered_equal test to succeed, but the tree1_tests would fail on the result. This removes 162 testcases. - Currently we re-ordered with mangle-layout both the basic test_tree1.dtb and sw_tree1.test.dtb. Since we've already checked that these dtbs are equivalent with dtbs_ordered_equal, it's very unlikely that the tests would fail on one but not the other. Therefore reduce this to only using test_tree1.dtb. This removes 828 testcases. Signed-off-by: David Gibson [EMAIL PROTECTED] Index: dtc/tests/run_tests.sh === --- dtc.orig/tests/run_tests.sh 2007-11-21 00:13:40.0 +1100 +++ dtc/tests/run_tests.sh 2007-11-21 00:19:11.0 +1100 @@ -76,13 +76,13 @@ for tree in test_tree1.dtb sw_tree1.test.dtb unfinished_tree1.test.dtb; do rm -f moved.$tree shunted.$tree deshunted.$tree run_test move_and_save $tree - tree1_tests moved.$tree - tree1_tests shunted.$tree - tree1_tests deshunted.$tree + run_test dtbs_equal_ordered $tree moved.$tree + run_test dtbs_equal_ordered $tree shunted.$tree + run_test dtbs_equal_ordered $tree deshunted.$tree done # v16 and alternate layout tests -for tree in test_tree1.dtb sw_tree1.test.dtb; do +for tree in test_tree1.dtb; do for version in 17 16; do for layout in $ALL_LAYOUTS; do run_test mangle-layout $tree $version $layout @@ -93,13 +93,12 @@ done # Read-write tests -for basetree in test_tree1.dtb sw_tree1.test.dtb; do +for basetree in test_tree1.dtb; do for version in 17 16; do for layout in $ALL_LAYOUTS; do tree=v$version.$layout.$basetree rm -f opened.$tree repacked.$tree run_test open_pack $tree - tree1_tests $tree tree1_tests opened.$tree tree1_tests repacked.$tree -- David Gibson| I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] [POWERPC] Update iseries_defconfig
The notable changes hare are the enabling of NO_HZ and HIGH_RES_TIMERS. Signed-off-by: Stephen Rothwell [EMAIL PROTECTED] --- arch/powerpc/configs/iseries_defconfig | 123 +--- 1 files changed, 64 insertions(+), 59 deletions(-) -- Cheers, Stephen Rothwell[EMAIL PROTECTED] diff --git a/arch/powerpc/configs/iseries_defconfig b/arch/powerpc/configs/iseries_defconfig index d78e3a6..4a87745 100644 --- a/arch/powerpc/configs/iseries_defconfig +++ b/arch/powerpc/configs/iseries_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.23-rc4 -# Thu Aug 30 16:37:16 2007 +# Linux kernel version: 2.6.24-rc3 +# Wed Nov 21 11:19:59 2007 # CONFIG_PPC64=y @@ -11,6 +11,7 @@ CONFIG_PPC64=y # CONFIG_POWER4_ONLY is not set CONFIG_POWER3=y CONFIG_POWER4=y +# CONFIG_TUNE_CELL is not set CONFIG_PPC_FPU=y # CONFIG_ALTIVEC is not set CONFIG_PPC_STD_MMU=y @@ -19,8 +20,13 @@ CONFIG_VIRT_CPU_ACCOUNTING=y CONFIG_SMP=y CONFIG_NR_CPUS=32 CONFIG_64BIT=y +CONFIG_WORD_SIZE=64 CONFIG_PPC_MERGE=y CONFIG_MMU=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_HARDIRQS=y CONFIG_IRQ_PER_CPU=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y @@ -63,12 +69,17 @@ CONFIG_POSIX_MQUEUE=y # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_TASKSTATS is not set # CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set CONFIG_AUDIT=y CONFIG_AUDITSYSCALL=y +CONFIG_AUDIT_TREE=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=17 -# CONFIG_CPUSETS is not set +# CONFIG_CGROUPS is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FAIR_USER_SCHED=y +# CONFIG_FAIR_CGROUP_SCHED is not set CONFIG_SYSFS_DEPRECATED=y # CONFIG_RELAY is not set CONFIG_BLK_DEV_INITRD=y @@ -89,7 +100,6 @@ CONFIG_FUTEX=y CONFIG_ANON_INODES=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_VM_EVENT_COUNTERS=y @@ -110,6 +120,7 @@ CONFIG_STOP_MACHINE=y CONFIG_BLOCK=y # CONFIG_BLK_DEV_IO_TRACE is not set CONFIG_BLK_DEV_BSG=y +CONFIG_BLOCK_COMPAT=y # # IO Schedulers @@ -128,7 +139,6 @@ CONFIG_DEFAULT_IOSCHED=anticipatory # Platform support # CONFIG_PPC_MULTIPLATFORM=y -# CONFIG_EMBEDDED6xx is not set # CONFIG_PPC_82xx is not set # CONFIG_PPC_83xx is not set # CONFIG_PPC_86xx is not set @@ -172,6 +182,10 @@ CONFIG_GENERIC_IOMAP=y # # Kernel options # +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y # CONFIG_HZ_100 is not set CONFIG_HZ_250=y # CONFIG_HZ_300 is not set @@ -201,6 +215,7 @@ CONFIG_FLATMEM_MANUAL=y CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y # CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_RESOURCES_64BIT=y CONFIG_ZONE_DMA_FLAG=1 @@ -227,11 +242,8 @@ CONFIG_PCI_SYSCALL=y # CONFIG_PCIEPORTBUS is not set CONFIG_ARCH_SUPPORTS_MSI=y # CONFIG_PCI_MSI is not set +CONFIG_PCI_LEGACY=y # CONFIG_PCI_DEBUG is not set - -# -# PCCARD (PCMCIA/CardBus) support -# # CONFIG_PCCARD is not set # CONFIG_HOTPLUG_PCI is not set CONFIG_KERNEL_START=0xc000 @@ -271,6 +283,7 @@ CONFIG_INET_TUNNEL=y CONFIG_INET_XFRM_MODE_TRANSPORT=y CONFIG_INET_XFRM_MODE_TUNNEL=y CONFIG_INET_XFRM_MODE_BEET=m +# CONFIG_INET_LRO is not set CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set @@ -338,6 +351,7 @@ CONFIG_NETFILTER_XT_MATCH_SCTP=m # CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set CONFIG_NETFILTER_XT_MATCH_STRING=m CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m # CONFIG_NETFILTER_XT_MATCH_U32 is not set # CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set @@ -403,10 +417,6 @@ CONFIG_LLC=y # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# # CONFIG_NET_SCHED is not set CONFIG_NET_CLS_ROUTE=y @@ -436,6 +446,7 @@ CONFIG_NET_CLS_ROUTE=y # # Generic Driver Options # +CONFIG_UEVENT_HELPER_PATH=/sbin/hotplug CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=m @@ -508,6 +519,7 @@ CONFIG_SCSI_FC_ATTRS=y CONFIG_SCSI_SAS_ATTRS=m CONFIG_SCSI_SAS_LIBSAS=m CONFIG_SCSI_SAS_LIBSAS_DEBUG=y +CONFIG_SCSI_SRP_ATTRS=m CONFIG_SCSI_LOWLEVEL=y # CONFIG_ISCSI_TCP is not set # CONFIG_BLK_DEV_3W__RAID is not set @@ -559,14 +571,8 @@ CONFIG_DM_MIRROR=m CONFIG_DM_ZERO=m # CONFIG_DM_MULTIPATH is not set # CONFIG_DM_DELAY is not set - -# -# Fusion MPT device support -# +# CONFIG_DM_UEVENT is not set # CONFIG_FUSION is not set -# CONFIG_FUSION_SPI is not set -# CONFIG_FUSION_FC is not set -# CONFIG_FUSION_SAS is not set # # IEEE 1394 (FireWire) support @@ -582,6 +588,8 @@ CONFIG_BONDING=m # CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set CONFIG_TUN=m +# CONFIG_VETH is not set +# CONFIG_IP1000 is not set # CONFIG_ARCNET is not set # CONFIG_PHYLIB is not set
dtc: Add valgrind support to testsuite
This patch adds some options to the run_tests.sh script allowing it to
run all the testcases under valgrind to check for pointer corruption
bugs and memory leaks. Invoking make checkm will run the testsuite
with valgrind.
It include a mechanism for specifying valgrind errors to be suppressed
on a per-testcase basis, and adds a couple of such suppression files
for the mangle-layout and open_pack testcases which dump for use by
other testcases a buffer which may contain uninitialized sections. We
use suppressions rather than initializing the buffer so that valgrind
will catch any internal access s to the uninitialized data, which
would be a bug.
The patch also fixes one genuine bug caught by valgrind -
_packblocks() in fdt_rw.c was using memcpy() where it should have been
using memmove().
At present the valgrinding won't do anything useful for testcases
invoked via a shell script - which includes all the dtc testcases. I
plan to fix that later.
Signed-off-by: David Gibson [EMAIL PROTECTED]
Index: dtc/tests/run_tests.sh
===
--- dtc.orig/tests/run_tests.sh 2007-11-21 11:29:28.0 +1100
+++ dtc/tests/run_tests.sh 2007-11-21 11:44:55.0 +1100
@@ -2,16 +2,26 @@
export QUIET_TEST=1
+export VALGRIND=
+VGCODE=126
+
tot_tests=0
tot_pass=0
tot_fail=0
tot_config=0
+tot_vg=0
tot_strange=0
run_test () {
tot_tests=$[tot_tests + 1]
echo -n $@:
-if ./$@; then
+VGLOCAL=$VALGRIND
+if [ -n $VALGRIND ]; then
+ if [ -f $1.supp ]; then
+ VGLOCAL=$VGLOCAL --suppressions=$1.supp
+ fi
+fi
+if $VGLOCAL ./$@; then
tot_pass=$[tot_pass + 1]
else
ret=$?
@@ -19,6 +29,8 @@
tot_config=$[tot_config + 1]
elif [ $ret == 2 ]; then
tot_fail=$[tot_fail + 1]
+ elif [ $ret == $VGCODE ]; then
+ tot_vg=$[tot_vg + 1]
else
tot_strange=$[tot_strange + 1]
fi
@@ -148,7 +160,7 @@
run_test dtc-checkfails.sh -I dts -O dtb minusone-phandle.dts
}
-while getopts vdt: ARG ; do
+while getopts vt:m ARG ; do
case $ARG in
v)
unset QUIET_TEST
@@ -156,6 +168,9 @@
t)
TESTSETS=$OPTARG
;;
+ m)
+ VALGRIND=valgrind --tool=memcheck -q --error-exitcode=$VGCODE
+ ;;
esac
done
@@ -182,6 +197,9 @@
echo -e *PASS:$tot_pass
echo -e *FAIL:$tot_fail
echo -e * Bad configuration:$tot_config
+if [ -n $VALGRIND ]; then
+echo -e *valgrind errors: $tot_vg
+fi
echo -e * Strange test result:$tot_strange
echo -e **
Index: dtc/tests/Makefile.tests
===
--- dtc.orig/tests/Makefile.tests 2007-11-21 11:29:29.0 +1100
+++ dtc/tests/Makefile.tests2007-11-21 11:29:39.0 +1100
@@ -26,7 +26,7 @@
TESTS_DEPFILES = $(TESTS:%=%.d) \
$(addprefix $(TESTS_PREFIX),testutils.d trees.d dumptrees.d)
-TESTS_CLEANFILES_L = *.output vgcore.* *.dtb *.test.dts
+TESTS_CLEANFILES_L = *.output vglog.* vgcore.* *.dtb *.test.dts
TESTS_CLEANFILES = $(TESTS_CLEANFILES_L:%=$(TESTS_PREFIX)%)
BIN += $(TESTS) $(TESTS_PREFIX)dumptrees
@@ -52,6 +52,9 @@
check: tests dtc
cd $(TESTS_PREFIX); ./run_tests.sh
+checkm: tests dtc
+ cd $(TESTS_PREFIX); ./run_tests.sh -m 21 | tee vglog.
+
checkv:tests dtc
cd $(TESTS_PREFIX); ./run_tests.sh -v
Index: dtc/libfdt/fdt_rw.c
===
--- dtc.orig/libfdt/fdt_rw.c2007-11-21 11:29:28.0 +1100
+++ dtc/libfdt/fdt_rw.c 2007-11-21 11:29:39.0 +1100
@@ -358,12 +358,12 @@
memmove(buf + mem_rsv_off, fdt + fdt_off_mem_rsvmap(fdt), mem_rsv_size);
fdt_set_off_mem_rsvmap(buf, mem_rsv_off);
- memcpy(buf + struct_off, fdt + fdt_off_dt_struct(fdt), struct_size);
+ memmove(buf + struct_off, fdt + fdt_off_dt_struct(fdt), struct_size);
fdt_set_off_dt_struct(buf, struct_off);
fdt_set_size_dt_struct(buf, struct_size);
- memcpy(buf + strings_off, fdt + fdt_off_dt_strings(fdt),
- fdt_size_dt_strings(fdt));
+ memmove(buf + strings_off, fdt + fdt_off_dt_strings(fdt),
+ fdt_size_dt_strings(fdt));
fdt_set_off_dt_strings(buf, strings_off);
fdt_set_size_dt_strings(buf, fdt_size_dt_strings(fdt));
}
Index: dtc/tests/open_pack.supp
===
--- /dev/null 1970-01-01 00:00:00.0 +
+++ dtc/tests/open_pack.supp2007-11-21 11:29:39.0 +1100
@@ -0,0 +1,7 @@
+{
+ opened blob dumps uninitialized data
+ Memcheck:Param
+ write(buf)
+ obj:/lib/ld-2.6.1.so
+ fun:main
+}
Index: dtc/tests/mangle-layout.supp
===
--- /dev/null
[PATCH] powerpc/pseries: tell phyp to auto-restart
The pseries hypervisor attempts to detect and prevent an
infinite loop of kernel crashes and auto-reboots. It does
so by refusing to auto-reboot unless we indicate that the
current boot was sucessful. So, indicate success late in
the boot sequence.
Signed-off-by: Linas Vepstas [EMAIL PROTECTED]
Sigh. This is a side-effect of the patch I sent yesterday.
Its supposed to simplify the management large numbers of
partitions.
arch/powerpc/platforms/pseries/setup.c | 31 +++
1 file changed, 31 insertions(+)
Index: linux-2.6.24-rc3-git1/arch/powerpc/platforms/pseries/setup.c
===
--- linux-2.6.24-rc3-git1.orig/arch/powerpc/platforms/pseries/setup.c
2007-11-20 18:37:14.0 -0600
+++ linux-2.6.24-rc3-git1/arch/powerpc/platforms/pseries/setup.c
2007-11-20 19:08:12.0 -0600
@@ -491,6 +491,37 @@ void pSeries_power_off(void)
for (;;);
}
+/**
+ * pSeries_auto_restart - tell hypervisor that boot succeeded.
+ *
+ * The pseries hypervisor attempts to detect and prevent an
+ * infinite loop of kernel crashes and auto-reboots. It does
+ * so by refusing to auto-reboot unless we indicate that the
+ * current boot was sucessful. So, indicate success late in
+ * the boot sequence.
+ */
+static int __init pSeries_auto_restart(void)
+{
+ static char buff[3]; /* static so that its in RMO region */
+ int rc;
+ int token = rtas_token(ibm,set-system-parameter);
+ if (!token)
+ return 0;
+
+ /* partition_auto_restart is 21; set to to 1 to auto-restart the OS. */
+ buff[0] = 0;
+ buff[1] = 1; /* length */
+ buff[2] = 1; /* value */
+ do {
+ rc = rtas_call (token, 2, 1, NULL, 21, buff);
+ } while (rtas_busy_delay(rc));
+ if (rc)
+ printk(KERN_INFO pSeries_auto_restart():
+ unable to setup autorestart, rc=%d\n, rc);
+ return 0;
+}
+late_initcall(pSeries_auto_restart);
+
#ifndef CONFIG_PCI
void pSeries_final_fixup(void) { }
#endif
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[PATCH] sys_indirect kernel implementation for PowerPC
This implements sys_indirect for 32-bit and 64-bit powerpc machines,
including a 32-bit compatibility implementation for 64-bit powerpc.
I decided to use assembly language for call_syscall because on 64-bit
powerpc the system call table has the addresses of the function text
rather than pointers to function descriptors; hence the system call
functions can't be called from C via the system call table.
Signed-off-by: Paul Mackerras [EMAIL PROTECTED]
---
This patch applies on top of Ulrich Drepper's series adding the
generic and x86-specific code for sys_indirect.
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 69a91bd..fd6781c 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -461,6 +461,25 @@ ppc_swapcontext:
b sys_swapcontext
/*
+ * long call_compat_syscall(struct indirect_registers32 *regs)
+ * This function assumes that regs-syscall_nr has already been validated.
+ */
+_GLOBAL(call_syscall)
+ lwz r0,0(r3)/* system call number */
+ lis r11,[EMAIL PROTECTED]
+ addir11,r11,[EMAIL PROTECTED]
+ slwir0,r0,2
+ lwzxr10,r11,r0
+ mtctr r10
+ lwz r4,8(r3)
+ lwz r5,12(r3)
+ lwz r6,16(r3)
+ lwz r7,20(r3)
+ lwz r8,24(r3)
+ lwz r3,4(r3)
+ bctr
+
+/*
* Top-level page fault handling.
* This is in assembler because if do_page_fault tells us that
* it is a bad kernel page fault, we want to save the non-volatile
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 148a354..516ee70 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -315,6 +315,43 @@ _GLOBAL(ret_from_fork)
b syscall_exit
/*
+ * long call_syscall(struct indirect_registers *regs)
+ * This function assumes that regs-syscall_nr has already been validated.
+ */
+_GLOBAL(call_syscall)
+ ld r11,[EMAIL PROTECTED](2)
+ ld r0,0(r3)/* system call number */
+ sldir0,r0,4
+ ldx r10,r11,r0
+ mtctr r10
+ ld r4,16(r3)
+ ld r5,24(r3)
+ ld r6,32(r3)
+ ld r7,40(r3)
+ ld r8,48(r3)
+ ld r3,8(r3)
+ bctr
+
+/*
+ * long call_compat_syscall(struct indirect_registers32 *regs)
+ * This function assumes that regs-syscall_nr has already been validated.
+ */
+_GLOBAL(call_compat_syscall)
+ ld r11,[EMAIL PROTECTED](2)
+ lwz r0,0(r3)/* system call number */
+ sldir0,r0,4
+ addir11,r11,8
+ ldx r10,r11,r0
+ mtctr r10
+ lwz r4,8(r3)
+ lwz r5,12(r3)
+ lwz r6,16(r3)
+ lwz r7,20(r3)
+ lwz r8,24(r3)
+ lwz r3,4(r3)
+ bctr
+
+/*
* This routine switches between two different tasks. The process
* state of one is saved on its kernel stack. Then the state
* of the other is restored from its kernel stack. The memory
diff --git a/arch/powerpc/kernel/sys_ppc32.c b/arch/powerpc/kernel/sys_ppc32.c
index 4a4f5c6..fcaf0b2 100644
--- a/arch/powerpc/kernel/sys_ppc32.c
+++ b/arch/powerpc/kernel/sys_ppc32.c
@@ -826,3 +826,37 @@ asmlinkage long compat_sys_sync_file_range2(int fd,
unsigned int flags,
return sys_sync_file_range(fd, offset, nbytes, flags);
}
+
+long compat_sys_indirect(struct indirect_registers32 __user *userregs,
+void __user *userparams, size_t paramslen,
+int flags)
+{
+ struct indirect_registers32 regs;
+ long result;
+
+ if (unlikely(flags != 0))
+ return -EINVAL;
+
+ if (copy_from_user(regs, userregs, sizeof(regs)))
+ return -EFAULT;
+
+ switch (regs.syscall_nr) {
+#define INDSYSCALL(name) __NR_##name
+#include linux/indirect.h
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ if (paramslen sizeof(union indirect_params))
+ return -EINVAL;
+
+ result = -EFAULT;
+ if (!copy_from_user(current-indirect_params, userparams, paramslen))
+ result = call_compat_syscall(regs);
+
+ memset(current-indirect_params, '\0', paramslen);
+
+ return result;
+}
diff --git a/include/asm-powerpc/indirect.h b/include/asm-powerpc/indirect.h
new file mode 100644
index 000..fcc6729
--- /dev/null
+++ b/include/asm-powerpc/indirect.h
@@ -0,0 +1,32 @@
+#ifndef _ASM_POWERPC_INDIRECT_H_
+#define _ASM_POWERPC_INDIRECT_H_
+/*
+ * Copyright 2007 Paul Mackerras [EMAIL PROTECTED], IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+struct indirect_registers {
+ unsigned long syscall_nr;
+ unsigned long
Re: [PATCH v7 3/9] add Freescale SerDes PHY support
On Oct 19, 2007, at 10:35 AM, Grant Likely wrote: On 10/19/07, Li Yang [EMAIL PROTECTED] wrote: The SerDes(serializer/deserializer) PHY block is a new SoC block used in Freescale chips to support multiple serial interfaces, such as PCI Express, SGMII, SATA. This looks like board setup behaviour. Shouldn't setting this up be the responsibility firmware? And failing that, I think it should be done directly by the platform setup function (in other words; make it a helper function and call it at board setup time). Besides, you want to provide guarantees that the board is setup correctly before the device driver that uses it gets probed. Cheers, g. Upon further review of all this I don't think this belongs in the kernel at all. This is one time setup and should be done in firmware. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] sys_indirect kernel implementation for PowerPC
On Wed, 21 Nov 2007 14:08:46 +1100 Paul Mackerras [EMAIL PROTECTED] wrote: +++ b/arch/powerpc/kernel/entry_32.S @@ -461,6 +461,25 @@ ppc_swapcontext: b sys_swapcontext /* + * long call_compat_syscall(struct indirect_registers32 *regs) ^ Presumably a copy and paste glitch. -- Cheers, Stephen Rothwell[EMAIL PROTECTED] http://www.canb.auug.org.au/~sfr/ pgpX9SY3gMUXQ.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] sys_indirect kernel implementation for PowerPC
On Wed, 21 Nov 2007 14:08:46 +1100 Paul Mackerras [EMAIL PROTECTED] wrote:
+#ifdef CONFIG_PPC64
Use CONFIG_COMPAT?
+struct indirect_registers32 {
+ unsigned int syscall_nr;
+ unsigned int args[6];
These could (should?) be compat_ulong_t
+++ b/include/asm-powerpc/systbl.h
@@ -313,3 +313,4 @@ COMPAT_SYS_SPU(timerfd)
SYSCALL_SPU(eventfd)
COMPAT_SYS_SPU(sync_file_range2)
COMPAT_SYS(fallocate)
+COMPAT_SYS(indirect)
Do the SPUs want this?
--
Cheers,
Stephen Rothwell[EMAIL PROTECTED]
http://www.canb.auug.org.au/~sfr/
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RE: [PATCH v7 3/9] add Freescale SerDes PHY support
-Original Message- From: Kumar Gala [mailto:[EMAIL PROTECTED] Sent: Wednesday, November 21, 2007 11:32 AM To: Li Yang Cc: Paul Mackerras; linuxppc-dev@ozlabs.org; Grant Likely Subject: Re: [PATCH v7 3/9] add Freescale SerDes PHY support On Oct 19, 2007, at 10:35 AM, Grant Likely wrote: On 10/19/07, Li Yang [EMAIL PROTECTED] wrote: The SerDes(serializer/deserializer) PHY block is a new SoC block used in Freescale chips to support multiple serial interfaces, such as PCI Express, SGMII, SATA. This looks like board setup behaviour. Shouldn't setting this up be the responsibility firmware? And failing that, I think it should be done directly by the platform setup function (in other words; make it a helper function and call it at board setup time). Besides, you want to provide guarantees that the board is setup correctly before the device driver that uses it gets probed. Cheers, g. Upon further review of all this I don't think this belongs in the kernel at all. This is one time setup and should be done in firmware. I'm ok for it to be taken care of in u-boot for now. However, if we later plan to add power management support to this block. We probably have to do it in kernel. - Leo ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: [PATCH v7 3/9] add Freescale SerDes PHY support
On Oct 19, 2007, at 10:35 AM, Grant Likely wrote: On 10/19/07, Li Yang [EMAIL PROTECTED] wrote: The SerDes(serializer/deserializer) PHY block is a new SoC block used in Freescale chips to support multiple serial interfaces, such as PCI Express, SGMII, SATA. This looks like board setup behaviour. Shouldn't setting this up be the responsibility firmware? And failing that, I think it should be done directly by the platform setup function (in other words; make it a helper function and call it at board setup time). Besides, you want to provide guarantees that the board is setup correctly before the device driver that uses it gets probed. Cheers, g. Upon further review of all this I don't think this belongs in the kernel at all. This is one time setup and should be done in firmware. The latest u-boot supports the serdes initialization for 837x. So, it can be dropped from kernel for now. Dave ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH v7 3/9] add Freescale SerDes PHY support
Upon further review of all this I don't think this belongs in the kernel at all. This is one time setup and should be done in firmware. I'm ok for it to be taken care of in u-boot for now. However, if we later plan to add power management support to this block. We probably have to do it in kernel. How does pwr mgmt come into play w/SerDes? - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH v7 3/9] add Freescale SerDes PHY support
On Nov 20, 2007, at 10:01 PM, Kumar Gala wrote: Upon further review of all this I don't think this belongs in the kernel at all. This is one time setup and should be done in firmware. I'm ok for it to be taken care of in u-boot for now. However, if we later plan to add power management support to this block. We probably have to do it in kernel. How does pwr mgmt come into play w/SerDes? Never mind, if we do add pwr mgmt it looks like all we need to know is what SerDes is associated with the device. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] sys_indirect kernel implementation for PowerPC
On Nov 20, 2007, at 9:08 PM, Paul Mackerras wrote: This implements sys_indirect for 32-bit and 64-bit powerpc machines, including a 32-bit compatibility implementation for 64-bit powerpc. I decided to use assembly language for call_syscall because on 64-bit powerpc the system call table has the addresses of the function text rather than pointers to function descriptors; hence the system call functions can't be called from C via the system call table. Admit it you were bored and wanted to write some PPC asm ;) - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 1/3] [POWERPC] Add docs for Freescale 83xx SATA device tree nodes
---
Documentation/powerpc/booting-without-of.txt | 23 +++
1 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt
b/Documentation/powerpc/booting-without-of.txt
index e9a3cb1..eb14dd5 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -2514,6 +2514,29 @@ platforms are moved over to use the
flattened-device-tree model.
Requred properties:
- current-speed : Baud rate of uartlite
+* Freescale 8xxx/3.0 Gb/s SATA nodes
+
+SATA nodes are defined to describe on-chip Serial ATA controllers.
+Each SATA port should have its own node.
+
+Required properties:
+- compatible: compatible list, contains 2 entries, first is
+fsl,sata-CHIP, where CHIP is the processor
+(mpc8315, mpc8379, etc.) and the second is
+fsl,sata-pq2pro
+- interrupts: interrupt mapping for SATA IRQ
+- interrupt-parent : optional, if needed for interrupt mapping
+- reg : registers mapping
+
+ Example:
+
+ [EMAIL PROTECTED] {
+ compatible = fsl,mpc8315-sata, fsl,sata-pq2pro;
+ reg = 19000 1000;
+ interrupts = 2d 8;
+ interrupt-parent = ipic ;
+};
+
More devices will be defined as this spec matures.
VII - Specifying interrupt information for devices
--
1.5.3.4
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[PATCH 2/3] [POWERPC] Add docs for Freescale RapidIO device tree node
---
Documentation/powerpc/booting-without-of.txt | 47 --
1 files changed, 44 insertions(+), 3 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt
b/Documentation/powerpc/booting-without-of.txt
index eb14dd5..3d959d6 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -2521,9 +2521,9 @@ platforms are moved over to use the flattened-device-tree
model.
Required properties:
- compatible: compatible list, contains 2 entries, first is
-fsl,sata-CHIP, where CHIP is the processor
+fsl,CHIP-sata, where CHIP is the processor
(mpc8315, mpc8379, etc.) and the second is
-fsl,sata-pq2pro
+fsl,pq2pro-sata
- interrupts: interrupt mapping for SATA IRQ
- interrupt-parent : optional, if needed for interrupt mapping
- reg : registers mapping
@@ -2531,12 +2531,53 @@ platforms are moved over to use the
flattened-device-tree model.
Example:
[EMAIL PROTECTED] {
- compatible = fsl,mpc8315-sata, fsl,sata-pq2pro;
+ compatible = fsl,mpc8315-sata, fsl,pq2pro-sata;
reg = 19000 1000;
interrupts = 2d 8;
interrupt-parent = ipic ;
};
+ * Frescale Serial RapidIO bus controller
+
+ RapidIO is a definition of a system interconnect. This node add
+ the support for RapidIO processor in kernel. The node name is
+ suggested to be 'rapidio'.
+
+ Required properties:
+
+- compatible: compatible list, contains 2 entries, first is
+fsl,CHIP-rapidio, where CHIP is the processor
+(mpc8572, mpc8641, etc.) and the second is
+fsl,delta-rapidio
+- interrupts : interrupts are expected in the following
+ order:
+ * Error/port write
+ * Outbound Doorbell
+ * Inbound Doorbell
+ * Outbound Msg Unit 1
+ * Inbound Msg Unit 1
+ * Outbound Msg Unit 2
+ * Inbound Msg Unit 2
+- interrupt-parent : optional, if needed for interrupt mapping
+- reg : registers mapping
+- #address-cells : Should always be 2
+- #size--cells : Should always be 2
+- ranges : Details processor physical addr to RapidIO address
+
+ Example:
+
+ [EMAIL PROTECTED] {
+ compatible = fsl,mpc8641-rapidio, fsl,delta-rapidio;
+ #address-cells = 2;
+ #size-cells = 2;
+ reg = c 2;
+ ranges = 0 0 c000 2000;
+ interrupt-parent = mpic;
+ /* err_irq bell_outb_irq bell_inb_irq msg1_tx_irq msg1_rx_irq
+ msg2_tx_irq msg2_rx_irq */
+ interrupts = 30 2 31 2 32 2 35 2 36 2 37 2 38 2;
+ };
+
More devices will be defined as this spec matures.
VII - Specifying interrupt information for devices
--
1.5.3.4
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[PATCH 3/3] [POWERPC] Add docs for Freescale DMA DMA channel device tree nodes
---
Documentation/powerpc/booting-without-of.txt | 113 ++
1 files changed, 113 insertions(+), 0 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt
b/Documentation/powerpc/booting-without-of.txt
index 3d959d6..161fb0d 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -2578,6 +2578,119 @@ platforms are moved over to use the
flattened-device-tree model.
interrupts = 30 2 31 2 32 2 35 2 36 2 37 2 38 2;
};
+ * Freescale 83xx DMA Controller
+
+Freescale PowerPC 83xx have on chip general purpose DMA controllers.
+
+Required properties:
+
+- compatible: compatible list, contains 2 entries, first is
+fsl,CHIP-dma, where CHIP is the processor
+(mpc8349, mpc8360, etc.) and the second is
+fsl,elo-dma
+- reg : registers mapping for DMA general status reg
+- ranges : Should be defined as specified in 1) to describe the
+ DMA controller channels.
+- interrupts: interrupt mapping for DMA IRQ
+- interrupt-parent : optional, if needed for interrupt mapping
+
+
+- DMA channel nodes:
+ - compatible: compatible list, contains 2 entries, first is
+fsl,CHIP-dma-channel, where CHIP is the
processor
+(mpc8349, mpc8350, etc.) and the second is
+fsl,elo-dma-channel
+ - reg : registers mapping for channel
+
+Optional properties:
+ - interrupts: interrupt mapping for DMA channel IRQ
+ (on 83xx this is expected to be identical to
+ the interrupts property of the parent node)
+ - interrupt-parent : optional, if needed for interrupt mapping
+
+ Example:
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = fsl,mpc8349-dma, fsl,elo-dma;
+ reg = 21300 4;
+ ranges = 0 21100 200;
+ interrupt-parent = ipic;
+ interrupts = 14 2;
+ [EMAIL PROTECTED] {
+ compatible = fsl,mpc8349-dma-channel,
fsl,elo-dma-channel;
+ reg = 0 80;
+ };
+ [EMAIL PROTECTED] {
+ compatible = fsl,mpc8349-dma-channel,
fsl,elo-dma-channel;
+ reg = 80 80;
+ };
+ [EMAIL PROTECTED] {
+ compatible = fsl,mpc8349-dma-channel,
fsl,elo-dma-channel;
+ reg = 100 80;
+ };
+ [EMAIL PROTECTED] {
+ compatible = fsl,mpc8349-dma-channel,
fsl,elo-dma-channel;
+ reg = 180 80;
+ };
+ };
+
+ * Freescale 85xx DMA Controller
+
+Freescale PowerPC 85xx have on chip general purpose DMA controllers.
+
+Required properties:
+
+- compatible: compatible list, contains 2 entries, first is
+fsl,CHIP-dma, where CHIP is the processor
+(mpc8540, mpc8540, etc.) and the second is
+fsl,eloplus-dma
+- reg : registers mapping for DMA general status reg
+- ranges : Should be defined as specified in 1) to describe the
+ DMA controller channels.
+
+- DMA channel nodes:
+ - compatible: compatible list, contains 2 entries, first is
+fsl,CHIP-dma-channel, where CHIP is the
processor
+(mpc8540, mpc8560, etc.) and the second is
+fsl,eloplus-dma-channel
+ - reg : registers mapping for channel
+ - interrupts: interrupt mapping for DMA channel IRQ
+ - interrupt-parent : optional, if needed for interrupt mapping
+
+ Example:
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = fsl,mpc8540-dma, fsl,eloplus-dma;
+ reg = 21300 4;
+ ranges = 0 21100 200;
+ [EMAIL PROTECTED] {
+ compatible = fsl,mpc8540-dma-channel,
fsl,eloplus-dma-channel;
+ reg = 0 80;
+ interrupt-parent = mpic;
+ interrupts = 14 2;
+ };
+ [EMAIL PROTECTED] {
+ compatible = fsl,mpc8540-dma-channel,
fsl,eloplus-dma-channel;
+ reg = 80 80;
+ interrupt-parent = mpic;
+ interrupts = 15 2;
+ };
+ [EMAIL PROTECTED] {
+ compatible
dtc: Flexible tree checking infrastructure
Here, at last, is a substantial start on revising dtc's infrastructure
for checking the tree; this is the rework I've been saying was
necessary practically since dtc was first release.
In the new model, we have a table of check structures, each with a
name, references to checking functions, and status variables. Each
check can (in principle) be individually switched off or on (as either
a warning or error). Checks have a list of prerequisites, so if
checks need to rely on results from earlier checks to make sense (or
even to avoid crashing) they just need to list the relevant other
checks there.
For now, only the structural checks and the fixups for phandle
references are converted to the new mechanism. The rather more
involved semantic checks (which is where this new mechanism will
really be useful) will have to be converted in future patches.
At present, there's no user interface for turning on/off the checks -
the -f option now forces output even if error level checks fail.
Again, future patches will be needed to add the fine-grained control,
but that should be quite straightforward with the infrastructure
implemented here.
Signed-off-by: David Gibson [EMAIL PROTECTED]
Index: dtc/checks.c
===
--- dtc.orig/checks.c 2007-11-21 12:27:13.0 +1100
+++ dtc/checks.c2007-11-21 16:28:08.0 +1100
@@ -20,104 +20,281 @@
#include dtc.h
-/*
- * Structural check functions
- */
+enum checklevel {
+ IGNORE = 0,
+ WARN = 1,
+ ERROR = 2,
+};
-#define ERRMSG(...) if (quiet 2) fprintf(stderr, ERROR: __VA_ARGS__)
-#define WARNMSG(...) if (quiet 1) fprintf(stderr, Warning: __VA_ARGS__)
+enum checkstatus {
+ UNCHECKED = 0,
+ PREREQ,
+ PASSED,
+ FAILED,
+};
-#define DO_ERR(...) do {ERRMSG(__VA_ARGS__); ok = 0; } while (0)
+struct check;
+
+typedef void (*tree_check_fn)(struct check *c, struct node *dt);
+typedef void (*node_check_fn)(struct check *c, struct node *dt, struct node
*node);
+typedef void (*prop_check_fn)(struct check *c, struct node *dt,
+ struct node *node, struct property *prop);
+
+struct check {
+ const char *name;
+ tree_check_fn tree_fn;
+ node_check_fn node_fn;
+ prop_check_fn prop_fn;
+ void *data;
+ enum checklevel level;
+ enum checkstatus status;
+ int inprogress;
+ int num_prereqs;
+ struct check **prereq;
+};
-static int check_names(struct node *tree)
+#define CHECK(nm, tfn, nfn, pfn, d, lvl, ...) \
+ static struct check *nm##_prereqs[] = { __VA_ARGS__ }; \
+ static struct check nm = { \
+ .name = #nm, \
+ .tree_fn = (tfn), \
+ .node_fn = (nfn), \
+ .prop_fn = (pfn), \
+ .data = (d), \
+ .level = (lvl), \
+ .status = UNCHECKED, \
+ .num_prereqs = ARRAY_SIZE(nm##_prereqs), \
+ .prereq = nm##_prereqs, \
+ };
+
+#define TREE_CHECK(nm, d, lvl, ...) \
+ CHECK(nm, check_##nm, NULL, NULL, d, lvl, __VA_ARGS__)
+#define NODE_CHECK(nm, d, lvl, ...) \
+ CHECK(nm, NULL, check_##nm, NULL, d, lvl, __VA_ARGS__)
+#define PROP_CHECK(nm, d, lvl, ...) \
+ CHECK(nm, NULL, NULL, check_##nm, d, lvl, __VA_ARGS__)
+#define BATCH_CHECK(nm, lvl, ...) \
+ CHECK(nm, NULL, NULL, NULL, NULL, lvl, __VA_ARGS__)
+
+#define CHECKMSG(c, fmt, ...) \
+ do { \
+ if (quiet (c)-level) \
+ ; /* Suppress message */ \
+ else if ((c)-level == ERROR) \
+ fprintf(stderr, ERROR (%s): fmt \n, \
+ (c)-name, __VA_ARGS__); \
+ else if ((c)-level == WARN) \
+ fprintf(stderr, Warning (%s): fmt \n, \
+ (c)-name, __VA_ARGS__); \
+ } while (0)
+
+#define FAIL(c, fmt, ...) \
+ do { \
+ (c)-status = FAILED; \
+ CHECKMSG((c), fmt, __VA_ARGS__); \
+ } while (0)
+
+static void check_nodes_props(struct check *c, struct node *dt, struct node
*node)
{
- struct node *child, *child2;
- struct property *prop, *prop2;
- int len = strlen(tree-name);
- int ok = 1;
+ struct node *child;
+ struct property *prop;
- if (len == 0 tree-parent)
- DO_ERR(Empty, non-root nodename at %s\n, tree-fullpath);
+ if (c-node_fn)
+ c-node_fn(c, dt, node);
- if (len MAX_NODENAME_LEN)
- WARNMSG(Overlength nodename at %s\n, tree-fullpath);
+ if (c-prop_fn)
+ for_each_property(node, prop)
+ c-prop_fn(c, dt, node, prop);
- for_each_property(tree, prop) {
- /* check for duplicates */
- /* FIXME: do this more efficiently */
- for (prop2 = prop-next; prop2; prop2 = prop2-next) {
-
[PATCH 0/8] ibm_newemac: Candidate patches for 2.6.25
Here are the patches I have pending for EMAC. With some non-released patches from Hugh Blemings, I get a taishan (440GX) booting now, in addition to Ebony (440GP) and various 405GP boards. This is 2.6.25 material except for patch #1 which has already been posted separately and is candidate for 2.6.24 (and possibly stable) ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 3/8] ibm_newemac: Add ET1011c PHY support
From: Stefan Roese [EMAIL PROTECTED]
This adds support for the Agere ET1011c PHY as found on the AMCC Taishan
board.
Signed-off-by: Stefan Roese [EMAIL PROTECTED]
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
drivers/net/ibm_newemac/phy.c | 37 +
1 file changed, 37 insertions(+)
Index: linux-work/drivers/net/ibm_newemac/phy.c
===
--- linux-work.orig/drivers/net/ibm_newemac/phy.c 2007-11-08
18:54:12.0 +1100
+++ linux-work/drivers/net/ibm_newemac/phy.c2007-11-08 18:54:13.0
+1100
@@ -327,6 +327,42 @@ static int m88e_init(struct mii_phy
return 0;
}
+static int et1011c_init(struct mii_phy *phy)
+{
+u16 reg_short;
+
+reg_short = (u16)(phy_read(phy,0x16));
+reg_short = ~(0x7);
+reg_short |= 0x6; /* RGMII Trace Delay*/
+phy_write(phy, 0x16, reg_short);
+
+reg_short = (u16)(phy_read(phy, 0x17));
+reg_short = ~(0x40);
+phy_write(phy, 0x17, reg_short);
+
+phy_write(phy,0x1c,0x74f0);
+return 0;
+}
+
+static struct mii_phy_ops et1011c_phy_ops = {
+.init = et1011c_init,
+.setup_aneg = genmii_setup_aneg,
+.setup_forced = genmii_setup_forced,
+.poll_link = genmii_poll_link,
+.read_link = genmii_read_link
+};
+
+static struct mii_phy_def et1011c_phy_def = {
+.phy_id = 0x0282f000,
+.phy_id_mask= 0x0f00,
+.name = ET1011C Gigabit Ethernet,
+.ops= et1011c_phy_ops
+};
+
+
+
+
+
static struct mii_phy_ops m88e_phy_ops = {
.init = m88e_init,
.setup_aneg = genmii_setup_aneg,
@@ -344,6 +380,7 @@ static struct mii_phy_def m88e_phy_d
};
static struct mii_phy_def *mii_phy_table[] = {
+ et1011c_phy_def,
cis8201_phy_def,
bcm5248_phy_def,
m88e_phy_def,
___
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[PATCH 6/14] powerpc: Add xmon function to dump 44x TLB
This adds a function to xmon to dump the content of the 44x processor
TLB with a little bit of decoding (but not much).
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
Did that to track down some machine checks I was having while working
on PCI support due to 32/64 bits resource screwage.
Useful to see where a given MMIO virtual address really maps to.
arch/powerpc/xmon/xmon.c | 38 ++
1 file changed, 38 insertions(+)
Index: linux-work/arch/powerpc/xmon/xmon.c
===
--- linux-work.orig/arch/powerpc/xmon/xmon.c2007-11-20 15:02:43.0
+1100
+++ linux-work/arch/powerpc/xmon/xmon.c 2007-11-20 17:04:48.0 +1100
@@ -153,6 +153,10 @@ static const char *getvecname(unsigned l
static int do_spu_cmd(void);
+#ifdef CONFIG_44x
+static void dump_tlb_44x(void);
+#endif
+
int xmon_no_auto_backtrace;
extern void xmon_enter(void);
@@ -231,6 +235,9 @@ Commands:\n\
#ifdef CONFIG_PPC_STD_MMU_32
u dump segment registers\n
#endif
+#ifdef CONFIG_44x
+ u dump TLB\n
+#endif
? help\n
zr reboot\n\
zh halt\n
@@ -856,6 +863,11 @@ cmds(struct pt_regs *excp)
dump_segments();
break;
#endif
+#ifdef CONFIG_44x
+ case 'u':
+ dump_tlb_44x();
+ break;
+#endif
default:
printf(Unrecognized command: );
do {
@@ -2581,6 +2593,32 @@ void dump_segments(void)
}
#endif
+#ifdef CONFIG_44x
+static void dump_tlb_44x(void)
+{
+ int i;
+
+ for (i = 0; i PPC44x_TLB_SIZE; i++) {
+ unsigned long w0,w1,w2;
+ asm volatile(tlbre %0,%1,0 : =r (w0) : r (i));
+ asm volatile(tlbre %0,%1,1 : =r (w1) : r (i));
+ asm volatile(tlbre %0,%1,2 : =r (w2) : r (i));
+ printf([%02x] %08x %08x %08x , i, w0, w1, w2);
+ if (w0 PPC44x_TLB_VALID) {
+ printf(V %08x - %01x%08x %c%c%c%c%c,
+ w0 PPC44x_TLB_EPN_MASK,
+ w1 PPC44x_TLB_ERPN_MASK,
+ w1 PPC44x_TLB_RPN_MASK,
+ (w2 PPC44x_TLB_W) ? 'W' : 'w',
+ (w2 PPC44x_TLB_I) ? 'I' : 'i',
+ (w2 PPC44x_TLB_M) ? 'M' : 'm',
+ (w2 PPC44x_TLB_G) ? 'G' : 'g',
+ (w2 PPC44x_TLB_E) ? 'E' : 'e');
+ }
+ printf(\n);
+ }
+}
+#endif /* CONFIG_44x */
void xmon_init(int enable)
{
#ifdef CONFIG_PPC_ISERIES
___
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[PATCH 8/14] powerpc: Fix kmalloc alignmenent on non-coherent DMA
On platforms doing non-coherent DMA (4xx, 8xx, ...), it's important that kmalloc minimum alignment is set to the cache line size, to avoid sharing cache lines between different objects. Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED] --- include/asm-powerpc/page_32.h |4 1 file changed, 4 insertions(+) Index: linux-work/include/asm-powerpc/page_32.h === --- linux-work.orig/include/asm-powerpc/page_32.h 2007-11-19 15:01:08.0 +1100 +++ linux-work/include/asm-powerpc/page_32.h2007-11-19 15:01:17.0 +1100 @@ -6,6 +6,10 @@ #define PPC_MEMSTART 0 +#ifdef CONFIG_NOT_COHERENT_CACHE +#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES +#endif + #ifndef __ASSEMBLY__ /* * The basic type of a PTE - 64 bits for those CPUs with 32 bit ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 9/14] powerpc: 4xx PLB to PCI-X support
This adds base support code for the 4xx PCI-X bridge. It also provides
placeholders for the PCI and PCI-E version but they aren't supported
with this patch.
The bridges are configured based on device-tree properties.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
Tested on 440GP only so far.
arch/powerpc/sysdev/Makefile |4
arch/powerpc/sysdev/ppc4xx_pci.c | 313 +++
arch/powerpc/sysdev/ppc4xx_pci.h | 106 +
include/asm-powerpc/pci-bridge.h |3
4 files changed, 426 insertions(+)
Index: linux-work/arch/powerpc/sysdev/Makefile
===
--- linux-work.orig/arch/powerpc/sysdev/Makefile2007-11-20
17:04:07.0 +1100
+++ linux-work/arch/powerpc/sysdev/Makefile 2007-11-20 17:04:52.0
+1100
@@ -29,6 +29,10 @@ obj-$(CONFIG_4xx)+= uic.o
obj-$(CONFIG_XILINX_VIRTEX)+= xilinx_intc.o
endif
+ifeq ($(CONFIG_PCI),y)
+obj-$(CONFIG_4xx) += ppc4xx_pci.o
+endif
+
# Temporary hack until we have migrated to asm-powerpc
ifeq ($(ARCH),powerpc)
obj-$(CONFIG_CPM) += cpm_common.o
Index: linux-work/arch/powerpc/sysdev/ppc4xx_pci.c
===
--- /dev/null 1970-01-01 00:00:00.0 +
+++ linux-work/arch/powerpc/sysdev/ppc4xx_pci.c 2007-11-21 11:41:58.0
+1100
@@ -0,0 +1,313 @@
+/*
+ * PCI / PCI-X / PCI-Express support for 4xx parts
+ *
+ * Copyright 2007 Ben. Herrenschmidt [EMAIL PROTECTED], IBM Corp.
+ *
+ */
+
+#include linux/kernel.h
+#include linux/pci.h
+#include linux/init.h
+#include linux/bootmem.h
+#include linux/of.h
+
+#include asm/io.h
+#include asm/pci-bridge.h
+#include asm/machdep.h
+
+#include ppc4xx_pci.h
+
+static int dma_offset_set;
+
+/* Move that to a useable header */
+extern unsigned long total_memory;
+
+/* Defined in drivers/pci/pci.c but not exposed by a header */
+extern u8 pci_cache_line_size;
+
+static int __init ppc4xx_parse_dma_window(struct pci_controller *hose,
+ void __iomem *reg,
+ struct resource *res)
+{
+ struct device_node *np = hose-arch_data;
+ u64 size;
+ const u32 *dmaw;
+
+ /* Default */
+ res-start = 0;
+ res-end = 0x8000;
+ res-flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
+
+ /* Get dma-window property */
+ dmaw = of_get_property(np, dma-window, NULL);
+ if (dmaw == NULL)
+ goto out;
+
+ /* Check if it makes sense (ie. it encodes memory */
+ if ((dmaw[0] 0x0300) != 0x0200) {
+ printk(KERN_ERR %s: non-memory dma-window\n,
+ np-full_name);
+ return -ENXIO;
+ }
+
+ /* Check if not prefetchable */
+ if (!(dmaw[0] 0x4000))
+ res-flags = ~IORESOURCE_PREFETCH;
+
+ /* Read the DMA window. We should sanity check that it's
+* not overlapping with the outbound ranges.
+*/
+ res-start = of_read_number(dmaw + 1, 2);
+ size = of_read_number(dmaw + 3, 2);
+ res-end = res-start + size - 1;
+
+ /* We only support one global DMA offset */
+ if (dma_offset_set pci_dram_offset != res-start) {
+ printk(KERN_ERR %s: dma-window(s) mismatch\n,
+ np-full_name);
+ return -ENXIO;
+ }
+
+ /* Check that we can fit all of memory as we don't support
+* DMA bounce buffers
+*/
+ if (size total_memory) {
+ printk(KERN_ERR %s: dma-window too small\n,
+ np-full_name);
+ return -ENXIO;
+ }
+
+ /* Check we are a power of 2 size and that base is a multiple of size*/
+ if (!is_power_of_2(size) ||
+ (res-start (size - 1)) != 0) {
+ printk(KERN_ERR %s: dma-window unaligned\n,
+ np-full_name);
+ return -ENXIO;
+ }
+
+ /* Check that we are fully contained within 32 bits space */
+ if (res-end 0x) {
+ printk(KERN_ERR %s: dma-window outside of 32 bits space\n,
+ np-full_name);
+ return -ENXIO;
+ }
+ out:
+ dma_offset_set = 1;
+ pci_dram_offset = res-start;
+
+ printk(KERN_INFO 4xx PCI DMA offset set to 0x%08lx\n,
+ pci_dram_offset);
+ return 0;
+}
+
+/*
+ * 4xx PCI 2.x part
+ */
+static void __init ppc4xx_probe_pci_bridge(struct device_node *np)
+{
+ /* NYI */
+}
+
+/*
+ * 4xx PCI-X part
+ */
+
+static void __init ppc4xx_configure_pcix_POMs(struct pci_controller *hose,
+ void __iomem *reg)
+{
+ struct device_node *np = hose-arch_data;
+ u32 lah, lal, pciah, pcial, sa;
+ int i, j;
+
+ /* Setup outbound memory windows */
+ for(i = j =
[PATCH 10/14] powerpc: 4xx PLB to PCI 2.x support
This adds to the previous patch the support for the 4xx PCI 2.x
bridges.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
This version implement the basic support for the 405GP bridge,
I haven't yet looked at differences that other implementations
may have for the PCI 2.x part.
arch/powerpc/sysdev/ppc4xx_pci.c | 183 ++-
arch/powerpc/sysdev/ppc4xx_pci.h | 19
2 files changed, 201 insertions(+), 1 deletion(-)
Index: linux-work/arch/powerpc/sysdev/ppc4xx_pci.c
===
--- linux-work.orig/arch/powerpc/sysdev/ppc4xx_pci.c2007-11-21
12:50:48.0 +1100
+++ linux-work/arch/powerpc/sysdev/ppc4xx_pci.c 2007-11-21 15:35:37.0
+1100
@@ -25,6 +25,38 @@ extern unsigned long total_memory;
/* Defined in drivers/pci/pci.c but not exposed by a header */
extern u8 pci_cache_line_size;
+static void fixup_ppc4xx_pci_bridge(struct pci_dev* dev)
+{
+ struct pci_controller *hose;
+ struct device_node *np;
+ int i;
+
+ if (dev-devfn != 0 || dev-bus-self != NULL)
+ return;
+
+ hose = pci_bus_to_host(dev-bus);
+ if (hose == NULL)
+ return;
+ np = hose-arch_data;
+
+ if (!of_device_is_compatible(np, ibm,plb-pciex)
+ !of_device_is_compatible(np, ibm,plb-pcix)
+ !of_device_is_compatible(np, ibm,plb-pci))
+ return;
+
+ /* Hide the PCI host BARs from the kernel as their content doesn't
+* fit well in the resource management
+*/
+ for (i = 0; i DEVICE_COUNT_RESOURCE; i++) {
+ dev-resource[i].start = dev-resource[i].end = 0;
+ dev-resource[i].flags = 0;
+ }
+
+ printk(KERN_INFO PCI: Hiding 4xx host bridge resources %s\n,
+ pci_name(dev));
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, fixup_ppc4xx_pci_bridge);
+
static int __init ppc4xx_parse_dma_window(struct pci_controller *hose,
void __iomem *reg,
struct resource *res)
@@ -103,9 +135,158 @@ static int __init ppc4xx_parse_dma_windo
/*
* 4xx PCI 2.x part
*/
+
+static void __init ppc4xx_configure_pci_PMMs(struct pci_controller *hose,
+void __iomem *reg)
+{
+ struct device_node *np = hose-arch_data;
+ u32 la, ma, pcila, pciha;
+ int i, j;
+
+ /* Setup outbound memory windows */
+ for(i = j = 0; i 3; i++) {
+ struct resource *res = hose-mem_resources[i];
+
+ /* we only care about memory windows */
+ if (!(res-flags IORESOURCE_MEM))
+ continue;
+ if (j 2) {
+ printk(KERN_WARNING %s: Too many ranges\n,
+ np-full_name);
+ break;
+ }
+
+ /* Calculate register values */
+ la = res-start;
+#ifdef CONFIG_RESOURCES_64BIT
+ pciha = (res-start - hose-pci_mem_offset) 32;
+ pcila = (res-start - hose-pci_mem_offset) 0xu;
+#else
+ pciha = 0;
+ pcila = res-start - hose-pci_mem_offset;
+#endif
+
+ ma = res-end + 1 - res-start;
+ if (!is_power_of_2(ma) || ma 0x1000 || ma 0xu) {
+ printk(KERN_WARNING %s: Resource out of range\n,
+ np-full_name);
+ continue;
+ }
+ ma = (0xu ilog2(ma)) | 0x1;
+ if (res-flags IORESOURCE_PREFETCH)
+ ma |= 0x2;
+
+ /* Program register values */
+ writel(la, reg + PCIL0_PMM0LA + (0x10 * j));
+ writel(pcila, reg + PCIL0_PMM0PCILA + (0x10 * j));
+ writel(pciha, reg + PCIL0_PMM0PCIHA + (0x10 * j));
+ writel(ma, reg + PCIL0_PMM0MA + (0x10 * j));
+ j++;
+ }
+}
+
+static void __init ppc4xx_configure_pci_PTMs(struct pci_controller *hose,
+void __iomem *reg,
+const struct resource *res)
+{
+ resource_size_t size = res-end - res-start + 1;
+ u32 sa;
+
+ /* Calculate window size */
+ sa = (0xu ilog2(size)) | 1;
+ sa |= 0x1;
+
+ /* RAM is always at 0 local for now */
+ writel(0, reg + PCIL0_PTM1LA);
+ writel(sa, reg + PCIL0_PTM1MS);
+
+ /* Map on PCI side */
+ early_write_config_dword(hose, hose-first_busno, 0,
+PCI_BASE_ADDRESS_1, res-start);
+ early_write_config_dword(hose, hose-first_busno, 0,
+PCI_BASE_ADDRESS_2, 0x);
+ early_write_config_word(hose, hose-first_busno, 0,
+ PCI_COMMAND, 0x0006);
+}
[PATCH 11/14] powerpc: PCI support for 4xx Ebony board
This wires up the 4xx PCI support device tree bits for
440GP based Ebony platform.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/ebony.dts| 41 -
arch/powerpc/platforms/44x/ebony.c |7 ++
2 files changed, 43 insertions(+), 5 deletions(-)
Index: linux-work/arch/powerpc/boot/dts/ebony.dts
===
--- linux-work.orig/arch/powerpc/boot/dts/ebony.dts 2007-11-21
16:19:04.0 +1100
+++ linux-work/arch/powerpc/boot/dts/ebony.dts 2007-11-21 16:21:40.0
+1100
@@ -284,12 +284,43 @@
};
- PCIX0: [EMAIL PROTECTED] {
+ PCIX0: [EMAIL PROTECTED] {
device_type = pci;
- /* FIXME */
- reg = 2 0ec0 8
- 2 0ec8 f0
- 2 0ec80100 fc;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ compatible = ibm,plb440gp-pcix, ibm,plb-pcix;
+ primary;
+ reg = 2 0ec0 8 /* Config space access */
+ 0 0 0/* no IACK cycles */
+ 2 0ed0 4 /* Special cycles */
+ 2 0ec8 f0/* Internal registers */
+ 2 0ec80100 fc; /* Internal messaging registers
*/
+
+ /* Outbound ranges, one memory and one IO,
+* later cannot be changed
+*/
+ ranges = 0200 0 8000 0003 8000 0
8000
+ 0100 0 0002 0800 0
0001;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-window = 4200 0 0 0 8000;
+
+ /* Ebony has all 4 IRQ pins tied together per slot */
+ interrupt-map-mask = f800 0 0 0;
+ interrupt-map =
+ /* IDSEL 1 */
+ 0800 0 0 0 UIC0 17 8
+
+ /* IDSEL 2 */
+ 1000 0 0 0 UIC0 18 8
+
+ /* IDSEL 3 */
+ 1800 0 0 0 UIC0 19 8
+
+ /* IDSEL 4 */
+ 2000 0 0 0 UIC0 1a 8
+ ;
};
};
Index: linux-work/arch/powerpc/platforms/44x/ebony.c
===
--- linux-work.orig/arch/powerpc/platforms/44x/ebony.c 2007-11-21
16:19:04.0 +1100
+++ linux-work/arch/powerpc/platforms/44x/ebony.c 2007-11-21
16:21:40.0 +1100
@@ -23,6 +23,7 @@
#include asm/time.h
#include asm/uic.h
#include asm/of_platform.h
+#include asm/pci-bridge.h
#include 44x.h
@@ -44,6 +45,11 @@ static int __init ebony_device_probe(voi
}
device_initcall(ebony_device_probe);
+static void __init ebony_setup_arch(void)
+{
+ ppc4xx_pci_find_bridges();
+}
+
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
@@ -60,6 +66,7 @@ static int __init ebony_probe(void)
define_machine(ebony) {
.name = Ebony,
.probe = ebony_probe,
+ .setup_arch = ebony_setup_arch,
.progress = udbg_progress,
.init_IRQ = uic_init_tree,
.get_irq= uic_get_irq,
___
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Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 13/14] powerpc: EP405 boards support for arch/powerpc
Brings EP405 support to arch/powerpc. The IRQ routing for the CPLD
comes from a device-tree property, PCI is working to the point where
I can see the video card, USB device, and south bridge.
This should work with both EP405 and EP405PC.
I've not totally figured out how IRQs are wired on this hardware
though, thus at this stage, expect only USB interrupts working,
pretty much the same as what arch/ppc did.
Also, the flash, nvram, rtc and temp control still have to be wired.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
Note about IRQ routing: The doc is very obscure in that area.
I _think_ the SB interrupt on the CPLD is actually the Windond's
8259 output and the NB interrupt is the PCI_A...PCI_D mux in
there (which can be implemented as a cascaded controller) but
I haven't sorted that out yet. If anybody from Embedded Planet
is around, I could use some advice there.
If my deductions are correct, then we would need to wire up the
8259 driver to SB, which should be trivial provided I stick the
windbond bridge in the device-tree, or at least part of it,
and probably implement a cascaded controller for the PCI IRQ
A...D mux thingy, which should also be trivial.
Note also that it tends to lockup during the transition from
the boot wrapper to the kernel, before udbg is started. I didn't
have a RiscWatch at hand so I haven't yet been able to track that
down. It's random though, quite weird. Maybe some stale TLB entries
or cache content that isn't cleared properly...
arch/powerpc/boot/4xx.c | 55 +-
arch/powerpc/boot/4xx.h |1
arch/powerpc/boot/Makefile |3
arch/powerpc/boot/dts/ep405.dts | 221
arch/powerpc/boot/ep405.c| 74 ++
arch/powerpc/boot/treeboot-walnut.c | 49 -
arch/powerpc/boot/wrapper|2
arch/powerpc/configs/ep405_defconfig | 951 +++
arch/powerpc/platforms/40x/Kconfig | 21
arch/powerpc/platforms/40x/Makefile |1
arch/powerpc/platforms/40x/ep405.c | 127
11 files changed, 1439 insertions(+), 66 deletions(-)
Index: linux-work/arch/powerpc/boot/Makefile
===
--- linux-work.orig/arch/powerpc/boot/Makefile 2007-11-21 16:19:01.0
+1100
+++ linux-work/arch/powerpc/boot/Makefile 2007-11-21 16:23:03.0
+1100
@@ -56,7 +56,7 @@ src-plat := of.c cuboot-52xx.c cuboot-83
cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c
\
- fixed-head.S ep88xc.c cuboot-hpc2.c
+ fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -150,6 +150,7 @@ image-$(CONFIG_DEFAULT_UIMAGE) += uImag
ifneq ($(CONFIG_DEVICE_TREE),)
image-$(CONFIG_PPC_8xx)+= cuImage.8xx
image-$(CONFIG_PPC_EP88XC) += zImage.ep88xc
+image-$(CONFIG_EP405) += zImage.ep405
image-$(CONFIG_8260) += cuImage.pq2
image-$(CONFIG_PPC_MPC52xx)+= cuImage.52xx
image-$(CONFIG_PPC_83xx) += cuImage.83xx
Index: linux-work/arch/powerpc/boot/ep405.c
===
--- /dev/null 1970-01-01 00:00:00.0 +
+++ linux-work/arch/powerpc/boot/ep405.c2007-11-21 16:23:03.0
+1100
@@ -0,0 +1,74 @@
+/*
+ * Embedded Planet EP405 with PlanetCore firmware
+ *
+ * (c) Benjamin Herrenschmidt [EMAIL PROTECTED], IBM Corp,\
+ *
+ * Based on ep88xc.c by
+ *
+ * Scott Wood [EMAIL PROTECTED]
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include ops.h
+#include stdio.h
+#include planetcore.h
+#include dcr.h
+#include 4xx.h
+#include io.h
+
+static char *table;
+static u64 mem_size;
+
+static void platform_fixups(void)
+{
+ u64 val;
+ void *nvrtc;
+
+ dt_fixup_memory(0, mem_size);
+ planetcore_set_mac_addrs(table);
+
+ if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, val)) {
+ printf(No PlanetCore crystal frequency key.\r\n);
+ return;
+ }
+ ibm405gp_fixup_clocks(val, 0xa8c000);
+ ibm4xx_quiesce_eth((u32 *)0xef600800, NULL);
+ ibm4xx_fixup_ebc_ranges(/plb/ebc);
+
+ if (!planetcore_get_decimal(table, PLANETCORE_KEY_KB_NVRAM, val)) {
+ printf(No PlanetCore NVRAM size key.\r\n);
+ return;
+ }
+ nvrtc = finddevice(/plb/ebc/[EMAIL PROTECTED],20);
+ if (nvrtc != NULL) {
+ u32 reg[3] = { 4, 0x20, 0};
+
[PATCH 14/14] powerpc: Add PCI to Walnut platform
This wires up the 4xx PCI support device-tree bits for the
405GP based Walnut platform.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
This one is untested, haven't had time to dig my walnut and put it
back into working condition. Josh, can you verify that IRQs are
working (routing is correct ?) Thanks !
arch/powerpc/boot/dts/walnut.dts| 39
arch/powerpc/platforms/40x/walnut.c |7 ++
2 files changed, 46 insertions(+)
Index: linux-work/arch/powerpc/boot/dts/walnut.dts
===
--- linux-work.orig/arch/powerpc/boot/dts/walnut.dts2007-11-21
16:24:27.0 +1100
+++ linux-work/arch/powerpc/boot/dts/walnut.dts 2007-11-21 16:26:25.0
+1100
@@ -190,6 +190,45 @@
virtual-reg = f035;
};
};
+
+ PCI0: [EMAIL PROTECTED] {
+ device_type = pci;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ compatible = ibm,plb405gp-pci, ibm,plb-pci;
+ primary;
+ reg = eec0 8 /* Config space access */
+ eed8 4 /* IACK */
+ eed8 4 /* Special cycle */
+ ef48 40;/* Internal registers */
+
+ /* Outbound ranges, one memory and one IO,
+* later cannot be changed. Chip supports a second
+* IO range but we don't use it for now
+*/
+ ranges = 0200 0 8000 8000 0 2000
+ 0100 0 e800 0 0001;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-window = 4200 0 0 0 8000;
+
+ /* Walnut has all 4 IRQ pins tied together per slot */
+ interrupt-map-mask = f800 0 0 0;
+ interrupt-map =
+ /* IDSEL 1 */
+ 0800 0 0 0 UIC0 1c 8
+
+ /* IDSEL 2 */
+ 1000 0 0 0 UIC0 1d 8
+
+ /* IDSEL 3 */
+ 1800 0 0 0 UIC0 1e 8
+
+ /* IDSEL 4 */
+ 2000 0 0 0 UIC0 1f 8
+ ;
+ };
};
chosen {
Index: linux-work/arch/powerpc/platforms/40x/walnut.c
===
--- linux-work.orig/arch/powerpc/platforms/40x/walnut.c 2007-11-21
16:23:28.0 +1100
+++ linux-work/arch/powerpc/platforms/40x/walnut.c 2007-11-21
16:24:01.0 +1100
@@ -43,6 +43,12 @@ static int __init walnut_device_probe(vo
}
device_initcall(walnut_device_probe);
+static void __init walnut_setup_arch(void)
+{
+ /* Create PCI bridges */
+ ppc4xx_pci_find_bridges();
+}
+
static int __init walnut_probe(void)
{
unsigned long root = of_get_flat_dt_root();
@@ -56,6 +62,7 @@ static int __init walnut_probe(void)
define_machine(walnut) {
.name = Walnut,
.probe = walnut_probe,
+ .setup_arch = walnut_setup_arch,
.progress = udbg_progress,
.init_IRQ = uic_init_tree,
.get_irq= uic_get_irq,
___
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[RFC/PATCH 0/14] powerpc: 4xx PCI and PCI-X support
Here's a set of patches that bring PCI and PCI-X support for 4xx (PCIe still missing) in arch/powerpc. This is for review before I ask paulus to pull that into his for 2.6.25 tree. Some of the patches still need a bit more testing vs. regressions on other platforms such as the 64 bits resource fixup one. It also adds some support for the ep405 boards while at it (I had one around :-) PCI is hooked up on ebony, walnut and ep405 at this stage. There are some issues with the SCSI stack vs. non-coherent DMA that I'm working on fixing separately, and there's a problem I noticed with the e1000 driver vs. 64 bits resources on 32 bits architectures for which I also have a patch that I posted separately. Appart from that, I got it working fine with a USB2 card in an ebony and 2 USB storage devices. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[RFC/PATCH 2/14] powerpc: Merge pci_process_bridge_OF_ranges()
This patch merges the 32 and 64 bits implementations of
pci_process_bridge_OF_ranges(). The new function is cleaner than both
the old ones supports 64 bits ranges on ppc32 which is necessary for
the 4xx port.
It also adds some better (hopefully) output to the kernel log which
should help disagnose problems and makes better use of existing OF
parsing helpers (avoiding a few bugs of both implementations along
the way).
There are still a few unfortunate ifdef's but there is no way around
these for now at least not until some other bits of the PCI code are
made common.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
Tested on a few pSeries, PowerMac G5, and a 32 bits PowerMacs and
a BriQ. Please let me know if it misbehaves anywhere else.
arch/powerpc/kernel/pci-common.c | 176 +++
arch/powerpc/kernel/pci_32.c | 114 -
arch/powerpc/kernel/pci_64.c | 93
include/asm-powerpc/pci-bridge.h |1
4 files changed, 177 insertions(+), 207 deletions(-)
Index: linux-work/arch/powerpc/kernel/pci-common.c
===
--- linux-work.orig/arch/powerpc/kernel/pci-common.c2007-11-13
14:15:43.0 +1100
+++ linux-work/arch/powerpc/kernel/pci-common.c 2007-11-13 16:04:06.0
+1100
@@ -479,3 +479,179 @@ void pci_resource_to_user(const struct p
*start = rsrc-start - offset;
*end = rsrc-end - offset;
}
+
+/**
+ * pci_process_bridge_OF_ranges - Parse PCI bridge resources from device tree
+ * @hose: newly allocated pci_controller to be setup
+ * @dev: device node of the host bridge
+ * @primary: set if primary bus (32 bits only, soon to be deprecated)
+ *
+ * This function will parse the ranges property of a PCI host bridge device
+ * node and setup the resource mapping of a pci controller based on its
+ * content.
+ *
+ * Life would be boring if it wasn't for a few issues that we have to deal
+ * with here:
+ *
+ * - We can only cope with one IO space range and up to 3 Memory space
+ * ranges. However, some machines (thanks Apple !) tend to split their
+ * space into lots of small contiguous ranges. So we have to coalesce.
+ *
+ * - We can only cope with all memory ranges having the same offset
+ * between CPU addresses and PCI addresses. Unfortunately, some bridges
+ * are setup for a large 1:1 mapping along with a small window which
+ * maps PCI address 0 to some arbitrary high address of the CPU space in
+ * order to give access to the ISA memory hole.
+ * The way out of here that I've chosen for now is to always set the
+ * offset based on the first resource found, then override it if we
+ * have a different offset and the previous was set by an ISA hole.
+ *
+ * - Some busses have IO space not starting at 0, which causes trouble with
+ * the way we do our IO resource renumbering. The code somewhat deals with
+ * it for 64 bits but I would expect problems on 32 bits.
+ *
+ * - Some 32 bits platforms such as 4xx can have physical space larger than
+ * 32 bits so we need to use 64 bits values for the parsing
+ */
+void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose,
+ struct device_node *dev,
+ int primary)
+{
+ const u32 *ranges;
+ int rlen;
+ int pna = of_n_addr_cells(dev);
+ int np = pna + 5;
+ int memno = 0, isa_hole = -1;
+ u32 pci_space;
+ unsigned long long pci_addr, cpu_addr, pci_next, cpu_next, size;
+ unsigned long long isa_mb = 0;
+ struct resource *res;
+
+ printk(KERN_INFO PCI host bridge %s %s ranges:\n,
+ dev-full_name, primary ? (primary) : );
+
+ /* Get ranges property */
+ ranges = of_get_property(dev, ranges, rlen);
+ if (ranges == NULL)
+ return;
+
+ /* Parse it */
+ while ((rlen -= np * 4) = 0) {
+ /* Read next ranges element */
+ pci_space = ranges[0];
+ pci_addr = of_read_number(ranges + 1, 2);
+ cpu_addr = of_translate_address(dev, ranges + 3);
+ size = of_read_number(ranges + pna + 3, 2);
+ ranges += np;
+ if (cpu_addr == OF_BAD_ADDR || size == 0)
+ continue;
+
+ /* Now consume following elements while they are contiguous */
+ for (;rlen = np * sizeof(u32); ranges += np, rlen -= np * 4) {
+ if (ranges[0] != pci_space)
+ break;
+ pci_next = of_read_number(ranges + 1, 2);
+ cpu_next = of_translate_address(dev, ranges + 3);
+ if (pci_next != pci_addr + size ||
+ cpu_next != cpu_addr + size)
+ break;
+
[RFC/PATCH 5/14] powerpc: Fix 440/440A machine check handling
This removes CONFIG_440A which was a problem for multiplatform
kernels and instead fixes up the IVOR at runtime from a setup_cpu
function. The A version of the machine check also tweaks the
regs-trap value to differenciate the 2 versions at the C level.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/kernel/cpu_setup_44x.S |4 +-
arch/powerpc/kernel/cputable.c |5 +++
arch/powerpc/kernel/head_44x.S | 14 ++--
arch/powerpc/kernel/head_booke.h|2 -
arch/powerpc/kernel/traps.c | 58 +---
arch/powerpc/platforms/44x/Kconfig |5 ---
include/asm-powerpc/ptrace.h|3 +
include/asm-powerpc/reg_booke.h |3 -
8 files changed, 70 insertions(+), 24 deletions(-)
Index: linux-work/arch/powerpc/kernel/cpu_setup_44x.S
===
--- linux-work.orig/arch/powerpc/kernel/cpu_setup_44x.S 2007-11-19
16:38:11.0 +1100
+++ linux-work/arch/powerpc/kernel/cpu_setup_44x.S 2007-11-19
16:58:25.0 +1100
@@ -23,11 +23,13 @@ _GLOBAL(__setup_cpu_440epx)
mflrr4
bl __init_fpu_44x
bl __plb_disable_wrp
+ bl __fixup_440A_mcheck
mtlrr4
blr
_GLOBAL(__setup_cpu_440grx)
b __plb_disable_wrp
-
+_GLOBAL(__setup_cpu_440gx)
+ b __fixup_440A_mcheck
/* enable APU between CPU and FPU */
_GLOBAL(__init_fpu_44x)
Index: linux-work/arch/powerpc/kernel/cputable.c
===
--- linux-work.orig/arch/powerpc/kernel/cputable.c 2007-11-19
16:36:53.0 +1100
+++ linux-work/arch/powerpc/kernel/cputable.c 2007-11-19 16:37:31.0
+1100
@@ -33,6 +33,7 @@ EXPORT_SYMBOL(cur_cpu_spec);
#ifdef CONFIG_PPC32
extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
@@ -1193,6 +1194,7 @@ static struct cpu_spec __initdata cpu_sp
.cpu_user_features = COMMON_USER_BOOKE,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .cpu_setup = __setup_cpu_440gx,
.platform = ppc440,
},
{ /* 440GX Rev. B */
@@ -1203,6 +1205,7 @@ static struct cpu_spec __initdata cpu_sp
.cpu_user_features = COMMON_USER_BOOKE,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .cpu_setup = __setup_cpu_440gx,
.platform = ppc440,
},
{ /* 440GX Rev. C */
@@ -1213,6 +1216,7 @@ static struct cpu_spec __initdata cpu_sp
.cpu_user_features = COMMON_USER_BOOKE,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .cpu_setup = __setup_cpu_440gx,
.platform = ppc440,
},
{ /* 440GX Rev. F */
@@ -1223,6 +1227,7 @@ static struct cpu_spec __initdata cpu_sp
.cpu_user_features = COMMON_USER_BOOKE,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .cpu_setup = __setup_cpu_440gx,
.platform = ppc440,
},
{ /* 440SP Rev. A */
Index: linux-work/arch/powerpc/kernel/head_44x.S
===
--- linux-work.orig/arch/powerpc/kernel/head_44x.S 2007-11-19
16:41:48.0 +1100
+++ linux-work/arch/powerpc/kernel/head_44x.S 2007-11-19 16:58:53.0
+1100
@@ -289,11 +289,8 @@ interrupt_base:
CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
/* Machine Check Interrupt */
-#ifdef CONFIG_440A
- MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
-#else
CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
-#endif
+ MCHECK_EXCEPTION(0x0210, MachineCheckA, machine_check_exception)
/* Data Storage Interrupt */
START_EXCEPTION(DataStorage)
@@ -674,6 +671,15 @@ finish_tlb_load:
*/
/*
+ * Adjust the machine check IVOR on 440A cores
+ */
+_GLOBAL(__fixup_440A_mcheck)
+ li r3,[EMAIL PROTECTED]
+ mtspr SPRN_IVOR1,r3
+ sync
+ blr
+
+/*
* extern void giveup_altivec(struct task_struct *prev)
*
* The 44x core does not have an AltiVec unit.
Index: linux-work/arch/powerpc/kernel/traps.c
[RFC/PATCH 9/14] powerpc: 4xx PLB to PCI-X support
This adds base support code for the 4xx PCI-X bridge. It also provides
placeholders for the PCI and PCI-E version but they aren't supported
with this patch.
The bridges are configured based on device-tree properties.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
Tested on 440GP only so far.
arch/powerpc/sysdev/Makefile |4
arch/powerpc/sysdev/ppc4xx_pci.c | 313 +++
arch/powerpc/sysdev/ppc4xx_pci.h | 106 +
include/asm-powerpc/pci-bridge.h |3
4 files changed, 426 insertions(+)
Index: linux-work/arch/powerpc/sysdev/Makefile
===
--- linux-work.orig/arch/powerpc/sysdev/Makefile2007-11-20
17:04:07.0 +1100
+++ linux-work/arch/powerpc/sysdev/Makefile 2007-11-20 17:04:52.0
+1100
@@ -29,6 +29,10 @@ obj-$(CONFIG_4xx)+= uic.o
obj-$(CONFIG_XILINX_VIRTEX)+= xilinx_intc.o
endif
+ifeq ($(CONFIG_PCI),y)
+obj-$(CONFIG_4xx) += ppc4xx_pci.o
+endif
+
# Temporary hack until we have migrated to asm-powerpc
ifeq ($(ARCH),powerpc)
obj-$(CONFIG_CPM) += cpm_common.o
Index: linux-work/arch/powerpc/sysdev/ppc4xx_pci.c
===
--- /dev/null 1970-01-01 00:00:00.0 +
+++ linux-work/arch/powerpc/sysdev/ppc4xx_pci.c 2007-11-21 11:41:58.0
+1100
@@ -0,0 +1,313 @@
+/*
+ * PCI / PCI-X / PCI-Express support for 4xx parts
+ *
+ * Copyright 2007 Ben. Herrenschmidt [EMAIL PROTECTED], IBM Corp.
+ *
+ */
+
+#include linux/kernel.h
+#include linux/pci.h
+#include linux/init.h
+#include linux/bootmem.h
+#include linux/of.h
+
+#include asm/io.h
+#include asm/pci-bridge.h
+#include asm/machdep.h
+
+#include ppc4xx_pci.h
+
+static int dma_offset_set;
+
+/* Move that to a useable header */
+extern unsigned long total_memory;
+
+/* Defined in drivers/pci/pci.c but not exposed by a header */
+extern u8 pci_cache_line_size;
+
+static int __init ppc4xx_parse_dma_window(struct pci_controller *hose,
+ void __iomem *reg,
+ struct resource *res)
+{
+ struct device_node *np = hose-arch_data;
+ u64 size;
+ const u32 *dmaw;
+
+ /* Default */
+ res-start = 0;
+ res-end = 0x8000;
+ res-flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
+
+ /* Get dma-window property */
+ dmaw = of_get_property(np, dma-window, NULL);
+ if (dmaw == NULL)
+ goto out;
+
+ /* Check if it makes sense (ie. it encodes memory */
+ if ((dmaw[0] 0x0300) != 0x0200) {
+ printk(KERN_ERR %s: non-memory dma-window\n,
+ np-full_name);
+ return -ENXIO;
+ }
+
+ /* Check if not prefetchable */
+ if (!(dmaw[0] 0x4000))
+ res-flags = ~IORESOURCE_PREFETCH;
+
+ /* Read the DMA window. We should sanity check that it's
+* not overlapping with the outbound ranges.
+*/
+ res-start = of_read_number(dmaw + 1, 2);
+ size = of_read_number(dmaw + 3, 2);
+ res-end = res-start + size - 1;
+
+ /* We only support one global DMA offset */
+ if (dma_offset_set pci_dram_offset != res-start) {
+ printk(KERN_ERR %s: dma-window(s) mismatch\n,
+ np-full_name);
+ return -ENXIO;
+ }
+
+ /* Check that we can fit all of memory as we don't support
+* DMA bounce buffers
+*/
+ if (size total_memory) {
+ printk(KERN_ERR %s: dma-window too small\n,
+ np-full_name);
+ return -ENXIO;
+ }
+
+ /* Check we are a power of 2 size and that base is a multiple of size*/
+ if (!is_power_of_2(size) ||
+ (res-start (size - 1)) != 0) {
+ printk(KERN_ERR %s: dma-window unaligned\n,
+ np-full_name);
+ return -ENXIO;
+ }
+
+ /* Check that we are fully contained within 32 bits space */
+ if (res-end 0x) {
+ printk(KERN_ERR %s: dma-window outside of 32 bits space\n,
+ np-full_name);
+ return -ENXIO;
+ }
+ out:
+ dma_offset_set = 1;
+ pci_dram_offset = res-start;
+
+ printk(KERN_INFO 4xx PCI DMA offset set to 0x%08lx\n,
+ pci_dram_offset);
+ return 0;
+}
+
+/*
+ * 4xx PCI 2.x part
+ */
+static void __init ppc4xx_probe_pci_bridge(struct device_node *np)
+{
+ /* NYI */
+}
+
+/*
+ * 4xx PCI-X part
+ */
+
+static void __init ppc4xx_configure_pcix_POMs(struct pci_controller *hose,
+ void __iomem *reg)
+{
+ struct device_node *np = hose-arch_data;
+ u32 lah, lal, pciah, pcial, sa;
+ int i, j;
+
+ /* Setup outbound memory windows */
+ for(i = j =
[RFC/PATCH 10/14] powerpc: 4xx PLB to PCI 2.x support
This adds to the previous patch the support for the 4xx PCI 2.x
bridges.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
This version implement the basic support for the 405GP bridge,
I haven't yet looked at differences that other implementations
may have for the PCI 2.x part.
arch/powerpc/sysdev/ppc4xx_pci.c | 183 ++-
arch/powerpc/sysdev/ppc4xx_pci.h | 19
2 files changed, 201 insertions(+), 1 deletion(-)
Index: linux-work/arch/powerpc/sysdev/ppc4xx_pci.c
===
--- linux-work.orig/arch/powerpc/sysdev/ppc4xx_pci.c2007-11-21
12:50:48.0 +1100
+++ linux-work/arch/powerpc/sysdev/ppc4xx_pci.c 2007-11-21 15:35:37.0
+1100
@@ -25,6 +25,38 @@ extern unsigned long total_memory;
/* Defined in drivers/pci/pci.c but not exposed by a header */
extern u8 pci_cache_line_size;
+static void fixup_ppc4xx_pci_bridge(struct pci_dev* dev)
+{
+ struct pci_controller *hose;
+ struct device_node *np;
+ int i;
+
+ if (dev-devfn != 0 || dev-bus-self != NULL)
+ return;
+
+ hose = pci_bus_to_host(dev-bus);
+ if (hose == NULL)
+ return;
+ np = hose-arch_data;
+
+ if (!of_device_is_compatible(np, ibm,plb-pciex)
+ !of_device_is_compatible(np, ibm,plb-pcix)
+ !of_device_is_compatible(np, ibm,plb-pci))
+ return;
+
+ /* Hide the PCI host BARs from the kernel as their content doesn't
+* fit well in the resource management
+*/
+ for (i = 0; i DEVICE_COUNT_RESOURCE; i++) {
+ dev-resource[i].start = dev-resource[i].end = 0;
+ dev-resource[i].flags = 0;
+ }
+
+ printk(KERN_INFO PCI: Hiding 4xx host bridge resources %s\n,
+ pci_name(dev));
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, fixup_ppc4xx_pci_bridge);
+
static int __init ppc4xx_parse_dma_window(struct pci_controller *hose,
void __iomem *reg,
struct resource *res)
@@ -103,9 +135,158 @@ static int __init ppc4xx_parse_dma_windo
/*
* 4xx PCI 2.x part
*/
+
+static void __init ppc4xx_configure_pci_PMMs(struct pci_controller *hose,
+void __iomem *reg)
+{
+ struct device_node *np = hose-arch_data;
+ u32 la, ma, pcila, pciha;
+ int i, j;
+
+ /* Setup outbound memory windows */
+ for(i = j = 0; i 3; i++) {
+ struct resource *res = hose-mem_resources[i];
+
+ /* we only care about memory windows */
+ if (!(res-flags IORESOURCE_MEM))
+ continue;
+ if (j 2) {
+ printk(KERN_WARNING %s: Too many ranges\n,
+ np-full_name);
+ break;
+ }
+
+ /* Calculate register values */
+ la = res-start;
+#ifdef CONFIG_RESOURCES_64BIT
+ pciha = (res-start - hose-pci_mem_offset) 32;
+ pcila = (res-start - hose-pci_mem_offset) 0xu;
+#else
+ pciha = 0;
+ pcila = res-start - hose-pci_mem_offset;
+#endif
+
+ ma = res-end + 1 - res-start;
+ if (!is_power_of_2(ma) || ma 0x1000 || ma 0xu) {
+ printk(KERN_WARNING %s: Resource out of range\n,
+ np-full_name);
+ continue;
+ }
+ ma = (0xu ilog2(ma)) | 0x1;
+ if (res-flags IORESOURCE_PREFETCH)
+ ma |= 0x2;
+
+ /* Program register values */
+ writel(la, reg + PCIL0_PMM0LA + (0x10 * j));
+ writel(pcila, reg + PCIL0_PMM0PCILA + (0x10 * j));
+ writel(pciha, reg + PCIL0_PMM0PCIHA + (0x10 * j));
+ writel(ma, reg + PCIL0_PMM0MA + (0x10 * j));
+ j++;
+ }
+}
+
+static void __init ppc4xx_configure_pci_PTMs(struct pci_controller *hose,
+void __iomem *reg,
+const struct resource *res)
+{
+ resource_size_t size = res-end - res-start + 1;
+ u32 sa;
+
+ /* Calculate window size */
+ sa = (0xu ilog2(size)) | 1;
+ sa |= 0x1;
+
+ /* RAM is always at 0 local for now */
+ writel(0, reg + PCIL0_PTM1LA);
+ writel(sa, reg + PCIL0_PTM1MS);
+
+ /* Map on PCI side */
+ early_write_config_dword(hose, hose-first_busno, 0,
+PCI_BASE_ADDRESS_1, res-start);
+ early_write_config_dword(hose, hose-first_busno, 0,
+PCI_BASE_ADDRESS_2, 0x);
+ early_write_config_word(hose, hose-first_busno, 0,
+ PCI_COMMAND, 0x0006);
+}
[RFC/PATCH 13/14] powerpc: EP405 boards support for arch/powerpc
Brings EP405 support to arch/powerpc. The IRQ routing for the CPLD
comes from a device-tree property, PCI is working to the point where
I can see the video card, USB device, and south bridge.
This should work with both EP405 and EP405PC.
I've not totally figured out how IRQs are wired on this hardware
though, thus at this stage, expect only USB interrupts working,
pretty much the same as what arch/ppc did.
Also, the flash, nvram, rtc and temp control still have to be wired.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
Note about IRQ routing: The doc is very obscure in that area.
I _think_ the SB interrupt on the CPLD is actually the Windond's
8259 output and the NB interrupt is the PCI_A...PCI_D mux in
there (which can be implemented as a cascaded controller) but
I haven't sorted that out yet. If anybody from Embedded Planet
is around, I could use some advice there.
If my deductions are correct, then we would need to wire up the
8259 driver to SB, which should be trivial provided I stick the
windbond bridge in the device-tree, or at least part of it,
and probably implement a cascaded controller for the PCI IRQ
A...D mux thingy, which should also be trivial.
Note also that it tends to lockup during the transition from
the boot wrapper to the kernel, before udbg is started. I didn't
have a RiscWatch at hand so I haven't yet been able to track that
down. It's random though, quite weird. Maybe some stale TLB entries
or cache content that isn't cleared properly...
arch/powerpc/boot/4xx.c | 55 +-
arch/powerpc/boot/4xx.h |1
arch/powerpc/boot/Makefile |3
arch/powerpc/boot/dts/ep405.dts | 221
arch/powerpc/boot/ep405.c| 74 ++
arch/powerpc/boot/treeboot-walnut.c | 49 -
arch/powerpc/boot/wrapper|2
arch/powerpc/configs/ep405_defconfig | 951 +++
arch/powerpc/platforms/40x/Kconfig | 21
arch/powerpc/platforms/40x/Makefile |1
arch/powerpc/platforms/40x/ep405.c | 127
11 files changed, 1439 insertions(+), 66 deletions(-)
Index: linux-work/arch/powerpc/boot/Makefile
===
--- linux-work.orig/arch/powerpc/boot/Makefile 2007-11-21 16:19:01.0
+1100
+++ linux-work/arch/powerpc/boot/Makefile 2007-11-21 16:23:03.0
+1100
@@ -56,7 +56,7 @@ src-plat := of.c cuboot-52xx.c cuboot-83
cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c
\
- fixed-head.S ep88xc.c cuboot-hpc2.c
+ fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -150,6 +150,7 @@ image-$(CONFIG_DEFAULT_UIMAGE) += uImag
ifneq ($(CONFIG_DEVICE_TREE),)
image-$(CONFIG_PPC_8xx)+= cuImage.8xx
image-$(CONFIG_PPC_EP88XC) += zImage.ep88xc
+image-$(CONFIG_EP405) += zImage.ep405
image-$(CONFIG_8260) += cuImage.pq2
image-$(CONFIG_PPC_MPC52xx)+= cuImage.52xx
image-$(CONFIG_PPC_83xx) += cuImage.83xx
Index: linux-work/arch/powerpc/boot/ep405.c
===
--- /dev/null 1970-01-01 00:00:00.0 +
+++ linux-work/arch/powerpc/boot/ep405.c2007-11-21 16:23:03.0
+1100
@@ -0,0 +1,74 @@
+/*
+ * Embedded Planet EP405 with PlanetCore firmware
+ *
+ * (c) Benjamin Herrenschmidt [EMAIL PROTECTED], IBM Corp,\
+ *
+ * Based on ep88xc.c by
+ *
+ * Scott Wood [EMAIL PROTECTED]
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include ops.h
+#include stdio.h
+#include planetcore.h
+#include dcr.h
+#include 4xx.h
+#include io.h
+
+static char *table;
+static u64 mem_size;
+
+static void platform_fixups(void)
+{
+ u64 val;
+ void *nvrtc;
+
+ dt_fixup_memory(0, mem_size);
+ planetcore_set_mac_addrs(table);
+
+ if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, val)) {
+ printf(No PlanetCore crystal frequency key.\r\n);
+ return;
+ }
+ ibm405gp_fixup_clocks(val, 0xa8c000);
+ ibm4xx_quiesce_eth((u32 *)0xef600800, NULL);
+ ibm4xx_fixup_ebc_ranges(/plb/ebc);
+
+ if (!planetcore_get_decimal(table, PLANETCORE_KEY_KB_NVRAM, val)) {
+ printf(No PlanetCore NVRAM size key.\r\n);
+ return;
+ }
+ nvrtc = finddevice(/plb/ebc/[EMAIL PROTECTED],20);
+ if (nvrtc != NULL) {
+ u32 reg[3] = { 4, 0x20, 0};
+
[RFC/PATCH 14/14] powerpc: Add PCI to Walnut platform
This wires up the 4xx PCI support device-tree bits for the
405GP based Walnut platform.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
This one is untested, haven't had time to dig my walnut and put it
back into working condition. Josh, can you verify that IRQs are
working (routing is correct ?) Thanks !
arch/powerpc/boot/dts/walnut.dts| 39
arch/powerpc/platforms/40x/walnut.c |7 ++
2 files changed, 46 insertions(+)
Index: linux-work/arch/powerpc/boot/dts/walnut.dts
===
--- linux-work.orig/arch/powerpc/boot/dts/walnut.dts2007-11-21
16:24:27.0 +1100
+++ linux-work/arch/powerpc/boot/dts/walnut.dts 2007-11-21 16:26:25.0
+1100
@@ -190,6 +190,45 @@
virtual-reg = f035;
};
};
+
+ PCI0: [EMAIL PROTECTED] {
+ device_type = pci;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ compatible = ibm,plb405gp-pci, ibm,plb-pci;
+ primary;
+ reg = eec0 8 /* Config space access */
+ eed8 4 /* IACK */
+ eed8 4 /* Special cycle */
+ ef48 40;/* Internal registers */
+
+ /* Outbound ranges, one memory and one IO,
+* later cannot be changed. Chip supports a second
+* IO range but we don't use it for now
+*/
+ ranges = 0200 0 8000 8000 0 2000
+ 0100 0 e800 0 0001;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-window = 4200 0 0 0 8000;
+
+ /* Walnut has all 4 IRQ pins tied together per slot */
+ interrupt-map-mask = f800 0 0 0;
+ interrupt-map =
+ /* IDSEL 1 */
+ 0800 0 0 0 UIC0 1c 8
+
+ /* IDSEL 2 */
+ 1000 0 0 0 UIC0 1d 8
+
+ /* IDSEL 3 */
+ 1800 0 0 0 UIC0 1e 8
+
+ /* IDSEL 4 */
+ 2000 0 0 0 UIC0 1f 8
+ ;
+ };
};
chosen {
Index: linux-work/arch/powerpc/platforms/40x/walnut.c
===
--- linux-work.orig/arch/powerpc/platforms/40x/walnut.c 2007-11-21
16:23:28.0 +1100
+++ linux-work/arch/powerpc/platforms/40x/walnut.c 2007-11-21
16:24:01.0 +1100
@@ -43,6 +43,12 @@ static int __init walnut_device_probe(vo
}
device_initcall(walnut_device_probe);
+static void __init walnut_setup_arch(void)
+{
+ /* Create PCI bridges */
+ ppc4xx_pci_find_bridges();
+}
+
static int __init walnut_probe(void)
{
unsigned long root = of_get_flat_dt_root();
@@ -56,6 +62,7 @@ static int __init walnut_probe(void)
define_machine(walnut) {
.name = Walnut,
.probe = walnut_probe,
+ .setup_arch = walnut_setup_arch,
.progress = udbg_progress,
.init_IRQ = uic_init_tree,
.get_irq= uic_get_irq,
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 13/14] powerpc: EP405 boards support for arch/powerpc
On Wed, 21 Nov 2007 17:15:06 +1100 Benjamin Herrenschmidt [EMAIL PROTECTED] wrote: +++ linux-work/arch/powerpc/platforms/40x/ep405.c 2007-11-21 16:45:38.0 +1100 +#include asm/of_platform.h Please use linux/of_platform.h instead. -- Cheers, Stephen Rothwell[EMAIL PROTECTED] http://www.canb.auug.org.au/~sfr/ pgpSNcC0cJuOI.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[RFC/PATCH 3/14] powerpc: Fix declaration of pcibios_free_controller
pcibios_free_controller() is now available for both 32 and 64 bits but the header only declares it for 64 bits. This moves the declaration down next to the pcibios_alloc_controller() one. Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED] --- include/asm-powerpc/pci-bridge.h |5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) Index: linux-work/include/asm-powerpc/pci-bridge.h === --- linux-work.orig/include/asm-powerpc/pci-bridge.h2007-11-16 13:44:32.0 +1100 +++ linux-work/include/asm-powerpc/pci-bridge.h 2007-11-16 13:46:40.0 +1100 @@ -247,7 +247,6 @@ static inline struct pci_controller *pci return PCI_DN(busdn)-phb; } -extern void pcibios_free_controller(struct pci_controller *phb); extern void isa_bridge_find_early(struct pci_controller *hose); @@ -283,9 +282,11 @@ extern void pci_process_bridge_OF_ranges(struct pci_controller *hose, struct device_node *dev, int primary); -/* Allocate a new PCI host bridge structure */ +/* Allocate free a PCI host bridge structure */ extern struct pci_controller * pcibios_alloc_controller(struct device_node *dev); +extern void pcibios_free_controller(struct pci_controller *phb); + #ifdef CONFIG_PCI extern unsigned long pci_address_to_pio(phys_addr_t address); extern int pcibios_vaddr_is_ioport(void __iomem *address); ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[RFC/PATCH 12/14] powerpc: Add early udbg support for 40x processors
This adds some basic real mode based early udbg support for 40x
in order to debug things more easily
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/Kconfig.debug | 12 ++
arch/powerpc/kernel/misc_32.S | 39 +
arch/powerpc/kernel/udbg.c |3 ++
arch/powerpc/kernel/udbg_16550.c | 33 +++
arch/powerpc/platforms/Kconfig.cputype |1
include/asm-powerpc/udbg.h |1
6 files changed, 89 insertions(+)
Index: linux-work/arch/powerpc/Kconfig.debug
===
--- linux-work.orig/arch/powerpc/Kconfig.debug 2007-11-21 12:44:03.0
+1100
+++ linux-work/arch/powerpc/Kconfig.debug 2007-11-21 12:47:58.0
+1100
@@ -220,6 +220,13 @@ config PPC_EARLY_DEBUG_44x
Select this to enable early debugging for IBM 44x chips via the
inbuilt serial port.
+config PPC_EARLY_DEBUG_40x
+ bool Early serial debugging for IBM/AMCC 40x CPUs
+ depends on 40x
+ help
+ Select this to enable early debugging for IBM 40x chips via the
+ inbuilt serial port.
+
config PPC_EARLY_DEBUG_CPM
bool Early serial debugging for Freescale CPM-based serial ports
depends on SERIAL_CPM
@@ -241,6 +248,11 @@ config PPC_EARLY_DEBUG_44x_PHYSHIGH
depends on PPC_EARLY_DEBUG_44x
default 0x1
+config PPC_EARLY_DEBUG_40x_PHYSADDR
+ hex Early debug UART physical address
+ depends on PPC_EARLY_DEBUG_40x
+ default 0xef600300
+
config PPC_EARLY_DEBUG_CPM_ADDR
hex CPM UART early debug transmit descriptor address
depends on PPC_EARLY_DEBUG_CPM
Index: linux-work/arch/powerpc/kernel/misc_32.S
===
--- linux-work.orig/arch/powerpc/kernel/misc_32.S 2007-11-21
12:40:26.0 +1100
+++ linux-work/arch/powerpc/kernel/misc_32.S2007-11-21 12:41:43.0
+1100
@@ -206,6 +206,45 @@ _GLOBAL(_nmask_and_or_msr)
isync
blr /* Done */
+#ifdef CONFIG_40x
+
+/*
+ * Do an IO access in real mode
+ */
+_GLOBAL(real_readb)
+ mfmsr r7
+ ori r0,r7,MSR_DR
+ xorir0,r0,MSR_DR
+ sync
+ mtmsr r0
+ sync
+ isync
+ lbz r3,0(r3)
+ sync
+ mtmsr r7
+ sync
+ isync
+ blr
+
+ /*
+ * Do an IO access in real mode
+ */
+_GLOBAL(real_writeb)
+ mfmsr r7
+ ori r0,r7,MSR_DR
+ xorir0,r0,MSR_DR
+ sync
+ mtmsr r0
+ sync
+ isync
+ stb r3,0(r4)
+ sync
+ mtmsr r7
+ sync
+ isync
+ blr
+
+#endif /* CONFIG_40x */
/*
* Flush MMU TLB
Index: linux-work/arch/powerpc/kernel/udbg.c
===
--- linux-work.orig/arch/powerpc/kernel/udbg.c 2007-11-21 12:38:11.0
+1100
+++ linux-work/arch/powerpc/kernel/udbg.c 2007-11-21 12:44:50.0
+1100
@@ -54,6 +54,9 @@ void __init udbg_early_init(void)
#elif defined(CONFIG_PPC_EARLY_DEBUG_44x)
/* PPC44x debug */
udbg_init_44x_as1();
+#elif defined(CONFIG_PPC_EARLY_DEBUG_40x)
+ /* PPC40x debug */
+ udbg_init_40x_realmode();
#elif defined(CONFIG_PPC_EARLY_DEBUG_CPM)
udbg_init_cpm();
#endif
Index: linux-work/arch/powerpc/kernel/udbg_16550.c
===
--- linux-work.orig/arch/powerpc/kernel/udbg_16550.c2007-11-21
12:42:24.0 +1100
+++ linux-work/arch/powerpc/kernel/udbg_16550.c 2007-11-21 12:50:40.0
+1100
@@ -225,3 +225,36 @@ void __init udbg_init_44x_as1(void)
udbg_getc = udbg_44x_as1_getc;
}
#endif /* CONFIG_PPC_EARLY_DEBUG_44x */
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_40x
+static void udbg_40x_real_putc(char c)
+{
+ if (udbg_comport) {
+ while ((real_readb(udbg_comport-lsr) LSR_THRE) == 0)
+ /* wait for idle */;
+ real_writeb(c, udbg_comport-thr); eieio();
+ if (c == '\n')
+ udbg_40x_real_putc('\r');
+ }
+}
+
+static int udbg_40x_real_getc(void)
+{
+ if (udbg_comport) {
+ while ((real_readb(udbg_comport-lsr) LSR_DR) == 0)
+ ; /* wait for char */
+ return real_readb(udbg_comport-rbr);
+ }
+ return -1;
+}
+
+void __init udbg_init_40x_realmode(void)
+{
+ udbg_comport = (volatile struct NS16550 __iomem *)
+ CONFIG_PPC_EARLY_DEBUG_40x_PHYSADDR;
+
+ udbg_putc = udbg_40x_real_putc;
+ udbg_getc = udbg_40x_real_getc;
+ udbg_getc_poll = NULL;
+}
+#endif /* CONFIG_PPC_EARLY_DEBUG_40x */
Index: linux-work/include/asm-powerpc/udbg.h
===
---
[RFC/PATCH 4/14] powerpc: Fix powerpc 32 bits resource fixup for 64 bits resources
The 32bits powerpc resource fixup code uses unsigned longs to do the
offseting of resources which overflows on platforms such as 4xx where
resources can be 64 bits.
This fixes it by using resource_size_t instead.
However, the IO stuff does rely on some 32 bits arithmetic, so we hack
by cropping the result of the fixups for IO resources with a 32 bits
mask.
This isn't the prettiest but should work for now until we change the
32 bits PCI code to do IO mappings like 64 bits does, within a reserved
are of the kernel address space.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
This needs some regression testing.
arch/powerpc/kernel/pci_32.c | 44 +++
1 file changed, 24 insertions(+), 20 deletions(-)
Index: linux-work/arch/powerpc/kernel/pci_32.c
===
--- linux-work.orig/arch/powerpc/kernel/pci_32.c2007-11-16
15:48:27.0 +1100
+++ linux-work/arch/powerpc/kernel/pci_32.c 2007-11-16 15:55:54.0
+1100
@@ -104,7 +104,7 @@ pcibios_fixup_resources(struct pci_dev *
{
struct pci_controller* hose = (struct pci_controller *)dev-sysdata;
int i;
- unsigned long offset;
+ resource_size_t offset, mask;
if (!hose) {
printk(KERN_ERR No hose for PCI dev %s!\n, pci_name(dev));
@@ -123,15 +123,17 @@ pcibios_fixup_resources(struct pci_dev *
continue;
}
offset = 0;
+ mask = (resource_size_t)-1;
if (res-flags IORESOURCE_MEM) {
offset = hose-pci_mem_offset;
} else if (res-flags IORESOURCE_IO) {
offset = (unsigned long) hose-io_base_virt
- isa_io_base;
+ mask = 0xu;
}
if (offset != 0) {
- res-start += offset;
- res-end += offset;
+ res-start = (res-start + offset) mask;
+ res-end = (res-end + offset) mask;
DBG(Fixup res %d (%lx) of dev %s: %llx - %llx\n,
i, res-flags, pci_name(dev),
(u64)res-start - offset, (u64)res-start);
@@ -147,30 +149,32 @@ DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PC
void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region
*region,
struct resource *res)
{
- unsigned long offset = 0;
+ resource_size_t offset = 0, mask = (resource_size_t)-1;
struct pci_controller *hose = dev-sysdata;
- if (hose res-flags IORESOURCE_IO)
+ if (hose res-flags IORESOURCE_IO) {
offset = (unsigned long)hose-io_base_virt - isa_io_base;
- else if (hose res-flags IORESOURCE_MEM)
+ mask = 0xu;
+ } else if (hose res-flags IORESOURCE_MEM)
offset = hose-pci_mem_offset;
- region-start = res-start - offset;
- region-end = res-end - offset;
+ region-start = (res-start - offset) mask;
+ region-end = (res-end - offset) mask;
}
EXPORT_SYMBOL(pcibios_resource_to_bus);
void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
struct pci_bus_region *region)
{
- unsigned long offset = 0;
+ resource_size_t offset = 0, mask = (resource_size_t)-1;
struct pci_controller *hose = dev-sysdata;
- if (hose res-flags IORESOURCE_IO)
+ if (hose res-flags IORESOURCE_IO) {
offset = (unsigned long)hose-io_base_virt - isa_io_base;
- else if (hose res-flags IORESOURCE_MEM)
+ mask = 0xu;
+ } else if (hose res-flags IORESOURCE_MEM)
offset = hose-pci_mem_offset;
- res-start = region-start + offset;
- res-end = region-end + offset;
+ res-start = (region-start + offset) mask;
+ res-end = (region-end + offset) mask;
}
EXPORT_SYMBOL(pcibios_bus_to_resource);
@@ -334,9 +338,9 @@ static int __init
pci_relocate_bridge_resource(struct pci_bus *bus, int i)
{
struct resource *res, *pr, *conflict;
- unsigned long try, size;
- int j;
+ resource_size_t try, size;
struct pci_bus *parent = bus-parent;
+ int j;
if (parent == NULL) {
/* shouldn't ever happen */
@@ -438,7 +442,7 @@ update_bridge_resource(struct pci_dev *d
u8 io_base_lo, io_limit_lo;
u16 mem_base, mem_limit;
u16 cmd;
- unsigned long start, end, off;
+ resource_size_t start, end, off;
struct pci_controller *hose = dev-sysdata;
if (!hose) {
@@ -1157,8 +1161,8 @@ void pcibios_fixup_bus(struct pci_bus *b
res-end = IO_SPACE_LIMIT;
res-flags = IORESOURCE_IO;
}
-
Re: [PATCH 8/8] ibm_newemac: Skip EMACs that are marked unused by the firmware
On Wednesday 21 November 2007, Benjamin Herrenschmidt wrote: From: Hugh Blemings [EMAIL PROTECTED] Depending on how the 44x processors are wired, some EMAC cells might not be useable (and not connected to a PHY). However, some device-trees may choose to still expose them (since their registers are present in the MMIO space) but with an unused property in them. Signed-off-by: Hugh Blemings [EMAIL PROTECTED] Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED] Acked-by: Stefan Roese [EMAIL PROTECTED] Best regards, Stefan ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
