[PATCH v3] Enhanced support for MPC8xx/8xxx watchdog
This patch modifies the behaviour of the MPC8xx/8xxx watchdog. On the MPC8xx,
at 133Mhz, the maximum timeout of the watchdog timer is 1s, which means it must
be pinged twice a second. This is not in line with the Linux watchdog concept
which is based on a default watchdog timeout around 60s.
This patch introduces an intermediate layer between the CPU and the userspace.
The kernel pings the watchdog at the required frequency at the condition that
userspace tools refresh it regularly.
Existing parameter 'timeout' is renamed 'hw_timeout'.
The new parameter 'timeout' allows to set up the userspace timeout.
This patch also adds the WDIOC_SETTIMEOUT ioctl to the driver.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
--- linux-3.8.13/drivers/watchdog/mpc8xxx_wdt.c 2013-05-11 22:57:46.0
+0200
+++ linux/drivers/watchdog/mpc8xxx_wdt.c2013-08-08 02:12:15.0
+0200
@@ -52,10 +52,18 @@
static struct mpc8xxx_wdt __iomem *wd_base;
static int mpc8xxx_wdt_init_late(void);
-static u16 timeout = 0x;
-module_param(timeout, ushort, 0);
+#define WD_TIMO 60 /* Default timeout = 60 seconds */
+
+static uint timeout = WD_TIMO;
+module_param(timeout, uint, 0);
MODULE_PARM_DESC(timeout,
- Watchdog timeout in ticks. (0timeout65536, default=65535));
+ Watchdog SW timeout in seconds. (0 timeout 65536s, default =
+ __MODULE_STRING(WD_TIMO) s));
+static u16 hw_timeout = 0x;
+module_param(hw_timeout, ushort, 0);
+MODULE_PARM_DESC(hw_timeout,
+ Watchdog HW timeout in ticks. (0 hw_timeout 65536,
+ default = 65535));
static bool reset = 1;
module_param(reset, bool, 0);
@@ -72,10 +80,16 @@
* to 0
*/
static int prescale = 1;
-static unsigned int timeout_sec;
+static unsigned int hw_timeout_sec;
+/*
+ * wdt_auto is set to 1 when watchdog is automatically refreshed by the kernel
+ * (when /dev/watchdog is not open)
+ */
+static bool wdt_auto = 1;
static unsigned long wdt_is_open;
static DEFINE_SPINLOCK(wdt_spinlock);
+static unsigned long wdt_last_ping;
static void mpc8xxx_wdt_keepalive(void)
{
@@ -91,9 +105,20 @@
static void mpc8xxx_wdt_timer_ping(unsigned long arg)
{
- mpc8xxx_wdt_keepalive();
- /* We're pinging it twice faster than needed, just to be sure. */
- mod_timer(wdt_timer, jiffies + HZ * timeout_sec / 2);
+ if (wdt_auto)
+ wdt_last_ping = jiffies;
+
+ if (jiffies - wdt_last_ping = timeout * HZ) {
+ mpc8xxx_wdt_keepalive();
+ /* We're pinging it twice faster than needed, to be sure. */
+ mod_timer(wdt_timer, jiffies + HZ * hw_timeout_sec / 2);
+ }
+}
+
+static void mpc8xxx_wdt_sw_keepalive(void)
+{
+ wdt_last_ping = jiffies;
+ mpc8xxx_wdt_timer_ping(0);
}
static void mpc8xxx_wdt_pr_warn(const char *msg)
@@ -106,7 +131,7 @@
size_t count, loff_t *ppos)
{
if (count)
- mpc8xxx_wdt_keepalive();
+ mpc8xxx_wdt_sw_keepalive();
return count;
}
@@ -126,11 +151,11 @@
if (reset)
tmp |= SWCRR_SWRI;
- tmp |= timeout 16;
+ tmp |= hw_timeout 16;
out_be32(wd_base-swcrr, tmp);
- del_timer_sync(wdt_timer);
+ wdt_auto = 0;
return nonseekable_open(inode, file);
}
@@ -138,7 +163,8 @@
static int mpc8xxx_wdt_release(struct inode *inode, struct file *file)
{
if (!nowayout)
- mpc8xxx_wdt_timer_ping(0);
+ wdt_auto = 1;
+
else
mpc8xxx_wdt_pr_warn(watchdog closed);
clear_bit(0, wdt_is_open);
@@ -155,6 +181,7 @@
.firmware_version = 1,
.identity = MPC8xxx,
};
+ int r;
switch (cmd) {
case WDIOC_GETSUPPORT:
@@ -163,10 +190,15 @@
case WDIOC_GETBOOTSTATUS:
return put_user(0, p);
case WDIOC_KEEPALIVE:
- mpc8xxx_wdt_keepalive();
+ mpc8xxx_wdt_sw_keepalive();
return 0;
case WDIOC_GETTIMEOUT:
- return put_user(timeout_sec, p);
+ return put_user(timeout, p);
+ case WDIOC_SETTIMEOUT:
+ r = get_user(timeout, p);
+ if (timeout UINT_MAX / HZ)
+ timeout = UINT_MAX / HZ;
+ return r;
default:
return -ENOTTY;
}
@@ -215,21 +247,26 @@
ret = -ENOSYS;
goto err_unmap;
}
+ if (enabled)
+ hw_timeout = in_be32(wd_base-swcrr) 16;
/* Calculate the timeout in seconds */
if (prescale)
- timeout_sec = (timeout * wdt_type-prescaler) / freq;
+ hw_timeout_sec = (hw_timeout * wdt_type-prescaler) / freq;
else
- timeout_sec = timeout / freq;
+ hw_timeout_sec = hw_timeout / freq;
+ /* Make sure
Re: [v2] Enhanced support for MPC8xx/8xxx watchdog
Le 26/06/2013 01:04, Scott Wood a écrit :
On Thu, Feb 28, 2013 at 09:52:22AM +0100, LEROY Christophe wrote:
This patch modifies the behaviour of the MPC8xx/8xxx watchdog. On the MPC8xx,
at 133Mhz, the maximum timeout of the watchdog timer is 1s, which means it must
be pinged twice a second. This is not in line with the Linux watchdog concept
which is based on a default watchdog timeout around 60s.
This patch introduces an intermediate layer between the CPU and the userspace.
The kernel pings the watchdog at the required frequency at the condition that
userspace tools refresh it regularly.
Existing parameter 'timeout' is renamed 'hw_time'.
The new parameter 'timeout' allows to set up the userspace timeout.
The driver also implements the WDIOC_SETTIMEOUT ioctl.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur linux-3.7.9/drivers/watchdog/mpc8xxx_wdt.c
linux/drivers/watchdog/mpc8xxx_wdt.c
--- linux-3.7.9/drivers/watchdog/mpc8xxx_wdt.c 2013-02-17 19:53:32.0
+0100
+++ linux/drivers/watchdog/mpc8xxx_wdt.c2013-02-27 16:00:07.0
+0100
@@ -52,10 +52,17 @@
static struct mpc8xxx_wdt __iomem *wd_base;
static int mpc8xxx_wdt_init_late(void);
-static u16 timeout = 0x;
-module_param(timeout, ushort, 0);
+#define WD_TIMO 10 /* Default timeout = 10 seconds */
If the default Linux watchdog timeout is normally 60 seconds, why is it 10
here?
Looks like each driver has its own default value, but agreed, I change
it to 60 seconds
+static uint timeout = WD_TIMO;
+module_param(timeout, uint, 0);
MODULE_PARM_DESC(timeout,
- Watchdog timeout in ticks. (0timeout65536, default=65535));
+ Watchdog SW timeout in seconds. (0 timeout 65536s, default =
+ __MODULE_STRING(WD_TIMO) s));
+static u16 hw_timo = 0x;
+module_param(hw_timo, ushort, 0);
+MODULE_PARM_DESC(hw_timo,
+ Watchdog HW timeout in ticks. (0 hw_timo 65536, default = 65535));
hw_timeout would be more legibile -- this is a public interface.
Ok
static bool reset = 1;
module_param(reset, bool, 0);
@@ -72,10 +79,12 @@
* to 0
*/
static int prescale = 1;
-static unsigned int timeout_sec;
+static unsigned int hw_timo_sec;
+static int wdt_auto = 1;
bool, and add a comment indicating what this means.
Ok
static unsigned long wdt_is_open;
static DEFINE_SPINLOCK(wdt_spinlock);
+static unsigned long wdt_last_ping;
static void mpc8xxx_wdt_keepalive(void)
{
@@ -91,9 +100,20 @@
static void mpc8xxx_wdt_timer_ping(unsigned long arg)
{
- mpc8xxx_wdt_keepalive();
- /* We're pinging it twice faster than needed, just to be sure. */
- mod_timer(wdt_timer, jiffies + HZ * timeout_sec / 2);
+ if (wdt_auto)
+ wdt_last_ping = jiffies;
+
+ if (jiffies - wdt_last_ping = timeout * HZ) {
So timeout cannot be more than UINT_MAX / HZ... Might want to check for
that, just in case.
Ok.
What happens if there's a race? If another CPU updates wdt_last_ping in
parallel, then you could see wdt_last_ping greater than the value you
read for jiffies. Since this is an unsigned comparison, it will fail to
call keepalive. You might get saved by pinging it twice as often as
necessary, but you shouldn't rely on that.
Euh ... This watchdog is integrated inside the CPU, so there is no
chance that any external CPU get access to it.
+ mpc8xxx_wdt_keepalive();
+ /* We're pinging it twice faster than needed, to be sure. */
+ mod_timer(wdt_timer, jiffies + HZ * hw_timo_sec / 2);
+ }
+}
+
+static void mpc8xxx_wdt_sw_keepalive(void)
+{
+ wdt_last_ping = jiffies;
+ mpc8xxx_wdt_timer_ping(0);
}
This isn't new with this patch, but it looks like
mpc8xxx_wdt_keepalive() can be called either from timer context, or with
interrupts enabled... yet it uses a bare spin_lock() rather than an
irq-safe version. This should be fixed.
Ok, I'll propose another patch for that. Indeed, is the spin_lock needed
at all ? If we get two writes interleaved, it will make it anyway.
Christophe
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Re: [PATCH v2] drivers/crypto/nx: saves chaining value from co-processor
Hi Fin, I don't know anything about crypto so I can only critique you on your patch submission technique :) ... On Wed, Aug 07, 2013 at 06:15:50PM -0500, Fionnuala Gunter wrote: This patch fixes a bug that is triggered when cts(cbc(aes)) is used with nx-crypto driver on input larger than 32 bytes. The chaining value from co-processor was not being saved. This value is needed because it is used as the IV by cts(cbc(aes)). Signed-off-by: Fionnuala Gunter f...@linux.vnet.ibm.com Reviewed-by: Marcelo Cerri mhce...@linux.vnet.ibm.com --- v2. changed signed-off-by to reviewed-by and added more details to description This bug appeared in the original submission (v3.5) Ideally this should identify the commit, so: This bug was introduced in the original submission (v3.5), commit 856d673 powerpc/crypto: AES-CBC mode routines for nx encryption. Including the subject of the commit is handy in case the patch has been backported somewhere, in which case the commit sha will be different. It should definitely be part of the commit message, not below the ---. And Ben might disagree but I think with a clear cut bug fix like this it should include the CC to stable, so: Cc: sta...@vger.kernel.org # 3.5+ cheers ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 63/63] powerpc: Add pseries_le_defconfig
Hi, The CONFIG_VIRTUALIZATION disabling should be done in the Kconfig not here. I'm not that keen on another defconfig. benh is already talking about having a powernv defconfig. I'm worried we are going to fragment the defconfigs. If you want something special like LE, then change the default one. I agree we don't want machine specific defconfigs, but I think it makes sense to have ones that cover the key options that conflict. I'm thinking 32bit, 64bit, 64bit BookE, 64bit LE etc. One bonus is if we have a smaller set of defconfigs we might actually get better testing. I have no idea which 32bit defconfigs I should test for example, and I'm not going to test them all! Anton ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 63/63] powerpc: Add pseries_le_defconfig
On Tuesday 06 August 2013 09:32 PM, Anton Blanchard wrote: This is the pseries_defconfig with CONFIG_CPU_LITTLE_ENDIAN enabled and CONFIG_VIRTUALIZATION disabled (required until we fix some endian issues in KVM). Signed-off-by: Anton Blanchard an...@samba.org --- arch/powerpc/configs/pseries_le_defconfig | 347 ++ 1 file changed, 347 insertions(+) create mode 100644 arch/powerpc/configs/pseries_le_defconfig diff --git a/arch/powerpc/configs/pseries_le_defconfig b/arch/powerpc/configs/pseries_le_defconfig new file mode 100644 index 000..a30db45 --- /dev/null +++ b/arch/powerpc/configs/pseries_le_defconfig @@ -0,0 +1,347 @@ +CONFIG_PPC64=y +CONFIG_ALTIVEC=y +CONFIG_VSX=y +CONFIG_SMP=y +CONFIG_NR_CPUS=2048 +CONFIG_EXPERIMENTAL=y +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_AUDIT=y +CONFIG_AUDITSYSCALL=y +CONFIG_IRQ_DOMAIN_DEBUG=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_CGROUPS=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CPUSETS=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_BLK_DEV_INITRD=y +# CONFIG_COMPAT_BRK is not set +CONFIG_PROFILING=y +CONFIG_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_JUMP_LABEL=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_EFI_PARTITION=y +CONFIG_PPC_SPLPAR=y +CONFIG_SCANLOG=m +CONFIG_PPC_SMLPAR=y +CONFIG_DTL=y +# CONFIG_PPC_PMAC is not set +CONFIG_RTAS_FLASH=m +CONFIG_IBMEBUS=y +CONFIG_HZ_100=y +CONFIG_BINFMT_MISC=m +CONFIG_PPC_TRANSACTIONAL_MEM=y +CONFIG_HOTPLUG_CPU=y +CONFIG_KEXEC=y +CONFIG_IRQ_ALL_CPUS=y +CONFIG_MEMORY_HOTPLUG=y +CONFIG_MEMORY_HOTREMOVE=y +CONFIG_PPC_64K_PAGES=y +CONFIG_PPC_SUBPAGE_PROT=y +CONFIG_SCHED_SMT=y +CONFIG_PPC_DENORMALISATION=y +CONFIG_HOTPLUG_PCI=m Why the value m in the le_config file, when it is y in pseries_defconfig. Also I do see a warning saying invalid value for this symbol. +CONFIG_HOTPLUG_PCI_RPA=m +CONFIG_HOTPLUG_PCI_RPA_DLPAR=m +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=m +CONFIG_NET_KEY=m +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_NET_IPIP=y +CONFIG_SYN_COOKIES=y +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +CONFIG_INET_IPCOMP=m +# CONFIG_IPV6 is not set +CONFIG_NETFILTER=y +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_UDPLITE=m +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_NETLINK=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_DCCP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_OWNER=m +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_RATEEST=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_RECENT=m +CONFIG_NETFILTER_XT_MATCH_SCTP=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_MATCH_U32=m +CONFIG_NF_CONNTRACK_IPV4=m +CONFIG_IP_NF_QUEUE=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_UEVENT_HELPER_PATH=/sbin/hotplug +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_PROC_DEVICETREE=y +CONFIG_PARPORT=m +CONFIG_PARPORT_PC=m +CONFIG_BLK_DEV_FD=m +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_NBD=m +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_IDE=y +CONFIG_BLK_DEV_IDECD=y +CONFIG_BLK_DEV_GENERIC=y +CONFIG_BLK_DEV_AMD74XX=y +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_ST=y +CONFIG_BLK_DEV_SR=y +CONFIG_BLK_DEV_SR_VENDOR=y +CONFIG_CHR_DEV_SG=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_FC_ATTRS=y +CONFIG_SCSI_CXGB3_ISCSI=m +CONFIG_SCSI_CXGB4_ISCSI=m +CONFIG_SCSI_BNX2_ISCSI=m +CONFIG_BE2ISCSI=m +CONFIG_SCSI_MPT2SAS=m +CONFIG_SCSI_IBMVSCSI=y +CONFIG_SCSI_IBMVFC=m +CONFIG_SCSI_SYM53C8XX_2=y
Re: [v2] Enhanced support for MPC8xx/8xxx watchdog
On 08/07/2013 10:50 PM, leroy christophe wrote:
Le 26/06/2013 01:04, Scott Wood a écrit :
On Thu, Feb 28, 2013 at 09:52:22AM +0100, LEROY Christophe wrote:
This patch modifies the behaviour of the MPC8xx/8xxx watchdog. On the MPC8xx,
at 133Mhz, the maximum timeout of the watchdog timer is 1s, which means it must
be pinged twice a second. This is not in line with the Linux watchdog concept
which is based on a default watchdog timeout around 60s.
This patch introduces an intermediate layer between the CPU and the userspace.
The kernel pings the watchdog at the required frequency at the condition that
userspace tools refresh it regularly.
Existing parameter 'timeout' is renamed 'hw_time'.
The new parameter 'timeout' allows to set up the userspace timeout.
The driver also implements the WDIOC_SETTIMEOUT ioctl.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
diff -ur linux-3.7.9/drivers/watchdog/mpc8xxx_wdt.c
linux/drivers/watchdog/mpc8xxx_wdt.c
--- linux-3.7.9/drivers/watchdog/mpc8xxx_wdt.c2013-02-17 19:53:32.0
+0100
+++ linux/drivers/watchdog/mpc8xxx_wdt.c2013-02-27 16:00:07.0 +0100
@@ -52,10 +52,17 @@
static struct mpc8xxx_wdt __iomem *wd_base;
static int mpc8xxx_wdt_init_late(void);
-static u16 timeout = 0x;
-module_param(timeout, ushort, 0);
+#define WD_TIMO 10/* Default timeout = 10 seconds */
If the default Linux watchdog timeout is normally 60 seconds, why is it 10
here?
Looks like each driver has its own default value, but agreed, I change it to 60
seconds
+static uint timeout = WD_TIMO;
+module_param(timeout, uint, 0);
MODULE_PARM_DESC(timeout,
-Watchdog timeout in ticks. (0timeout65536, default=65535));
+Watchdog SW timeout in seconds. (0 timeout 65536s, default =
+__MODULE_STRING(WD_TIMO) s));
+static u16 hw_timo = 0x;
+module_param(hw_timo, ushort, 0);
+MODULE_PARM_DESC(hw_timo,
+Watchdog HW timeout in ticks. (0 hw_timo 65536, default = 65535));
hw_timeout would be more legibile -- this is a public interface.
Ok
static bool reset = 1;
module_param(reset, bool, 0);
@@ -72,10 +79,12 @@
* to 0
*/
static int prescale = 1;
-static unsigned int timeout_sec;
+static unsigned int hw_timo_sec;
+static int wdt_auto = 1;
bool, and add a comment indicating what this means.
Ok
static unsigned long wdt_is_open;
static DEFINE_SPINLOCK(wdt_spinlock);
+static unsigned long wdt_last_ping;
static void mpc8xxx_wdt_keepalive(void)
{
@@ -91,9 +100,20 @@
static void mpc8xxx_wdt_timer_ping(unsigned long arg)
{
-mpc8xxx_wdt_keepalive();
-/* We're pinging it twice faster than needed, just to be sure. */
-mod_timer(wdt_timer, jiffies + HZ * timeout_sec / 2);
+if (wdt_auto)
+wdt_last_ping = jiffies;
+
+if (jiffies - wdt_last_ping = timeout * HZ) {
So timeout cannot be more than UINT_MAX / HZ... Might want to check for
that, just in case.
Ok.
What happens if there's a race? If another CPU updates wdt_last_ping in
parallel, then you could see wdt_last_ping greater than the value you
Using the watchdog infrastructure (which has a mutex to avoid the problem)
would help avoiding this race.
read for jiffies. Since this is an unsigned comparison, it will fail to
call keepalive. You might get saved by pinging it twice as often as
necessary, but you shouldn't rely on that.
Euh ... This watchdog is integrated inside the CPU, so there is no chance that
any external CPU get access to it.
Unless I am missing something, neither jiffies nor wdt_last_ping nor timeout
is integrated inside a CPU.
There are macros for well defined time comparison which you possibly
might want to consider using (such as time_after() and time_before() etc).
My overall feedback is that I believe it would make more sense to convert
the driver to the watchdog infrastructure first, then add the softdog as
second patch.
Guenter
+mpc8xxx_wdt_keepalive();
+/* We're pinging it twice faster than needed, to be sure. */
+mod_timer(wdt_timer, jiffies + HZ * hw_timo_sec / 2);
+}
+}
+
+static void mpc8xxx_wdt_sw_keepalive(void)
+{
+wdt_last_ping = jiffies;
+mpc8xxx_wdt_timer_ping(0);
}
This isn't new with this patch, but it looks like
mpc8xxx_wdt_keepalive() can be called either from timer context, or with
interrupts enabled... yet it uses a bare spin_lock() rather than an
irq-safe version. This should be fixed.
Ok, I'll propose another patch for that. Indeed, is the spin_lock needed at all
? If we get two writes interleaved, it will make it anyway.
Christophe
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Re: [PATCH 63/63] powerpc: Add pseries_le_defconfig
+CONFIG_SCHED_SMT=y +CONFIG_PPC_DENORMALISATION=y +CONFIG_HOTPLUG_PCI=m Why the value m in the le_config file, when it is y in pseries_defconfig. We are out of sync already!?!?! *sigh* ;-) Also I do see a warning saying invalid value for this symbol. Mikey ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2] powerpc/booke64: Add LRAT error exception handler
LRAT (Logical to Real Address Translation) present in MMU v2 provides hardware translation from a logical page number (LPN) to a real page number (RPN) when tlbwe is executed by a guest or when a page table translation occurs from a guest virtual address. Add LRAT error exception handler to Booke3E 64-bit kernel and the basic KVM handler to avoid build breakage. This is a prerequisite for KVM LRAT support that will follow. Signed-off-by: Mihai Caraman mihai.cara...@freescale.com --- v2 - squash patches for bisectability - set IVOR42 from setup_cpu arch/powerpc/include/asm/kvm_asm.h|1 + arch/powerpc/include/asm/reg_booke.h |1 + arch/powerpc/kernel/cpu_setup_fsl_booke.S | 12 arch/powerpc/kernel/exceptions-64e.S | 17 + arch/powerpc/kvm/bookehv_interrupts.S |2 ++ 5 files changed, 33 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h index 851bac7..83b91e5 100644 --- a/arch/powerpc/include/asm/kvm_asm.h +++ b/arch/powerpc/include/asm/kvm_asm.h @@ -74,6 +74,7 @@ #define BOOKE_INTERRUPT_GUEST_DBELL_CRIT 39 #define BOOKE_INTERRUPT_HV_SYSCALL 40 #define BOOKE_INTERRUPT_HV_PRIV 41 +#define BOOKE_INTERRUPT_LRAT_ERROR 42 /* book3s */ diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index b417de3..6b113e1 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h @@ -101,6 +101,7 @@ #define SPRN_IVOR390x1B1 /* Interrupt Vector Offset Register 39 */ #define SPRN_IVOR400x1B2 /* Interrupt Vector Offset Register 40 */ #define SPRN_IVOR410x1B3 /* Interrupt Vector Offset Register 41 */ +#define SPRN_IVOR420x1B4 /* Interrupt Vector Offset Register 42 */ #define SPRN_GIVOR20x1B8 /* Guest IVOR2 */ #define SPRN_GIVOR30x1B9 /* Guest IVOR3 */ #define SPRN_GIVOR40x1BA /* Guest IVOR4 */ diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S index 0b9af01..754a11d 100644 --- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S +++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S @@ -57,6 +57,12 @@ _GLOBAL(__setup_cpu_e6500) mflrr6 #ifdef CONFIG_PPC64 bl .setup_altivec_ivors + /* Touch IVOR42 only if the CPU supports E.HV category */ + mfspr r10,SPRN_MMUCFG + rlwinm. r10,r10,0,MMUCFG_LPIDSIZE + beq 1f + bl .setup_lrat_ivor +1: #endif bl __setup_cpu_e5500 mtlrr6 @@ -119,6 +125,12 @@ _GLOBAL(__setup_cpu_e5500) _GLOBAL(__restore_cpu_e6500) mflrr5 bl .setup_altivec_ivors + /* Touch IVOR42 only if the CPU supports E.HV category */ + mfspr r10,SPRN_MMUCFG + rlwinm. r10,r10,0,MMUCFG_LPIDSIZE + beq 1f + bl .setup_lrat_ivor +1: bl __restore_cpu_e5500 mtlrr5 blr diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S index 645170a..9e4a506 100644 --- a/arch/powerpc/kernel/exceptions-64e.S +++ b/arch/powerpc/kernel/exceptions-64e.S @@ -308,6 +308,7 @@ interrupt_base_book3e: /* fake trap */ EXCEPTION_STUB(0x2e0, guest_doorbell_crit) EXCEPTION_STUB(0x300, hypercall) EXCEPTION_STUB(0x320, ehpriv) + EXCEPTION_STUB(0x340, lrat_error) .globl interrupt_end_book3e interrupt_end_book3e: @@ -675,6 +676,17 @@ kernel_dbg_exc: bl .unknown_exception b .ret_from_except +/* LRAT Error interrupt */ + START_EXCEPTION(lrat_error); + NORMAL_EXCEPTION_PROLOG(0x340, BOOKE_INTERRUPT_LRAT_ERROR, + PROLOG_ADDITION_NONE) + EXCEPTION_COMMON(0x340, PACA_EXGEN, INTS_KEEP) + addir3,r1,STACK_FRAME_OVERHEAD + bl .save_nvgprs + INTS_RESTORE_HARD + bl .unknown_exception + b .ret_from_except + /* * An interrupt came in while soft-disabled; We mark paca-irq_happened * accordingly and if the interrupt is level sensitive, we hard disable @@ -857,6 +869,7 @@ BAD_STACK_TRAMPOLINE(0x2e0) BAD_STACK_TRAMPOLINE(0x300) BAD_STACK_TRAMPOLINE(0x310) BAD_STACK_TRAMPOLINE(0x320) +BAD_STACK_TRAMPOLINE(0x340) BAD_STACK_TRAMPOLINE(0x400) BAD_STACK_TRAMPOLINE(0x500) BAD_STACK_TRAMPOLINE(0x600) @@ -1412,3 +1425,7 @@ _GLOBAL(setup_ehv_ivors) SET_IVOR(38, 0x2c0) /* Guest Processor Doorbell */ SET_IVOR(39, 0x2e0) /* Guest Processor Doorbell Crit/MC */ blr + +_GLOBAL(setup_lrat_ivor) + SET_IVOR(42, 0x340) /* LRAT Error */ + blr diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S index e8ed7d6..a0d6929 100644 --- a/arch/powerpc/kvm/bookehv_interrupts.S +++ b/arch/powerpc/kvm/bookehv_interrupts.S @@ -319,6 +319,8 @@ kvm_handler BOOKE_INTERRUPT_DEBUG, EX_PARAMS(DBG), \ SPRN_DSRR0,
Re: [RFC PATCH 2/9] powerpc: handle machine check in Linux host.
On 08/08/2013 10:21 AM, Paul Mackerras wrote: On Wed, Aug 07, 2013 at 03:08:15PM +0530, Mahesh J Salgaonkar wrote: From: Mahesh Salgaonkar mah...@linux.vnet.ibm.com Move machine check entry point into Linux. So far we were dependent on firmware to decode MCE error details and handover the high level info to OS. This patch introduces early machine check routine that saves the MCE information (srr1, srr0, dar and dsisr) to the emergency stack. We allocate stack frame on emergency stack and set the r1 accordingly. This allows us to be prepared to take another exception without loosing context. One thing to note here that, if we get another machine check while ME bit is off then we risk a checkstop. Hence we restrict ourselves to save only MCE information and turn the ME bit on. Some comments below: + * Swicth to emergency stack and handle re-entrancy (though we currently ^ Switch + * don't test for overflow). Save MCE registers srr1, srr0, dar and + * dsisr and then turn the ME bit on. + */ +#define __EARLY_MACHINE_CHECK_HANDLER(area, label) \ +/* Check if we are laready using emergency stack. */\ +ld r10,PACAEMERGSP(r13); \ +subir10,r10,THREAD_SIZE;\ +rldicr r10,r10,0,(63 - THREAD_SHIFT); \ +rldicr r11,r1,0,(63 - THREAD_SHIFT); \ +cmpdr10,r11;/* Are we using emergency stack? */ \ This assumes that r1 contains a host kernel stack pointer value. However, we could be coming in from a guest, or from userspace, in which case r1 could have any value at all, and we shouldn't even be considering using it as our stack pointer. I see your point. I need to have different mechanism to keep track of emergency stack pointer. May be using some sratch registers or something in paca structure. There is another complication, too: if we are coming in from a KVM guest running on a secondary thread (not thread 0), we will be using part of the emergency stack already (see kvm_start_guest in arch/powerpc/kvm/book3s_hv_rmhandlers.S). However, because we have come in from a guest, r1 contains a guest value, and we would have to look in KVM data structures to find out how much of the emergency stack we have already used. I'm not sure at the moment what the best way to fix this is. How about adding a paca member to maintain current emergency stack pointer in use? +mr r11,r1; /* Save current stack pointer */\ +beq 0f; \ +ld r1,PACAEMERGSP(r13);/* Use emergency stack */ \ +0: subir1,r1,INT_FRAME_SIZE; /* alloc stack frame */ \ +std r11,GPR1(r1); \ +std r11,0(r1); /* make stack chain pointer */ \ +mfspr r11,SPRN_SRR0; /* Save SRR0 */ \ +std r11,_NIP(r1); \ +mfspr r11,SPRN_SRR1; /* Save SRR1 */ \ +std r11,_MSR(r1); \ +mfspr r11,SPRN_DAR; /* Save DAR */ \ +std r11,_DAR(r1); \ +mfspr r11,SPRN_DSISR; /* Save DSISR */\ +std r11,_DSISR(r1); \ +mfmsr r11;/* get MSR value */ \ +ori r11,r11,MSR_ME; /* turn on ME bit */\ +ld r12,PACAKBASE(r13); /* get high part of label */ \ +LOAD_HANDLER(r12,label) \ +mtspr SPRN_SRR0,r12; \ +mtspr SPRN_SRR1,r11; \ +rfid; \ +b . /* prevent speculative execution */ +#define EARLY_MACHINE_CHECK_HANDLER(area, label)\ +__EARLY_MACHINE_CHECK_HANDLER(area, label) Given this is only used in one place, why make this a macro? Wouldn't it be simpler and neater to just spell out this code in the place where you use the macro? Sure, will do that. +/* + * Handle machine check early in real mode. We come here with + * ME bit on with MMU (IR and DR) off and using emergency stack. + */ +.align 7 +.globl machine_check_handle_early +machine_check_handle_early: +std r9,_CCR(r1) /* Save CR in stackframe */ +std r0,GPR0(r1) /* Save r0, r2 - r10 */ +EXCEPTION_PROLOG_COMMON_2(0x200, PACA_EXMC) +bl .save_nvgprs +addir3,r1,STACK_FRAME_OVERHEAD +bl .machine_check_early +cmpdi r3,0/* Did we handle it? */
Re: [RFC PATCH 7/9] powerpc: Decode and save machine check event.
On 08/08/2013 10:44 AM, Paul Mackerras wrote: On Wed, Aug 07, 2013 at 03:09:13PM +0530, Mahesh J Salgaonkar wrote: From: Mahesh Salgaonkar mah...@linux.vnet.ibm.com Now that we handle machine check in linux, the MCE decoding should also take place in linux host. This info is crucial to log before we go down in case we can not handle the machine check errors. This patch decodes and populates a machine check event which contain high level meaning full MCE information. A couple of things worry me about this patch: First, there is the fact that we can only do get_mce_event() once for a given machine check. You call it in kvmppc_realmode_mc_power7(), which is fine, but if it is not something we recognize and can handle we will proceed to exit the guest and jump to machine_check_fwnmi, which will then proceed to machine_check_common() and then opal_machine_check(), where you have added another call to get_mce_event(), which will probably underflow your little per-cpu stack of machine check events. Ouch! I missed that. Will work on fixing it. Secondly, we shouldn't call save_mce_event() if we're not in hypervisor mode, since per-cpu variables are not in general accessible in real mode when running under a hypervisor with a limited real-mode area (RMA). Does that mean in real mode we can never be able to access per cpu variable? OR do I need to use some tweaks to access those? Thanks, -Mahesh. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [RFC PATCH 2/9] powerpc: handle machine check in Linux host.
On Thu, 2013-08-08 at 18:49 +0530, Mahesh Jagannath Salgaonkar wrote: But, I think I should depend on evt-disposition==MCE_DISPOSITION_RECOVERED and not play with MSR_RI and SRR1. I will fix my code. If MSR:RI is 0, then you have clobbered SRR0/SRR1 beyond repair and probably cannot recover. Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [RFC PATCH 7/9] powerpc: Decode and save machine check event.
On Thu, 2013-08-08 at 18:49 +0530, Mahesh Jagannath Salgaonkar wrote: Secondly, we shouldn't call save_mce_event() if we're not in hypervisor mode, since per-cpu variables are not in general accessible in real mode when running under a hypervisor with a limited real-mode area (RMA). Does that mean in real mode we can never be able to access per cpu variable? OR do I need to use some tweaks to access those? Right, all you can access is stuff that was specifically allocated to be in the RMA during boot, such as the PACA's. Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [RFC PATCH 1/1] powerpc/embedded6xx: Add support for Motorola/Emerson MVME5100.
On Aug 7, 2013, at 7:03 PM, Stephen N Chivers wrote: Add support for the Motorola/Emerson MVME5100 Single Board Computer. The MVME5100 is a 6U form factor VME64 computer with: - A single MPC7410 or MPC750 CPU - A HAWK Processor Host Bridge (CPU to PCI) and MultiProcessor Interrupt Controller (MPIC) - Up to 500Mb of onboard memory - A M48T37 Real Time Clock (RTC) and Non-Volatile Memory chip - Two 16550 compatible UARTS - Two Intel E100 Fast Ethernets - Two PCI Mezzanine Card (PMC) Slots - PPCBug Firmware The HAWK PHB/MPIC is compatible with the MPC10x devices. There is no onboard disk support. This is usually provided by installing a PMC in first PMC slot. This patch revives the board support, it was present in early 2.6 series kernels. The board support in those days was by Matt Porter of MontaVista Software. CSC Australia has around 31 of these boards in service. The kernel in use for the boards is based on 2.6.31. The boards are operated without disks from a file server. This patch is based on linux-3.11-rc4 and has been boot tested. Signed-off-by: Stephen Chivers schiv...@csc.com --- arch/powerpc/boot/dts/mvme5100.dts| 195 ++ arch/powerpc/boot/mvme5100.c | 28 + arch/powerpc/configs/mvme5100_defconfig | 2597 + arch/powerpc/platforms/embedded6xx/mvme5100.c | 288 +++ 4 files changed, 3108 insertions(+), 0 deletions(-) Please look at fixing the white space issues you seem to have throughout this patch. Also, we don't take full defconfigs in the tree, look at 'make savedefconfig' - k ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 63/63] powerpc: Add pseries_le_defconfig
Michael Ellerman mich...@ellerman.id.au writes: On Wed, Aug 07, 2013 at 09:31:00AM +1000, Michael Neuling wrote: Anton Blanchard an...@samba.org wrote: This is the pseries_defconfig with CONFIG_CPU_LITTLE_ENDIAN enabled and CONFIG_VIRTUALIZATION disabled (required until we fix some endian issues in KVM). The CONFIG_VIRTUALIZATION disabling should be done in the Kconfig not here. I'm not that keen on another defconfig. benh is already talking about having a powernv defconfig. I'm worried we are going to fragment the defconfigs. If you want something special like LE, then change the default one. I disagree. defconfigs are great because they're easy to add to kisskb or other auto builders, making automated build testing easier. In fact because the defconfigs are pretty much the only thing that people build test, if you stray too far from them you are almost guaranteed to find breakage. For example the UP build was broken for months because we didn't have a defconfig for it. This is true. My test build for patches mostly include for config in . do make $config done -aneesh ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 2/2] powerpc/pseries: Add backward compatibilty to read old kernel oops-log
Older kernels has just length information in their header. Handle it
while reading old kernel oops log from pstore.
Applies on top of powerpc/pseries: Fix buffer overflow when reading from pstore
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
---
arch/powerpc/platforms/pseries/nvram.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/nvram.c
b/arch/powerpc/platforms/pseries/nvram.c
index 893f360..6a5f2b1 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -720,15 +720,25 @@ static ssize_t nvram_pstore_read(u64 *id, enum
pstore_type_id *type,
if (nvram_type_ids[read_type] == PSTORE_TYPE_DMESG) {
int length, unzipped_len;
+ size_t hdr_size;
oops_hdr = (struct oops_log_info *)buff;
- length = oops_hdr-report_length;
+ if (oops_hdr-version OOPS_HDR_VERSION) {
+ /* Old format oops header had 2-byte record size */
+ hdr_size = sizeof(u16);
+ length = oops_hdr-version;
+ time-tv_sec = 0;
+ time-tv_nsec = 0;
+ } else {
+ hdr_size = sizeof(*oops_hdr);
+ length = oops_hdr-report_length;
+ time-tv_sec = oops_hdr-timestamp;
+ time-tv_nsec = 0;
+ }
*buf = kmalloc(length, GFP_KERNEL);
if (*buf == NULL)
return -ENOMEM;
- memcpy(*buf, buff + sizeof(*oops_hdr), length);
- time-tv_sec = oops_hdr-timestamp;
- time-tv_nsec = 0;
+ memcpy(*buf, buff + hdr_size, length);
kfree(buff);
if (err_type == ERR_TYPE_KERNEL_PANIC_GZ) {
___
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[PATCH 1/2] powerpc/pseries: Fix buffer overflow when reading from pstore
When reading from pstore there is a buffer overflow during decompression
due to the header added in unzip_oops. Remove unzip_oops and call
pstore_decompress directly in nvram_pstore_read. Allocate buffer of size
report_length of the oops header as header will not be deallocated in pstore.
Since we have 'openssl' command line tool to decompress the compressed data,
dump the compressed data in case decompression fails instead of not dumping
anything.
Signed-off-by: Aruna Balakrishnaiah ar...@linux.vnet.ibm.com
---
arch/powerpc/platforms/pseries/nvram.c | 70 +++-
1 file changed, 24 insertions(+), 46 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/nvram.c
b/arch/powerpc/platforms/pseries/nvram.c
index 9f8671a..893f360 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -569,35 +569,6 @@ error:
return ret;
}
-static int unzip_oops(char *oops_buf, char *big_buf)
-{
- struct oops_log_info *oops_hdr = (struct oops_log_info *)oops_buf;
- u64 timestamp = oops_hdr-timestamp;
- char *big_oops_data = NULL;
- char *oops_data_buf = NULL;
- size_t big_oops_data_sz;
- int unzipped_len;
-
- big_oops_data = big_buf + sizeof(struct oops_log_info);
- big_oops_data_sz = big_oops_buf_sz - sizeof(struct oops_log_info);
- oops_data_buf = oops_buf + sizeof(struct oops_log_info);
-
- unzipped_len = nvram_decompress(oops_data_buf, big_oops_data,
- oops_hdr-report_length,
- big_oops_data_sz);
-
- if (unzipped_len 0) {
- pr_err(nvram: decompression failed; returned %d\n,
- unzipped_len);
- return -1;
- }
- oops_hdr = (struct oops_log_info *)big_buf;
- oops_hdr-version = OOPS_HDR_VERSION;
- oops_hdr-report_length = (u16) unzipped_len;
- oops_hdr-timestamp = timestamp;
- return 0;
-}
-
static int nvram_pstore_open(struct pstore_info *psi)
{
/* Reset the iterator to start reading partitions again */
@@ -685,10 +656,9 @@ static ssize_t nvram_pstore_read(u64 *id, enum
pstore_type_id *type,
unsigned int err_type, id_no, size = 0;
struct nvram_os_partition *part = NULL;
char *buff = NULL, *big_buff = NULL;
- int rc, sig = 0;
+ int sig = 0;
loff_t p;
-read_partition:
read_type++;
switch (nvram_type_ids[read_type]) {
@@ -749,30 +719,36 @@ read_partition:
*id = id_no;
if (nvram_type_ids[read_type] == PSTORE_TYPE_DMESG) {
+ int length, unzipped_len;
+
oops_hdr = (struct oops_log_info *)buff;
- *buf = buff + sizeof(*oops_hdr);
+ length = oops_hdr-report_length;
+ *buf = kmalloc(length, GFP_KERNEL);
+ if (*buf == NULL)
+ return -ENOMEM;
+ memcpy(*buf, buff + sizeof(*oops_hdr), length);
+ time-tv_sec = oops_hdr-timestamp;
+ time-tv_nsec = 0;
+ kfree(buff);
if (err_type == ERR_TYPE_KERNEL_PANIC_GZ) {
big_buff = kmalloc(big_oops_buf_sz, GFP_KERNEL);
if (!big_buff)
return -ENOMEM;
- rc = unzip_oops(buff, big_buff);
+ unzipped_len = nvram_decompress(*buf, big_buff,
+ length, big_oops_buf_sz);
- if (rc != 0) {
- kfree(buff);
+ if (unzipped_len 0) {
+ pr_err(nvram: decompression failed, returned
+ rc %d\n, unzipped_len);
kfree(big_buff);
- goto read_partition;
+ } else {
+ *buf = big_buff;
+ length = unzipped_len;
}
-
- oops_hdr = (struct oops_log_info *)big_buff;
- *buf = big_buff + sizeof(*oops_hdr);
- kfree(buff);
}
-
- time-tv_sec = oops_hdr-timestamp;
- time-tv_nsec = 0;
- return oops_hdr-report_length;
+ return length;
}
*buf = buff;
@@ -816,6 +792,7 @@ static int nvram_pstore_init(void)
static void __init nvram_init_oops_partition(int rtas_partition_exists)
{
int rc;
+ size_t size;
rc = pseries_nvram_init_os_partition(oops_log_partition);
if (rc != 0) {
@@ -844,8 +821,9 @@ static void __init nvram_init_oops_partition(int
rtas_partition_exists)
big_oops_buf_sz = (oops_data_sz * 100) / 45;
big_oops_buf =
Re: [RFC PATCH 1/1] powerpc/embedded6xx: Add support for Motorola/Emerson MVME5100.
On Thu, 2013-08-08 at 10:30 -0500, Kumar Gala wrote: On Aug 7, 2013, at 7:03 PM, Stephen N Chivers wrote: Add support for the Motorola/Emerson MVME5100 Single Board Computer. The MVME5100 is a 6U form factor VME64 computer with: - A single MPC7410 or MPC750 CPU - A HAWK Processor Host Bridge (CPU to PCI) and MultiProcessor Interrupt Controller (MPIC) - Up to 500Mb of onboard memory - A M48T37 Real Time Clock (RTC) and Non-Volatile Memory chip - Two 16550 compatible UARTS - Two Intel E100 Fast Ethernets - Two PCI Mezzanine Card (PMC) Slots - PPCBug Firmware The HAWK PHB/MPIC is compatible with the MPC10x devices. There is no onboard disk support. This is usually provided by installing a PMC in first PMC slot. This patch revives the board support, it was present in early 2.6 series kernels. The board support in those days was by Matt Porter of MontaVista Software. CSC Australia has around 31 of these boards in service. The kernel in use for the boards is based on 2.6.31. The boards are operated without disks from a file server. This patch is based on linux-3.11-rc4 and has been boot tested. Signed-off-by: Stephen Chivers schiv...@csc.com --- arch/powerpc/boot/dts/mvme5100.dts| 195 ++ arch/powerpc/boot/mvme5100.c | 28 + arch/powerpc/configs/mvme5100_defconfig | 2597 + arch/powerpc/platforms/embedded6xx/mvme5100.c | 288 +++ 4 files changed, 3108 insertions(+), 0 deletions(-) Please look at fixing the white space issues you seem to have throughout this patch. Also, we don't take full defconfigs in the tree, look at 'make savedefconfig' Why does this board need its own defconfig at all? Just add it to ppc6xx_defconfig. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v4 00/31] add COMMON_CLK support for PowerPC MPC512x
On Wed, Aug 07, 2013 at 10:40 -0500, Kumar Gala wrote:
On Aug 6, 2013, at 3:43 PM, Gerhard Sittig wrote:
this series
- fixes several drivers that are used in the MPC512x platform (UART,
SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they
handle clocks (appropriately acquire and setup them, hold references
during use, release clocks after use)
- introduces support for the common clock framework (CCF, COMMON_CLK
Kconfig option) in the PowerPC based MPC512x platform, which brings
device tree based clock lookup as well
although the series does touch several subsystems -- tty (serial), spi,
net (can, fs_enet), mtd (nfc), usb, i2c, media (viu), and dts -- all of
the patches are strictly clock related or trivial
it appears most appropriate to take this series through either the clk
or the powerpc trees after it has passed review and other subsystem
maintainers ACKed the clock setup related driver modifications
the series passes 'checkpatch.pl --strict' except for one warning which
cannot get resolved, since that either breaks compilation (the data type
is preset by the clk-provider.h API) or requires a cast which shadows
real mismatches:
WARNING: static const char * array should probably be static const char *
const
#431: FILE: arch/powerpc/platforms/512x/clock-commonclk.c:334:
+static const char *parent_names_mux0[] = {
total: 0 errors, 1 warnings, 0 checks, 807 lines checked
each step in the series was build and run tested (with a display that is
attached to the DIU as well as SPI, with an SPI attached NOR flash, with
multiple UART ports such that one is not the boot console, with EEPROMs
attached to I2C, with an SD card, booting from network)
How do the driver changes impact other PPC SoCs that use the
same drivers (i2c, fs_enet, usb) ?
For SPI and UART (the PSC component), the hardware is shared
between MPC512x and MPC5200, but only routines and data specific
to MPC512x get changed.
For USB the fsl.*usb2 hardware appears to be shared among
Freescale SoCs. AFAICS i.MX has a separate driver under arm/,
MPC83xx has a separate driver under arch/powerpc/platforms/83xx/,
and the driver I'm touching is only changed in routines specific
to MPC512x.
The NAND and VIU drivers only attach to hardware on the MPC512x
platform (checked the compatible string, only referenced from the
mpc5121.dtsi).
I2C, ethernet, PCI all are similar: A non-fatal clock lookup is
introduced, CCF platforms (512x only ATM) will carry out
appropriate clock operations, non-CCF platforms won't see a
change in behaviour (lookup fails which isn't fatal, and the
drivers assume that somebody else will have taken care of clocks
for them).
MSCAN is shared among 512x and 52xx, the common code introduces
transparent yet optional support for CCF, the 512x code path
makes use of it, 52xx sees no change in behaviour.
The DIU component (display output) is shared among platforms, but
only the platform initialization in the MPC512x code path gets
changed to make use of the CCF support, while no other platform
sees any change.
The MPC512x common clock core driver does use common primitives
and redirects the register access primitives. But the series
doesn't change register access for ARM (static inline call to the
previous hardcoded routine and thus identical object code), and
doesn't modify nor extend the shared code for gates, dividers and
multiplexers.
The device tree changes only apply to MPC512x, and only provide
hardware related information that formerly was missing.
To summarize, I see no impact for other architectures or
platforms. Although it would be good to get a second opinion
from persons with USB knowledge, to make sure I haven't missed
something.
virtually yours
Gerhard Sittig
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de
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Re: [PATCH v4 11/31] net: can: mscan: improve clock API use
On Wed, Aug 07, 2013 at 09:28 +0200, Marc Kleine-Budde wrote:
On 08/06/2013 10:43 PM, Gerhard Sittig wrote:
[ ... ]
diff --git a/drivers/net/can/mscan/mscan.c b/drivers/net/can/mscan/mscan.c
index e6b4095..4f998f5 100644
--- a/drivers/net/can/mscan/mscan.c
+++ b/drivers/net/can/mscan/mscan.c
@@ -573,10 +573,24 @@ static int mscan_open(struct net_device *dev)
struct mscan_priv *priv = netdev_priv(dev);
struct mscan_regs __iomem *regs = priv-reg_base;
+ if (priv-clk_ipg) {
+ ret = clk_prepare_enable(priv-clk_ipg);
+ if (ret)
+ goto exit_retcode;
+ }
+ if (priv-clk_can) {
+ ret = clk_prepare_enable(priv-clk_can);
+ if (ret) {
+ if (priv-clk_ipg)
+ clk_disable_unprepare(priv-clk_ipg);
+ goto exit_retcode;
Why don't you add another jump label and jump to that to disable the
ipkg clock?
You are right. I've queued this change for v5 (adding a label in
the existing error path, jumping to it instead of explicitly
disabling the clock).
+ }
+ }
+
/* common open */
ret = open_candev(dev);
if (ret)
- return ret;
+ goto exit_dis_clock;
napi_enable(priv-napi);
@@ -604,6 +618,12 @@ exit_free_irq:
exit_napi_disable:
napi_disable(priv-napi);
close_candev(dev);
+exit_dis_clock:
+ if (priv-clk_can)
+ clk_disable_unprepare(priv-clk_can);
+ if (priv-clk_ipg)
+ clk_disable_unprepare(priv-clk_ipg);
+exit_retcode:
return ret;
}
Marc
Thank you for reviewing several versions of the patch!
virtually yours
Gerhard Sittig
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de
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Re: [PATCH v4 09/31] powerpc/fsl-pci: improve clock API use
On Tue, 6 Aug 2013 22:43:49 +0200
Gerhard Sittig g...@denx.de wrote:
...
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 46ac1dd..549ff08 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
...
+ clk = devm_clk_get(pdev-dev, per);
+ if (!IS_ERR(clk)) {
+ ret = clk_prepare_enable(clk);
+ if (ret) {
+ dev_err(dev, Could not enable peripheral clock\n);
above line will break building. s/dev,/pdev-dev,/
Thanks,
Anatolij
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Re: Failure to detect PCI card
On Mon, Aug 5, 2013 at 7:01 PM, David Hawkins d...@ovro.caltech.edu wrote: I suspect the lack of either the 5V or 3.3V power rail to the card might be the problem. Did you probe the PCI edge connect to see what supplies were present? For those that are interested, we did figure out what was going on. Turns out that the clock buffer driving the PCI connector was, well, less than adequate. With some cards, the load on the clock line was large enough that the clock was in horrible shape. Fixing the clock line and the card that failed to be recognized started working. For the other cards that worked, the load on the clock line was significantly less, but the clock was still marginal. Anyway, turned out to be a hardware issue. Thanks to all that helped! Pete ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: Failure to detect PCI card
Hi Pete, For those that are interested, we did figure out what was going on. Turns out that the clock buffer driving the PCI connector was, well, less than adequate. With some cards, the load on the clock line was large enough that the clock was in horrible shape. Fixing the clock line and the card that failed to be recognized started working. For the other cards that worked, the load on the clock line was significantly less, but the clock was still marginal. Anyway, turned out to be a hardware issue. Thanks to all that helped! Thanks for posting that you solved the issue. The old engineering debug mantra ran true; check the power, then clocks, then debug :) Cheers, Dave ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCHv8 01/10] PCI: use weak functions for MSI arch-specific functions
Until now, the MSI architecture-specific functions could be overloaded
using a fairly complex set of #define and compile-time
conditionals. In order to prepare for the introduction of the msi_chip
infrastructure, it is desirable to switch all those functions to use
the 'weak' mechanism. This commit converts all the architectures that
were overidding those MSI functions to use the new strategy.
Note that we keep two separate, non-weak, functions
default_teardown_msi_irqs() and default_restore_msi_irqs() for the
default behavior of the arch_teardown_msi_irqs() and
arch_restore_msi_irqs(), as the default behavior is needed by x86 PCI
code.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Acked-by: Bjorn Helgaas bhelg...@google.com
Tested-by: Daniel Price daniel.pr...@gmail.com
Tested-by: Thierry Reding thierry.red...@gmail.com
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Martin Schwidefsky schwidef...@de.ibm.com
Cc: Heiko Carstens heiko.carst...@de.ibm.com
Cc: linux...@de.ibm.com
Cc: linux-s...@vger.kernel.org
Cc: Thomas Gleixner t...@linutronix.de
Cc: Ingo Molnar mi...@redhat.com
Cc: H. Peter Anvin h...@zytor.com
Cc: x...@kernel.org
Cc: Russell King li...@arm.linux.org.uk
Cc: Tony Luck tony.l...@intel.com
Cc: Fenghua Yu fenghua...@intel.com
Cc: linux-i...@vger.kernel.org
Cc: Ralf Baechle r...@linux-mips.org
Cc: linux-m...@linux-mips.org
Cc: David S. Miller da...@davemloft.net
Cc: sparcli...@vger.kernel.org
Cc: Chris Metcalf cmetc...@tilera.com
---
arch/mips/include/asm/pci.h| 5 -
arch/powerpc/include/asm/pci.h | 5 -
arch/s390/include/asm/pci.h| 4
arch/x86/include/asm/pci.h | 28
arch/x86/kernel/x86_init.c | 21 ++
drivers/pci/msi.c | 48 +-
include/linux/msi.h| 8 ++-
7 files changed, 52 insertions(+), 67 deletions(-)
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index fa8e0aa..f194c08 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -136,11 +136,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev
*dev, int channel)
return channel ? 15 : 14;
}
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
-/* MSI arch hook for OCTEON */
-#define arch_setup_msi_irqs arch_setup_msi_irqs
-#endif
-
extern char * (*pcibios_plat_setup)(char *str);
#ifdef CONFIG_OF
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 6653f27..95145a1 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -113,11 +113,6 @@ extern int pci_domain_nr(struct pci_bus *bus);
/* Decide whether to display the domain number in /proc */
extern int pci_proc_domain(struct pci_bus *bus);
-/* MSI arch hooks */
-#define arch_setup_msi_irqs arch_setup_msi_irqs
-#define arch_teardown_msi_irqs arch_teardown_msi_irqs
-#define arch_msi_check_device arch_msi_check_device
-
struct vm_area_struct;
/* Map a range of PCI memory or I/O space for a device into user space */
int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
diff --git a/arch/s390/include/asm/pci.h b/arch/s390/include/asm/pci.h
index 6e577ba..262b91b 100644
--- a/arch/s390/include/asm/pci.h
+++ b/arch/s390/include/asm/pci.h
@@ -21,10 +21,6 @@ void pci_iounmap(struct pci_dev *, void __iomem *);
int pci_domain_nr(struct pci_bus *);
int pci_proc_domain(struct pci_bus *);
-/* MSI arch hooks */
-#define arch_setup_msi_irqsarch_setup_msi_irqs
-#define arch_teardown_msi_irqs arch_teardown_msi_irqs
-
#define ZPCI_BUS_NR0 /* default bus number */
#define ZPCI_DEVFN 0 /* default device number */
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index d9e9e6c..8c61de0 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -100,29 +100,6 @@ static inline void early_quirks(void) { }
extern void pci_iommu_alloc(void);
#ifdef CONFIG_PCI_MSI
-/* MSI arch specific hooks */
-static inline int x86_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
-{
- return x86_msi.setup_msi_irqs(dev, nvec, type);
-}
-
-static inline void x86_teardown_msi_irqs(struct pci_dev *dev)
-{
- x86_msi.teardown_msi_irqs(dev);
-}
-
-static inline void x86_teardown_msi_irq(unsigned int irq)
-{
- x86_msi.teardown_msi_irq(irq);
-}
-static inline void x86_restore_msi_irqs(struct pci_dev *dev, int irq)
-{
- x86_msi.restore_msi_irqs(dev, irq);
-}
-#define arch_setup_msi_irqs x86_setup_msi_irqs
-#define arch_teardown_msi_irqs x86_teardown_msi_irqs
-#define arch_teardown_msi_irq x86_teardown_msi_irq
-#define arch_restore_msi_irqs x86_restore_msi_irqs
/* implemented in arch/x86/kernel/apic/io_apic. */
struct msi_desc;
int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
@@ -130,11 +107,6 @@ void
[PATCHv8 02/10] PCI: remove ARCH_SUPPORTS_MSI kconfig option
Now that we have weak versions for each of the PCI MSI architecture functions, we can actually build the MSI support for all platforms, regardless of whether they provide or not architecture-specific versions of those functions. For this reason, the ARCH_SUPPORTS_MSI hidden kconfig boolean becomes useless, and this patch gets rid of it. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Acked-by: Bjorn Helgaas bhelg...@google.com Tested-by: Daniel Price daniel.pr...@gmail.com Tested-by: Thierry Reding thierry.red...@gmail.com Cc: Benjamin Herrenschmidt b...@kernel.crashing.org Cc: Paul Mackerras pau...@samba.org Cc: linuxppc-dev@lists.ozlabs.org Cc: Martin Schwidefsky schwidef...@de.ibm.com Cc: Heiko Carstens heiko.carst...@de.ibm.com Cc: linux...@de.ibm.com Cc: linux-s...@vger.kernel.org Cc: Thomas Gleixner t...@linutronix.de Cc: Ingo Molnar mi...@redhat.com Cc: H. Peter Anvin h...@zytor.com Cc: x...@kernel.org Cc: Russell King li...@arm.linux.org.uk Cc: Tony Luck tony.l...@intel.com Cc: Fenghua Yu fenghua...@intel.com Cc: linux-i...@vger.kernel.org Cc: Ralf Baechle r...@linux-mips.org Cc: linux-m...@linux-mips.org Cc: David S. Miller da...@davemloft.net Cc: sparcli...@vger.kernel.org Cc: Chris Metcalf cmetc...@tilera.com --- arch/arm/Kconfig | 1 - arch/ia64/Kconfig| 1 - arch/mips/Kconfig| 2 -- arch/powerpc/Kconfig | 1 - arch/s390/Kconfig| 1 - arch/sparc/Kconfig | 1 - arch/tile/Kconfig| 1 - arch/x86/Kconfig | 1 - drivers/pci/Kconfig | 4 9 files changed, 13 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 37c0f4e..41b6c96 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -441,7 +441,6 @@ config ARCH_NETX config ARCH_IOP13XX bool IOP13xx-based depends on MMU - select ARCH_SUPPORTS_MSI select CPU_XSC3 select NEED_MACH_MEMORY_H select NEED_RET_TO_USER diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index 5a768ad..098602b 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig @@ -9,7 +9,6 @@ config IA64 select PCI if (!IA64_HP_SIM) select ACPI if (!IA64_HP_SIM) select PM if (!IA64_HP_SIM) - select ARCH_SUPPORTS_MSI select HAVE_UNSTABLE_SCHED_CLOCK select HAVE_IDE select HAVE_OPROFILE diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index c3abed3..01b5f5a 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -726,7 +726,6 @@ config CAVIUM_OCTEON_SOC select SYS_HAS_CPU_CAVIUM_OCTEON select SWAP_IO_SPACE select HW_HAS_PCI - select ARCH_SUPPORTS_MSI select ZONE_DMA32 select USB_ARCH_HAS_OHCI select USB_ARCH_HAS_EHCI @@ -762,7 +761,6 @@ config NLM_XLR_BOARD select CEVT_R4K select CSRC_R4K select IRQ_CPU - select ARCH_SUPPORTS_MSI select ZONE_DMA32 if 64BIT select SYNC_R4K select SYS_HAS_EARLY_PRINTK diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 3bf72cd..183a165 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -727,7 +727,6 @@ config PCI default y if !40x !CPM2 !8xx !PPC_83xx \ !PPC_85xx !PPC_86xx !GAMECUBE_COMMON default PCI_QSPAN if !4xx !CPM2 8xx - select ARCH_SUPPORTS_MSI select GENERIC_PCI_IOMAP help Find out whether your system includes a PCI bus. PCI is the name of diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig index 22f75b5..e9982a3 100644 --- a/arch/s390/Kconfig +++ b/arch/s390/Kconfig @@ -428,7 +428,6 @@ menuconfig PCI bool PCI support default n depends on 64BIT - select ARCH_SUPPORTS_MSI select PCI_MSI help Enable PCI support. diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index a00cbd3..1570ad2 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -52,7 +52,6 @@ config SPARC32 config SPARC64 def_bool 64BIT - select ARCH_SUPPORTS_MSI select HAVE_FUNCTION_TRACER select HAVE_FUNCTION_GRAPH_TRACER select HAVE_FUNCTION_GRAPH_FP_TEST diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig index 24565a7..74dff90 100644 --- a/arch/tile/Kconfig +++ b/arch/tile/Kconfig @@ -380,7 +380,6 @@ config PCI select PCI_DOMAINS select GENERIC_PCI_IOMAP select TILE_GXIO_TRIO if TILEGX - select ARCH_SUPPORTS_MSI if TILEGX select PCI_MSI if TILEGX ---help--- Enable PCI root complex support, so PCIe endpoint devices can diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index b32ebf9..5db62ef 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2014,7 +2014,6 @@ menu Bus options (PCI etc.) config PCI bool PCI support default y - select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC X86_IO_APIC) ---help--- Find out whether you have a PCI motherboard. PCI is the name of a bus system, i.e. the way the CPU talks to the other
Re: [PATCHv8 01/10] PCI: use weak functions for MSI arch-specific functions
On Fri, 2013-08-09 at 00:17 +0200, Thomas Petazzoni wrote:
Until now, the MSI architecture-specific functions could be overloaded
using a fairly complex set of #define and compile-time
conditionals. In order to prepare for the introduction of the msi_chip
infrastructure, it is desirable to switch all those functions to use
the 'weak' mechanism. This commit converts all the architectures that
were overidding those MSI functions to use the new strategy.
Note that we keep two separate, non-weak, functions
default_teardown_msi_irqs() and default_restore_msi_irqs() for the
default behavior of the arch_teardown_msi_irqs() and
arch_restore_msi_irqs(), as the default behavior is needed by x86 PCI
code.
Looks good, I'll give it a quick spin to make sure there is no
accidental breakage on ppc today.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Acked-by: Bjorn Helgaas bhelg...@google.com
Tested-by: Daniel Price daniel.pr...@gmail.com
Tested-by: Thierry Reding thierry.red...@gmail.com
Acked-by: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Martin Schwidefsky schwidef...@de.ibm.com
Cc: Heiko Carstens heiko.carst...@de.ibm.com
Cc: linux...@de.ibm.com
Cc: linux-s...@vger.kernel.org
Cc: Thomas Gleixner t...@linutronix.de
Cc: Ingo Molnar mi...@redhat.com
Cc: H. Peter Anvin h...@zytor.com
Cc: x...@kernel.org
Cc: Russell King li...@arm.linux.org.uk
Cc: Tony Luck tony.l...@intel.com
Cc: Fenghua Yu fenghua...@intel.com
Cc: linux-i...@vger.kernel.org
Cc: Ralf Baechle r...@linux-mips.org
Cc: linux-m...@linux-mips.org
Cc: David S. Miller da...@davemloft.net
Cc: sparcli...@vger.kernel.org
Cc: Chris Metcalf cmetc...@tilera.com
---
arch/mips/include/asm/pci.h| 5 -
arch/powerpc/include/asm/pci.h | 5 -
arch/s390/include/asm/pci.h| 4
arch/x86/include/asm/pci.h | 28
arch/x86/kernel/x86_init.c | 21 ++
drivers/pci/msi.c | 48
+-
include/linux/msi.h| 8 ++-
7 files changed, 52 insertions(+), 67 deletions(-)
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index fa8e0aa..f194c08 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -136,11 +136,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev
*dev, int channel)
return channel ? 15 : 14;
}
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
-/* MSI arch hook for OCTEON */
-#define arch_setup_msi_irqs arch_setup_msi_irqs
-#endif
-
extern char * (*pcibios_plat_setup)(char *str);
#ifdef CONFIG_OF
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 6653f27..95145a1 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -113,11 +113,6 @@ extern int pci_domain_nr(struct pci_bus *bus);
/* Decide whether to display the domain number in /proc */
extern int pci_proc_domain(struct pci_bus *bus);
-/* MSI arch hooks */
-#define arch_setup_msi_irqs arch_setup_msi_irqs
-#define arch_teardown_msi_irqs arch_teardown_msi_irqs
-#define arch_msi_check_device arch_msi_check_device
-
struct vm_area_struct;
/* Map a range of PCI memory or I/O space for a device into user space */
int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
diff --git a/arch/s390/include/asm/pci.h b/arch/s390/include/asm/pci.h
index 6e577ba..262b91b 100644
--- a/arch/s390/include/asm/pci.h
+++ b/arch/s390/include/asm/pci.h
@@ -21,10 +21,6 @@ void pci_iounmap(struct pci_dev *, void __iomem *);
int pci_domain_nr(struct pci_bus *);
int pci_proc_domain(struct pci_bus *);
-/* MSI arch hooks */
-#define arch_setup_msi_irqs arch_setup_msi_irqs
-#define arch_teardown_msi_irqs arch_teardown_msi_irqs
-
#define ZPCI_BUS_NR 0 /* default bus number */
#define ZPCI_DEVFN 0 /* default device number */
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index d9e9e6c..8c61de0 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -100,29 +100,6 @@ static inline void early_quirks(void) { }
extern void pci_iommu_alloc(void);
#ifdef CONFIG_PCI_MSI
-/* MSI arch specific hooks */
-static inline int x86_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
-{
- return x86_msi.setup_msi_irqs(dev, nvec, type);
-}
-
-static inline void x86_teardown_msi_irqs(struct pci_dev *dev)
-{
- x86_msi.teardown_msi_irqs(dev);
-}
-
-static inline void x86_teardown_msi_irq(unsigned int irq)
-{
- x86_msi.teardown_msi_irq(irq);
-}
-static inline void x86_restore_msi_irqs(struct pci_dev *dev, int irq)
-{
- x86_msi.restore_msi_irqs(dev, irq);
-}
-#define arch_setup_msi_irqs x86_setup_msi_irqs
-#define arch_teardown_msi_irqs x86_teardown_msi_irqs
Re: [PATCHv8 02/10] PCI: remove ARCH_SUPPORTS_MSI kconfig option
On Fri, 2013-08-09 at 00:17 +0200, Thomas Petazzoni wrote: Now that we have weak versions for each of the PCI MSI architecture functions, we can actually build the MSI support for all platforms, regardless of whether they provide or not architecture-specific versions of those functions. For this reason, the ARCH_SUPPORTS_MSI hidden kconfig boolean becomes useless, and this patch gets rid of it. Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com Acked-by: Bjorn Helgaas bhelg...@google.com Tested-by: Daniel Price daniel.pr...@gmail.com Tested-by: Thierry Reding thierry.red...@gmail.com Acked-by: Benjamin Herrenschmidt b...@kernel.crashing.org Cc: Paul Mackerras pau...@samba.org Cc: linuxppc-dev@lists.ozlabs.org Cc: Martin Schwidefsky schwidef...@de.ibm.com Cc: Heiko Carstens heiko.carst...@de.ibm.com Cc: linux...@de.ibm.com Cc: linux-s...@vger.kernel.org Cc: Thomas Gleixner t...@linutronix.de Cc: Ingo Molnar mi...@redhat.com Cc: H. Peter Anvin h...@zytor.com Cc: x...@kernel.org Cc: Russell King li...@arm.linux.org.uk Cc: Tony Luck tony.l...@intel.com Cc: Fenghua Yu fenghua...@intel.com Cc: linux-i...@vger.kernel.org Cc: Ralf Baechle r...@linux-mips.org Cc: linux-m...@linux-mips.org Cc: David S. Miller da...@davemloft.net Cc: sparcli...@vger.kernel.org Cc: Chris Metcalf cmetc...@tilera.com --- arch/arm/Kconfig | 1 - arch/ia64/Kconfig| 1 - arch/mips/Kconfig| 2 -- arch/powerpc/Kconfig | 1 - arch/s390/Kconfig| 1 - arch/sparc/Kconfig | 1 - arch/tile/Kconfig| 1 - arch/x86/Kconfig | 1 - drivers/pci/Kconfig | 4 9 files changed, 13 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 37c0f4e..41b6c96 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -441,7 +441,6 @@ config ARCH_NETX config ARCH_IOP13XX bool IOP13xx-based depends on MMU - select ARCH_SUPPORTS_MSI select CPU_XSC3 select NEED_MACH_MEMORY_H select NEED_RET_TO_USER diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index 5a768ad..098602b 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig @@ -9,7 +9,6 @@ config IA64 select PCI if (!IA64_HP_SIM) select ACPI if (!IA64_HP_SIM) select PM if (!IA64_HP_SIM) - select ARCH_SUPPORTS_MSI select HAVE_UNSTABLE_SCHED_CLOCK select HAVE_IDE select HAVE_OPROFILE diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index c3abed3..01b5f5a 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -726,7 +726,6 @@ config CAVIUM_OCTEON_SOC select SYS_HAS_CPU_CAVIUM_OCTEON select SWAP_IO_SPACE select HW_HAS_PCI - select ARCH_SUPPORTS_MSI select ZONE_DMA32 select USB_ARCH_HAS_OHCI select USB_ARCH_HAS_EHCI @@ -762,7 +761,6 @@ config NLM_XLR_BOARD select CEVT_R4K select CSRC_R4K select IRQ_CPU - select ARCH_SUPPORTS_MSI select ZONE_DMA32 if 64BIT select SYNC_R4K select SYS_HAS_EARLY_PRINTK diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 3bf72cd..183a165 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -727,7 +727,6 @@ config PCI default y if !40x !CPM2 !8xx !PPC_83xx \ !PPC_85xx !PPC_86xx !GAMECUBE_COMMON default PCI_QSPAN if !4xx !CPM2 8xx - select ARCH_SUPPORTS_MSI select GENERIC_PCI_IOMAP help Find out whether your system includes a PCI bus. PCI is the name of diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig index 22f75b5..e9982a3 100644 --- a/arch/s390/Kconfig +++ b/arch/s390/Kconfig @@ -428,7 +428,6 @@ menuconfig PCI bool PCI support default n depends on 64BIT - select ARCH_SUPPORTS_MSI select PCI_MSI help Enable PCI support. diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index a00cbd3..1570ad2 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -52,7 +52,6 @@ config SPARC32 config SPARC64 def_bool 64BIT - select ARCH_SUPPORTS_MSI select HAVE_FUNCTION_TRACER select HAVE_FUNCTION_GRAPH_TRACER select HAVE_FUNCTION_GRAPH_FP_TEST diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig index 24565a7..74dff90 100644 --- a/arch/tile/Kconfig +++ b/arch/tile/Kconfig @@ -380,7 +380,6 @@ config PCI select PCI_DOMAINS select GENERIC_PCI_IOMAP select TILE_GXIO_TRIO if TILEGX - select ARCH_SUPPORTS_MSI if TILEGX select PCI_MSI if TILEGX ---help--- Enable PCI root complex support, so PCIe endpoint devices can diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index b32ebf9..5db62ef 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2014,7 +2014,6 @@ menu Bus options (PCI etc.) config PCI bool PCI support default y - select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC X86_IO_APIC) ---help--- Find out whether you have a PCI
Pull request: scottwood/linux.git next
The following changes since commit 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b:
Linux 3.11-rc2 (2013-07-21 12:05:29 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux.git next
for you to fetch changes up to c8db32c8669f7de05b820ee4934926405af52188:
powerpc/e500: Update compilation flags with core specific options (2013-08-07
18:49:44 -0500)
Catalin Udma (2):
powerpc/perf: increase the perf HW events to 6
powerpc/e500: Update compilation flags with core specific options
Dongsheng Wang (1):
powerpc/mpc85xx: invalidate TLB after hibernation resume
Haijun.Zhang (2):
powerpc/85xx: add P1020RDB-PD platform support
powerpc/85xx: add the P1020RDB-PD DTS support
Hongtao Jia (3):
powerpc: Move opcode definitions from kvm/emulate.c to asm/ppc-opcode.h
powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx
powerpc/msi: Fix compile error on mpc83xx
Ian Campbell (1):
powerpc/fsl-booke: Rename b4qds.dts - b4qds.dtsi.
Kevin Hao (3):
powerpc/mpc85xx: remove the unneeded pci init functions for corenet ds
board
powerpc/fsl-pci: fix the unreachable warning message
powerpc/fsl-pci: enable SWIOTLB in function setup_pci_atmu
Laurentiu TUDOR (1):
powerpc/85xx: Move ePAPR paravirt initialization earlier
Lijun Pan (2):
powerpc/perf: correct typos in counter enumeration
powerpc/perf: add 2 additional performance monitor counters for e6500 core
Minghuan Lian (3):
powerpc/dts: update MSI bindings doc for MPIC v4.3
powerpc/dts: add MPIC v4.3 dts node
powerpc/fsl_msi: add MSIIR1 support for MPIC v4.3
Priyanka Jain (1):
powerpc/perf: Add e6500 PMU driver
Wei Yongjun (1):
powerpc/fsl_msi: fix error return code in fsl_of_msi_probe()
Yuanquan Chen (1):
powerpc/pci: fix PCI-e check link issue
Zhenhua Luo (1):
powerpc/fsl: Enable CONFIG_DEVTMPFS_MOUNT so /dev can be mounted correctly
.../devicetree/bindings/powerpc/fsl/msi-pic.txt| 53 +++-
arch/powerpc/Makefile | 18 +-
arch/powerpc/boot/dts/b4420qds.dts | 2 +-
arch/powerpc/boot/dts/b4860qds.dts | 2 +-
arch/powerpc/boot/dts/{b4qds.dts = b4qds.dtsi}| 0
arch/powerpc/boot/dts/fsl/b4si-post.dtsi | 2 +-
arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi | 149 +++
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi| 2 +-
arch/powerpc/boot/dts/p1020rdb-pd.dts | 280 +
arch/powerpc/configs/85xx/p1023rds_defconfig | 1 +
arch/powerpc/configs/corenet32_smp_defconfig | 1 +
arch/powerpc/configs/corenet64_smp_defconfig | 1 +
arch/powerpc/configs/mpc83xx_defconfig | 1 +
arch/powerpc/configs/mpc85xx_defconfig | 1 +
arch/powerpc/configs/mpc85xx_smp_defconfig | 1 +
arch/powerpc/include/asm/epapr_hcalls.h| 6 +
arch/powerpc/include/asm/mpic.h| 7 +
arch/powerpc/include/asm/perf_event_fsl_emb.h | 2 +-
arch/powerpc/include/asm/ppc-opcode.h | 47
arch/powerpc/include/asm/reg_fsl_emb.h | 24 +-
arch/powerpc/kernel/cpu_setup_fsl_booke.S | 2 +-
arch/powerpc/kernel/cputable.c | 2 +-
arch/powerpc/kernel/epapr_paravirt.c | 28 ++-
arch/powerpc/kernel/setup_32.c | 4 +-
arch/powerpc/kernel/setup_64.c | 3 +
arch/powerpc/kernel/swsusp_booke.S | 8 +
arch/powerpc/kernel/traps.c| 3 +
arch/powerpc/kvm/emulate.c | 45 +---
arch/powerpc/oprofile/op_model_fsl_emb.c | 30 +++
arch/powerpc/perf/Makefile | 2 +-
arch/powerpc/perf/core-fsl-emb.c | 30 +++
arch/powerpc/perf/e6500-pmu.c | 121 +
arch/powerpc/platforms/85xx/corenet_ds.c | 6 -
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 22 ++
arch/powerpc/sysdev/fsl_msi.c | 137 +++---
arch/powerpc/sysdev/fsl_msi.h | 10 +-
arch/powerpc/sysdev/fsl_pci.c | 184 --
arch/powerpc/sysdev/fsl_pci.h | 6 +
38 files changed, 1088 insertions(+), 155 deletions(-)
rename arch/powerpc/boot/dts/{b4qds.dts = b4qds.dtsi} (100%)
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi
create mode 100644 arch/powerpc/boot/dts/p1020rdb-pd.dts
create mode 100644 arch/powerpc/perf/e6500-pmu.c
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Re: [PATCH 63/63] powerpc: Add pseries_le_defconfig
Anton Blanchard an...@samba.org wrote: Hi, The CONFIG_VIRTUALIZATION disabling should be done in the Kconfig not here. I'm not that keen on another defconfig. benh is already talking about having a powernv defconfig. I'm worried we are going to fragment the defconfigs. If you want something special like LE, then change the default one. I agree we don't want machine specific defconfigs, but I think it makes sense to have ones that cover the key options that conflict. I'm thinking 32bit, 64bit, 64bit BookE, 64bit LE etc. One bonus is if we have a smaller set of defconfigs we might actually get better testing. I have no idea which 32bit defconfigs I should test for example, and I'm not going to test them all! FWIW, I test with these configs and it seems to catch most of 32/64 bit, SMP/UP, differnt MMU issues: pseries_defconfig ppc64_defconfig ppc64e_defconfig pmac32_defconfig ppc44x_defconfig ppc6xx_defconfig mpc85xx_smp_defconfig mpc85xx_defconfig chroma_defconfig ps3_defconfig celleb_defconfig Mikey ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] mmc:of_spi: Update the code of getting voltage-ranges
On Wed, Jul 31, 2013 at 02:25:27PM +0800, Haijun Zhang wrote:
int num_ranges;
+ u32 ocr_mask;
int i;
int ret = -EINVAL;
@@ -102,26 +103,11 @@ struct mmc_spi_platform_data *mmc_spi_get_pdata(struct
spi_device *spi)
if (!oms)
return NULL;
- voltage_ranges = of_get_property(np, voltage-ranges, num_ranges);
- num_ranges = num_ranges / sizeof(*voltage_ranges) / 2;
- if (!voltage_ranges || !num_ranges) {
- dev_err(dev, OF: voltage-ranges unspecified\n);
+ ocr_mask = mmc_of_parse_voltage(np);
+ if (ocr_mask = 0)
' 0' check for an unsigned type? :) I'd write just !ocr_mask...
But other than that the patch looks good to me...
Reviewed-by: Anton Vorontsov an...@enomsg.org
Thanks!
goto err_ocr;
- }
-
- for (i = 0; i num_ranges; i++) {
- const int j = i * 2;
- u32 mask;
- mask = mmc_vddrange_to_ocrmask(be32_to_cpu(voltage_ranges[j]),
-be32_to_cpu(voltage_ranges[j +
1]));
- if (!mask) {
- ret = -EINVAL;
- dev_err(dev, OF: voltage-range #%d is invalid\n, i);
- goto err_ocr;
- }
- oms-pdata.ocr_mask |= mask;
- }
+ oms-pdata.ocr_mask |= ocr_mask;
for (i = 0; i ARRAY_SIZE(oms-gpios); i++) {
enum of_gpio_flags gpio_flags;
--
1.8.0
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Re: [PATCH 1/3 V2] mmc:core: parse voltage from device-tree
On Wed, Jul 31, 2013 at 02:25:25PM +0800, Haijun Zhang wrote:
Add function to support get voltage from device-tree.
If there are voltage-range specified in device-tree node, this function
will parse it and return the avail voltage mask.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
---
changes for v2:
- Update the parameters of function
drivers/mmc/core/core.c | 46 ++
include/linux/mmc/core.h | 1 +
2 files changed, 47 insertions(+)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 49a5bca..ce9c957 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -27,6 +27,7 @@
#include linux/fault-inject.h
#include linux/random.h
#include linux/slab.h
+#include linux/of.h
#include linux/mmc/card.h
#include linux/mmc/host.h
@@ -1196,6 +1197,51 @@ u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max)
}
EXPORT_SYMBOL(mmc_vddrange_to_ocrmask);
+#ifdef CONFIG_OF
+
+/*
This is not kernel-doc formatted comment for the function.. it should
start with /**...
+ * mmc_of_parse_voltage - return mask of supported voltages
+ * @np: The device node need to be parsed.
+ *
+ * 1. Return zero: voltage-ranges unspecified in device-tree.
+ * 2. Return negative errno: voltage-range is invalid.
This doesn't seem right... the function returns the unsigned mask... You
can change the prototype of this func to something like this:
int mmc_of_parse_voltage(struct device_node *np, u32 *mask);
So the function will fill the mask and return 0 on success, and will
return negtive errno on errors.
+ * 3. Return ocr_mask: a mask of voltages that parse from device-tree
+ * node can be provided to MMC/SD/SDIO devices.
+ */
+
No need for this empty line...
+u32 mmc_of_parse_voltage(struct device_node *np)
+{
+ const u32 *voltage_ranges;
+ int num_ranges, i;
+ u32 ocr_mask = 0;
+
+ voltage_ranges = of_get_property(np, voltage-ranges, num_ranges);
+ num_ranges = num_ranges / sizeof(*voltage_ranges) / 2;
+ if (!voltage_ranges || !num_ranges) {
+ pr_info(%s: voltage-ranges unspecified\n, np-full_name);
+ return 0;
+ }
+
+ for (i = 0; i num_ranges; i++) {
+ const int j = i * 2;
+ u32 mask;
+
+ mask = mmc_vddrange_to_ocrmask(be32_to_cpu(voltage_ranges[j]),
+ be32_to_cpu(voltage_ranges[j + 1]));
You lost some [pretty] formatting to line up the two arguments. :)
+ if (!mask) {
+ pr_err(%s: voltage-range #%d is invalid\n,
+ np-full_name, i);
+ return -EINVAL;
+ }
+ ocr_mask |= mask;
+ }
+
+ return ocr_mask;
+}
+EXPORT_SYMBOL(mmc_of_parse_voltage);
+
+#endif /* CONFIG_OF */
+
#ifdef CONFIG_REGULATOR
/**
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index 443243b..e3f8fe3 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -209,5 +209,6 @@ static inline void mmc_claim_host(struct mmc_host *host)
}
extern u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max);
+extern u32 mmc_of_parse_voltage(struct device_node *np);
You need to add a 'struct device_node;' forward-declaration, otherwise
non-OF code might fail to compile...
Thanks,
Anton
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Re: [RFC PATCH 1/1] powerpc/embedded6xx: Add support for Motorola/Emerson MVME5100.
On Thu, 2013-08-08 at 11:03 +1100, Stephen N Chivers wrote:
Add support for the Motorola/Emerson MVME5100 Single Board Computer.
The MVME5100 is a 6U form factor VME64 computer with:
- A single MPC7410 or MPC750 CPU
- A HAWK Processor Host Bridge (CPU to PCI) and
MultiProcessor Interrupt Controller (MPIC)
- Up to 500Mb of onboard memory
- A M48T37 Real Time Clock (RTC) and Non-Volatile Memory chip
- Two 16550 compatible UARTS
- Two Intel E100 Fast Ethernets
- Two PCI Mezzanine Card (PMC) Slots
- PPCBug Firmware
The HAWK PHB/MPIC is compatible with the MPC10x devices.
There is no onboard disk support. This is usually provided by installing a
PMC
in first PMC slot.
This patch revives the board support, it was present in early 2.6
series kernels. The board support in those days was by Matt Porter of
MontaVista Software.
CSC Australia has around 31 of these boards in service. The kernel in use
for the boards is based on 2.6.31. The boards are operated without disks
from a file server.
This patch is based on linux-3.11-rc4 and has been boot tested.
Signed-off-by: Stephen Chivers schiv...@csc.com
---
arch/powerpc/boot/dts/mvme5100.dts| 195 ++
arch/powerpc/boot/mvme5100.c | 28 +
arch/powerpc/configs/mvme5100_defconfig | 2597
+
arch/powerpc/platforms/embedded6xx/mvme5100.c | 288 +++
4 files changed, 3108 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/mvme5100.dts
b/arch/powerpc/boot/dts/mvme5100.dts
new file mode 100644
index 000..17fdbc7
--- /dev/null
+++ b/arch/powerpc/boot/dts/mvme5100.dts
@@ -0,0 +1,195 @@
+/*
+ * Device Tree Souce for Motorola/Emerson MVME5100.
+ *
+ * Copyright 2013 CSC Australia Pty. Ltd.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed as is without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+ model = MVME5100;
+ compatible = MVME5100;
+ #address-cells = 1;
+ #size-cells = 1;
+
+ aliases {
+ serial0 = serial0;
+ pci0 = pci0;
+ };
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,7410 {
+ device_type = cpu;
+ reg = 0x0;
+ /* Following required by dtc but not used */
+ d-cache-line-size = 32;
+ i-cache-line-size = 32;
+ i-cache-size = 32768;
+ d-cache-size = 32768;
+ timebase-frequency = 2500;
+ clock-frequency = 5;
+bus-frequency = 1;
What does following mean? certainly some of those are used, such as
timebase-frequency. In any case, it's not the device tree's job to
document which properties are used by Linux.
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 0x0 0x2000;
+ };
+
+ hawk@fef8 {
Unit address does not match reg.
+ #address-cells = 1;
+ #size-cells = 1;
+ device_type = soc;
Is this really an SoC? In any case, this use of device_type is
deprecated.
+ compatible = mpc10x;
Don't use wildcards in compatible strings.
simple-bus may be applicable here (in addition to a specific
compatible).
+ store-gathering = 0;
+ ranges = 0x0 0xfef8 0x1;
+ reg = 0xfef8 0x1;
Where is store-gathering documented?
+ serial0: serial@8000 {
+ cell-index = 0;
+ device_type = serial;
+ compatible = ns16550;
+ reg = 0x8000 0x80;
+ reg-shift = 4;
+ clock-frequency = 1843200;
+ current-speed = 9600;
+ interrupts = 1 1; // IRQ1 Level Active Low.
+ interrupt-parent = mpic;
+ };
+
+ serial1: serial@8200 {
+ cell-index = 1;
+ device_type = serial;
+ compatible = ns16550;
+ reg = 0x8200 0x80;
+ reg-shift = 4;
+ clock-frequency = 1843200;
+ current-speed = 9600;
+ interrupts = 1 1; // IRQ1 Level Active Low.
+ interrupt-parent = mpic;
+ };
What specifically does cell-index mean here? Is it describing the
hardware or just the terminology used in documentation?
+ pci0: pci@feff {
+
Re: [PATCH 63/63] powerpc: Add pseries_le_defconfig
On Thu, Aug 08, 2013 at 08:49:51PM +1000, Michael Neuling wrote: +CONFIG_SCHED_SMT=y +CONFIG_PPC_DENORMALISATION=y +CONFIG_HOTPLUG_PCI=m Why the value m in the le_config file, when it is y in pseries_defconfig. We are out of sync already!?!?! *sigh* ;-) That's good, more coverage! cheers ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 63/63] powerpc: Add pseries_le_defconfig
On Fri, Aug 09, 2013 at 09:12:37AM +1000, Michael Neuling wrote: Anton Blanchard an...@samba.org wrote: Hi, The CONFIG_VIRTUALIZATION disabling should be done in the Kconfig not here. I'm not that keen on another defconfig. benh is already talking about having a powernv defconfig. I'm worried we are going to fragment the defconfigs. If you want something special like LE, then change the default one. I agree we don't want machine specific defconfigs, but I think it makes sense to have ones that cover the key options that conflict. I'm thinking 32bit, 64bit, 64bit BookE, 64bit LE etc. One bonus is if we have a smaller set of defconfigs we might actually get better testing. I have no idea which 32bit defconfigs I should test for example, and I'm not going to test them all! FWIW, I test with these configs and it seems to catch most of 32/64 bit, SMP/UP, differnt MMU issues: pseries_defconfig ppc64_defconfig ppc64e_defconfig pmac32_defconfig ppc44x_defconfig ppc6xx_defconfig mpc85xx_smp_defconfig mpc85xx_defconfig chroma_defconfig ps3_defconfig celleb_defconfig I think cell_defconfig pretty much covers these too, and also gets you coverage of the IBM blades. And add randconfig too :) cheers ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 1/3 V2] mmc:core: parse voltage from device-tree
On 08/09/2013 08:15 AM, Anton Vorontsov wrote:
On Wed, Jul 31, 2013 at 02:25:25PM +0800, Haijun Zhang wrote:
Add function to support get voltage from device-tree.
If there are voltage-range specified in device-tree node, this function
will parse it and return the avail voltage mask.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
---
changes for v2:
- Update the parameters of function
drivers/mmc/core/core.c | 46 ++
include/linux/mmc/core.h | 1 +
2 files changed, 47 insertions(+)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 49a5bca..ce9c957 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -27,6 +27,7 @@
#include linux/fault-inject.h
#include linux/random.h
#include linux/slab.h
+#include linux/of.h
#include linux/mmc/card.h
#include linux/mmc/host.h
@@ -1196,6 +1197,51 @@ u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max)
}
EXPORT_SYMBOL(mmc_vddrange_to_ocrmask);
+#ifdef CONFIG_OF
+
+/*
This is not kernel-doc formatted comment for the function.. it should
start with /**...
+ * mmc_of_parse_voltage - return mask of supported voltages
+ * @np: The device node need to be parsed.
+ *
+ * 1. Return zero: voltage-ranges unspecified in device-tree.
+ * 2. Return negative errno: voltage-range is invalid.
This doesn't seem right... the function returns the unsigned mask... You
can change the prototype of this func to something like this:
int mmc_of_parse_voltage(struct device_node *np, u32 *mask);
So the function will fill the mask and return 0 on success, and will
return negtive errno on errors.
Thanks, Anton.
I'll correct the return prototype of the function.
In case voltage unspecified in device node is not an error in my
platform. So i hope to reserve the zero as unspecified case and give an
prompt, an available value in case success, negative errno in case
error. It's easy to figure out the root cause.
+ * 3. Return ocr_mask: a mask of voltages that parse from device-tree
+ * node can be provided to MMC/SD/SDIO devices.
+ */
+
No need for this empty line...
+u32 mmc_of_parse_voltage(struct device_node *np)
+{
+ const u32 *voltage_ranges;
+ int num_ranges, i;
+ u32 ocr_mask = 0;
+
+ voltage_ranges = of_get_property(np, voltage-ranges, num_ranges);
+ num_ranges = num_ranges / sizeof(*voltage_ranges) / 2;
+ if (!voltage_ranges || !num_ranges) {
+ pr_info(%s: voltage-ranges unspecified\n, np-full_name);
+ return 0;
+ }
+
+ for (i = 0; i num_ranges; i++) {
+ const int j = i * 2;
+ u32 mask;
+
+ mask = mmc_vddrange_to_ocrmask(be32_to_cpu(voltage_ranges[j]),
+ be32_to_cpu(voltage_ranges[j + 1]));
You lost some [pretty] formatting to line up the two arguments. :)
I'll correct these. Thanks.
+ if (!mask) {
+ pr_err(%s: voltage-range #%d is invalid\n,
+ np-full_name, i);
+ return -EINVAL;
+ }
+ ocr_mask |= mask;
+ }
+
+ return ocr_mask;
+}
+EXPORT_SYMBOL(mmc_of_parse_voltage);
+
+#endif /* CONFIG_OF */
+
#ifdef CONFIG_REGULATOR
/**
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index 443243b..e3f8fe3 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -209,5 +209,6 @@ static inline void mmc_claim_host(struct mmc_host *host)
}
extern u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max);
+extern u32 mmc_of_parse_voltage(struct device_node *np);
You need to add a 'struct device_node;' forward-declaration, otherwise
non-OF code might fail to compile...
I'll move of.h from core.c to core.h
Thanks,
Anton
--
Thanks Regards
Haijun
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[PATCH v3 2/4] powerpc: Add new save_tar() register function.
powerpc: Add new save_tar() register function.
Add save_tar() function to save the Target Address Register (TAR). This will
be used in a future patch to save the TAR earlier than it currently is.
Signed-off-by: Michael Neuling mi...@neuling.org
Cc: sta...@vger.kernel.org
---
v3: remove whitespace screw age noticed by sfr
diff --git a/arch/powerpc/include/asm/switch_to.h
b/arch/powerpc/include/asm/switch_to.h
index 49a13e0..294c2ce 100644
--- a/arch/powerpc/include/asm/switch_to.h
+++ b/arch/powerpc/include/asm/switch_to.h
@@ -15,6 +15,15 @@ extern struct task_struct *__switch_to(struct task_struct *,
struct thread_struct;
extern struct task_struct *_switch(struct thread_struct *prev,
struct thread_struct *next);
+#ifdef CONFIG_PPC_BOOK3S_64
+static inline void save_tar(struct thread_struct *prev)
+{
+ if (cpu_has_feature(CPU_FTR_ARCH_207S))
+ prev-tar = mfspr(SPRN_TAR);
+}
+#else
+static inline void save_tar(struct thread_struct *prev) {}
+#endif
extern void giveup_fpu(struct task_struct *);
extern void load_up_fpu(void);
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[PATCH v2 1/3] powerpc: Rework setting up H/FSCR bit definitions
powerpc: Rework setting up H/FSCR bit definitions This reworks the Facility Status and Control Regsiter (FSCR) config bit definitions so that we can access the bit numbers. This will be useful when looking at the status in the facility unavailable interrupt. HFSCR and FSCR versions are the same, so reuse them. Signed-off-by: Michael Neuling mi...@neuling.org --- v2: Fix bit numbers: -#define FSCR_TM_LG 6 -#define FSCR_PM_LG 5 -#define FSCR_BHRB_LG 4 +#define FSCR_TM_LG 5 +#define FSCR_PM_LG 4 +#define FSCR_BHRB_LG 3 diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index a6840e4..99222e2 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -254,19 +254,28 @@ #define SPRN_HRMOR 0x139 /* Real mode offset register */ #define SPRN_HSRR0 0x13A /* Hypervisor Save/Restore 0 */ #define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */ +/* HFSCR and FSCR bit numbers are the same */ +#define FSCR_TAR_LG8 /* Enable Target Address Register */ +#define FSCR_EBB_LG7 /* Enable Event Based Branching */ +#define FSCR_TM_LG 5 /* Enable Transactional Memory */ +#define FSCR_PM_LG 4 /* Enable prob/priv access to PMU SPRs */ +#define FSCR_BHRB_LG 3 /* Enable Branch History Rolling Buffer*/ +#define FSCR_DSCR_LG 2 /* Enable Data Stream Control Register */ +#define FSCR_VECVSX_LG 1 /* Enable VMX/VSX */ +#define FSCR_FP_LG 0 /* Enable Floating Point */ #define SPRN_FSCR 0x099 /* Facility Status Control Register */ -#define FSCR_TAR (1 (63-55)) /* Enable Target Address Register */ -#define FSCR_EBB (1 (63-56)) /* Enable Event Based Branching */ -#define FSCR_DSCR(1 (63-61)) /* Enable Data Stream Control Register */ +#define FSCR_TAR __MASK(FSCR_TAR_LG) +#define FSCR_EBB __MASK(FSCR_EBB_LG) +#define FSCR_DSCR__MASK(FSCR_DSCR_LG) #define SPRN_HFSCR 0xbe/* HV=1 Facility Status Control Register */ -#define HFSCR_TAR(1 (63-55)) /* Enable Target Address Register */ -#define HFSCR_EBB(1 (63-56)) /* Enable Event Based Branching */ -#define HFSCR_TM (1 (63-58)) /* Enable Transactional Memory */ -#define HFSCR_PM (1 (63-60)) /* Enable prob/priv access to PMU SPRs */ -#define HFSCR_BHRB (1 (63-59)) /* Enable Branch History Rolling Buffer*/ -#define HFSCR_DSCR (1 (63-61)) /* Enable Data Stream Control Register */ -#define HFSCR_VECVSX (1 (63-62)) /* Enable VMX/VSX */ -#define HFSCR_FP (1 (63-63)) /* Enable Floating Point */ +#define HFSCR_TAR__MASK(FSCR_TAR_LG) +#define HFSCR_EBB__MASK(FSCR_EBB_LG) +#define HFSCR_TM __MASK(FSCR_TM_LG) +#define HFSCR_PM __MASK(FSCR_PM_LG) +#define HFSCR_BHRB __MASK(FSCR_BHRB_LG) +#define HFSCR_DSCR __MASK(FSCR_DSCR_LG) +#define HFSCR_VECVSX __MASK(FSCR_VECVSX_LG) +#define HFSCR_FP __MASK(FSCR_FP_LG) #define SPRN_TAR 0x32f /* Target Address Register */ #define SPRN_LPCR 0x13E /* LPAR Control Register */ #define LPCR_VPM0(1ul (63-0)) ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v3 3/3] powerpc: Correctly context switch DSCR on POWER8
POWER8 allows the DSCR to be accessed directly from userspace via a new SPR
number 0x3 (Rather than 0x11. DSCR SPR number 0x11 is still used on POWER8 but
like POWER7, is only accessible in HV and OS modes). Currently, we allow this
by setting H/FSCR DSCR bit on boot.
Unfortunately this doesn't work, as the kernel needs to see the DSCR change so
that it knows to no longer restore the system wide version of DSCR on context
switch (ie. to set thread.dscr_inherit).
This clears the H/FSCR DSCR bit initially. If a process then accesses the DSCR
(via SPR 0x3), it'll trap into the kernel where we set thread.dscr_inherit in
facility_unavailable_exception().
We also change _switch() so that we set or clear the H/FSCR DSCR bit based on
the thread.dscr_inherit.
Signed-off-by: Michael Neuling mi...@neuling.org
---
v3: remove unnecessary clearing of H/FSCR at boot.
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index ab15b8d..4674fe6 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -584,9 +584,34 @@ BEGIN_FTR_SECTION
ld r7,DSCR_DEFAULT@toc(2)
ld r0,THREAD_DSCR(r4)
cmpwi r6,0
+ li r8, FSCR_DSCR
bne 1f
ld r0,0(r7)
-1: cmpdr0,r25
+ b 3f
+1:
+ BEGIN_FTR_SECTION_NESTED(70)
+ mfspr r6, SPRN_FSCR
+ or r6, r6, r8
+ mtspr SPRN_FSCR, r6
+BEGIN_FTR_SECTION_NESTED(69)
+ mfspr r6, SPRN_HFSCR
+ or r6, r6, r8
+ mtspr SPRN_HFSCR, r6
+END_FTR_SECTION_NESTED(CPU_FTR_HVMODE, CPU_FTR_HVMODE, 69)
+ b 4f
+ END_FTR_SECTION_NESTED(CPU_FTR_ARCH_207S, CPU_FTR_ARCH_207S, 70)
+3:
+ BEGIN_FTR_SECTION_NESTED(70)
+ mfspr r6, SPRN_FSCR
+ andcr6, r6, r8
+ mtspr SPRN_FSCR, r6
+BEGIN_FTR_SECTION_NESTED(69)
+ mfspr r6, SPRN_HFSCR
+ andcr6, r6, r8
+ mtspr SPRN_HFSCR, r6
+END_FTR_SECTION_NESTED(CPU_FTR_HVMODE, CPU_FTR_HVMODE, 69)
+ END_FTR_SECTION_NESTED(CPU_FTR_ARCH_207S, CPU_FTR_ARCH_207S, 70)
+4: cmpdr0,r25
beq 2f
mtspr SPRN_DSCR,r0
2:
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index bf33c22..e435bc0 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -44,9 +44,7 @@
#include asm/machdep.h
#include asm/rtas.h
#include asm/pmc.h
-#ifdef CONFIG_PPC32
#include asm/reg.h
-#endif
#ifdef CONFIG_PMAC_BACKLIGHT
#include asm/backlight.h
#endif
@@ -1296,43 +1294,54 @@ void vsx_unavailable_exception(struct pt_regs *regs)
die(Unrecoverable VSX Unavailable Exception, regs, SIGABRT);
}
+#ifdef CONFIG_PPC64
void facility_unavailable_exception(struct pt_regs *regs)
{
static char *facility_strings[] = {
- FPU,
- VMX/VSX,
- DSCR,
- PMU SPRs,
- BHRB,
- TM,
- AT,
- EBB,
- TAR,
+ [FSCR_FP_LG] = FPU,
+ [FSCR_VECVSX_LG] = VMX/VSX,
+ [FSCR_DSCR_LG] = DSCR,
+ [FSCR_PM_LG] = PMU SPRs,
+ [FSCR_BHRB_LG] = BHRB,
+ [FSCR_TM_LG] = TM,
+ [FSCR_EBB_LG] = EBB,
+ [FSCR_TAR_LG] = TAR,
};
- char *facility, *prefix;
+ char *facility = unknown;
u64 value;
+ u8 status;
+ bool hv;
- if (regs-trap == 0xf60) {
- value = mfspr(SPRN_FSCR);
- prefix = ;
- } else {
+ hv = (regs-trap == 0xf80);
+ if (hv)
value = mfspr(SPRN_HFSCR);
- prefix = Hypervisor ;
+ else
+ value = mfspr(SPRN_FSCR);
+
+ status = value 56;
+ if (status == FSCR_DSCR_LG) {
+ /* User is acessing the DSCR. Set the inherit bit and allow
+* the user to set it directly in future by setting via the
+* H/FSCR DSCR bit.
+*/
+ current-thread.dscr_inherit = 1;
+ if (hv)
+ mtspr(SPRN_HFSCR, value | HFSCR_DSCR);
+ else
+ mtspr(SPRN_FSCR, value | FSCR_DSCR);
+ return;
}
- value = value 56;
+ if ((status ARRAY_SIZE(facility_strings))
+ facility_strings[status])
+ facility = facility_strings[status];
/* We restore the interrupt state now */
if (!arch_irq_disabled_regs(regs))
local_irq_enable();
- if (value ARRAY_SIZE(facility_strings))
- facility = facility_strings[value];
- else
- facility = unknown;
-
pr_err(%sFacility '%s' unavailable, exception at 0x%lx, MSR=%lx\n,
- prefix, facility, regs-nip, regs-msr);
+ hv ? Hypervisor : , facility, regs-nip, regs-msr);
if (user_mode(regs)) {
_exception(SIGILL,
