Thiago Jung Bauermann writes:
> Ram Pai writes:
>> static inline void pkey_initialize(void)
>> {
>> +int os_reserved, i;
>> +
>> /* disable the pkey system till everything
>> * is in place. A patch further down the
>> *
On Thu, Aug 10, 2017 at 09:36:04PM +1000, Benjamin Herrenschmidt wrote:
> On Thu, 2017-08-10 at 09:19 +0200, Cédric Le Goater wrote:
> > > > > > + /* Perform the acknowledge hypervisor to register cycle */
> > > > > > + ack = be16_to_cpu(__raw_readw(xive_tima + TM_SPC_ACK_OS_REG));
> > > > >
>
Implemented workarounds for the following dTSEC Erratum:
A002, A004, A0012, A0014, A004839 on several operations
that involve MAC CFG register changes: adjust link,
rx pause frames, modify MAC address.
Signed-off-by: Florinel Iordache
---
Ram Pai writes:
> --- a/arch/powerpc/include/asm/cputable.h
> +++ b/arch/powerpc/include/asm/cputable.h
> @@ -214,6 +214,7 @@ enum {
> #define CPU_FTR_DAWR LONG_ASM_CONST(0x0400)
> #define CPU_FTR_DABRX
>
Ram Pai writes:
> The value of the AMR register at the time of exception
> is made available in gp_regs[PT_AMR] of the siginfo.
>
> The value of the pkey, whose protection got violated,
> is made available in si_pkey field of the siginfo structure.
Should the IAMR also be
Ram Pai writes:
> --- a/arch/powerpc/kernel/process.c
> +++ b/arch/powerpc/kernel/process.c
> @@ -42,6 +42,7 @@
> #include
> #include
> #include
> +#include
>
> #include
> #include
> @@ -1096,6 +1097,13 @@ static inline void save_sprs(struct thread_struct *t)
>
On Thu, Aug 10, 2017 at 11:50:19AM -0500, Reza Arbab wrote:
On Thu, Aug 10, 2017 at 02:53:48PM +0530, Bharata B Rao wrote:
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index f830562..24ecf53 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@
Le 07/08/2017 à 05:08, Michael Ellerman a écrit :
Hi Christophe,
I'm not across any of the details of this so hopefully most of these
comments aren't too stupid :)
Christophe Lombard writes:
The POWER9 core supports a new feature: ASB_Notify which requires the
Ram Pai writes:
> static inline void pkey_initialize(void)
> {
> + int os_reserved, i;
> +
> /* disable the pkey system till everything
>* is in place. A patch further down the
>* line will enable it.
>*/
> pkey_inited = false;
> +
>
On 10/08/2017 15:43, Kirill A. Shutemov wrote:
> On Thu, Aug 10, 2017 at 10:27:50AM +0200, Laurent Dufour wrote:
>> On 10/08/2017 02:58, Kirill A. Shutemov wrote:
>>> On Wed, Aug 09, 2017 at 12:43:33PM +0200, Laurent Dufour wrote:
On 09/08/2017 12:12, Kirill A. Shutemov wrote:
> On Tue,
On Thu, Aug 10, 2017 at 02:53:48PM +0530, Bharata B Rao wrote:
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index f830562..24ecf53 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -524,6 +524,7 @@ static int __init
On 02/08/2017 20:03, Nathan Fontenot wrote:
> When DLPAR adding or removing memory we need to check the device
> offline status before trying to online/offline the memory. This is
> needed because calls device_online() and device_offline() will return
> non-zero for memory that is already online
On 08/10/2017 07:20 AM, Michael Ellerman wrote:
Khalid Aziz writes:
A protection flag may not be valid across entire address space and
hence arch_validate_prot() might need the address a protection bit is
being set on to ensure it is a valid protection flag. For
On Thu, 10 Aug 2017 23:15:50 +1000
Michael Ellerman wrote:
> Nicholas Piggin writes:
>
> > Signed-off-by: Nicholas Piggin
> > ---
> > arch/powerpc/kernel/idle_book3s.S | 7 ---
> > arch/powerpc/kvm/book3s_hv_rmhandlers.S |
On Thu, 10 Aug 2017 23:14:46 +1000
Michael Ellerman wrote:
> Nicholas Piggin writes:
>
> > POWER9 CPUs have independent MMU contexts per thread so KVM
> > does not have to bring sibling threads into real-mode when
> > switching MMU mode to guest. This
On Thu, Aug 10, 2017 at 10:27:50AM +0200, Laurent Dufour wrote:
> On 10/08/2017 02:58, Kirill A. Shutemov wrote:
> > On Wed, Aug 09, 2017 at 12:43:33PM +0200, Laurent Dufour wrote:
> >> On 09/08/2017 12:12, Kirill A. Shutemov wrote:
> >>> On Tue, Aug 08, 2017 at 04:35:38PM +0200, Laurent Dufour
Khalid Aziz writes:
> A protection flag may not be valid across entire address space and
> hence arch_validate_prot() might need the address a protection bit is
> being set on to ensure it is a valid protection flag. For example, sparc
> processors support memory
Nicholas Piggin writes:
> Signed-off-by: Nicholas Piggin
> ---
> arch/powerpc/kernel/idle_book3s.S | 7 ---
> arch/powerpc/kvm/book3s_hv_rmhandlers.S | 24
If you can split this into a KVM and non-KVM patch that would be
Nicholas Piggin writes:
> POWER9 CPUs have independent MMU contexts per thread so KVM
> does not have to bring sibling threads into real-mode when
> switching MMU mode to guest. This can simplify POWER9 sleep/wake
> paths and avoids hwsyncs.
>
> Signed-off-by: Nicholas Piggin
Nicholas Piggin writes:
> On Sun, 06 Aug 2017 09:00:32 +1000
> Benjamin Herrenschmidt wrote:
>
>> On Sun, 2017-08-06 at 03:02 +1000, Nicholas Piggin wrote:
>> > HVI interrupts have always used 0x500, so remove the dead branch.
>>
>> Maybe we should fix
On 7/26/2017 11:03 AM, Borislav Petkov wrote:
Subject: x86/realmode: ...
Done.
On Mon, Jul 24, 2017 at 02:07:45PM -0500, Brijesh Singh wrote:
From: Tom Lendacky
When SEV is active the trampoline area will need to be in encrypted
memory so only mark the area
On Wed, 2017-08-09 at 12:41:21 UTC, Nicholas Piggin wrote:
> When the NMI IPI lock is contended, spin at low SMT priority, using
> loads only, and with interrupts enabled (where possible). This
> improves behaviour under high contention (e.g., a system crash when
> a number of CPUs are trying to
On Wed, 2017-08-09 at 10:57:55 UTC, Michael Ellerman wrote:
> In commit 05a4a9527931 ("kernel/watchdog: split up config options"),
> CONFIG_LOCKUP_DETECTOR was split into two separate config options,
> CONFIG_HARDLOCKUP_DETECTOR and CONFIG_SOFTLOCKUP_DETECTOR.
>
> Our defconfigs still have
On Thu, 2017-08-10 at 09:19 +0200, Cédric Le Goater wrote:
> > > > > + /* Perform the acknowledge hypervisor to register cycle */
> > > > > + ack = be16_to_cpu(__raw_readw(xive_tima + TM_SPC_ACK_OS_REG));
> > > >
> > > > Why do you need the raw_readw() + be16_to_cpu + mb, rather than one of
> >
On Thu, 2017-08-10 at 08:45 +0200, Cédric Le Goater wrote:
> > The problem with doorbells on POWER9 guests is that they may have
> > to trap and be emulated by the hypervisor, since the guest threads
> > on P9 don't have to match the HW threads of the core.
>
> Well, the pseries cause_ipi()
Live patching consistency model is of LEAVE_PATCHED_SET and
SWITCH_THREAD. This means that all tasks in the system have to be marked
one by one as safe to call a new patched function. Safe means when a
task is not (sleeping) in a set of patched functions. That is, no
patched function is on the
"Martin K. Petersen" writes:
>> One of the two scsi-mq functions that requeue a request unprepares a
>> request before requeueing (scsi_io_completion()) but the other
>> function not (__scsi_queue_insert()). Make sure that a request is
>> unprepared before requeuing
On 08/08/2017 10:56 AM, Cédric Le Goater wrote:
> On POWER9, the Client Architecture Support (CAS) negotiation process
> determines whether the guest operates in XIVE Legacy compatibility or
> in XIVE exploitation mode.
>
> Now that we have initial guest support for the XIVE interrupt
>
For a PowerKVM guest, it is possible to specify a DIMM device in
addition to the system RAM at boot time. When such a cold plugged DIMM
device is removed from a radix guest, we hit the following warning in the
guest kernel resulting in the eventual failure of memory unplug:
remove_pud_table:
On 10/08/2017 02:58, Kirill A. Shutemov wrote:
> On Wed, Aug 09, 2017 at 12:43:33PM +0200, Laurent Dufour wrote:
>> On 09/08/2017 12:12, Kirill A. Shutemov wrote:
>>> On Tue, Aug 08, 2017 at 04:35:38PM +0200, Laurent Dufour wrote:
The VMA sequence count has been introduced to allow fast
On 08/10/2017 07:54 AM, David Gibson wrote:
> On Thu, Aug 10, 2017 at 02:46:00PM +1000, Benjamin Herrenschmidt wrote:
>> On Thu, 2017-08-10 at 14:28 +1000, David Gibson wrote:
>>>
>>> Also, will POWER9 always have doorbells? In which case you could
>>> reduce it to 3 options.
>>
>> The problem
+static void xive_spapr_update_pending(struct xive_cpu *xc)
+{
+ u8 nsr, cppr;
+ u16 ack;
+
+ /* Perform the acknowledge hypervisor to register cycle */
+ ack = be16_to_cpu(__raw_readw(xive_tima + TM_SPC_ACK_OS_REG));
>>>
>>> Why do you need the raw_readw() +
On 08/10/2017 06:46 AM, Benjamin Herrenschmidt wrote:
> On Thu, 2017-08-10 at 14:28 +1000, David Gibson wrote:
>>
>> Also, will POWER9 always have doorbells? In which case you could
>> reduce it to 3 options.
>
> The problem with doorbells on POWER9 guests is that they may have
> to trap and be
On Tue, Aug 08, 2017 at 10:42:57PM +1000, Nicholas Piggin wrote:
> On Tue, 8 Aug 2017 16:06:43 +0530
> Gautham R Shenoy wrote:
>
> > Hi Nicholas,
> >
> > On Sun, Aug 06, 2017 at 03:02:38AM +1000, Nicholas Piggin wrote:
> > > POWER9 CPUs have independent MMU contexts per
On Thu, Aug 10, 2017 at 02:46:00PM +1000, Benjamin Herrenschmidt wrote:
> On Thu, 2017-08-10 at 14:28 +1000, David Gibson wrote:
> >
> > Also, will POWER9 always have doorbells? In which case you could
> > reduce it to 3 options.
>
> The problem with doorbells on POWER9 guests is that they may
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