On Nov 24, 2011, at 9:26 AM, Paul Gortmaker wrote:
On 11-11-24 03:14 AM, Kumar Gala wrote:
On Feb 26, 2010, at 1:25 PM, Paul Gortmaker wrote:
Sending a break on the SOC UARTs found in some MPC83xx/85xx/86xx
chips seems to cause a short lived IRQ storm (/proc/interrupts
typically shows
...@secretlab.ca
Cc: Kumar Gala ga...@kernel.crashing.org
---
drivers/spi/Kconfig |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Acked-by: Kumar Gala ga...@kernel.crashing.org
- k
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https
arch/powerpc/mm/hugetlbpage.c: In function 'reserve_hugetlb_gpages':
arch/powerpc/mm/hugetlbpage.c:312:2: error: implicit declaration of function
'parse_args'
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/mm/hugetlbpage.c |1 +
1 files changed, 1 insertions(+), 0
On Nov 23, 2011, at 3:44 AM, Tanmay Inamdar wrote:
arch/powerpc/kernel/udbg_16550.c| 22 +
Would be probably good to split this change into its own patch.
- k
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On Nov 22, 2011, at 12:20 AM, Jia Hongtao-B38951 wrote:
Hi Kumar,
We want more comments on this series of patches ([1/2] [2/2]) to speed up
the pushing-to-kernel progress.
Thanks.
I think the code is fine, but you need to update it for all the boards include
the 86xx ones.
- k
only used there
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/include/asm/system.h |5 +--
arch/powerpc/kernel/process.c | 97
+---
arch/powerpc/kernel/traps.c | 17 +++
3 files changed, 53 insertions(+), 66
merge
Kumar Gala (1):
powerpc/85xx: Fix compile error on p3060_qds.c
Paul Bolle (1):
powerpc/p3060qds: Fix select of 'MPC8xxx_GPIO'
Roy Zang (1):
powerpc/p1023: set IRQ[4:6,11] to active-high level sensitive for PCIe
arch/powerpc/boot/dts/p1023rds.dts | 17
On Oct 28, 2011, at 3:08 AM, Jia Hongtao wrote:
From: Jason Jin jason@freescale.com
Current pci/pcie init code will hide the pci/pcie host resource.
But did not judge it is host/RC or agent/EP. If configured as
agent/EP, we should avoid hiding its resource in the host side.
In PCI
On Nov 21, 2011, at 12:29 AM, Jia Hongtao wrote:
Power supply for LBC registers is off when system go to deep-sleep state.
We save the values of registers before suspend and restore to registers
after resume.
We removed the last two reservation arrays from struct fsl_lbc_regs for
On Nov 18, 2011, at 11:49 AM, Timur Tabi wrote:
The Freescale P1022 has a unique pin muxing feature where the DIU video
controller's video signals are muxed with 24 of the local bus address signals.
When the DIU is enabled, the bulk of the local bus is disabled, preventing
access to
On Nov 18, 2011, at 11:50 AM, Timur Tabi wrote:
The Freescale P1022 has a unique pin muxing feature where the DIU video
controller's video signals are muxed with 24 of the local bus address signals.
When the DIU is enabled, the bulk of the local bus is disabled, preventing
access to
On Nov 24, 2011, at 12:07 AM, Anton Blanchard wrote:
We can use clockevents_calc_mult_shift instead of doing all
the work ourselves.
Signed-off-by: Anton Blanchard an...@samba.org
---
Index: linux-build/arch/powerpc/kernel/time.c
On Jul 22, 2011, at 2:55 PM, Dmitry Eremin-Solenikov wrote:
On mpc83xx platform nearly all _init_IRQ functions look alike. They either
just setup ipic, or setup ipic and QE PIC. Separate this to special functions
to be either referenced from ppc_md, or called from board file.
On Nov 17, 2011, at 8:48 AM, Dmitry Eremin-Solenikov wrote:
83xx board files have a lot of duplication in
*_declare_of_platform_devices() functions. Merge that into a single
function common to most of the boards.
The only leftover is mpc834x_itx.c board file which explicitly asks for
On Nov 17, 2011, at 8:48 AM, Dmitry Eremin-Solenikov wrote:
Nearly all mpc83xx-based boards have a common piece of code - one that
loops over all pci/pcie bridges and registers them. Merge that code into
a special function common to all boards.
Signed-off-by: Dmitry Eremin-Solenikov
On Nov 17, 2011, at 8:48 AM, Dmitry Eremin-Solenikov wrote:
Traditionally mpc830x_rdb board file searched for mpc8308-pcie devices.
However both in-kernel dts from the beginning declared those pcie units
as compatible with mpc8314-pci, which is handled by mpc83xx_setup_pci().
Drop special
P1010RDB P1023RDS can use the new mpc85xx_common_publish_devices().
Also move 'fsl,srio' into the list of standard buses.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/platforms/85xx/mpc85xx_common.c |1 +
arch/powerpc/platforms/85xx/mpc85xx_mds.c|1 -
arch
The file name is already scoped by the directory its in.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/platforms/85xx/Makefile |2 +-
.../platforms/85xx/{mpc85xx_common.c = common.c} |0
2 files changed, 1 insertions(+), 1 deletions(-)
rename arch
On Nov 3, 2011, at 2:38 PM, Timur Tabi wrote:
Kconfig option PHYS_64BIT sets the size of phys_addr_t to 64 bits, which
allows support for a 36-bit physical address space. With this option, the
kernel can support more than 2GB of RAM, but the larger address size
impacts performance slightly.
On Nov 17, 2011, at 11:56 AM, Dmitry Eremin-Solenikov wrote:
Separate handling of CPM2 PIC initialization to mpc85xx_cpm2_pic_init()
function.
Signed-off-by: Dmitry Eremin-Solenikov dbarysh...@gmail.com
---
arch/powerpc/platforms/85xx/Makefile |2 +
On Nov 17, 2011, at 11:56 AM, Dmitry Eremin-Solenikov wrote:
85xx board files have a lot of duplication in *_publish_devices()/
*_declare_of_platform_devices() functions. Merge that into a single
function common to most of the boards.
Signed-off-by: Dmitry Eremin-Solenikov
On Aug 8, 2011, at 6:18 AM, Julia Lawall wrote:
From: Julia Lawall ju...@diku.dk
At this point, ehv_pic has been allocated but not stored anywhere, so it
should be freed before leaving the function.
A simplified version of the semantic match that finds this problem is as
follows:
On Aug 23, 2011, at 3:49 AM, Jiri Slaby wrote:
On 08/23/2011 09:59 AM, Jiri Slaby wrote:
When spi_fsl_espi is chosen to be built as a module, there is a build
error because we test only CONFIG_SPI_FSL_ESPI in declaration of
struct mpc8xxx_spi in drivers/spi/spi_fsl_lib.h.
We need to add a
On Nov 23, 2011, at 11:03 PM, Kumar Gala wrote:
Ben,
A few minor fixes for FSL PPC SoCs to send up to Linus.
- k
The following changes since commit caca6a03d365883564885f2c1da3e88dcf65d139:
Linux 3.2-rc3 (2011-11-23 20:20:28 -0800)
are available in the git repository at:
git
On Aug 23, 2011, at 7:30 AM, Joakim Tjernlund wrote:
QE_General4 should only round up the divisor iff divisor is 3.
Rounding up lower divisors makes the error too big, causing USB
on MPC832x to fail.
Signed-off-by: Joakim Tjernlund joakim.tjernl...@transmode.se
---
On Oct 27, 2011, at 9:18 AM, Rusev wrote:
patch is vs. 2.6.39, yet it applied to 3.1
Fix of UPM driver for Freescale PowerPC processors
If Freescale LBC driver fails to initialise itself from device tree,
then internal structure is freed only but not NULL-fied.
As result functions
On Nov 9, 2011, at 2:10 PM, Andy Fleming wrote:
Fix this by moving the of_mdiobus_register() call earlier.
Cc: Andy Fleming aflem...@freescale.com
Signed-off-by: Baruch Siach bar...@tkos.co.il
---
drivers/net/ethernet/freescale/fsl_pq_mdio.c | 14 +++---
1 files changed, 7
On Nov 15, 2011, at 9:02 PM, Tabi Timur-B04825 wrote:
On Mon, Nov 14, 2011 at 2:55 AM, Kokoris, Ioannis
ioannis.koko...@siemens-enterprise.com wrote:
Ready register is needed for ROM-less devices such as P1021, MPC859, MPC8306
etc.
For ROM-based devices such as MCP8323 the Ready register
On Nov 2, 2011, at 4:39 AM, Xie Shaohui-B21989 wrote:
-Original Message-
From: David Laight [mailto:david.lai...@aculab.com]
Sent: Wednesday, November 02, 2011 5:07 PM
To: Xie Shaohui-B21989; linuxppc-dev@lists.ozlabs.org
Cc: linux-...@vger.kernel.org
Subject: RE: [PATCH]
On Nov 22, 2011, at 3:29 AM, Li Yang-R58472 wrote:
Subject: Re: [PATCH v2 1/7] powerpc/85xx: re-enable timebase sync disabled
by KEXEC patch
On Fri, Nov 18, 2011 at 08:35:02AM -0600, Kumar Gala wrote:
On Nov 16, 2011, at 12:42 PM, Scott Wood wrote:
On 11/16/2011 03:55 AM, Zhao Chenhui
arch/powerpc/kernel/setup_64.c: In function 'early_setup':
arch/powerpc/kernel/setup_64.c:226:2: error: implicit declaration of function
'reserve_hugetlb_gpages'
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/kernel/setup_64.c |1 +
1 files changed, 1 insertions(+), 0
On Oct 31, 2011, at 4:38 AM, b35...@freescale.com b35...@freescale.com
wrote:
From: Liu Shuo b35...@freescale.com
Integrated Flash Controller supports various flashes like NOR, NAND
and other devices using NOR, NAND and GPCM Machine available on it.
IFC supports four chip selects.
On Nov 16, 2011, at 11:09 PM, Kumar Gala wrote:
From: Roy Zang tie-fei.z...@freescale.com
P1023 external IRQ[4:6, 11] are not pin out, but the interrupts are
utilized by the PCIe controllers. As they are not exposed as pins we
need to set them as active-high (internal to the SoC
On Nov 12, 2011, at 5:50 PM, Paul Bolle wrote:
The driver for the Freescale P3060 QDS got added by commit 96cc017c5b
([...] Add support for P3060QDS board). Its Kconfig entry selects
MPC8xxx_GPIO. But at the time that driver got added MPC8xxx_GPIO was
already renamed to GPIO_MPC8XXX, by
node, just use top level
* Fixed some dcsr compatiable typo's from 'p43041' to 'p3041'
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/p3041si-post.dtsi | 332
arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi | 112
arch/powerpc/boot/dts/p3041ds.dts
node, just use top level
* Removed mpic interrupt-parent from sec nodes, just use top level
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 342
arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi | 145 +
arch/powerpc/boot/dts
node, just use top level
* Removed mpic interrupt-parent from sec nodes, just use top level
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/p5020si-post.dtsi | 335 +
arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi | 96
arch/powerpc/boot/dts
node, just use top level
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
v2: deleted p2041si.dtsi
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 305
arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi | 111 +
arch/powerpc/boot/dts/p2041rdb.dts | 11 +-
arch/powerpc
On Nov 17, 2011, at 10:04 AM, Tabi Timur-B04825 wrote:
On Thu, Nov 17, 2011 at 8:32 AM, Kumar Gala ga...@kernel.crashing.org wrote:
Utilize new split between board SoC, and new SoC device trees split
into pre post utilizing 'template' includes for SoC IP blocks.
Other changes include
...@freescale.com; b11...@freescale.com; r61...@freescale.com; Liu
Gang; Li Yang; Jin Qing; Kumar Gala
Subject: [PATCH 5/5,v3] powerpc/fsl: Document rapidio node binding-
information
This document is created for powerpc rapidio and rmu nodes in dts
file.
These nodes can support two rapidio
...@freescale.com; b11...@freescale.com; r61...@freescale.com; Liu
Gang; Lian Minghuan; Kumar Gala
Subject: [PATCH 1/5,v3] fsl-rio: Split rio driver into two parts,
RapidIO endpoint and message unit
The Freescale PowerPC RapidIO controller consists of a RapidIO
endpoint
and
a RapidIO message
work simultaneously.
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Jin Qing b24...@freescale.com
Signed-off-by: Liu Gang gang@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/sysdev/fsl_rio.c | 391 +---
arch/powerpc
On Nov 12, 2011, at 6:02 AM, Liu Gang wrote:
From: Kumar Gala ga...@kernel.crashing.org
Update all dts files that support SRIO controllers to match the new
fsl,srio device tree binding.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/mpc8568mds.dts
...@freescale.com; b11...@freescale.com; r61...@freescale.com; Kai
Jiang; Kumar Gala
Subject: [PATCH 4/5,v3] powerpc/8xxx: Update device tree bus probe for
new RapidIO node binding
From: Kai Jiang kai.ji...@freescale.com
Update of_platform_bus_probe() RapidIO node to be compitable with
new
On Nov 16, 2011, at 3:47 PM, Timur Tabi wrote:
wrote:
I just noticed this bug in the original p1022ds.dts, and I see you're
carrying it over here. The reg property should look like this:
reg = 0xf 0xffe05000 0 0x1000;
^^^
It looks like there's also a problem with the 'ranges'
on the board so we have them set as
active-low.
Signed-off-by: Roy Zang tie-fei.z...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
v2:
* cleaned up commit message added comments to be clear about IRQ usage
arch/powerpc/boot/dts/p1023rds.dts | 17 +
1
* Move SoC specific details like irq mapping to SoC dtsi
* Update interrupt property to cover both error interrupt and PCIe
runtime interrupts
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020rdb.dts | 26 +-
arch/powerpc/boot/dts
The SPI node is out of date with regards to the binding for fsl-espi and
driver support.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020rdb.dts | 30 +-
arch/powerpc/boot/dts/p1020si.dtsi |5 ++---
2 files changed, 15
If we include the p1020rdb.dts instead of p1020si.dts we greatly reduce
duplication and maintenance. We can just list which devices are
disabled for the given core and mpic protected sources.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020rdb_camp_core0.dts
All eTSEC2 controllers support waking on magic packet so fixup device
tree to report that.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020si.dtsi |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/p1020si.dtsi
b
* set interrupt-parent at root so its not duplicate in every node
* Add mpic timers
* Move to 4-prop cells for mpic timer
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020si.dtsi | 117 +---
1 files changed, 56 insertions(+), 61
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020si.dtsi |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/boot/dts/p1020si.dtsi
b/arch/powerpc/boot/dts/p1020si.dtsi
index 25e10cf..5514e1d 100644
--- a/arch/powerpc
as MPC8572 compatiable to get errata handling that applies ]
* Added missing cache-line-size cache-size properties missing from
L2-cache node
* Added IP level IEEE 1588 / ptp timer node
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi | 248
mdio nodes up one level instead of under tsec nodes
* Updated ethernet 'model' to 'eTSEC' as that's what on MPC8544
* Dropping fsl,mpc8544-IP... from compatibles for standard blocks
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi | 191
localbus node, but no chipselect details at this point
* Added MPIC / PCIe msi node
* Dropping fsl,mpc8548-IP... from compatibles for standard blocks
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi | 143 +++
arch/powerpc/boot/dts/fsl
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi | 265 ++
arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi | 65
arch/powerpc/boot/dts/mpc8568mds.dts | 480 -
3 files changed, 393 insertions
... from compatibles for standard blocks
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi | 292 ++
arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi | 64
arch/powerpc/boot/dts/mpc8569mds.dts | 409
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1010rdb.dtsi |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/p1010rdb.dtsi
b/arch/powerpc/boot/dts/p1010rdb.dtsi
index 149d196..3aa2b82 100644
--- a/arch/powerpc
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/p1010si-post.dtsi |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
index 75eb921..bd9e163 100644
... from compatibles for standard blocks
* PCI interrupt map - wrong IRQs for PCI-0 controller
* SDHC interrupt sense was wrong
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/p1010si-post.dtsi | 197 ++
arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1010rdb_36b.dts | 89
1 files changed, 89 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p1010rdb_36b.dts
diff --git a/arch/powerpc/boot/dts/p1010rdb_36b.dts
for etsec@26000
* Added usb node for 2nd usb controller
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/p1020si-post.dtsi | 174
arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi | 68 +
arch/powerpc/boot/dts/p1020rdb.dts | 232
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020rdb_36b.dts | 66
1 files changed, 66 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p1020rdb_36b.dts
diff --git a/arch/powerpc/boot/dts/p1020rdb_36b.dts
to allow supportin IRQs for controller (errors) and
moved PCI device IRQs down to virtual bridge level
* Renamed SDHC node from 'sdhci' to 'sdhc'
* Added usb node for 2nd usb controller
* Dropping fsl,p1021-IP... from compatibles for standard blocks
Signed-off-by: Kumar Gala ga
... from compatibles for standard blocks
* Fixed bug in local bus range node for CS2, was maping to
0x0 0x0xffa0 instead of 0xf 0xffa0
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/p1022si-post.dtsi | 235 +++
arch/powerpc/boot/dts/fsl
... from compatibles for standard blocks
* Removed incorrect power/pmc node, there are no etsec on P1023
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/p1023si-post.dtsi | 224
arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi | 76 ++
arch
with a 'mpc8572' specific to an erratum
* Fixed wrong reg offsets for mdio nodes associated with etsec2 etsec3
* Dropping fsl,p2020-IP... from compatibles for standard blocks
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/p2020si-post.dtsi | 194
with a 'mpc8572' specific to an erratum
* Fixed wrong reg offsets for mdio nodes associated with etsec2
* etsec3
* Dropping fsl,p2020-IP... from compatibles for standard blocks
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p2020rdb.dts| 63
node, just use top level
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 305 +++
arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi | 111 ++
arch/powerpc/boot/dts/p2041rdb.dts | 11 +-
3 files changed, 425
node, just use top level
* Removed mpic interrupt-parent from sec nodes, just use top level
* Fixed l3-cache IRQs, we have 2 CPCs, so we should have IRQs for both
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/p3060si-post.dtsi | 296 +++
arch/powerpc
On Nov 7, 2011, at 2:32 AM, Roy Zang wrote:
P1023 external IRQ[4:6, 11] do not pin out, but the interrupts are
shared with PCIe controller.
The silicon internally ties the interrupts to L, so change the
IRQ[4:6,11] to high level sensitive for PCIe.
Signed-off-by: Roy Zang
On Nov 9, 2011, at 6:06 PM, Kyle Moffett wrote:
The code inside the conditional is only used by 85xx CoreNet fabric
platforms, so add a new config define and use it where necessary.
1. why make the change
2. if you're using FSL_CORENET as a SoC feature CONFIG option than other bits
of this
On Nov 9, 2011, at 6:07 PM, Kyle Moffett wrote:
The CONFIG_PHYS_64BIT option violates the Kconfig best-practices in
various colorful ways. It has explicit dependencies, but it is also
selected by various CPUs and platforms. It is not set on 64-bit
systems, but it is used by a number of
On Nov 9, 2011, at 6:07 PM, Kyle Moffett wrote:
Certain processor types are co-supportable, and their machine-check
handlers will be referenced if the entries in cputable.c are actually
generated, so allow more than one machine-check handler to be built in.
This fixes a bug where
On Nov 9, 2011, at 6:07 PM, Kyle Moffett wrote:
As FreeScale e500 systems have different cacheline sizes from e500mc, it
is basically impossible for the kernel to support both in a single
system image at present.
Given that one is SPE-float and the other is classic-float, they are not
On Nov 9, 2011, at 6:07 PM, Kyle Moffett wrote:
As part of splitting CONFIG_E500 into separate options for e500v1/v2 and
e500mc/e5500, some code only needs to be built when e5500 support is
required.
This adds a new internal-use config option for both 32-bit and 64-bit
builds that enables
On Nov 9, 2011, at 6:03 PM, Kyle Moffett wrote:
Hello,
I saw Baruch Siach's patch:
powerpc: 85xx: separate e500 from e500mc
Unfortunately, that patch breaks the dependencies for the P5020DS
platform and does not fix the underlying code which does not
understand what the ambiguous
If we include the p1020rdb.dts instead of p1020si.dts we greatly reduce
duplication and maintenance. We can just list which devices are
disabled for the given core and mpic protected sources.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020rdb_camp_core0.dts
Support MPC85xx platforms outside of MPC8572/MPC8536. The
MPC8572/MPC8536 have an erratum that is worked around based on having
fsl,mpc8572-gpio in the compatiable list. All other MPC85xx SoCs
don't require this workaround and thus utilize the 'fsl,pq3-gpio'
compatiable.
Signed-off-by: Kumar
* Move SoC specific details like irq mapping to SoC dtsi
* Update interrupt property to cover both error interrupt and PCIe
runtime interrupts
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020rdb.dts | 26 +-
arch/powerpc/boot/dts
The SPI node is out of date with regards to the binding for fsl-espi and
driver support.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020rdb.dts | 30 +-
arch/powerpc/boot/dts/p1020si.dtsi |5 ++---
2 files changed, 15
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020si.dtsi |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/boot/dts/p1020si.dtsi
b/arch/powerpc/boot/dts/p1020si.dtsi
index 25e10cf..5514e1d 100644
--- a/arch/powerpc
* set interrupt-parent at root so its not duplicate in every node
* Add mpic timers
* Move to 4-prop cells for mpic timer
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020si.dtsi | 117 +---
1 files changed, 56 insertions(+), 61
All eTSEC2 controllers support waking on magic packet so fixup device
tree to report that.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020si.dtsi |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/p1020si.dtsi
b
-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/p1020si-post.dtsi | 229 +++
arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi | 68 +
arch/powerpc/boot/dts/p1020si.dtsi | 407 ---
3 files changed, 297 insertions(+), 407 deletions
Introduce some common components that we can utilize to build up the
various PQ3/85xx device trees.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi| 66 ++
arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi | 51
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020rdb_36b.dts | 66
1 files changed, 66 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p1020rdb_36b.dts
diff --git a/arch/powerpc/boot/dts/p1020rdb_36b.dts
We split out the common bits of the P1020RDB device tree such that we
can reuse those bits between a 32-bit or 36-bit address map device tree.
We also update the P1020RDB device tree to utilize the new p1020 SoC dts
includes (fsl/p1020si-pre.dtsi fsl/p1020si-post.dtsi).
Signed-off-by: Kumar
Posting this to get any feedback and review while I cleanup commit messages
and the such.
The general idea is to split out the SoC and IP blocks into their own files
that can be included to build up a board level device tree. This allows us
to reduce overall duplication and forward looking
If we include the p1020rdb.dts instead of p1020si.dts we greatly reduce
duplication and maintenance. We can just list which devices are
disabled for the given core and mpic protected sources.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020rdb_camp_core0.dts
* Move SoC specific details like irq mapping to SoC dtsi
* Update interrupt property to cover both error interrupt and PCIe
runtime interrupts
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020rdb.dts | 26 +-
arch/powerpc/boot/dts
The SPI node is out of date with regards to the binding for fsl-espi and
driver support.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020rdb.dts | 30 +-
arch/powerpc/boot/dts/p1020si.dtsi |5 ++---
2 files changed, 15
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020si.dtsi |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/boot/dts/p1020si.dtsi
b/arch/powerpc/boot/dts/p1020si.dtsi
index 25e10cf..5514e1d 100644
--- a/arch/powerpc
All eTSEC2 controllers support waking on magic packet so fixup device
tree to report that.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020si.dtsi |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/p1020si.dtsi
b
* set interrupt-parent at root so its not duplicate in every node
* Add mpic timers
* Move to 4-prop cells for mpic timer
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020si.dtsi | 117 +---
1 files changed, 56 insertions(+), 61
2nd USB2 in the SoC device tree, let the board code disable
it if needed.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/p1020si-post.dtsi | 174
arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi | 68 +
arch/powerpc/boot/dts/p1020si.dtsi
We split out the common bits of the P1020RDB device tree such that we
can reuse those bits between a 32-bit or 36-bit address map device tree.
We also update the P1020RDB device tree to utilize the new p1020 SoC dts
includes (fsl/p1020si-pre.dtsi fsl/p1020si-post.dtsi).
Signed-off-by: Kumar
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1020rdb_36b.dts | 66
1 files changed, 66 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p1020rdb_36b.dts
diff --git a/arch/powerpc/boot/dts/p1020rdb_36b.dts
interrupt map - wrong IRQs for PCI-0 controller
* SDHC interrupt sense was wrong
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/fsl/p1010si-post.dtsi | 197 ++
arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi | 64 +
arch/powerpc/boot/dts/p1010rdb.dts
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/boot/dts/p1010rdb.dtsi |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/p1010rdb.dtsi
b/arch/powerpc/boot/dts/p1010rdb.dtsi
index 149d196..3aa2b82 100644
--- a/arch/powerpc
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