Anton Vorontsov wrote:
MPC8569 CPUs have four QE RISCs, so we need to increase MAX_QE_RISC
constant, otherwise qe_upload_firmware() fails at sanity checking.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
Acked-by: Timur Tabi ti...@freescale.com
Anton, I'll review the rest
Anton Vorontsov wrote:
We'll need ugeth_disable() and ugeth_enable() calls earlier in the
file, so rearrange some code to avoid forward declarations.
The patch doesn't contain any functional changes.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
Acked-by: Timur Tabi ti
. The PowerPC
architecture is too complicated w.r.t. ordering of reads and writes. In other
words, you can't trust it.
No one should be using 'volatile' to access I/O registers.
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of the buffer.
So change hvc_console_print() to just loop and call put_chars() again if it
returns a 0 return code.
This change makes hvc_console_print() behave more like hvc_push(), which does
check for a 0 return code and re-schedules itself.
Signed-off-by: Timur Tabi ti...@freescale.com
heavy printk() output. hvc calls my
driver, but the output buffer is still full, so the driver just returns 0.
If I add a spin-loop in the driver, then we don't need to change hvc, but now
the driver is blocking during user-space print operations (via hvc_write and
hvc_push).
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data is discarded internally.
So what is the plan now?
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, which is then passed up through
i2c_smbus_write_byte_data().
So my question is, is i2c-mpc.c wrong in using
wait_event_interruptible_timeout()?
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https
not much discussion on this issue, so I'm going to make
the change to an uninterruptible wait and see if it fixes my problem.
If so, I'll post a patch for i2c-mpc.c and see how far I get.
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-off-by: Timur Tabi ti...@freescale.com
---
A similar change should probably be done to i2c-cpm.c, and maybe all other
I2C drivers. Not many use wait_event_interruptible_timeout().
drivers/i2c/busses/i2c-mpc.c |9 +++--
1 files changed, 3 insertions(+), 6 deletions(-)
diff --git
On Fri, Feb 6, 2009 at 8:00 AM, Timur Tabi ti...@freescale.com wrote:
The i2c_wait() function is using wait_event_interruptible_timeout() to wait
for
the I2C controller to signal that it has completed an I2C bus operation. If
the process that causes the I2C operation terminated abruptly
Jean Delvare wrote:
No, that's something for either Ben Dooks (Cc'd) or the powerpc tree.
This patch has nothing to do with ARM, so Kumar will pick it up, if you
ACK it.
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patches in the recent past, so of course I will assume
that you would apply this one.
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On Thu, Feb 12, 2009 at 4:51 AM, Vijay Nikam vijay.t.ni...@gmail.com wrote:
Also how I can read the device tree binary file ? ? ?
It would be a lot simpler if you just read the documentation (see
booting-without-of.txt) and looked at other device drivers to see what
they do.
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= simple-bus, },
{},
};
is the old way. You're missing a compatible=simple-bus in your device tree.
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for
more information.
Signed-off-by: Timur Tabi ti...@freescale.com
---
arch/powerpc/include/asm/reg.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index c6d1ab6..ca5c7f8 100644
--- a/arch/powerpc/include/asm
Michael Neuling wrote:
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
Shouldn't this be in reg_booke.h?
Yes, you're right.
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for
more information.
Signed-off-by: Timur Tabi ti...@freescale.com
---
v2: moved the definition from reg.h to reg_booke.h, where it belongs
arch/powerpc/include/asm/reg_booke.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/reg_booke.h
b/arch
that
specifies the depth of the FIFOs.
Also update the MPC8610 HPCD device tree with this property.
Signed-off-by: Timur Tabi ti...@freescale.com
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Updates to the SSI audio driver will come later. Currently, this driver
supports only one Freescale SOC, and so it's hard-coded to use the value 8
something else.
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Add the definition of the fsl,ssi-asynchronous property to ssi.txt
(documentation
of the device tree bindings for the Freescale SSI device).
Also tidy up the layout of ssi.txt.
Signed-off-by: Timur Tabi ti...@freescale.com
---
Documentation/powerpc/dts-bindings/fsl/ssi.txt | 64
. I'll reword it.
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Add the definition of the fsl,ssi-asynchronous property to ssi.txt
(documentation
of the device tree bindings for the Freescale SSI device).
Also tidy up the layout of ssi.txt.
Signed-off-by: Timur Tabi ti...@freescale.com
---
v2: fixed typo, improved wording.
Documentation/powerpc/dts
On Fri, Mar 6, 2009 at 12:49 AM, Liu Dave-R63238 dave...@freescale.com wrote:
could you try to set '1' to DMA description bit3?
Dave,
I'm looking at the 8315e reference manual. What is DMA description bit 3?
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Kumar Gala wrote:
does not apply cleanly if/after I apply:
powerpc: add fsl, fifo-depth property to Freescale SSI device nodes
That's weird -- I designed the patch so that it would. Oh well, I'll
rebase and repost.
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timebase register.
Now we can create a generic version of the function that uses jiffies,
and then arch-specific versions where possible. But Alan still needs
to be convinced. I already posted a length rebuttal to his email, but
I haven't gotten a reply yet.
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believe that on some platforms,
jiffies never increments. If so, we can't use the actual 'jiffies'
variable.
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aren't
going to happen whether we abstract it with a macro or not.
I think I can live with that.
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depending on the hardware and its priority
scheme), no.
So in that case, I can't rely on jiffies. I guess get_cycle() is my
only choice. The problem is that there is no num_cycles_per_usec().
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Scott Wood wrote:
Or you can say that atomic context is outside the scope of this macro.
No, I don't want to say that. We have wait_event_timeout() for larger-scale
operations. I'm just looking for something that can replace while (!condition);
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controller, so I'm familiar with
the controller but not the code.
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into the loop. He
countered with this:
spin_until_timeout(readb(foo) 0x80, 30 * HZ) {
udelay(10);
/* Maybe do other stuff */
}
But I don't know how to make that work *and* have it return a value indicating
timeout or success.
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Add the definition of the fsl,ssi-asynchronous property to ssi.txt
(documentation
of the device tree bindings for the Freescale SSI device).
Also tidy up the layout of ssi.txt.
Signed-off-by: Timur Tabi ti...@freescale.com
---
v3: rebased
v2: fixed typo, improved wording.
Documentation
? Shouldn't it be a variable,
perhaps something that is based on tb_ticks_per_usec?
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On Fri, Mar 13, 2009 at 1:56 PM, liran raz liranrazli...@gmail.com wrote:
Does anyone know what I'm missing? or what do I need to configure
in order to have: /dev/ttyCPM2 ?
My guess is that you don't have udev or mdev running.
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On Wed, Mar 11, 2009 at 7:22 PM, Timur Tabi ti...@freescale.com wrote:
Add the definition of the fsl,ssi-asynchronous property to ssi.txt
(documentation
of the device tree bindings for the Freescale SSI device).
Also tidy up the layout of ssi.txt.
Signed-off-by: Timur Tabi ti
properly.
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;
+
+ ugeth_info(%s: MTU = %d (frame size=%d)\n, dev-name,
+ dev-mtu, frame_size);
+ }
+ return 0;
+}
Do you think this is how it should be done? I don't know enough about
ucc_geth and MTUs to know off-hand.
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believe you'll find those entries still there even if your driver
isn't loaded at all.
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devices for standard
functionality, I'm not aware of any.
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to figure out what the right dev pointer was.
ASoC is kinda screwy in that many fields are not initialized when you
think they should be. More than once I passed a pointer to a wrong
object without realizing it, even though the code worked.
I'll check out these two patches on Monday.
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avoront...@ru.mvista.com
---
Acked-by: Timur Tabi ti...@freescale.com
Mark and Takashi: this patch is a must-fix for 2.6.30
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On Mon, Mar 23, 2009 at 3:07 AM, rizwan ahmad rizwan...@gmail.com wrote:
ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
ata1.00: qc timeout (cmd 0xec)
ata1.00: failed to IDENTIFY (I/O error, err_mask=0x4)
I'm seeing the same exact thing on a Freescale MPC8610 HPCD board.
This happens
On Tue, Apr 7, 2009 at 7:52 PM, Michael Ellerman mich...@ellerman.id.au wrote:
Can you post some more details, or point us at a thread?
http://marc.info/?t=12391165216r=1w=2
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On Tue, Apr 7, 2009 at 9:09 PM, Michael Ellerman mich...@ellerman.id.au wrote:
Have you confirmed that INTX is disabled before that call?
How do I do that?
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Tejun Heo wrote:
Running lspci -nnvvvxxx before loading the driver should be enough.
That might be difficult. My root file system is on my SATA drive.
It'll be a while before I can build an NFS rootfs.
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Tejun Heo wrote:
Yeah, right. The following patch should do the trick then.
Thanks, I appreciate it. I get this output:
XXX PCI_COMMAND=0x407
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On Wed, Apr 8, 2009 at 4:31 PM, Tejun Heo t...@kernel.org wrote:
Hmmm... for now,
I think it would be best to revert the original change. Jeff, can you
please do that?
Actually, give me a few days before you do that. A colleague gave me
some suggestions to debug this.
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Linux
, but
it doesn't. Earlier U-Boot couldn't find my SATA drive, so I thought
that was a clue. The latest U-Boot does find the SATA drive, but the
Linux driver still doesn't get interrupts.
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define some property in
the device tree to handle this?
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. And thanks to everyone for
helping me resolve this issue.
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this, and so SATA
support on the 8610 HPCD is broken.
The original quirk function disabled INTx because it caused some other
interrupt problem during early development on this board, but no one remembers
any more what that problem was, and it doesn't seem to occur any more.
Signed-off-by: Timur Tabi ti
,
which is how ISA DMA is frequently used.
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all of the + offset usages.
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Scott Wood wrote:
Timur Tabi wrote:
these two are related and seem like we could look for fsl,cpm2
That's okay, as long as you don't break compatibility with older
device trees that don't have that property, unless you can demonstrate
that these trees would never work with the current
patches before that broke backwards compatibility unnecessarily.
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property
anymore.
In that case, I have no issues.
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in
the kernel is because we didn't have a better place to put them.
Keeping them in the kernel repository was just convenient.
So I personally don't consider the *location* of the DTS files to be a
basis for deciding what they really mean.
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(for lack of a better word).
We should *strive* to maintain backwards compatibility. If that means
adding a few lines of isolated code every now and then, I don't see that
as a bad thing at all.
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an effort to minimize the problem. Adding a few isolated lines of
code to maintain that compatibility, and running a few tests, is not a
bad idea and can save headaches for some people in the future.
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.
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going to have to study the DMA programming model,
and my device driver, and write a brand new driver from scratch.
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on a hardware register until a
status bit changes. The timeout ensures that the loop still terminates if the
bit doesn't change as expected. This macro makes it easier for driver
developers to perform this kind of operation properly.
Signed-off-by: Timur Tabi ti...@freescale.com
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I'm making
like us to check any other transaction/register combos?
Yes, could you try this on non-PCI memory?
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, but I don't see
anything there that would constitute a memory buffer.
I test this change on an 8610 and DMA to a register I/O, where this bit
isn't even defined, and it made no difference. So I guess this change
is okay.
Acked-by: Timur Tabi ti...@freescale.com
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to use the PCI Read Multiple
command, instead of the PCI Read Line command, for PCI read operations.
Please be aware that this setting may result in read pre-fetching on
some platforms.
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David Hawkins wrote:
Ira will add your comment to the body of the code near
the PRC_RM command and submit a new patch.
I'd rather have it near the top where people can see it.
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in performance with this patch. The dmatest
driver was also used to verify the correctness of the transfers, and showed
no errors.
Signed-off-by: Ira W. Snyder i...@ovro.caltech.edu
Acked-by: Timur Tabi ti...@freescale.com
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for PCI, so it would
be surprising if it had any effect elsewhere.
Surely you wouldn't really be surprised by incorrect documentation of
our parts. :-)
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a
single register address. It's just a off-loaded memcpy. So we don't
need to worry about what happens to a fixed address.
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the
driver/kernel to clearly indicate what's missing from the device tree.
In Kumar's example above, I expect the kernel to say that the MCM node
is missing.
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On Mon, Apr 27, 2009 at 2:05 PM, Timur Tabi ti...@freescale.com wrote:
The macro spin_event_timeout() takes a condition and timeout value
(in microseconds) as parameters. It spins until either the condition is true
or the timeout expires. It returns the result of the condition when the loop
.
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put_char
function
is never called. Trying to debug to the console subsystem is making me dizzy.
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is
removed (or ignored) from the device tree. If it's true, then it's kept in.
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to support
conditional nodes, so that if a customer has an older U-Boot he can't update,
he
can use DTC to generate a V17 DTB that has the conditionals already processed.
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, and will continue to be
true.
The problem with this approach is that you're replacing data with code, and
that
always makes things more difficult.
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to
implement a graft function in libfdt.
Most likely, U-Boot would strip out the special node after processing it. The
idea is for the boot loader to customize the device tree based before sending
it
to the kernel.
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Grant Likely wrote:
On Feb 12, 2008 8:44 AM, Timur Tabi [EMAIL PROTECTED] wrote:
Arnd Bergmann wrote:
On Tuesday 12 February 2008, David Gibson wrote:
Or to expand. It's relatively easy now to just include multiple nodes
in the tree and either delete or nop some of them out conditionally
different thing).
Then why bother passing a DTB to the boot loader at all? Why not just have the
boot loader create the device tree from scratch?
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will be wrong,
because it could contain nodes that don't belong. We would need a new,
incompatible version number for the device tree to make sure that this doesn't
happen, even though nothing has changed in the binary layout of the tree.
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78 4b d7 b0 75
32 bytes @ 4230:
1f 8b 08 08 b7 e7 7a 44 00 03 62 75 73 79 62 6f
78 2d 31 2e 31 2e 33 2e 69 6d 67 00 ec 5d 7d 74
So when Kbuild creates vmlinux.bin, what does it do besides extract the PT_LOAD
segment?
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Timur Tabi wrote:
So when Kbuild creates vmlinux.bin, what does it do besides extract the
PT_LOAD
segment?
Never mind, I was doing something stupid which was trashing my in-memory copy
of
vmlinux.bin.
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are a bunch of functions to
manage memory allocated of the DPRAM. You might want to see who's using those
functions, and how.
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;
}
If access_ok() returns false, then that means that we cannot copy the data from
user-space. So why are we returning 'n'? Shouldn't we return zero, to let the
caller know that the function failed?
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ifconfig eth1 down would cause a kernel
panic if eth0 was also up. The root cause was a bug in rheap.c. However, this
code was fixed a year ago. Could it be a similar bug?
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Joakim Tjernlund wrote:
eth0 is also up, was it commit 4942bd80e83d13bf394df4a8109bee39d861820f
that fixed that bug?
Yep. Unfortunately, I don't really know enough about the ucc_geth driver to
know what could be wrong. I just noticed your message and remembered that old
bug.
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so, can you email me a detailed description of the problem?
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that, sorry. You'll have to ask Jeff G or maybe Kumar to
pick up those patches.
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in
order for the allocate to succeed.
Considering that the amount of memory that we allocate is in the order of
megabytes, and it really isn't that important, I would think that we don't want
to touch the emergency pool. Does that sound right?
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than
4MB of physically contiguous memory.
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
I tested this on a Freescale 8610 32-bit PowerPC system, and when I increased
CONFIG_FORCE_MAX_ZONEORDER to 13, I was able to allocate 5MB of memory via
__get_free_pages(), so this change should be safe.
arch
Anton Vorontsov wrote:
+config MCU_MPC837XRDB
+ tristate MPC837XRDB MCU driver
+ depends on I2C MPC837x_RDB OF_GPIO
The MPC8349E-mITX also has this chip. Can you include support for that board as
well?
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Scott Wood wrote:
...but not anywhere else. All user pointers should have a __user
annotation.
Even in a typecast?
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Andrew Morton wrote:
The defconfig change gets almost 100% rejects and probably isn't
appropriate here and isn't very important.
It's weird that you get rejects, but otherwise you're correct. defconfigs are
just a convenience, anyway.
--
Timur Tabi
Linux kernel developer at Freescale
to the rheap code. But that's a problem for another
time.
Well, there is Linux CLK API (somewhat similar to GPIO API), but PowerPC
doesn't use it yet.
Yeah, I noticed that too. I'll add it to my to-do list, but I suspect that
someone else will get around to it before I do.
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Timur Tabi
Linux kernel
Robert Schwebel wrote:
The ARM method of using just a device number is so much easier ...
And I was going to suggest that the ARM guys should use device trees, too.
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Timur Tabi
Linux kernel developer at Freescale
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Kumar Gala wrote:
I'd prefer we use cell-index and not introduce fsl,ucc.
Yeah, me too. cell-index is the right property for the UCC number.
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Timur Tabi
Linux kernel developer at Freescale
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-serial Cc'ed.
Do we want the first UCC to have a cell-index of 1? Maybe we should fix this
off-by-one error once and for all, and number all UCCs from 0?
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Timur Tabi
Linux kernel developer at Freescale
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is Linux implementation details.
Fair enough.
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Timur Tabi
Linux kernel developer at Freescale
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occurrences of device-id with cell-index.
Drivers are modified for backward compatibility's sake.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
Acked-by: Timur Tabi [EMAIL PROTECTED]
--
Timur Tabi
Linux kernel developer at Freescale
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