[llvm-branch-commits] [lldb] release/21.x: [lldb] Implement DW_CFA_val_offset and DW_CFA_val_offset_sf (#150732) (PR #166611)

2025-11-10 Thread Daniel Sanders via llvm-branch-commits
dsandersllvm wrote: My goal was just to minimize divergence in a repo three or four layers downstream of llvm.org's where I needed this change. I created this PR because when I requested it in one of the intermediate repos I was asked to do it upstream instead since it was early enough that th

[llvm-branch-commits] [llvm] [GOFF] Write out relocations in the GOFF writer (PR #167054)

2025-11-10 Thread via llvm-branch-commits
https://github.com/tltao approved this pull request. LGTM for the most part aside from some minor comments. https://github.com/llvm/llvm-project/pull/167054 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org

[llvm-branch-commits] [llvm] [GOFF] Write out relocations in the GOFF writer (PR #167054)

2025-11-10 Thread via llvm-branch-commits
@@ -502,6 +535,169 @@ void GOFFWriter::writeText(const MCSectionGOFF *Section) { Asm.writeSectionData(S, Section); } +namespace { +// RelocDataItemBuffer provides a static buffer for relocation data items. +class RelocDataItemBuffer { + char Buffer[GOFF::MaxDataLength]; +

[llvm-branch-commits] [llvm] [GOFF] Write out relocations in the GOFF writer (PR #167054)

2025-11-10 Thread via llvm-branch-commits
@@ -545,8 +743,68 @@ GOFFObjectWriter::GOFFObjectWriter( GOFFObjectWriter::~GOFFObjectWriter() = default; +void GOFFObjectWriter::recordRelocation(const MCFragment &F, +const MCFixup &Fixup, MCValue Target, +

[llvm-branch-commits] [llvm] [GOFF] Write out relocations in the GOFF writer (PR #167054)

2025-11-10 Thread via llvm-branch-commits
@@ -16,12 +17,35 @@ namespace { class SystemZGOFFObjectWriter : public MCGOFFObjectTargetWriter { public: SystemZGOFFObjectWriter(); + + unsigned getRelocType(const MCValue &Target, const MCFixup &Fixup, +bool IsPCRel) const override; }; } // end an

[llvm-branch-commits] [llvm] [GOFF] Write out relocations in the GOFF writer (PR #167054)

2025-11-10 Thread via llvm-branch-commits
https://github.com/tltao edited https://github.com/llvm/llvm-project/pull/167054 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [LTT] Mark as unkown weak function tests. (PR #167399)

2025-11-10 Thread via llvm-branch-commits
github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Transforms/IPO/LowerTypeTests.cpp --dif

[llvm-branch-commits] [llvm] [LTT] Mark as unkown weak function tests. (PR #167399)

2025-11-10 Thread Mircea Trofin via llvm-branch-commits
mtrofin wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.com/github/pr/llvm/llvm-project/167399?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [llvm] [LTT] Mark as unkown weak function tests. (PR #167399)

2025-11-10 Thread Mircea Trofin via llvm-branch-commits
https://github.com/mtrofin created https://github.com/llvm/llvm-project/pull/167399 None >From 0c5994b3055a715dbe25c9e742cab1ec00fc8281 Mon Sep 17 00:00:00 2001 From: Mircea Trofin Date: Mon, 10 Nov 2025 12:33:12 -0800 Subject: [PATCH] [LTT] Mark as unkown weak function tests. --- llvm/lib/T

[llvm-branch-commits] [NFC][SpecialCaseList] Store SectionStr as StringRef (PR #167278)

2025-11-10 Thread Thurston Dang via llvm-branch-commits
https://github.com/thurstond approved this pull request. https://github.com/llvm/llvm-project/pull/167278 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-11-10 Thread via llvm-branch-commits
https://github.com/jofrn closed https://github.com/llvm/llvm-project/pull/120716 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [X86] Cast atomic vectors in IR to support floats (PR #142320)

2025-11-10 Thread via llvm-branch-commits
https://github.com/jofrn closed https://github.com/llvm/llvm-project/pull/142320 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [X86] Remove extra MOV after widening atomic load (PR #138635)

2025-11-10 Thread via llvm-branch-commits
https://github.com/jofrn closed https://github.com/llvm/llvm-project/pull/138635 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [SelectionDAG] Widen <2 x T> vector types for atomic load (PR #120598)

2025-11-10 Thread via llvm-branch-commits
https://github.com/jofrn closed https://github.com/llvm/llvm-project/pull/120598 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [X86] Add atomic vector tests for unaligned >1 sizes. (PR #120387)

2025-11-10 Thread via llvm-branch-commits
https://github.com/jofrn closed https://github.com/llvm/llvm-project/pull/120387 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] Hexagon: Enable terminal rule (PR #165960)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/165960 >From efe2a94f1d02f62d2d80ad98a2dcf87fe2bd1ecc Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 31 Oct 2025 18:31:57 -0700 Subject: [PATCH] Hexagon: Enable terminal rule --- llvm/lib/Target/Hexagon/Hexa

[llvm-branch-commits] [llvm] AArch64: Enable terminal rule (PR #165959)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/165959 >From adefc211b8a8af190d24c590f0d59d587ad62a23 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 31 Oct 2025 18:23:39 -0700 Subject: [PATCH] AArch64: Enable terminal rule --- llvm/lib/Target/AArch64/AArc

[llvm-branch-commits] [llvm] AArch64: Enable terminal rule (PR #165959)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/165959 >From adefc211b8a8af190d24c590f0d59d587ad62a23 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 31 Oct 2025 18:23:39 -0700 Subject: [PATCH] AArch64: Enable terminal rule --- llvm/lib/Target/AArch64/AArc

[llvm-branch-commits] [llvm] ARM: Enable terminal rule (PR #165958)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/165958 >From b949980bdc8b21b2df64775863dff718b6becc84 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 31 Oct 2025 18:22:31 -0700 Subject: [PATCH] ARM: Enable terminal rule --- llvm/lib/Target/ARM/ARMSubtarget

[llvm-branch-commits] [llvm] CodeGen: Remove target hook for terminal rule (PR #165962)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/165962 >From 68599da762a0ae344052c7e489545c227009d12c Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 31 Oct 2025 18:24:27 -0700 Subject: [PATCH] CodeGen: Remove target hook for terminal rule Enables the termi

[llvm-branch-commits] [llvm] CodeGen: Remove target hook for terminal rule (PR #165962)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/165962 >From 68599da762a0ae344052c7e489545c227009d12c Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 31 Oct 2025 18:24:27 -0700 Subject: [PATCH] CodeGen: Remove target hook for terminal rule Enables the termi

[llvm-branch-commits] [llvm] RISCV: Enable terminal rule (PR #165961)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/165961 >From 703fc9fb677493eede82deffe7cd192266937b2d Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 31 Oct 2025 18:33:25 -0700 Subject: [PATCH] RISCV: Enable terminal rule --- llvm/lib/Target/RISCV/RISCVSub

[llvm-branch-commits] [llvm] Hexagon: Enable terminal rule (PR #165960)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/165960 >From efe2a94f1d02f62d2d80ad98a2dcf87fe2bd1ecc Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 31 Oct 2025 18:31:57 -0700 Subject: [PATCH] Hexagon: Enable terminal rule --- llvm/lib/Target/Hexagon/Hexa

[llvm-branch-commits] [NFC][SpecialCaseList] Refactor error handling (PR #167277)

2025-11-10 Thread Thurston Dang via llvm-branch-commits
https://github.com/thurstond approved this pull request. https://github.com/llvm/llvm-project/pull/167277 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BPF] Add CLI option to enable misaligned memory access (PR #167013)

2025-11-10 Thread Alex Rønne Petersen via llvm-branch-commits
alexrp wrote: > Most backends use a subtarget feature to indicate whether unaligned access is > allowed. Just to back up this point: ``` ❯ git grep -E 'SubtargetFeature<".*(align|ual).*"' */*.td AArch64/AArch64Features.td:696:26:def FeatureStrictAlign : SubtargetFeature<"strict-align", AArch6

[llvm-branch-commits] [NFC][SpecialCaseList] Precommit Version 4 tests (PR #167282)

2025-11-10 Thread Qinkun Bao via llvm-branch-commits
https://github.com/qinkunbao approved this pull request. https://github.com/llvm/llvm-project/pull/167282 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BPF] Add CLI option to enable misaligned memory access (PR #167013)

2025-11-10 Thread Claire Fan via llvm-branch-commits
clairechingching wrote: @yonghong-song The kernel verifier is indeed very restrictive and for good reason. This feature is intended for user-space eBPF, where the decision to allow misaligned access is up to the implementer. In such environments, allowing misaligned accesses is far more perfor

[llvm-branch-commits] [llvm] RISCV: Enable terminal rule (PR #165961)

2025-11-10 Thread Craig Topper via llvm-branch-commits
https://github.com/topperc approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/165961 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [SpecialCaseList] Switch to Version 3. (PR #167283)

2025-11-10 Thread Qinkun Bao via llvm-branch-commits
https://github.com/qinkunbao approved this pull request. https://github.com/llvm/llvm-project/pull/167283 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [NFC][SpecialCaseList] Hide Section internal in private section (PR #167276)

2025-11-10 Thread Qinkun Bao via llvm-branch-commits
https://github.com/qinkunbao approved this pull request. https://github.com/llvm/llvm-project/pull/167276 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [NFC][Support] Remove unused getLongestMatch from SpecialCaseList (PR #167193)

2025-11-10 Thread Qinkun Bao via llvm-branch-commits
https://github.com/qinkunbao approved this pull request. https://github.com/llvm/llvm-project/pull/167193 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [NFC][SpecialCaseList] Rename `Section::SectionStr` to `Name` (PR #167279)

2025-11-10 Thread Qinkun Bao via llvm-branch-commits
https://github.com/qinkunbao approved this pull request. https://github.com/llvm/llvm-project/pull/167279 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] DAG: Use sincos vector libcalls through RuntimeLibcalls (PR #166984)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/166984 >From 404f6f03a1bc499d964f724ac8aaa424f9cfb367 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Thu, 6 Nov 2025 20:29:04 -0800 Subject: [PATCH] DAG: Use sincos vector libcalls through RuntimeLibcalls Copy new

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add libcall entries for sleef and armpl modf functions (PR #166985)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/166985 >From 67b8475633abef420ffd304ee6bd2509081de2bb Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Thu, 6 Nov 2025 20:44:55 -0800 Subject: [PATCH] RuntimeLibcalls: Add libcall entries for sleef and armpl modf fu

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add __memcpy_chk, __memmove_chk, __memset_chk (PR #167053)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/167053 >From e5510192d0f6f17d6a69b882c3e008629509ccbc Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 7 Nov 2025 15:27:24 -0800 Subject: [PATCH] RuntimeLibcalls: Add __memcpy_chk, __memmove_chk, __memset_chk

[llvm-branch-commits] [llvm] DAG: Move expandMultipleResultFPLibCall to TargetLowering (NFC) (PR #166988)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/166988 >From 2d95f3357853b05f23ed426209b3ec38291ae0ce Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 7 Nov 2025 10:22:01 -0800 Subject: [PATCH] DAG: Move expandMultipleResultFPLibCall to TargetLowering (NFC)

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add mustprogress to common function attributes (PR #167080)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/167080 >From 238ad7def6d2051e6e80a17f0018143a5b91552b Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 7 Nov 2025 17:20:09 -0800 Subject: [PATCH] RuntimeLibcalls: Add mustprogress to common function attributes

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add macos unlocked IO functions to systems (PR #167084)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/167084 >From 6656c9200380ab01ae091d73de8864f45d6e8e99 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 7 Nov 2025 19:42:23 -0800 Subject: [PATCH] RuntimeLibcalls: Add macos unlocked IO functions to systems This

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add malloc and free entries (PR #167081)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/167081 >From 74c1b3e67556e9f4d881117b22080acc2e65738d Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 7 Nov 2025 17:19:28 -0800 Subject: [PATCH] RuntimeLibcalls: Add malloc and free entries Calloc was already

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add macos unlocked IO functions to systems (PR #167084)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/167084 >From 6656c9200380ab01ae091d73de8864f45d6e8e99 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 7 Nov 2025 19:42:23 -0800 Subject: [PATCH] RuntimeLibcalls: Add macos unlocked IO functions to systems This

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add more function entries from TargetLibraryInfo (PR #167082)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/167082 >From a25d7fec17a54d1ad29d1e2c7f1e28b22fcfe411 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 7 Nov 2025 18:51:03 -0800 Subject: [PATCH] RuntimeLibcalls: Add more function entries from TargetLibraryInf

[llvm-branch-commits] [llvm] DAG: Stop using TargetLibraryInfo for multi-result FP intrinsic codegen (PR #166987)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/166987 >From 990eb1e0210b76c5abd76fca30c923de3d30b4ec Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Thu, 6 Nov 2025 21:55:35 -0800 Subject: [PATCH] DAG: Stop using TargetLibraryInfo for multi-result FP intrinsic

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add memset_pattern* calls to darwin systems (PR #167083)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/167083 >From 6ee0ec391022e318b79f8eae8b3172a34e79c2fa Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 7 Nov 2025 19:20:05 -0800 Subject: [PATCH] RuntimeLibcalls: Add memset_pattern* calls to darwin systems Thi

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add definitions for vector math functions (PR #167026)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/167026 >From b983fd3f0866b3f07e98d89c82bc9ee025231777 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 7 Nov 2025 12:51:18 -0800 Subject: [PATCH] RuntimeLibcalls: Add definitions for vector math functions This

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add call entries for sincos sleef and armpl libcalls (PR #166983)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/166983 >From 32550a9456f6d0d7d1c0969820073df8b4397021 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Thu, 6 Nov 2025 20:20:03 -0800 Subject: [PATCH] RuntimeLibcalls: Add call entries for sincos sleef and armpl lib

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add __memcpy_chk, __memmove_chk, __memset_chk (PR #167053)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/167053 >From e5510192d0f6f17d6a69b882c3e008629509ccbc Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 7 Nov 2025 15:27:24 -0800 Subject: [PATCH] RuntimeLibcalls: Add __memcpy_chk, __memmove_chk, __memset_chk

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add small_printf functions to emscripten (PR #167087)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/167087 >From b54d80c70a08bd9c5fab3a41142c9803593a747b Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 7 Nov 2025 19:51:41 -0800 Subject: [PATCH] RuntimeLibcalls: Add small_printf functions to emscripten --- l

[llvm-branch-commits] [llvm] PowerPC: Add vec_malloc functions to AIX in RuntimeLibcalls (PR #167089)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/167089 >From d7558b98ac124ab368b2098bd96ee0936a2b10ae Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 7 Nov 2025 20:01:39 -0800 Subject: [PATCH] PowerPC: Add vec_malloc functions to AIX in RuntimeLibcalls ---

[llvm-branch-commits] [llvm] XCore: Add iprintf to RuntimeLibcalls system library (PR #167088)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/167088 >From 41af6eab3161b1e5b37344228f1a8cb07473 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 7 Nov 2025 19:56:59 -0800 Subject: [PATCH] XCore: Add iprintf to RuntimeLibcalls system library --- llvm/i

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add a few libm entries from TargetLibraryInfo (PR #167049)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/167049 >From ae482245395ca91f7da82dd40cdd607d1de51efa Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 7 Nov 2025 14:57:28 -0800 Subject: [PATCH] RuntimeLibcalls: Add a few libm entries from TargetLibraryInfo

[llvm-branch-commits] [clang] [llvm] [AArch64][llvm] Add instructions for FEAT_MOPS_GO (PR #164913)

2025-11-10 Thread Jonathan Thackray via llvm-branch-commits
https://github.com/jthackray updated https://github.com/llvm/llvm-project/pull/164913 >From 1080ae61785b5d11c29d4074ca783bd1050a8540 Mon Sep 17 00:00:00 2001 From: Jonathan Thackray Date: Tue, 2 Sep 2025 16:26:53 +0100 Subject: [PATCH 1/3] [AArch64][llvm] Add instructions for FEAT_MOPS_GO Add

[llvm-branch-commits] [clang] [llvm] [AArch64][llvm] Add instructions for FEAT_MOPS_GO (PR #164913)

2025-11-10 Thread via llvm-branch-commits
github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff origin/main HEAD --extensions c,cpp -- clang/test/Driver/aarch64-vfat.c clang/test/D

[llvm-branch-commits] [clang] [llvm] [AArch64][llvm] Add instructions for FEAT_MOPS_GO (PR #164913)

2025-11-10 Thread Jonathan Thackray via llvm-branch-commits
https://github.com/jthackray updated https://github.com/llvm/llvm-project/pull/164913 >From 1080ae61785b5d11c29d4074ca783bd1050a8540 Mon Sep 17 00:00:00 2001 From: Jonathan Thackray Date: Tue, 2 Sep 2025 16:26:53 +0100 Subject: [PATCH 1/3] [AArch64][llvm] Add instructions for FEAT_MOPS_GO Add

[llvm-branch-commits] [llvm] 1662d31 - Revert "[DFAJumpThreading] Enable DFAJumpThread by default. (#157646)"

2025-11-10 Thread via llvm-branch-commits
Author: Petr Hosek Date: 2025-11-10T09:48:08-08:00 New Revision: 1662d311cd523150d821ccae26f1a852d0e98747 URL: https://github.com/llvm/llvm-project/commit/1662d311cd523150d821ccae26f1a852d0e98747 DIFF: https://github.com/llvm/llvm-project/commit/1662d311cd523150d821ccae26f1a852d0e98747.diff LO

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add libcall entries for sleef and armpl modf functions (PR #166985)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
@@ -197,6 +201,55 @@ RuntimeLibcallsInfo::getFunctionTy(LLVMContext &Ctx, const Triple &TT, fcNegNormal)); return {FuncTy, Attrs}; } + case RTLIB::impl__ZGVnN2vl8_modf: + case RTLIB::impl__ZGVnN4vl4_modff: + case RTLIB

[llvm-branch-commits] [llvm] DAG: Use modf vector libcalls through RuntimeLibcalls (PR #166986)

2025-11-10 Thread Paul Kirth via llvm-branch-commits
https://github.com/ilovepi approved this pull request. https://github.com/llvm/llvm-project/pull/166986 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add libcall entries for sleef and armpl modf functions (PR #166985)

2025-11-10 Thread Paul Kirth via llvm-branch-commits
@@ -197,6 +201,55 @@ RuntimeLibcallsInfo::getFunctionTy(LLVMContext &Ctx, const Triple &TT, fcNegNormal)); return {FuncTy, Attrs}; } + case RTLIB::impl__ZGVnN2vl8_modf: + case RTLIB::impl__ZGVnN4vl4_modff: + case RTLIB

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add libcall entries for sleef and armpl modf functions (PR #166985)

2025-11-10 Thread Paul Kirth via llvm-branch-commits
https://github.com/ilovepi edited https://github.com/llvm/llvm-project/pull/166985 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add libcall entries for sleef and armpl modf functions (PR #166985)

2025-11-10 Thread Paul Kirth via llvm-branch-commits
https://github.com/ilovepi approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/166985 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [SPIRV][SPIRVPrepareGlobals] Map AMD's dynamic LDS 0-element globals to arrays with UINT32_MAX elements (PR #166952)

2025-11-10 Thread Steven Perron via llvm-branch-commits
Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?=, Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?=, Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= Message-ID: In-Reply-To: https://github.com/s-perron approved this pull request. https://github.com/llvm/llvm-project/pull/166952

[llvm-branch-commits] [llvm] CodeGen: Remove target hook for terminal rule (PR #165962)

2025-11-10 Thread Quentin Colombet via llvm-branch-commits
https://github.com/qcolombet edited https://github.com/llvm/llvm-project/pull/165962 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] CodeGen: Remove target hook for terminal rule (PR #165962)

2025-11-10 Thread Quentin Colombet via llvm-branch-commits
https://github.com/qcolombet approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/165962 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [SPIRV][SPIRVPrepareGlobals] Map AMD's dynamic LDS 0-element globals to arrays with UINT32_MAX elements (PR #166952)

2025-11-10 Thread Steven Perron via llvm-branch-commits
Juan Manuel Martinez =?utf-8?q?Caamaño?=, Juan Manuel Martinez =?utf-8?q?Caamaño?=, Juan Manuel Martinez =?utf-8?q?Caamaño?Message-ID: In-Reply-To: s-perron wrote: > > I'm wondering if you need to change all 0-sized array or not. If so, we > > might want to centralize the conversion of 0-sized

[llvm-branch-commits] [llvm] RuntimeLibcalls: Add definitions for vector math functions (PR #167026)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
@@ -182,10 +182,63 @@ foreach FPTy = ["F32", "F64", "F80", "F128", "PPCF128"] in { def MODF_#FPTy : RuntimeLibcall; } -foreach VecTy = ["V4F32", "V2F64", "NXV4F32", "NXV2F64"] in { - def MODF_#VecTy : RuntimeLibcall; - def SINCOS_#VecTy : RuntimeLibcall; - def SINCOSPI_#

[llvm-branch-commits] [llvm] RISCV: Enable terminal rule (PR #165961)

2025-11-10 Thread Quentin Colombet via llvm-branch-commits
https://github.com/qcolombet approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/165961 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] RISCV: Enable terminal rule (PR #165961)

2025-11-10 Thread Quentin Colombet via llvm-branch-commits
https://github.com/qcolombet edited https://github.com/llvm/llvm-project/pull/165961 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] Hexagon: Enable terminal rule (PR #165960)

2025-11-10 Thread Quentin Colombet via llvm-branch-commits
https://github.com/qcolombet approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/165960 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [SPIRV][SPIRVPrepareGlobals] Map AMD's dynamic LDS 0-element globals to arrays with UINT32_MAX elements (PR #166952)

2025-11-10 Thread Steven Perron via llvm-branch-commits
Juan Manuel Martinez =?utf-8?q?Caamaño?=, Juan Manuel Martinez =?utf-8?q?Caamaño?=, Juan Manuel Martinez =?utf-8?q?Caamaño?Message-ID: In-Reply-To: @@ -43,6 +44,29 @@ bool tryExtendLLVMBitcodeMarker(GlobalVariable &Bitcode) { return true; } +bool tryExtendDynamicLDSGlobal(

[llvm-branch-commits] [llvm] X86: Enable terminal rule (PR #165957)

2025-11-10 Thread Quentin Colombet via llvm-branch-commits
https://github.com/qcolombet approved this pull request. https://github.com/llvm/llvm-project/pull/165957 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BPF] Add CLI option to enable misaligned memory access (PR #167013)

2025-11-10 Thread via llvm-branch-commits
yonghong-song wrote: misaligned memory access is bad for performance and may have issues for verification (or make verification more complex). Do you have concrete C code to illustrate this? Can the C code easily converted to aligned memory access? cc @4ast https://github.com/llvm/llvm-proje

[llvm-branch-commits] [llvm] DAG: Fold copysign with a known signmask to a disjoint or (PR #167266)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/167266 >From d6b054dc67ba829009cb588faa5c868ea13121b9 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Thu, 1 Aug 2024 15:11:59 +0400 Subject: [PATCH 1/3] DAG: Fold copysign with a known signmask to a disjoint or If

[llvm-branch-commits] [llvm] DAG: Fold copysign with a known signmask to a disjoint or (PR #167266)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/167266 >From d6b054dc67ba829009cb588faa5c868ea13121b9 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Thu, 1 Aug 2024 15:11:59 +0400 Subject: [PATCH 1/3] DAG: Fold copysign with a known signmask to a disjoint or If

[llvm-branch-commits] [llvm] [SPIRV][SPIRVPrepareGlobals] Map AMD's dynamic LDS 0-element globals to arrays with UINT32_MAX elements (PR #166952)

2025-11-10 Thread Juan Manuel Martinez Caamaño via llvm-branch-commits
@@ -52,6 +76,9 @@ bool SPIRVPrepareGlobals::runOnModule(Module &M) { if (GlobalVariable *Bitcode = M.getNamedGlobal("llvm.embedded.module")) Changed |= tryExtendLLVMBitcodeMarker(*Bitcode); + for (GlobalVariable &GV : make_early_inc_range(M.globals())) +Changed |= t

[llvm-branch-commits] [llvm] AMDGPU: Add baseline tests for copysign with known signmask input (PR #167265)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: Mismerged into wrong branch https://github.com/llvm/llvm-project/pull/167265 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [SPIRV][SPIRVPrepareGlobals] Map AMD's dynamic LDS 0-element globals to arrays with UINT32_MAX elements (PR #166952)

2025-11-10 Thread Juan Manuel Martinez Caamaño via llvm-branch-commits
https://github.com/jmmartinez updated https://github.com/llvm/llvm-project/pull/166952 From 8cbc3fd6403aef2cff7dbe585aa8d6762a011ef4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Juan=20Manuel=20Martinez=20Caama=C3=B1o?= Date: Fri, 7 Nov 2025 12:24:18 +0100 Subject: [PATCH 1/4] [SPIRV][SPIRVPrepare

[llvm-branch-commits] [llvm] AMDGPU: Add baseline tests for copysign with known signmask input (PR #167265)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm closed https://github.com/llvm/llvm-project/pull/167265 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] DAG: Fold copysign with a known signmask to a disjoint or (PR #167266)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/167266 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] DAG: Add AssertNoFPClass from call return attributes (PR #167264)

2025-11-10 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/167264 >From 0696fe61de175a41ac8a67c265a97e1611b9c5ab Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Sun, 9 Nov 2025 18:45:32 -0800 Subject: [PATCH 1/2] DAG: Add AssertNoFPClass from call return attributes This de

[llvm-branch-commits] [llvm] [VPlan] Implement compressed widening of memory instructions (PR #166956)

2025-11-10 Thread Sergey Kachkov via llvm-branch-commits
https://github.com/skachkov-sc edited https://github.com/llvm/llvm-project/pull/166956 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BOLT][NFC] Rename Pointer Auth DWARF rewriter passes (PR #164622)

2025-11-10 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/164622 From 85a832fbb903f2f986efbdd65ccb48e5ee190d13 Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Wed, 22 Oct 2025 12:44:37 + Subject: [PATCH 1/3] [BOLT][NFC] Rename Pointer Auth DWARF rewriter passes Ori

[llvm-branch-commits] [llvm] [BOLT][PAC] Warn about synchronous unwind tables (PR #165227)

2025-11-10 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/165227 From 7e17eea4a5da638d1bfb375904720d287585535c Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Mon, 27 Oct 2025 09:29:54 + Subject: [PATCH 1/2] [BOLT][PAC] Warn about synchronous unwind tables BOLT cur

[llvm-branch-commits] [llvm] [BOLT][NFC] Rename Pointer Auth DWARF rewriter passes (PR #164622)

2025-11-10 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/164622 From 85a832fbb903f2f986efbdd65ccb48e5ee190d13 Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Wed, 22 Oct 2025 12:44:37 + Subject: [PATCH 1/3] [BOLT][NFC] Rename Pointer Auth DWARF rewriter passes Ori

[llvm-branch-commits] [llvm] [BOLT][PAC] Warn about synchronous unwind tables (PR #165227)

2025-11-10 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/165227 From 7e17eea4a5da638d1bfb375904720d287585535c Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Mon, 27 Oct 2025 09:29:54 + Subject: [PATCH 1/2] [BOLT][PAC] Warn about synchronous unwind tables BOLT cur

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart (PR #167329)

2025-11-10 Thread Gergely Bálint via llvm-branch-commits
bgergely0 wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.com/github/pr/llvm/llvm-project/167329?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart (PR #167329)

2025-11-10 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 created https://github.com/llvm/llvm-project/pull/167329 This function contains most of the logic for BTI: - it takes the BasicBlock and the instruction used to jump to it. - then it checks if the first non-pseudo instruction is a sufficient landing pad for the used

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::isBTILandingPad (PR #167306)

2025-11-10 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/167306 From f1cc15ef3330cfd6f4151d461e7e7d963df4e56d Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Thu, 28 Aug 2025 12:32:37 + Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::isBTILandingPad - takes both i

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant (PR #167308)

2025-11-10 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/167308 From 8b3ff18ecba598ab6560c05924d1ce78d9a9 Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Mon, 1 Sep 2025 08:52:28 + Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant Checks if an i

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant (PR #167308)

2025-11-10 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/167308 From 8b3ff18ecba598ab6560c05924d1ce78d9a9 Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Mon, 1 Sep 2025 08:52:28 + Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant Checks if an i

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::isBTILandingPad (PR #167306)

2025-11-10 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/167306 From f1cc15ef3330cfd6f4151d461e7e7d963df4e56d Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Thu, 28 Aug 2025 12:32:37 + Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::isBTILandingPad - takes both i

[llvm-branch-commits] [llvm] [SPIRV][SPIRVPrepareGlobals] Map AMD's dynamic LDS 0-element globals to arrays with UINT32_MAX elements (PR #166952)

2025-11-10 Thread Juan Manuel Martinez Caamaño via llvm-branch-commits
@@ -52,6 +76,9 @@ bool SPIRVPrepareGlobals::runOnModule(Module &M) { if (GlobalVariable *Bitcode = M.getNamedGlobal("llvm.embedded.module")) Changed |= tryExtendLLVMBitcodeMarker(*Bitcode); + for (GlobalVariable &GV : make_early_inc_range(M.globals())) +Changed |= t

[llvm-branch-commits] [llvm] [SPIRV][SPIRVPrepareGlobals] Map AMD's dynamic LDS 0-element globals to arrays with UINT32_MAX elements (PR #166952)

2025-11-10 Thread Juan Manuel Martinez Caamaño via llvm-branch-commits
@@ -43,6 +44,29 @@ bool tryExtendLLVMBitcodeMarker(GlobalVariable &Bitcode) { return true; } +bool tryExtendDynamicLDSGlobal(GlobalVariable &GV) { + constexpr unsigned WorkgroupAS = 3; + const bool IsWorkgroupExternal = + GV.hasExternalLinkage() && GV.getAddressSpace(

[llvm-branch-commits] [llvm] [SPIRV][SPIRVPrepareGlobals] Map AMD's dynamic LDS 0-element globals to arrays with UINT32_MAX elements (PR #166952)

2025-11-10 Thread Juan Manuel Martinez Caamaño via llvm-branch-commits
@@ -43,6 +44,29 @@ bool tryExtendLLVMBitcodeMarker(GlobalVariable &Bitcode) { return true; } +bool tryExtendDynamicLDSGlobal(GlobalVariable &GV) { + constexpr unsigned WorkgroupAS = 3; jmmartinez wrote: Way better. Thanks ! https://github.com/llvm/llvm-pr

[llvm-branch-commits] [llvm] [SPIRV][SPIRVPrepareGlobals] Map AMD's dynamic LDS 0-element globals to arrays with UINT32_MAX elements (PR #166952)

2025-11-10 Thread Juan Manuel Martinez Caamaño via llvm-branch-commits
jmmartinez wrote: > I'm wondering if you need to change all 0-sized array or not. If so, we might > want to centralize the conversion of 0-sized arrays. We could try to move the > code that changes them to 1 element arrays here as well. If you point me to where this is happening I can try to d

[llvm-branch-commits] [llvm] [VPlan] Implement compressed widening of memory instructions (PR #166956)

2025-11-10 Thread Sergey Kachkov via llvm-branch-commits
https://github.com/skachkov-sc updated https://github.com/llvm/llvm-project/pull/166956 >From 92342e03b192d37370c9160b13ce1048501eb079 Mon Sep 17 00:00:00 2001 From: Sergey Kachkov Date: Fri, 7 Nov 2025 18:09:56 +0300 Subject: [PATCH] [VPlan] Implement compressed widening of memory instructions

[llvm-branch-commits] [llvm] [SPIRV][SPIRVPrepareGlobals] Map AMD's dynamic LDS 0-element globals to arrays with UINT32_MAX elements (PR #166952)

2025-11-10 Thread Steven Perron via llvm-branch-commits
Juan Manuel Martinez =?utf-8?q?Caamaño?Message-ID: In-Reply-To: @@ -52,6 +76,9 @@ bool SPIRVPrepareGlobals::runOnModule(Module &M) { if (GlobalVariable *Bitcode = M.getNamedGlobal("llvm.embedded.module")) Changed |= tryExtendLLVMBitcodeMarker(*Bitcode); + for (GlobalV

[llvm-branch-commits] [llvm] [SPIRV][SPIRVPrepareGlobals] Map AMD's dynamic LDS 0-element globals to arrays with UINT32_MAX elements (PR #166952)

2025-11-10 Thread Steven Perron via llvm-branch-commits
Juan Manuel Martinez =?utf-8?q?Caamaño?Message-ID: In-Reply-To: @@ -43,6 +44,29 @@ bool tryExtendLLVMBitcodeMarker(GlobalVariable &Bitcode) { return true; } +bool tryExtendDynamicLDSGlobal(GlobalVariable &GV) { + constexpr unsigned WorkgroupAS = 3; s-perr

[llvm-branch-commits] [llvm] [SPIRV][SPIRVPrepareGlobals] Map AMD's dynamic LDS 0-element globals to arrays with UINT32_MAX elements (PR #166952)

2025-11-10 Thread Steven Perron via llvm-branch-commits
Juan Manuel Martinez =?utf-8?q?Caamaño?Message-ID: In-Reply-To: @@ -43,6 +44,29 @@ bool tryExtendLLVMBitcodeMarker(GlobalVariable &Bitcode) { return true; } +bool tryExtendDynamicLDSGlobal(GlobalVariable &GV) { + constexpr unsigned WorkgroupAS = 3; + const bool IsWorkgro

[llvm-branch-commits] [llvm] [SPIRV][SPIRVPrepareGlobals] Map AMD's dynamic LDS 0-element globals to arrays with UINT32_MAX elements (PR #166952)

2025-11-10 Thread Steven Perron via llvm-branch-commits
Juan Manuel Martinez =?utf-8?q?Caamaño?Message-ID: In-Reply-To: https://github.com/s-perron edited https://github.com/llvm/llvm-project/pull/166952 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/

[llvm-branch-commits] [llvm] [SPIRV][SPIRVPrepareGlobals] Map AMD's dynamic LDS 0-element globals to arrays with UINT32_MAX elements (PR #166952)

2025-11-10 Thread Steven Perron via llvm-branch-commits
Juan Manuel Martinez =?utf-8?q?Caamaño?Message-ID: In-Reply-To: https://github.com/s-perron commented: I'm wondering if you need to change all 0-sized array or not. If so, we might want to centralize the conversion of 0-sized arrays. We could try to move the code that changes them to 1 elemen

[llvm-branch-commits] [llvm] [LoopVectorize][NFC] Refactor widening decision logic (PR #140722)

2025-11-10 Thread Sergey Kachkov via llvm-branch-commits
skachkov-sc wrote: @david-arm addressed, but I've left memoryInstructionCanBeWidened as a separate function for now (it contains some early exits so I think the code will be harder to read after its substitution) https://github.com/llvm/llvm-project/pull/140722

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