owenca wrote:
> Any idea how long this bug has existed?
See https://github.com/llvm/llvm-project/issues/154846#issuecomment-3635312600.
https://github.com/llvm/llvm-project/pull/170966
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@@ -2484,9 +2484,14 @@ const MCExpr
*AArch64AsmPrinter::emitPAuthRelocationAsIRelative(
OutStreamer->emitLabel(Place);
OutStreamer->pushSection();
+ const MCSymbolELF *Group =
+ static_cast(OutStreamer->getCurrentSectionOnly())
+ ->getGroup();
OutStreame
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dyung wrote:
Hi, I just wanted to also caution that this will be the last 21.x release, so
any issues that arise from this or other changes will not be fixed until 22.x
branches next month.
https://github.com/llvm/llvm-project/pull/170997
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dyung wrote:
Hi, I just wanted to also caution that this will be the last 21.x release, so
any issues that arise from this or other changes will not be fixed until 22.x
branches next month.
https://github.com/llvm/llvm-project/pull/170967
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dyung wrote:
Hi, I just wanted to also caution that this will be the last 21.x release, so
any issues that arise from this or other changes will not be fixed until 22.x
branches next month.
https://github.com/llvm/llvm-project/pull/170966
___
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Author: Derek Schuff
Date: 2025-12-09T23:41:06Z
New Revision: 782f50792f99740f6cb371f66511f9778104f095
URL:
https://github.com/llvm/llvm-project/commit/782f50792f99740f6cb371f66511f9778104f095
DIFF:
https://github.com/llvm/llvm-project/commit/782f50792f99740f6cb371f66511f9778104f095.diff
LOG:
Author: anjenner
Date: 2025-12-09T23:13:33Z
New Revision: 27651133e213a6a1eb4d0e47837625cee3613111
URL:
https://github.com/llvm/llvm-project/commit/27651133e213a6a1eb4d0e47837625cee3613111
DIFF:
https://github.com/llvm/llvm-project/commit/27651133e213a6a1eb4d0e47837625cee3613111.diff
LOG: AMDG
Author: Farzon Lotfi
Date: 2025-12-09T18:30:25-05:00
New Revision: 7062cd63d0c258ac499c82dc233259aecac29b06
URL:
https://github.com/llvm/llvm-project/commit/7062cd63d0c258ac499c82dc233259aecac29b06
DIFF:
https://github.com/llvm/llvm-project/commit/7062cd63d0c258ac499c82dc233259aecac29b06.diff
Author: Alex Voicu
Date: 2025-12-09T23:35:23Z
New Revision: a9bcedf49f813977a6ba5e770cf0041bfc2fa6b1
URL:
https://github.com/llvm/llvm-project/commit/a9bcedf49f813977a6ba5e770cf0041bfc2fa6b1
DIFF:
https://github.com/llvm/llvm-project/commit/a9bcedf49f813977a6ba5e770cf0041bfc2fa6b1.diff
LOG: [N
Author: adams381
Date: 2025-12-09T15:09:25-08:00
New Revision: 84b9e54a06ddf01f568164e3d5c8d956707d
URL:
https://github.com/llvm/llvm-project/commit/84b9e54a06ddf01f568164e3d5c8d956707d
DIFF:
https://github.com/llvm/llvm-project/commit/84b9e54a06ddf01f568164e3d5c8d956707d.diff
LOG:
Author: adams381
Date: 2025-12-09T15:11:01-08:00
New Revision: 0a2e56df64c936bacc746aeb94878d66ee00dec3
URL:
https://github.com/llvm/llvm-project/commit/0a2e56df64c936bacc746aeb94878d66ee00dec3
DIFF:
https://github.com/llvm/llvm-project/commit/0a2e56df64c936bacc746aeb94878d66ee00dec3.diff
LOG:
Author: Prajwal Nadig
Date: 2025-12-09T22:41:46Z
New Revision: 794218bc53a42bd87048317506e8794deb0dc8be
URL:
https://github.com/llvm/llvm-project/commit/794218bc53a42bd87048317506e8794deb0dc8be
DIFF:
https://github.com/llvm/llvm-project/commit/794218bc53a42bd87048317506e8794deb0dc8be.diff
LOG:
Author: Craig Topper
Date: 2025-12-09T14:42:49-08:00
New Revision: fb29a6e4075894e799dd2fb29399c478a4df4462
URL:
https://github.com/llvm/llvm-project/commit/fb29a6e4075894e799dd2fb29399c478a4df4462
DIFF:
https://github.com/llvm/llvm-project/commit/fb29a6e4075894e799dd2fb29399c478a4df4462.diff
Author: Ramkumar Ramachandra
Date: 2025-12-09T21:38:58Z
New Revision: 3310c0be583451e5770b6afbedd926ff3781356f
URL:
https://github.com/llvm/llvm-project/commit/3310c0be583451e5770b6afbedd926ff3781356f
DIFF:
https://github.com/llvm/llvm-project/commit/3310c0be583451e5770b6afbedd926ff3781356f.dif
Author: Jonas Devlieghere
Date: 2025-12-09T22:36:32Z
New Revision: 9e2b8b0254ccd26dc6f3c7abf053646429d9f15d
URL:
https://github.com/llvm/llvm-project/commit/9e2b8b0254ccd26dc6f3c7abf053646429d9f15d
DIFF:
https://github.com/llvm/llvm-project/commit/9e2b8b0254ccd26dc6f3c7abf053646429d9f15d.diff
Author: Erick Velez
Date: 2025-12-09T13:37:00-08:00
New Revision: d86bc19ad79896b956c828a8f9c2c0d94d131466
URL:
https://github.com/llvm/llvm-project/commit/d86bc19ad79896b956c828a8f9c2c0d94d131466
DIFF:
https://github.com/llvm/llvm-project/commit/d86bc19ad79896b956c828a8f9c2c0d94d131466.diff
L
Author: Aiden Grossman
Date: 2025-12-09T21:32:09Z
New Revision: f29d06029f1ccae7359440a5d33d06406d10df31
URL:
https://github.com/llvm/llvm-project/commit/f29d06029f1ccae7359440a5d33d06406d10df31
DIFF:
https://github.com/llvm/llvm-project/commit/f29d06029f1ccae7359440a5d33d06406d10df31.diff
LOG
Author: Christopher Ferris
Date: 2025-12-09T13:30:46-08:00
New Revision: 64ee4bf73411d1462fec0c2c2b5c443a1903
URL:
https://github.com/llvm/llvm-project/commit/64ee4bf73411d1462fec0c2c2b5c443a1903
DIFF:
https://github.com/llvm/llvm-project/commit/64ee4bf73411d1462fec0c2c2b5c443a1903.
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: None (llvmbot)
Changes
Backport 794218b
Requested by: @snprajwal
---
Full diff: https://github.com/llvm/llvm-project/pull/171522.diff
2 Files Affected:
- (modified) clang/lib/ExtractAPI/DeclarationFragments.cpp (+4-1)
- (modified) cla
llvmbot wrote:
@QuietMisdreavus What do you think about merging this PR to the release branch?
https://github.com/llvm/llvm-project/pull/171522
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https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/171522
Backport 794218b
Requested by: @snprajwal
>From fd38eed43691550045dd544e515feed6480e80da Mon Sep 17 00:00:00 2001
From: Prajwal Nadig
Date: Tue, 9 Dec 2025 23:41:46 +0100
Subject: [PATCH] [ExtractAPI] Format t
@@ -1561,6 +1627,8 @@ void SystemZAsmPrinter::emitStartOfAsmFile(Module &M) {
}
void SystemZAsmPrinter::emitPPA2(Module &M) {
+ ADASym = getObjFileLowering().getADASection()->getBeginSymbol();
tltao wrote:
Should we be setting this here instead of `emitStart
https://github.com/tltao deleted
https://github.com/llvm/llvm-project/pull/171476
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@@ -18,9 +18,10 @@ subroutine test()
call vadd(b)
!$acc end host_data
! CHECK: %[[C:.*]] = acc.use_device var(%[[A]]#0 :
!fir.box>) -> !fir.box> {name = "b"}
-! CHECK: %[[D:.*]] = acc.use_device varPtr(%[[A]]#1 :
!fir.ref>) -> !fir.ref> {name = "b"}
razva
@@ -199,6 +199,11 @@ Improvements to clang-tidy
New checks
^^
+- New :doc:`abseil-unchecked-statusor-access
vbvictor wrote:
Since we generally add a considerable amount of checks each release (5-10) and
many bug fixes (20-40) it's easier to read in a
@@ -22,7 +22,7 @@ program test
d2%member0 = 123
!$acc serial copyin(d2%member0) copyout(d4%member0)
do i0 = 1, 1
-d4%member0 = d2%member0
+d4 = d2
razvanlupusoru wrote:
Thank you - the change makes sense to me. You are welcome to mark this resolv
Author: Arthur Eubanks
Date: 2025-12-09T13:02:06-08:00
New Revision: 47153a5a752fad3fc6e38de7e21d102d4c48
URL:
https://github.com/llvm/llvm-project/commit/47153a5a752fad3fc6e38de7e21d102d4c48
DIFF:
https://github.com/llvm/llvm-project/commit/47153a5a752fad3fc6e38de7e21d102d4c48.diff
@@ -22,7 +22,7 @@ program test
d2%member0 = 123
!$acc serial copyin(d2%member0) copyout(d4%member0)
do i0 = 1, 1
-d4%member0 = d2%member0
+d4 = d2
jeanPerier wrote:
I changed the test instead of the output because with this patch, there is no
im
@@ -23,10 +22,25 @@
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/StringRef.h"
+namespace Fortran::evaluate {
+class Component;
+class ArrayRef;
+} // namespace Fortran::evaluate
+
namespace Fortran::lower {
using SomeExpr = Fortran::evaluate::Expr;
+using ExplicitSpaceA
@@ -18,9 +18,10 @@ subroutine test()
call vadd(b)
!$acc end host_data
! CHECK: %[[C:.*]] = acc.use_device var(%[[A]]#0 :
!fir.box>) -> !fir.box> {name = "b"}
-! CHECK: %[[D:.*]] = acc.use_device varPtr(%[[A]]#1 :
!fir.ref>) -> !fir.ref> {name = "b"}
jeanP
llvmbot wrote:
@llvm/pr-subscribers-flang-fir-hlfir
Author: None (jeanPerier)
Changes
OpenACC data clauses of structured constructs may contain component references
(`obj%comp`, or `obj%array(i:j:k)`, ...).
This changes allows using the ACC dialect data operation result for such
clauses
https://github.com/jeanPerier created
https://github.com/llvm/llvm-project/pull/171501
OpenACC data clauses of structured constructs may contain component references
(`obj%comp`, or `obj%array(i:j:k)`, ...).
This changes allows using the ACC dialect data operation result for such
clauses ever
iajbar wrote:
https://github.com/llvm/llvm-project/pull/170749 depends on this patch to be
merged to fix the failing lit test CodeGen/Hexagon/phi-elim.ll
https://github.com/llvm/llvm-project/pull/171472
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https://github.com/iajbar approved this pull request.
https://github.com/llvm/llvm-project/pull/171472
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@@ -6089,12 +6146,16 @@
SITargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
return lowerWaveReduce(MI, *BB, *getSubtarget(), AMDGPU::S_ADD_U64_PSEUDO);
case AMDGPU::WAVE_REDUCE_FADD_PSEUDO_F32:
return lowerWaveReduce(MI, *BB, *getSubtarget(), AMDGPU::V_AD
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Aaditya (easyonaadit)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/170813.diff
3 Files Affected:
- (modified) clang/include/clang/Basic/BuiltinsAMDGPU.def (+4)
- (modified) clang/lib/CodeGen/TargetBuiltins
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Aaditya (easyonaadit)
Changes
Supported Ops: `add`, `sub`
---
Patch is 118.25 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/170812.diff
4 Files Affected:
- (modified) llvm/lib/Targ
https://github.com/easyonaadit ready_for_review
https://github.com/llvm/llvm-project/pull/170813
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https://github.com/amy-kwan updated
https://github.com/llvm/llvm-project/pull/171476
>From d201739d7a4bb529d36358ba49031aed4452ec03 Mon Sep 17 00:00:00 2001
From: Amy Kwan
Date: Fri, 21 Nov 2025 13:54:48 -0500
Subject: [PATCH] [SystemZ] Implement ctor/dtor emission via @@SQINIT and .xtor
secti
https://github.com/DataCorrupted edited
https://github.com/llvm/llvm-project/pull/170619
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llvmbot wrote:
@llvm/pr-subscribers-clang-codegen
Author: Peter Rong (DataCorrupted)
Changes
## TL;DR
This is a stack of PRs implementing features to expose direct methods ABI.
You can see the RFC, design, and discussion
[here](https://discourse.llvm.org/t/rfc-optimizing-code-size-of-obj
https://github.com/DataCorrupted ready_for_review
https://github.com/llvm/llvm-project/pull/170617
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llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Peter Rong (DataCorrupted)
Changes
## TL;DR
This is a stack of PRs implementing features to expose direct methods ABI.
You can see the RFC, design, and discussion
[here](https://discourse.llvm.org/t/rfc-optimizing-code-size-of-objc-direct
llvmbot wrote:
@llvm/pr-subscribers-clang-codegen
Author: Peter Rong (DataCorrupted)
Changes
## TL;DR
This is a stack of PRs implementing features to expose direct methods ABI.
You can see the RFC, design, and discussion
[here](https://discourse.llvm.org/t/rfc-optimizing-code-size-of-obj
https://github.com/DataCorrupted ready_for_review
https://github.com/llvm/llvm-project/pull/170619
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iajbar wrote:
This patch https://github.com/llvm/llvm-project/pull/167095 is missing from
release/21.x. I did cherry pick to release/21.x.
https://github.com/llvm/llvm-project/pull/170749
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github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff origin/main HEAD --extensions cpp,h --
llvm/include/llvm/CodeGen/TargetLoweringObject
llvmbot wrote:
@llvm/pr-subscribers-llvm-mc
Author: Amy Kwan (amy-kwan)
Changes
This patch implements support for constructors/destructors by introducing the
`@@SQINIT` section and emitting `.xtor.` sections
within the SystemZ
AsmPrinter and in the GOFF object lowering layer. Im
llvmbot wrote:
@llvm/pr-subscribers-backend-systemz
Author: Amy Kwan (amy-kwan)
Changes
This patch implements support for constructors/destructors by introducing the
`@@SQINIT` section and emitting `.xtor.` sections
within the SystemZ
AsmPrinter and in the GOFF object lowering l
https://github.com/amy-kwan created
https://github.com/llvm/llvm-project/pull/171476
This patch implements support for constructors/destructors by introducing the
`@@SQINIT` section and emitting `.xtor.` sections within the SystemZ
AsmPrinter and in the GOFF object lowering layer. Improvements t
llvmbot wrote:
@llvm/pr-subscribers-backend-hexagon
Author: None (llvmbot)
Changes
Backport c94641833023ea1ed62b9a1c2b34c583719375cb
Requested by: @iajbar
---
Full diff: https://github.com/llvm/llvm-project/pull/171472.diff
2 Files Affected:
- (modified) llvm/lib/CodeGen/MachinePipeli
llvmbot wrote:
@kasuga-fj What do you think about merging this PR to the release branch?
https://github.com/llvm/llvm-project/pull/171472
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https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/171472
Backport c94641833023ea1ed62b9a1c2b34c583719375cb
Requested by: @iajbar
>From dc5b96d25a4dfb7f4140d27c167f40a4185a2e13 Mon Sep 17 00:00:00 2001
From: Abinaya Saravanan
Date: Mon, 17 Nov 2025 15:28:30 +0530
Sub
@@ -270,6 +270,12 @@ def G_URSHR: AArch64GenericInstruction {
let hasSideEffects = 0;
}
+def G_VSLI: AArch64GenericInstruction {
+ let OutOperandList = (outs type0:$dst);
+ let InOperandList = (ins type0:$src1, type0:$src2, type0:$src3);
davemgreen wrote:
@@ -270,6 +270,12 @@ def G_URSHR: AArch64GenericInstruction {
let hasSideEffects = 0;
}
+def G_VSLI: AArch64GenericInstruction {
davemgreen wrote:
Lets just call this G_SLI, the V is a relic of how Arm/Neon used to spell it.
Is there a SRI that we should be
https://github.com/cmc-rep approved this pull request.
https://github.com/llvm/llvm-project/pull/169478
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cmc-rep wrote:
This one also looks good to me.
https://github.com/llvm/llvm-project/pull/169478
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cmc-rep wrote:
This one seems a small incremental change. Looks good to me.
https://github.com/llvm/llvm-project/pull/169477
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kparzysz wrote:
Ping
https://github.com/llvm/llvm-project/pull/170735
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https://github.com/JoshdRod updated
https://github.com/llvm/llvm-project/pull/171448
>From 7854c9af0229e0da243ae75cc08aa3d65c1bdc8c Mon Sep 17 00:00:00 2001
From: Josh Rodriguez
Date: Tue, 9 Dec 2025 14:27:56 +
Subject: [PATCH] [GlobalISel][AArch64] Added support for sli intrinsic
sli intr
https://github.com/JoshdRod updated
https://github.com/llvm/llvm-project/pull/171448
>From b1591d7b90292a562771510067a99eb22bc629c9 Mon Sep 17 00:00:00 2001
From: Josh Rodriguez
Date: Tue, 9 Dec 2025 14:27:56 +
Subject: [PATCH] [GlobalISel][AArch64] Added support for sli intrinsic
sli intr
@@ -81,6 +80,82 @@ void test_signed_ldat(long int *ptr, long int value, long
int * resp) {
*resp = res;
}
+// CHECK-LABEL: define dso_local void @test_unsigned_lwat_cond(
+// CHECK-SAME: ptr noundef [[PTR:%.*]], ptr noundef writeonly captures(none)
initializes((0, 4)) [[RE
@@ -281,6 +285,21 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo
&TI,
<< toString(Result, 10) << (IsUnsigned ? "0-4, 6" : "0, 5, 7") <<
"8"
<< Arg->getSourceRange();
}
+ case PPC::BI__builtin_amo_lwat_cond:
+ case PPC::BI__builtin_amo_
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff origin/main HEAD --extensions cpp --
llvm/lib/Target/AArch64/GISel/AArch64LegalizerIn
llvmbot wrote:
@llvm/pr-subscribers-backend-aarch64
Author: Joshua Rodriguez (JoshdRod)
Changes
sli intrinsic now lowers correctly for all vector types.
---
Full diff: https://github.com/llvm/llvm-project/pull/171448.diff
4 Files Affected:
- (modified) llvm/lib/Target/AArch64/AArch64In
https://github.com/JoshdRod created
https://github.com/llvm/llvm-project/pull/171448
sli intrinsic now lowers correctly for all vector types.
>From 2045520c433183c633ff5ea84e8708b8a37cec51 Mon Sep 17 00:00:00 2001
From: Josh Rodriguez
Date: Tue, 9 Dec 2025 14:27:56 +
Subject: [PATCH] [Glob
github-actions[bot] wrote:
# :penguin: Linux x64 Test Results
* 166732 tests passed
* 2905 tests skipped
* 2 tests failed
## Failed Tests
(click on a test name to see its output)
### LLVM
LLVM.CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
```
Exit Code: 1
Command Output (stdout):
--
# RUN: at
https://github.com/bgergely0 updated
https://github.com/llvm/llvm-project/pull/171149
From dc18b907a8b7a8d1a41f3ba33a854f0e3db6584c Mon Sep 17 00:00:00 2001
From: Gergely Balint
Date: Wed, 3 Sep 2025 13:29:39 +
Subject: [PATCH 1/3] [BOLT][BTI] Add needed BTIs in LongJmp or refuse to
optimi
https://github.com/easyonaadit updated
https://github.com/llvm/llvm-project/pull/170813
>From bb8cf7a474ac3d041d6763521c14ad3e1d52ffca Mon Sep 17 00:00:00 2001
From: Aaditya
Date: Fri, 5 Dec 2025 14:03:36 +0530
Subject: [PATCH] [AMDGPU] Add builtins for wave reduction intrinsics
---
clang/inc
https://github.com/easyonaadit updated
https://github.com/llvm/llvm-project/pull/170813
>From bb8cf7a474ac3d041d6763521c14ad3e1d52ffca Mon Sep 17 00:00:00 2001
From: Aaditya
Date: Fri, 5 Dec 2025 14:03:36 +0530
Subject: [PATCH] [AMDGPU] Add builtins for wave reduction intrinsics
---
clang/inc
https://github.com/guy-david updated
https://github.com/llvm/llvm-project/pull/164503
>From 9a971cc4b5dbf487c816fec336155f00fd92eee1 Mon Sep 17 00:00:00 2001
From: Guy David
Date: Tue, 9 Dec 2025 14:27:34 +0200
Subject: [PATCH] [DAGCombiner] Relax nsz constraint with fp->int->fp
optimizations
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff origin/main HEAD --extensions cpp --
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp --
https://github.com/guy-david edited
https://github.com/llvm/llvm-project/pull/164503
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https://github.com/guy-david updated
https://github.com/llvm/llvm-project/pull/164503
>From 43d71eebfd84b8bf4b67e9c8cbf92d1a173fd024 Mon Sep 17 00:00:00 2001
From: Guy David
Date: Tue, 9 Dec 2025 14:27:34 +0200
Subject: [PATCH] [DAGCombiner] Relax nsz constraint with fp->int->fp
optimizations
https://github.com/bgergely0 updated
https://github.com/llvm/llvm-project/pull/171149
From dc18b907a8b7a8d1a41f3ba33a854f0e3db6584c Mon Sep 17 00:00:00 2001
From: Gergely Balint
Date: Wed, 3 Sep 2025 13:29:39 +
Subject: [PATCH 1/2] [BOLT][BTI] Add needed BTIs in LongJmp or refuse to
optimi
https://github.com/bgergely0 updated
https://github.com/llvm/llvm-project/pull/171149
From dc18b907a8b7a8d1a41f3ba33a854f0e3db6584c Mon Sep 17 00:00:00 2001
From: Gergely Balint
Date: Wed, 3 Sep 2025 13:29:39 +
Subject: [PATCH 1/2] [BOLT][BTI] Add needed BTIs in LongJmp or refuse to
optimi
@@ -704,8 +704,10 @@ static void addRelativeReloc(Ctx &ctx, InputSectionBase
&isec,
uint64_t offsetInSec, Symbol &sym, int64_t addend,
RelExpr expr, RelType type) {
Partition &part = isec.getPartition(ctx);
+ bool is
@@ -483,11 +483,54 @@ Error LongJmpPass::relaxStub(BinaryBasicBlock &StubBB,
bool &Modified) {
~((1ULL << (RangeSingleInstr - 1)) - 1);
const MCSymbol *RealTargetSym = BC.MIB->getTargetSymbol(*StubBB.begin());
- const BinaryBasicBlock *TgtBB = Func.getBasicBlockForLa
DavidSpickett wrote:
I'm going to stick with the one change as it's more specific to the problem
being fixed.
(though it's very likely the impact of either change is the same)
https://github.com/llvm/llvm-project/pull/170854
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@@ -704,8 +704,10 @@ static void addRelativeReloc(Ctx &ctx, InputSectionBase
&isec,
uint64_t offsetInSec, Symbol &sym, int64_t addend,
RelExpr expr, RelType type) {
Partition &part = isec.getPartition(ctx);
+ bool is
wangpc-pp wrote:
> LGTM. FWIW this fixes a miscompile, and the test diffs are largely due to
> permutations in register allocation if that's of any context. But I'll leave
> it to @wangpc-pp to comment about the urgency of the backport
Thanks! @lukel97
@dyung I think this should be included
@@ -483,11 +483,54 @@ Error LongJmpPass::relaxStub(BinaryBasicBlock &StubBB,
bool &Modified) {
~((1ULL << (RangeSingleInstr - 1)) - 1);
const MCSymbol *RealTargetSym = BC.MIB->getTargetSymbol(*StubBB.begin());
- const BinaryBasicBlock *TgtBB = Func.getBasicBlockForLa
https://github.com/Michael137 approved this pull request.
https://github.com/llvm/llvm-project/pull/170854
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Michael137 wrote:
I'd recommend also cherry-picking
https://github.com/llvm/llvm-project/pull/160132. Which removes this code-path
entirely.
Either way, LGTM
https://github.com/llvm/llvm-project/pull/170854
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llvm-
https://github.com/lukel97 approved this pull request.
LGTM. FWIW this fixes a miscompile, and the test diffs are largely due to
permutations in register allocation if that's of any context. But I'll leave it
to @wangpc-pp to comment about the urgency of the backport
https://github.com/llvm/ll
@@ -704,8 +704,10 @@ static void addRelativeReloc(Ctx &ctx, InputSectionBase
&isec,
uint64_t offsetInSec, Symbol &sym, int64_t addend,
RelExpr expr, RelType type) {
Partition &part = isec.getPartition(ctx);
+ bool is
@@ -704,8 +704,10 @@ static void addRelativeReloc(Ctx &ctx, InputSectionBase
&isec,
uint64_t offsetInSec, Symbol &sym, int64_t addend,
RelExpr expr, RelType type) {
Partition &part = isec.getPartition(ctx);
+ bool is
https://github.com/bgergely0 updated
https://github.com/llvm/llvm-project/pull/171149
From 629939b3af05014fa134f875ce4a584e9f13079e Mon Sep 17 00:00:00 2001
From: Gergely Balint
Date: Wed, 3 Sep 2025 13:29:39 +
Subject: [PATCH] [BOLT][BTI] Add needed BTIs in LongJmp or refuse to optimize
b
https://github.com/bgergely0 updated
https://github.com/llvm/llvm-project/pull/171149
From 629939b3af05014fa134f875ce4a584e9f13079e Mon Sep 17 00:00:00 2001
From: Gergely Balint
Date: Wed, 3 Sep 2025 13:29:39 +
Subject: [PATCH] [BOLT][BTI] Add needed BTIs in LongJmp or refuse to optimize
b
dyung wrote:
Hi, unfortunately we do not think this patch is appropriate for the last
release of the 21.x release because the patch seems to be an ABI change which
would be more appropriate we feel for the upcoming 22.x release in about a
month. If you feel strongly that this should go into th
dyung wrote:
Hi, unfortunately we feel that this change is a bit large and risky to take in
the last release of the 21.x series. If you feel strongly that we should take
this in the 21.x release branch instead of just the upcoming 22 release, let us
know why and we will consider it.
https://g
https://github.com/JoshdRod updated
https://github.com/llvm/llvm-project/pull/170832
>From 74f88e80b88b68d8058fb7171803a2147f2b1a78 Mon Sep 17 00:00:00 2001
From: Josh Rodriguez
Date: Thu, 27 Nov 2025 15:34:40 +
Subject: [PATCH 1/9] [AArch64][GlobalISel] Removed fallback for sqshlu
intrins
https://github.com/JoshdRod updated
https://github.com/llvm/llvm-project/pull/170832
>From 74f88e80b88b68d8058fb7171803a2147f2b1a78 Mon Sep 17 00:00:00 2001
From: Josh Rodriguez
Date: Thu, 27 Nov 2025 15:34:40 +
Subject: [PATCH 1/9] [AArch64][GlobalISel] Removed fallback for sqshlu
intrins
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