[llvm-branch-commits] [clang] [LifetimeSafety] Add support for GSL Pointer types (PR #154009)

@@ -570,6 +625,31 @@ class FactGenerator : public ConstStmtVisitor { return isPointerType(VD->getType()); } + /// Checks if a call-like expression creates a borrow by passing a value to a + /// reference parameter, creating an IssueFact if it does. + void handleFucnt

[llvm-branch-commits] [clang] [LifetimeSafety] Add support for GSL Pointer types (PR #154009)

@@ -478,6 +478,31 @@ class FactGenerator : public ConstStmtVisitor { } } + void VisitCXXConstructExpr(const CXXConstructExpr *CCE) { +if (!isGslPointerType(CCE->getType())) usx95 wrote: Makes sense. Yes, it is expected to grow to handle other case

[llvm-branch-commits] [clang] [LifetimeSafety] Add support for GSL Pointer types (PR #154009)

https://github.com/usx95 updated https://github.com/llvm/llvm-project/pull/154009 >From cfe4e5a8a06f82ccdc0ac8f596f30f5f1eb916a0 Mon Sep 17 00:00:00 2001 From: Utkarsh Saxena Date: Sun, 17 Aug 2025 10:10:18 + Subject: [PATCH] [LifetimeSafety] Track gsl::Pointer types --- clang/lib/Analysi

[llvm-branch-commits] [llvm] [AArch64][SME] Avoid ZA save state changes in loops in MachineSMEABIPass (PR #149065)

https://github.com/MacDue updated https://github.com/llvm/llvm-project/pull/149065 >From e380fb874258f3ad4a5d9276980a73d972234d61 Mon Sep 17 00:00:00 2001 From: Benjamin Maxwell Date: Tue, 15 Jul 2025 11:48:03 + Subject: [PATCH] [AArch64][SME] Avoid ZA save state changes in loops in Machin

[llvm-branch-commits] [llvm] AMDGPU: Add agpr variants of flat atomic return instructions (PR #156990)

https://github.com/rampitec approved this pull request. https://github.com/llvm/llvm-project/pull/156990 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [LifetimeSafety] Associate origins to all l-valued expressions (PR #156896)

@@ -438,12 +452,31 @@ class FactGenerator : public ConstStmtVisitor { void VisitDeclStmt(const DeclStmt *DS) { for (const Decl *D : DS->decls()) if (const auto *VD = dyn_cast(D)) -if (hasOrigin(VD->getType())) +if (hasOrigin(VD)) if (cons

[llvm-branch-commits] [llvm] PPC: Split 64bit target feature into 64bit and 64bit-support (PR #157206)

llvmbot wrote: @llvm/pr-subscribers-backend-powerpc Author: Matt Arsenault (arsenm) Changes This was being used for 2 different purposes. The TargetMachine constructor prepends +64bit based on isPPC64 triples as a mode switch. The same feature name was also explicitly added to different p

[llvm-branch-commits] [llvm] PPC: Split 64bit target feature into 64bit and 64bit-support (PR #157206)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/157206?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [clang] [LifetimeSafety] Add support for GSL Pointer types (PR #154009)

@@ -478,6 +478,31 @@ class FactGenerator : public ConstStmtVisitor { } } + void VisitCXXConstructExpr(const CXXConstructExpr *CCE) { +if (!isGslPointerType(CCE->getType())) + return; +if (CCE->getNumArgs() != 1) + return; +if (hasOrigin(CCE->getAr

[llvm-branch-commits] [llvm] release/21.x: [X86] Only fold AND/ANDNP back to VSELECT if we know the predicated mask select is legal (#156663) (PR #157047)

llvmbot wrote: @phoebewang What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/157047 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/li

[llvm-branch-commits] [llvm] [AArch64] Provide a custom decoder for LDR_ZA/STR_ZA (PR #156363)

https://github.com/ostannard approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/156363 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] [HLSL][DirectX] Add support for `rootsig` as a target environment (PR #156373)

@@ -381,6 +381,20 @@ void CGHLSLRuntime::addBuffer(const HLSLBufferDecl *BufDecl) { } } +void CGHLSLRuntime::addRootSignature( +const HLSLRootSignatureDecl *SignatureDecl) { + llvm::Module &M = CGM.getModule(); + Triple T(M.getTargetTriple()); + + // If we are not ta

[llvm-branch-commits] [lldb] release/21.x: [lldb][DataFormatter] Allow std::string formatters to match against custom allocators (#156050) (PR #157048)

https://github.com/adrian-prantl approved this pull request. https://github.com/llvm/llvm-project/pull/157048 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] [HLSL][DirectX] Add support for `rootsig` as a target environment (PR #156373)

https://github.com/farzonl approved this pull request. https://github.com/llvm/llvm-project/pull/156373 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Remove tablegen bz30254 workarounds from BUF instructions (PR #157054)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/157054 None >From 6992c2aa84c17fb2d965fe014efa7cb794ba643c Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 3 Sep 2025 15:09:34 +0900 Subject: [PATCH] AMDGPU: Remove tablegen bz30254 workarounds from BUF instr

[llvm-branch-commits] Frontend: Adopt llvm::vfs::OutputBackend in CompilerInstance (PR #113364)

https://github.com/cachemeifyoucan updated https://github.com/llvm/llvm-project/pull/113364 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] Frontend: Adopt llvm::vfs::OutputBackend in CompilerInstance (PR #113364)

https://github.com/cachemeifyoucan updated https://github.com/llvm/llvm-project/pull/113364 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [lldb] release/21.x: [lldb][DWARFASTParserClang] Don't complete conflicting Objective-C++ types (#156681) (PR #156764)

Michael137 wrote: @tru any idea why automation hasn't moved this to `Needs Merge`? Or did the job just not run yet or something like that? https://github.com/llvm/llvm-project/pull/156764 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.

[llvm-branch-commits] [llvm] [DA] Add overflow check in ExactSIV (PR #157086)

https://github.com/kasuga-fj edited https://github.com/llvm/llvm-project/pull/157086 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AArch64][SME] Propagate desired ZA states in the MachineSMEABIPass (PR #149510)

https://github.com/MacDue updated https://github.com/llvm/llvm-project/pull/149510 >From d07322bddea4f6286eef5cd29e8e06b0939f8b2e Mon Sep 17 00:00:00 2001 From: Benjamin Maxwell Date: Tue, 15 Jul 2025 17:00:04 + Subject: [PATCH 1/2] [AArch64][SME] Propagate desired ZA states in the Machine

[llvm-branch-commits] [clang] [LifetimeSafety] Add support for GSL Pointer types (PR #154009)

https://github.com/usx95 edited https://github.com/llvm/llvm-project/pull/154009 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DA] Add test where ExactSIV misses dependency due to overflow (NFC) (PR #157085)

https://github.com/kasuga-fj updated https://github.com/llvm/llvm-project/pull/157085 >From 9d8c45237b773b2be321cedc4377cfbdc31c01b0 Mon Sep 17 00:00:00 2001 From: Ryotaro Kasuga Date: Fri, 5 Sep 2025 11:32:54 + Subject: [PATCH] [DA] Add test where ExactSIV misses dependency due to overflo

[llvm-branch-commits] [llvm] [DA] Add overflow check in ExactSIV (PR #157086)

https://github.com/kasuga-fj updated https://github.com/llvm/llvm-project/pull/157086 >From 7678c02d942a548219bbe66cb425a1482b7d9924 Mon Sep 17 00:00:00 2001 From: Ryotaro Kasuga Date: Fri, 5 Sep 2025 11:41:29 + Subject: [PATCH] [DA] Add overflow check in ExactSIV --- llvm/lib/Analysis/De

[llvm-branch-commits] [llvm] [DA] Add overflow check in ExactSIV (PR #157086)

https://github.com/kasuga-fj updated https://github.com/llvm/llvm-project/pull/157086 >From 7678c02d942a548219bbe66cb425a1482b7d9924 Mon Sep 17 00:00:00 2001 From: Ryotaro Kasuga Date: Fri, 5 Sep 2025 11:41:29 + Subject: [PATCH] [DA] Add overflow check in ExactSIV --- llvm/lib/Analysis/De

[llvm-branch-commits] [llvm] [DA] Add overflow check in ExactSIV (PR #157086)

https://github.com/kasuga-fj ready_for_review https://github.com/llvm/llvm-project/pull/157086 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AArch64][SME] Support agnostic ZA functions in the MachineSMEABIPass (PR #149064)

https://github.com/MacDue updated https://github.com/llvm/llvm-project/pull/149064 >From 5a62e13a423eb61af502ce168fb4066ede668674 Mon Sep 17 00:00:00 2001 From: Benjamin Maxwell Date: Tue, 15 Jul 2025 11:47:48 + Subject: [PATCH 1/6] [AArch64][SME] Support agnostic ZA functions in the Machi

[llvm-branch-commits] [lldb] release/21.x: [lldb][DWARFASTParserClang] Don't complete conflicting Objective-C++ types (#156681) (PR #156764)

tru wrote: @Michael137 we are waiting for someone to approve the PR, then it moves to "needs merge". We usually want someone else than the requester to approve the PR. In this case @labath was suggested above. https://github.com/llvm/llvm-project/pull/156764 ___

[llvm-branch-commits] [clang] [LifetimeSafety] Add support for GSL Pointer types (PR #154009)

@@ -478,6 +478,31 @@ class FactGenerator : public ConstStmtVisitor { } } + void VisitCXXConstructExpr(const CXXConstructExpr *CCE) { +if (!isGslPointerType(CCE->getType())) ymand wrote: If all of the code here is gsl pointer related, then I sugges

[llvm-branch-commits] [clang] [LifetimeSafety] Add support for GSL Pointer types (PR #154009)

https://github.com/ymand approved this pull request. https://github.com/llvm/llvm-project/pull/154009 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [lldb] release/21.x: [lldb][DWARFASTParserClang] Don't complete conflicting Objective-C++ types (#156681) (PR #156764)

https://github.com/JDevlieghere approved this pull request. Pavel may be OOO. His opinion should take precedence over mine, but in his absence this LGTM. https://github.com/llvm/llvm-project/pull/156764 ___ llvm-branch-commits mailing list llvm-branc

[llvm-branch-commits] [llvm] [DA] Add overflow check in ExactSIV (PR #157086)

https://github.com/kasuga-fj edited https://github.com/llvm/llvm-project/pull/157086 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Remove flat special case in getRegClass (PR #156991)

https://github.com/rampitec approved this pull request. https://github.com/llvm/llvm-project/pull/156991 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [LifetimeSafety] Associate origins to all l-valued expressions (PR #156896)

https://github.com/usx95 updated https://github.com/llvm/llvm-project/pull/156896 >From 1a5fa17d05714a18c3113c23bc5a73610f4d5c21 Mon Sep 17 00:00:00 2001 From: Utkarsh Saxena Date: Thu, 4 Sep 2025 14:27:37 + Subject: [PATCH] all-lvalues-have-origin --- clang/lib/Analysis/LifetimeSafety.cp

[llvm-branch-commits] [clang] [LifetimeSafety] Add support for GSL Pointer types (PR #154009)

@@ -570,6 +625,31 @@ class FactGenerator : public ConstStmtVisitor { return isPointerType(VD->getType()); } + /// Checks if a call-like expression creates a borrow by passing a value to a + /// reference parameter, creating an IssueFact if it does. + void handleFucnt

[llvm-branch-commits] [clang] [LifetimeSafety] Add support for GSL Pointer types (PR #154009)

https://github.com/Xazax-hun approved this pull request. https://github.com/llvm/llvm-project/pull/154009 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AArch64] Remove post-decoding instruction mutations (PR #156364)

https://github.com/s-barannikov updated https://github.com/llvm/llvm-project/pull/156364 >From 7148b34b69d83b64e825e551f7ca9e7c1f792ddf Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Mon, 1 Sep 2025 20:30:01 +0300 Subject: [PATCH] [AArch64] Remove post-decoding instruction mutations Th

[llvm-branch-commits] [llvm] [DA] Add option to run only SIV routines (PR #157084)

https://github.com/kasuga-fj created https://github.com/llvm/llvm-project/pull/157084 None >From 153b37c028351bd3d371e9a7b88a462040668cfe Mon Sep 17 00:00:00 2001 From: Ryotaro Kasuga Date: Fri, 5 Sep 2025 10:13:22 + Subject: [PATCH] [DA] Add option to run only SIV routines --- llvm/lib/

[llvm-branch-commits] [llvm] [DA] Add overflow check in ExactSIV (PR #157086)

kasuga-fj wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/157086?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [DA] Add overflow check in ExactSIV (PR #157086)

https://github.com/kasuga-fj created https://github.com/llvm/llvm-project/pull/157086 None >From c774e1d840a3b771774f28c995838f4407dca2c3 Mon Sep 17 00:00:00 2001 From: Ryotaro Kasuga Date: Fri, 5 Sep 2025 11:41:29 + Subject: [PATCH] [DA] Add overflow check in ExactSIV --- llvm/lib/Analy

[llvm-branch-commits] [llvm] [DA] Add option to run only SIV routines (PR #157084)

kasuga-fj wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/157084?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [DA] Add test where ExactSIV misses dependency due to overflow (NFC) (PR #157085)

kasuga-fj wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/157085?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [AllocToken, Clang] Infer type hints from sizeof expressions and casts (PR #156841)

https://github.com/melver updated https://github.com/llvm/llvm-project/pull/156841 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [AllocToken, Clang] Infer type hints from sizeof expressions and casts (PR #156841)

https://github.com/melver updated https://github.com/llvm/llvm-project/pull/156841 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [Clang] Introduce -fsanitize=alloc-token (PR #156839)

https://github.com/melver updated https://github.com/llvm/llvm-project/pull/156839 >From b3653330c2c39ebaa094670f11afb0f9d36b9de2 Mon Sep 17 00:00:00 2001 From: Marco Elver Date: Thu, 4 Sep 2025 12:07:26 +0200 Subject: [PATCH] fixup! Insert AllocToken into index.rst Created using spr 1.3.8-bet

[llvm-branch-commits] [clang] [Clang] Introduce -fsanitize=alloc-token (PR #156839)

https://github.com/melver updated https://github.com/llvm/llvm-project/pull/156839 >From b3653330c2c39ebaa094670f11afb0f9d36b9de2 Mon Sep 17 00:00:00 2001 From: Marco Elver Date: Thu, 4 Sep 2025 12:07:26 +0200 Subject: [PATCH] fixup! Insert AllocToken into index.rst Created using spr 1.3.8-bet

[llvm-branch-commits] [llvm] [DA] Add overflow check in ExactSIV (PR #157086)

https://github.com/kasuga-fj edited https://github.com/llvm/llvm-project/pull/157086 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DA] Add overflow check in ExactSIV (PR #157086)

https://github.com/kasuga-fj converted_to_draft https://github.com/llvm/llvm-project/pull/157086 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DA] Add overflow check in ExactSIV (PR #157086)

https://github.com/kasuga-fj ready_for_review https://github.com/llvm/llvm-project/pull/157086 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Fix using unaligned vgprs in mimg error test (PR #157037)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/157037 AMDGPU: Fix using unaligned vgprs in mimg error test These instructions really have 2 errors, from the unsupported image base instruction plus the unaligned vgpr usage. This test intends to test the base instruct

[llvm-branch-commits] [lldb] release/21.x: [lldb][DataFormatter] Allow std::string formatters to match against custom allocators (#156050) (PR #157048)

llvmbot wrote: @labath What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/157048 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listin

[llvm-branch-commits] [lldb] release/21.x: [lldb][DataFormatter] Allow std::string formatters to match against custom allocators (#156050) (PR #157048)

https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/157048 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Remove tablegen bz30254 workarounds from BUF instructions (PR #157054)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/157054.diff 1 Files Affected: - (modified) llvm/lib/Target/AMDGPU/BUFInstructions.td (+37-56) ``diff diff --git a/llvm/lib/Tar

[llvm-branch-commits] [llvm] AMDGPU: Remove tablegen bz30254 workarounds from BUF instructions (PR #157054)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/157054 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DA] Add overflow check in ExactSIV (PR #157086)

llvmbot wrote: @llvm/pr-subscribers-llvm-analysis Author: Ryotaro Kasuga (kasuga-fj) Changes This patch removes base pointers from subscripts when delinearization fails. Previously, in such cases, the pointer type SCEVs were used instead of offset SCEVs derived from them. For example, he

[llvm-branch-commits] [clang] release/21.x: [clang] Followup for constexpr-unknown potential constant expressions. (#151053) (PR #157098)

https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/157098 Backport c62284c43d519317979e3028f7c37f42eed6ac8e Requested by: @frederick-vs-ja >From 7f9c32c1b1a891f3813fa1a0f1339e52d6e6d363 Mon Sep 17 00:00:00 2001 From: Eli Friedman Date: Tue, 2 Sep 2025 12:20:13 -0700

[llvm-branch-commits] [clang] release/21.x: [clang] Followup for constexpr-unknown potential constant expressions. (#151053) (PR #157098)

https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/157098 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DA] Add test where ExactSIV misses dependency due to overflow (NFC) (PR #157085)

https://github.com/kasuga-fj edited https://github.com/llvm/llvm-project/pull/157085 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DA] Add test where ExactSIV misses dependency due to overflow (NFC) (PR #157085)

llvmbot wrote: @llvm/pr-subscribers-llvm-analysis Author: Ryotaro Kasuga (kasuga-fj) Changes This patch adds test cases where DA fails to detect dependencies due to overflow during analysis. For now, they are added to `ExactSIV.ll`, but `symbolicRDIVtest` and `gcdMIVtest` also exhibit si

[llvm-branch-commits] [llvm] AMDGPU: Fix using unaligned vgprs in mimg error test (PR #157037)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes AMDGPU: Fix using unaligned vgprs in mimg error test These instructions really have 2 errors, from the unsupported image base instruction plus the unaligned vgpr usage. This test intends to test the

[llvm-branch-commits] [llvm] AMDGPU: Fix using unaligned vgprs in mimg error test (PR #157037)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/157037?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [clang] release/21.x: [clang] Followup for constexpr-unknown potential constant expressions. (#151053) (PR #157098)

efriedma-quic wrote: Buildbot is failing. Looks like clang/test/SemaCXX/constant-expression-p2280r4.cpp may need to be adjusted? Not sure. https://github.com/llvm/llvm-project/pull/157098 ___ llvm-branch-commits mailing list llvm-branch-commits@lis

[llvm-branch-commits] [llvm] PPC: Split 64bit target feature into 64bit and 64bit-support (PR #157206)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/157206 This was being used for 2 different purposes. The TargetMachine constructor prepends +64bit based on isPPC64 triples as a mode switch. The same feature name was also explicitly added to different processors, maki

[llvm-branch-commits] [libc] Use UMAXV.4S to reduce bcmp result. (PR #99260)

pcc wrote: > I will test it again. Thanks for letting me know.On Thu, Aug 14, 2025 at > 23:14, Peter Collingbourne ***@***.***> wrote: Reopened #99260. — Reply to > this email directly, view it on GitHub, or unsubscribe. You are receiving > this because you are on a team that was mentioned.Mes

[llvm-branch-commits] [llvm] AMDGPU: Use RegisterOperand for MIMG class data operands (PR #157215)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/157215 Avoid using getLdStRegisterOperand hidden at the bottom of the class hierarchy. >From a72a09db9aa9a037860dab5a50a7ec39629439ee Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 3 Sep 2025 15:31:08 +0900 S

[llvm-branch-commits] [llvm] AMDGPU: Use RegisterOperand for MIMG class data operands (PR #157215)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/157215 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Remove getLdStRegisterOperandForSize (PR #157216)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/157216 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Remove getLdStRegisterOperandForSize (PR #157216)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/157216 The AV operand classes should be used directly at the top level of the load/store definitions. Inline the remaining use into the strange MUBUF TFE vs. non-TFE usecase, which needed a special case for 16-bit operan

[llvm-branch-commits] [llvm] AMDGPU: Remove getLdStRegisterOperandForSize (PR #157216)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes The AV operand classes should be used directly at the top level of the load/store definitions. Inline the remaining use into the strange MUBUF TFE vs. non-TFE usecase, which needed a special case for

[llvm-branch-commits] [llvm] AMDGPU: Remove getLdStRegisterOperandForSize (PR #157216)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/157216?utm_source=stack-comment-downstack-mergeability-warning";