ro-i wrote:
rebased
https://github.com/llvm/llvm-project/pull/146405
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https://github.com/ro-i created https://github.com/llvm/llvm-project/pull/146404
OpenMP 6.0 12.1.2 specifies the behavior of the strict modifier for the
num_threads clause on parallel directives, along with the message and severity
clauses. This commit implements necessary device runtime change
@@ -45,7 +45,24 @@ using namespace ompx;
namespace {
-uint32_t determineNumberOfThreads(int32_t NumThreadsClause) {
+void num_threads_strict_error(int32_t nt_strict, int32_t nt_severity,
ro-i wrote:
sorry, done
https://github.com/llvm/llvm-project/pull/1464
https://github.com/ro-i updated https://github.com/llvm/llvm-project/pull/146404
>From cf566c60db9eef81c39a45082645c9d44992bec5 Mon Sep 17 00:00:00 2001
From: Robert Imschweiler
Date: Fri, 27 Jun 2025 07:54:07 -0500
Subject: [PATCH 1/2] [OpenMP][clang] 6.0: num_threads strict (part 2: device
ru
ro-i wrote:
@shiltian I forwarded the num_threads modifier/severity/message information in
`emitCommonOMPParallelDirective()` (in CGStmtOpenMP.cpp) only to
`emitNumThreadsClause()`, but not to `emitParallelCall()`. For the CPU codegen,
that doesn't matter, because `emitParallelCall()` ignores
@@ -2699,18 +2699,33 @@ llvm::Value
*CGOpenMPRuntime::emitForNext(CodeGenFunction &CGF,
CGF.getContext().BoolTy, Loc);
}
-void CGOpenMPRuntime::emitNumThreadsClause(CodeGenFunction &CGF,
- llvm::Value *NumThreads,
-
@@ -2699,18 +2699,33 @@ llvm::Value
*CGOpenMPRuntime::emitForNext(CodeGenFunction &CGF,
CGF.getContext().BoolTy, Loc);
}
-void CGOpenMPRuntime::emitNumThreadsClause(CodeGenFunction &CGF,
- llvm::Value *NumThreads,
-
@@ -2699,18 +2699,33 @@ llvm::Value
*CGOpenMPRuntime::emitForNext(CodeGenFunction &CGF,
CGF.getContext().BoolTy, Loc);
}
-void CGOpenMPRuntime::emitNumThreadsClause(CodeGenFunction &CGF,
- llvm::Value *NumThreads,
-
@@ -1874,6 +1874,10 @@ class OMPMessageClause final : public OMPClause {
// Expression of the 'message' clause.
Stmt *MessageString = nullptr;
+ // The message as a StringLiteral in case it is as string literal. This might
+ // be needed during compile time.
+ StringLit
@@ -1874,6 +1874,10 @@ class OMPMessageClause final : public OMPClause {
// Expression of the 'message' clause.
Stmt *MessageString = nullptr;
+ // The message as a StringLiteral in case it is as string literal. This might
+ // be needed during compile time.
+ StringLit
@@ -2718,11 +2718,14 @@ void CGOpenMPRuntime::emitNumThreadsClause(
// as if sev-level is fatal."
Args.push_back(llvm::ConstantInt::get(
CGM.Int32Ty, Severity == OMPC_SEVERITY_warning ? 1 : 2));
-if (Message)
- Args.push_back(CGF.EmitStringLiteralLValue
@@ -1260,21 +1260,30 @@ void
CGOpenMPRuntimeGPU::emitParallelCall(CodeGenFunction &CGF,
NumThreadsVal = Bld.CreateZExtOrTrunc(NumThreadsVal, CGF.Int32Ty);
assert(IfCondVal && "Expected a value");
+RuntimeFunction FnID = OMPRTL___kmpc_parallel_51;
llvm::Valu
@@ -16476,12 +16476,12 @@ SITargetLowering::getRegForInlineAsmConstraint(const
TargetRegisterInfo *TRI_,
const TargetRegisterClass *RC = nullptr;
ro-i wrote:
No, this is actually important to support the asm label constraint "!i". This
should fall through
ro-i wrote:
> StructurizeCFG is very sensitive to changes. Could you do a full CQE cycles
> for this?
Will be done after the reviews before the merge 👍
https://github.com/llvm/llvm-project/pull/152161
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https://github.com/ro-i updated https://github.com/llvm/llvm-project/pull/152161
>From 47408c30af9b0dd6b4c791130aad4a91efee8949 Mon Sep 17 00:00:00 2001
From: Robert Imschweiler
Date: Tue, 5 Aug 2025 10:24:07 -0500
Subject: [PATCH 1/2] [AMDGPU][UnifyDivergentExitNodes][StructurizeCFG] Add
suppo
https://github.com/ro-i created https://github.com/llvm/llvm-project/pull/152161
Finishes adding basic inline-asm callbr support for AMDGPU, started by
https://github.com/llvm/llvm-project/pull/149308.
>From 47408c30af9b0dd6b4c791130aad4a91efee8949 Mon Sep 17 00:00:00 2001
From: Robert Imschwei
https://github.com/ro-i edited https://github.com/llvm/llvm-project/pull/133907
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ro-i wrote:
Rebased on https://github.com/llvm/llvm-project/pull/152161 (+ some small
cleanups)
https://github.com/llvm/llvm-project/pull/133907
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@@ -2863,6 +2834,53 @@ bool IRTranslator::translateCall(const User &U,
MachineIRBuilder &MIRBuilder) {
return true;
}
+bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) {
ro-i wrote:
done
https://github.com/llvm/llvm-project/pu
@@ -16445,11 +16450,18 @@ OMPClause *SemaOpenMP::ActOnOpenMPMessageClause(Expr
*ME,
SourceLocation LParenLoc,
SourceLocation EndLoc) {
assert(ME && "NULL expr in Message clause");
@@ -16445,11 +16450,18 @@ OMPClause *SemaOpenMP::ActOnOpenMPMessageClause(Expr
*ME,
SourceLocation LParenLoc,
SourceLocation EndLoc) {
assert(ME && "NULL expr in Message clause");
@@ -1260,21 +1260,30 @@ void
CGOpenMPRuntimeGPU::emitParallelCall(CodeGenFunction &CGF,
NumThreadsVal = Bld.CreateZExtOrTrunc(NumThreadsVal, CGF.Int32Ty);
assert(IfCondVal && "Expected a value");
+RuntimeFunction FnID = OMPRTL___kmpc_parallel_51;
llvm::Valu
@@ -2718,11 +2718,14 @@ void CGOpenMPRuntime::emitNumThreadsClause(
// as if sev-level is fatal."
Args.push_back(llvm::ConstantInt::get(
CGM.Int32Ty, Severity == OMPC_SEVERITY_warning ? 1 : 2));
-if (Message)
- Args.push_back(CGF.EmitStringLiteralLValue
@@ -2718,11 +2718,14 @@ void CGOpenMPRuntime::emitNumThreadsClause(
// as if sev-level is fatal."
Args.push_back(llvm::ConstantInt::get(
CGM.Int32Ty, Severity == OMPC_SEVERITY_warning ? 1 : 2));
-if (Message)
- Args.push_back(CGF.EmitStringLiteralLValue
@@ -1,10 +1,7 @@
-; RUN: opt %loadNPMPolly '-passes=print'
-polly-detect-track-failures -disable-output -pass-remarks-missed=polly-detect
< %s 2>&1 | FileCheck %s --check-prefix=REMARK
-; RUN: opt %loadNPMPolly '-passes=print'
-polly-detect-track-failures -disable-output -stats
https://github.com/ro-i updated https://github.com/llvm/llvm-project/pull/133907
>From ba9e6db89ecfdf4cc4960f3a33ddc00dcb0250c0 Mon Sep 17 00:00:00 2001
From: Robert Imschweiler
Date: Tue, 1 Apr 2025 08:03:16 -0500
Subject: [PATCH 1/2] [IR] Add CallBr intrinsics support
This commit adds support
@@ -3006,10 +3024,41 @@ bool IRTranslator::translateInvoke(const User &U,
return true;
}
+/// The intrinsics currently supported by callbr are implicit control flow
+/// intrinsics such as amdgcn.kill.
bool IRTranslator::translateCallBr(const User &U,
https://github.com/ro-i edited https://github.com/llvm/llvm-project/pull/152161
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ro-i wrote:
> 1. Can we remove the pass names added as tags? They don't actually add any
> new information to the commit headline.
I think they do. I developed and submitted the PR to support inline-asm for
amdgpu as two PRs so that it's not too large and easier to review. So, if I
would call
@@ -2789,20 +2789,35 @@ bool IRTranslator::translateCall(const User &U,
MachineIRBuilder &MIRBuilder) {
if (translateKnownIntrinsic(CI, ID, MIRBuilder))
return true;
+ TargetLowering::IntrinsicInfo Info;
+ // TODO: Add a GlobalISel version of getTgtMemIntrinsic.
+ bo
https://github.com/ro-i updated https://github.com/llvm/llvm-project/pull/152161
>From dbe1c1d1ede94ec75b67b8a48cdddbf3e5b196e3 Mon Sep 17 00:00:00 2001
From: Robert Imschweiler
Date: Tue, 5 Aug 2025 10:24:07 -0500
Subject: [PATCH 1/2] [AMDGPU][UnifyDivergentExitNodes][StructurizeCFG] Add
suppo
https://github.com/ro-i updated https://github.com/llvm/llvm-project/pull/153204
>From 458c685063fcc35adec954acb0f0c1b36eb09c57 Mon Sep 17 00:00:00 2001
From: Robert Imschweiler
Date: Tue, 12 Aug 2025 09:37:37 -0500
Subject: [PATCH 1/2] [NFC] Refactor target intrinsic call lowering
Refactor int
https://github.com/ro-i updated https://github.com/llvm/llvm-project/pull/133907
>From 71352be023de35aad027ffc2eb8a353396c5726e Mon Sep 17 00:00:00 2001
From: Robert Imschweiler
Date: Tue, 1 Apr 2025 08:03:16 -0500
Subject: [PATCH 1/3] [IR] Add CallBr intrinsics support
This commit adds support
@@ -2789,20 +2789,35 @@ bool IRTranslator::translateCall(const User &U,
MachineIRBuilder &MIRBuilder) {
if (translateKnownIntrinsic(CI, ID, MIRBuilder))
return true;
+ TargetLowering::IntrinsicInfo Info;
+ // TODO: Add a GlobalISel version of getTgtMemIntrinsic.
+ bo
@@ -16476,12 +16476,12 @@ SITargetLowering::getRegForInlineAsmConstraint(const
TargetRegisterInfo *TRI_,
const TargetRegisterClass *RC = nullptr;
ro-i wrote:
(done via https://github.com/llvm/llvm-project/pull/153425)
https://github.com/llvm/llvm-project/p
https://github.com/ro-i updated https://github.com/llvm/llvm-project/pull/133907
>From 71352be023de35aad027ffc2eb8a353396c5726e Mon Sep 17 00:00:00 2001
From: Robert Imschweiler
Date: Tue, 1 Apr 2025 08:03:16 -0500
Subject: [PATCH 1/4] [IR] Add CallBr intrinsics support
This commit adds support
@@ -2789,20 +2789,34 @@ bool IRTranslator::translateCall(const User &U,
MachineIRBuilder &MIRBuilder) {
if (translateKnownIntrinsic(CI, ID, MIRBuilder))
return true;
+ TargetLowering::IntrinsicInfo Info;
+ bool IsTgtMemIntrinsic = TLI->getTgtMemIntrinsic(Info, CI, *MF
ro-i wrote:
@ruiling You can find most of the rationale behind this in
https://discourse.llvm.org/t/rfc-add-callbr-intrinsic-support/86087 and the PR
that is adding support for callbr+intrinsics:
https://github.com/llvm/llvm-project/pull/133907.
In short:
> do you plan to support arbitrary for
@@ -1284,13 +1283,13 @@ bool StructurizeCFG::makeUniformRegion(Region *R,
UniformityInfo &UA) {
/// Run the transformation for each region found
bool StructurizeCFG::run(Region *R, DominatorTree *DT) {
- if (R->isTopLevelRegion())
+ // CallBr and its corresponding blocks mu
@@ -0,0 +1,54 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc -mtriple=amdgcn -mcpu=gfx90a < %s | FileCheck %s
+
+define void @callbr_inline_asm(ptr %src, ptr %dst1, ptr %dst2, i32 %c) {
ro-i wro
@@ -222,46 +260,27 @@ bool AMDGPUUnifyDivergentExitNodesImpl::run(Function &F,
DominatorTree *DT,
if (HasDivergentExitBlock)
UnreachableBlocks.push_back(BB);
} else if (BranchInst *BI = dyn_cast(BB->getTerminator())) {
-
- ConstantInt *BoolTrue = Constan
@@ -1284,13 +1283,13 @@ bool StructurizeCFG::makeUniformRegion(Region *R,
UniformityInfo &UA) {
/// Run the transformation for each region found
bool StructurizeCFG::run(Region *R, DominatorTree *DT) {
- if (R->isTopLevelRegion())
+ // CallBr and its corresponding blocks mu
https://github.com/ro-i updated https://github.com/llvm/llvm-project/pull/152161
>From dbe1c1d1ede94ec75b67b8a48cdddbf3e5b196e3 Mon Sep 17 00:00:00 2001
From: Robert Imschweiler
Date: Tue, 5 Aug 2025 10:24:07 -0500
Subject: [PATCH 1/3] [AMDGPU][UnifyDivergentExitNodes][StructurizeCFG] Add
suppo
https://github.com/ro-i edited https://github.com/llvm/llvm-project/pull/152161
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