[llvm-branch-commits] [llvm] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load (PR #120598)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120598 >From 867af9f33e61399964c51dd0c40dfcf37ec0a1e0 Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 11:19:39 -0500 Subject: [PATCH] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load Vector ty

[llvm-branch-commits] [llvm] [SelectionDAG] Legalize <1 x T> vector types for atomic load (PR #120385)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120385 >From 7f2115c386e164541ba579eefd87bdfbb45c2890 Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:37:17 -0500 Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load `load atomic

[llvm-branch-commits] [llvm] [SelectionDAG] Legalize <1 x T> vector types for atomic load (PR #120385)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120385 >From 7f2115c386e164541ba579eefd87bdfbb45c2890 Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:37:17 -0500 Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load `load atomic

[llvm-branch-commits] [llvm] [X86] Add atomic vector tests for unaligned >1 sizes. (PR #120387)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120387 >From 6d045290b83d4abb2765e6d323d7a441aab6445c Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:40:32 -0500 Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes. Unaligned atomic ve

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/125432 >From abb646bbd716e2b12e10961c80c28dcfde8d66f5 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 31 Jan 2025 13:12:56 -0500 Subject: [PATCH] [SelectionDAG][X86] Remove unused elements from atomic vector. After spl

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120716 >From 855430ef05b0a8cfe6696ec62f827cab6d663655 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 20 Dec 2024 06:14:28 -0500 Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector AtomicExpan

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load (PR #120598)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120598 >From 5bc5d3291ad26fa3af646e45bd5d491d03588d98 Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 11:19:39 -0500 Subject: [PATCH] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load Vector ty

[llvm-branch-commits] [llvm] [X86] Manage atomic load of fp -> int promotion in DAG (PR #120386)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120386 >From 0824a27d19d3a26eaf9d1ce0b04cf09dbf3cab4b Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:38:23 -0500 Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG When lowering atom

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120716 >From 855430ef05b0a8cfe6696ec62f827cab6d663655 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 20 Dec 2024 06:14:28 -0500 Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector AtomicExpan

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load (PR #120598)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120598 >From 5bc5d3291ad26fa3af646e45bd5d491d03588d98 Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 11:19:39 -0500 Subject: [PATCH] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load Vector ty

[llvm-branch-commits] [llvm] [SelectionDAG] Legalize <1 x T> vector types for atomic load (PR #120385)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120385 >From 4a47d3fd2f29c66c2230f40d7cca8fdbd1238abd Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:37:17 -0500 Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load `load atomic

[llvm-branch-commits] [llvm] [SelectionDAG] Legalize <1 x T> vector types for atomic load (PR #120385)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120385 >From 4a47d3fd2f29c66c2230f40d7cca8fdbd1238abd Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:37:17 -0500 Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load `load atomic

[llvm-branch-commits] [llvm] [X86] Manage atomic load of fp -> int promotion in DAG (PR #120386)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120386 >From 0824a27d19d3a26eaf9d1ce0b04cf09dbf3cab4b Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:38:23 -0500 Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG When lowering atom

[llvm-branch-commits] [llvm] [HLSL] Implementation of DXILResourceImplicitBinding pass (PR #138043)

llvmbot wrote: @llvm/pr-subscribers-backend-directx Author: Helena Kotas (hekota) Changes The `DXILResourceImplicitBinding` pass uses the results of `DXILResourceBindingAnalysis` to assigns register slots to resources that do not have explicit binding. It replaces all `llvm.dx.resource.

[llvm-branch-commits] [llvm] [HLSL] Implementation of DXILResourceImplicitBinding pass (PR #138043)

llvmbot wrote: @llvm/pr-subscribers-llvm-analysis Author: Helena Kotas (hekota) Changes The `DXILResourceImplicitBinding` pass uses the results of `DXILResourceBindingAnalysis` to assigns register slots to resources that do not have explicit binding. It replaces all `llvm.dx.resource.ha

[llvm-branch-commits] [clang] [KeyInstr][Clang] For stmt atom (PR #134646)

llvmbot wrote: @llvm/pr-subscribers-clang-codegen Author: Orlando Cazalet-Hyams (OCHyams) Changes This patch is part of a stack that teaches Clang to generate Key Instructions metadata for C and C++. The Key Instructions project is introduced, including a "quick summary" section at the to

[llvm-branch-commits] [llvm] PHITransAddr: Avoid looking at constant use lists (PR #134689)

llvmbot wrote: @llvm/pr-subscribers-llvm-transforms Author: Matt Arsenault (arsenm) Changes Avoids asserts in GVN --- Full diff: https://github.com/llvm/llvm-project/pull/134689.diff 2 Files Affected: - (modified) llvm/lib/Analysis/PHITransAddr.cpp (+3) - (modified) llvm/test/Transfor

[llvm-branch-commits] [clang] [KeyInstr][Clang] While stmt atom (PR #134645)

llvmbot wrote: @llvm/pr-subscribers-clang-codegen Author: Orlando Cazalet-Hyams (OCHyams) Changes See test comment for possible future improvement. This patch is part of a stack that teaches Clang to generate Key Instructions metadata for C and C++. The Key Instructions project is introd

[llvm-branch-commits] [llvm] release/20.x: [IndVarSimplify] Handle the case where both operands are the same when widening IV (#135207) (PR #135291)

llvmbot wrote: @llvm/pr-subscribers-llvm-transforms Author: None (llvmbot) Changes Backport d14acb78065bdd331019924feaaef52e5e744529 Requested by: @dtcxzyw --- Full diff: https://github.com/llvm/llvm-project/pull/135291.diff 2 Files Affected: - (modified) llvm/lib/Transforms/Utils/Sim

[llvm-branch-commits] [clang] [llvm] [HLSL] Allow resource annotations to specify only register space (PR #135287)

llvmbot wrote: @llvm/pr-subscribers-clang-codegen Author: Helena Kotas (hekota) Changes Specifying only `space` in a `register` annotation means the compiler should implicitly assign a register slot to the resource from the provided virtual register space. Fixes #133346 Depends on PR

[llvm-branch-commits] [clang] [llvm] [HLSL] Allow resource annotations to specify only register space (PR #135287)

llvmbot wrote: @llvm/pr-subscribers-clang Author: Helena Kotas (hekota) Changes Specifying only `space` in a `register` annotation means the compiler should implicitly assign a register slot to the resource from the provided virtual register space. Fixes #133346 Depends on PR #135120

[llvm-branch-commits] [llvm] release/20.x: [IndVarSimplify] Handle the case where both operands are the same when widening IV (#135207) (PR #135291)

https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/135291 Backport d14acb78065bdd331019924feaaef52e5e744529 Requested by: @dtcxzyw >From 916d1e7fd36f771b66a30b41e9c27beaf86d16aa Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Fri, 11 Apr 2025 09:03:06 +0800 Subjec

[llvm-branch-commits] [llvm] release/20.x: [IndVarSimplify] Handle the case where both operands are the same when widening IV (#135207) (PR #135291)

llvmbot wrote: @fhahn What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/135291 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinf

[llvm-branch-commits] [llvm] release/20.x: [IndVarSimplify] Handle the case where both operands are the same when widening IV (#135207) (PR #135291)

https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/135291 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [KeyInstr][Clang] While stmt atom (PR #134645)

llvmbot wrote: @llvm/pr-subscribers-clang Author: Orlando Cazalet-Hyams (OCHyams) Changes See test comment for possible future improvement. This patch is part of a stack that teaches Clang to generate Key Instructions metadata for C and C++. The Key Instructions project is introduced, in

[llvm-branch-commits] [llvm] SimplifyLibCalls: Skip sincospi optimization for ConstantData (PR #134688)

llvmbot wrote: @llvm/pr-subscribers-llvm-transforms Author: Matt Arsenault (arsenm) Changes Avoids looking at the uselist, and it would probably be more productive to constant fold this. --- Full diff: https://github.com/llvm/llvm-project/pull/134688.diff 2 Files Affected: - (modified)

[llvm-branch-commits] [clang] [KeyInstr][Clang] For range stmt atoms (PR #134647)

llvmbot wrote: @llvm/pr-subscribers-clang-codegen Author: Orlando Cazalet-Hyams (OCHyams) Changes This patch is part of a stack that teaches Clang to generate Key Instructions metadata for C and C++. The Key Instructions project is introduced, including a "quick summary" section at the to

[llvm-branch-commits] [clang] release/20.x: [clang-format] Keep the space between `not` and a unary operator (#135035) (PR #135118)

llvmbot wrote: @llvm/pr-subscribers-clang-format Author: None (llvmbot) Changes Backport f34483838937b1a01ee11ee22bdd6e13c81e9fff Requested by: @owenca --- Full diff: https://github.com/llvm/llvm-project/pull/135118.diff 2 Files Affected: - (modified) clang/lib/Format/TokenAnnotator.c

[llvm-branch-commits] [clang] [llvm] release/20.x: [X86][AVX10] Remove VAES and VPCLMULQDQ feature from AVX10.1 (#135489) (PR #135577)

llvmbot wrote: @llvm/pr-subscribers-clang Author: None (llvmbot) Changes Backport ebba554a3211b0b98d3ae33ba70f9d6ceaab6ad4 Requested by: @phoebewang --- Full diff: https://github.com/llvm/llvm-project/pull/135577.diff 3 Files Affected: - (modified) clang/test/CodeGen/attr-target-x86.c

[llvm-branch-commits] [clang] [llvm] release/20.x: [X86][AVX10] Remove VAES and VPCLMULQDQ feature from AVX10.1 (#135489) (PR #135577)

llvmbot wrote: @e-kud What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/135577 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinf

[llvm-branch-commits] [clang] 75c486a - Revert "[RISCV][NFC] Make generated intrinsic records more human-readable (#1…"

Author: Pengcheng Wang Date: 2025-04-14T12:53:45+08:00 New Revision: 75c486af5652662bc4c9adcff164d6ec8efcddbf URL: https://github.com/llvm/llvm-project/commit/75c486af5652662bc4c9adcff164d6ec8efcddbf DIFF: https://github.com/llvm/llvm-project/commit/75c486af5652662bc4c9adcff164d6ec8efcddbf.diff

[llvm-branch-commits] [mlir] [MLIR][ArmSVE] Add initial lowering of vector.contract to SVE `*MMLA` instructions (PR #135636)

llvmbot wrote: @llvm/pr-subscribers-mlir-sve Author: Momchil Velikov (momchil-velikov) Changes Supersedes https://github.com/llvm/llvm-project/pull/135359 --- Patch is 77.36 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/135636.diff 16 Files

[llvm-branch-commits] [mlir] [MLIR][ArmSVE] Add initial lowering of vector.contract to SVE `*MMLA` instructions (PR #135636)

llvmbot wrote: @llvm/pr-subscribers-mlir-neon Author: Momchil Velikov (momchil-velikov) Changes Supersedes https://github.com/llvm/llvm-project/pull/135359 --- Patch is 77.36 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/135636.diff 16 File

[llvm-branch-commits] [mlir] [MLIR][ArmSVE] Add an ArmSVE dialect operation which maps to svusmmla (PR #135634)

llvmbot wrote: @llvm/pr-subscribers-mlir-sve Author: Momchil Velikov (momchil-velikov) Changes Supersedes https://github.com/llvm/llvm-project/pull/135358 --- Full diff: https://github.com/llvm/llvm-project/pull/135634.diff 5 Files Affected: - (modified) mlir/include/mlir/Dialect/ArmSV

[llvm-branch-commits] [llvm] [ctxprof] Extend the notion of "cannot return" (PR #135651)

llvmbot wrote: @llvm/pr-subscribers-llvm-transforms Author: Mircea Trofin (mtrofin) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/135651.diff 3 Files Affected: - (modified) llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp (+12-7) - (modified) llvm/test/T

[llvm-branch-commits] [llvm] [HLSL] Adding support for Root Constants in LLVM Metadata (PR #135085)

https://github.com/joaosaffran updated https://github.com/llvm/llvm-project/pull/135085 >From 9b59d0108f6b23c039e2c417247216862073cd4b Mon Sep 17 00:00:00 2001 From: joaosaffran Date: Wed, 9 Apr 2025 21:05:58 + Subject: [PATCH 1/9] adding support for root constants in metadata generation -

[llvm-branch-commits] [llvm] release/20.x: [HEXAGON] Fix corner cases for hwloops pass (#135439) (PR #135657)

https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/135657 Backport da8ce56c53fe6e34809ba0b310fa90257e230a89 Requested by: @androm3da >From e2d8942a7829df234bdd0f505008d1db215e4bf8 Mon Sep 17 00:00:00 2001 From: aankit-ca Date: Mon, 14 Apr 2025 11:03:10 -0700 Subject:

[llvm-branch-commits] [llvm] [GOFF] Add writing of section symbols (PR #133799)

https://github.com/AidoP edited https://github.com/llvm/llvm-project/pull/133799 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [GOFF] Add writing of section symbols (PR #133799)

https://github.com/AidoP edited https://github.com/llvm/llvm-project/pull/133799 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] release/20.x: [clang] Introduce "binary" StringLiteral for #embed data (#127629) (PR #133460)

github-actions[bot] wrote: @Fznamznon (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR.

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: refactor issue reporting (PR #135662)

llvmbot wrote: @llvm/pr-subscribers-bolt Author: Anatoly Trosinenko (atrosinenko) Changes Remove `getAffectedRegisters` and `setOverwritingInstrs` methods from the base `Report` class. Instead, make `Report` always represent the brief version of the report. When an issue is detected on the

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: use more appropriate types (NFC) (PR #135661)

llvmbot wrote: @llvm/pr-subscribers-bolt Author: Anatoly Trosinenko (atrosinenko) Changes * use more flexible `const ArrayRef` and `StringRef` types instead of `const std::vector &` and `const std::string &`, correspondingly, for function arguments * return plain `const SrcState

[llvm-branch-commits] [llvm] release/20.x: [HEXAGON] Fix corner cases for hwloops pass (#135439) (PR #135657)

https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/135657 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/20.x: [HEXAGON] Fix corner cases for hwloops pass (#135439) (PR #135657)

llvmbot wrote: @llvm/pr-subscribers-backend-hexagon Author: None (llvmbot) Changes Backport da8ce56c53fe6e34809ba0b310fa90257e230a89 Requested by: @androm3da --- Full diff: https://github.com/llvm/llvm-project/pull/135657.diff 3 Files Affected: - (modified) llvm/lib/Target/Hexagon/Hex

[llvm-branch-commits] [llvm] release/20.x: [HEXAGON] Fix corner cases for hwloops pass (#135439) (PR #135657)

llvmbot wrote: @iajbar What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/135657 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listin

[llvm-branch-commits] [mlir] [MLIR][ArmSVE] Add initial lowering of vector.contract to SVE `*MMLA` instructions (PR #135636)

llvmbot wrote: @llvm/pr-subscribers-mlir Author: Momchil Velikov (momchil-velikov) Changes Supersedes https://github.com/llvm/llvm-project/pull/135359 --- Patch is 77.36 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/135636.diff 16 Files Aff

[llvm-branch-commits] [llvm] [GOFF] Add writing of section symbols (PR #133799)

@@ -2759,6 +2762,29 @@ MCSection *TargetLoweringObjectFileXCOFF::getSectionForLSDA( //===--===// TargetLoweringObjectFileGOFF::TargetLoweringObjectFileGOFF() = default; +void TargetLoweringObjectFileGOFF::ge

[llvm-branch-commits] [llvm] [HLSL] Adding support for Root Constants in LLVM Metadata (PR #135085)

https://github.com/joaosaffran updated https://github.com/llvm/llvm-project/pull/135085 >From 9b59d0108f6b23c039e2c417247216862073cd4b Mon Sep 17 00:00:00 2001 From: joaosaffran Date: Wed, 9 Apr 2025 21:05:58 + Subject: [PATCH 1/3] adding support for root constants in metadata generation -

[llvm-branch-commits] [llvm] 34a1afa - Revert "[CMake] Configure ccache using command line options (#134857)"

Author: Kajetan Puchalski Date: 2025-04-14T20:35:15+01:00 New Revision: 34a1afaf7412311f627af671b4339fc92acb305b URL: https://github.com/llvm/llvm-project/commit/34a1afaf7412311f627af671b4339fc92acb305b DIFF: https://github.com/llvm/llvm-project/commit/34a1afaf7412311f627af671b4339fc92acb305b.d

[llvm-branch-commits] [llvm] release/20.x: [llvm][CodeGen] avoid repeated interval calculation in window scheduler (#132352) (PR #134775)

github-actions[bot] wrote: @androm3da (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR.

[llvm-branch-commits] [llvm] [HLSL] Adding support for Root Constants in LLVM Metadata (PR #135085)

@@ -94,10 +144,56 @@ static bool parse(LLVMContext *Ctx, mcdxbc::RootSignatureDesc &RSD, static bool verifyRootFlag(uint32_t Flags) { return (Flags & ~0xfff) == 0; } +static bool verifyShaderVisibility(dxbc::ShaderVisibility Flags) { + switch (Flags) { + + case dxbc::Shade

[llvm-branch-commits] [llvm] release/20.x: [SCEV] Use ashr to adjust constant multipliers (#135534) (PR #135543)

github-actions[bot] wrote: @dtcxzyw (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. h

[llvm-branch-commits] [llvm] [HLSL] Adding support for Root Constants in LLVM Metadata (PR #135085)

@@ -94,10 +144,56 @@ static bool parse(LLVMContext *Ctx, mcdxbc::RootSignatureDesc &RSD, static bool verifyRootFlag(uint32_t Flags) { return (Flags & ~0xfff) == 0; } +static bool verifyShaderVisibility(dxbc::ShaderVisibility Flags) { + switch (Flags) { + + case dxbc::Shade

[llvm-branch-commits] RISCVAsmParser: Reject call foo@invalid (PR #135509)

llvmbot wrote: @llvm/pr-subscribers-backend-risc-v Author: Fangrui Song (MaskRay) Changes ... instead of silently parsing and ignoring it without leaving an error message. While here, remove an unreachable `@plt`. --- Full diff: https://github.com/llvm/llvm-project/pull/135509.diff 3

[llvm-branch-commits] [NFC][CFI] Avoid failing CFI tests (PR #135981)

llvmbot wrote: @llvm/pr-subscribers-clang Author: Vitaly Buka (vitalybuka) Changes In these tests we test correct linking flags set, and it' confusing that command fails because of other missing required flags. --- Full diff: https://github.com/llvm/llvm-project/pull/135981.diff 1 File

[llvm-branch-commits] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)

@@ -0,0 +1,313 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s -check-prefix=V9 +; RUN: llc < %s -mtriple=sparcv9 -mattr=popc | FileCheck %s -check-prefix=POPC +; RUN: llc < %s -mtriple=sparcv9 -mat

[llvm-branch-commits] [SPARC] Promote i32 CTTZ when we have VIS3 (PR #135894)

@@ -1,70 +1,195 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=sparc -mcpu=v9 | FileCheck %s +; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s -check-prefix=V9 +; RUN: llc < %s -mtriple=sparcv9 -mattr=popc | FileCheck %s

[llvm-branch-commits] [clang] 2586e26 - Revert "[Clang][RFC] Bypass TAD during overload resolution if a perfect match…"

Author: cor3ntin Date: 2025-04-16T19:39:15+02:00 New Revision: 2586e26ebaaf967c441651a736b740bc2113ecc1 URL: https://github.com/llvm/llvm-project/commit/2586e26ebaaf967c441651a736b740bc2113ecc1 DIFF: https://github.com/llvm/llvm-project/commit/2586e26ebaaf967c441651a736b740bc2113ecc1.diff LOG:

[llvm-branch-commits] [lldb] [lldb] Fix SBTarget::ReadInstruction with flavor (PR #136034)

llvmbot wrote: @llvm/pr-subscribers-lldb Author: Ebuka Ezike (da-viper) Changes Backported #134626 to 20.X --- Full diff: https://github.com/llvm/llvm-project/pull/136034.diff 4 Files Affected: - (modified) lldb/source/API/SBTarget.cpp (+3-3) - (added) lldb/test/API/python_api/target

[llvm-branch-commits] [llvm] cecfa42 - Revert "Reapply "[LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter" (…"

Author: Rahul Joshi Date: 2025-04-16T18:23:08-07:00 New Revision: cecfa425a090acdc8ed8b3442cbb890ff0cd9b11 URL: https://github.com/llvm/llvm-project/commit/cecfa425a090acdc8ed8b3442cbb890ff0cd9b11 DIFF: https://github.com/llvm/llvm-project/commit/cecfa425a090acdc8ed8b3442cbb890ff0cd9b11.diff L

[llvm-branch-commits] [SPARC] Promote i32 CTTZ when we have VIS3 (PR #135894)

https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135894 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [lldb] e70b828 - Revert "[CI] monolithic-linux improvements (#135499)"

Author: Younan Zhang Date: 2025-04-17T11:45:52+08:00 New Revision: e70b8283d7778568ff715f8cc400732ad92ac321 URL: https://github.com/llvm/llvm-project/commit/e70b8283d7778568ff715f8cc400732ad92ac321 DIFF: https://github.com/llvm/llvm-project/commit/e70b8283d7778568ff715f8cc400732ad92ac321.diff

[llvm-branch-commits] [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)

https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135715 >From 6e865810ea2acaf636a4759fd4ffc67aa3dbb848 Mon Sep 17 00:00:00 2001 From: Koakuma Date: Thu, 17 Apr 2025 08:24:54 +0700 Subject: [PATCH] Promote i32 CTLZ when we don't have VIS3 or POPC Created using spr 1.

[llvm-branch-commits] [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)

https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135715 >From 6e865810ea2acaf636a4759fd4ffc67aa3dbb848 Mon Sep 17 00:00:00 2001 From: Koakuma Date: Thu, 17 Apr 2025 08:24:54 +0700 Subject: [PATCH 1/2] Promote i32 CTLZ when we don't have VIS3 or POPC Created using sp

[llvm-branch-commits] [SPARC] Use op-then-neg instructions when we have VIS3 (PR #135717)

https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135717 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [mlir][memref][NFC] Simplify `constifyIndexValues` (PR #135940)

llvmbot wrote: @llvm/pr-subscribers-mlir-memref Author: Matthias Springer (matthias-springer) Changes Depends on #135939. --- Full diff: https://github.com/llvm/llvm-project/pull/135940.diff 1 Files Affected: - (modified) mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp (+50-103) `

[llvm-branch-commits] [mlir] [mlir][memref][NFC] Simplify `constifyIndexValues` (PR #135940)

github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff HEAD~1 HEAD --extensions cpp -- mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp ``

[llvm-branch-commits] [SPARC] Promote i32 CTTZ when we have VIS3 (PR #135894)

https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135894 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] 6170581 - Revert "[Clang] Bypass TAD during overload resolution if a perfect match exis…"

Author: cor3ntin Date: 2025-04-17T11:00:23+02:00 New Revision: 61705818e19b6a2e35a4a65f1104d26ce0c1929a URL: https://github.com/llvm/llvm-project/commit/61705818e19b6a2e35a4a65f1104d26ce0c1929a DIFF: https://github.com/llvm/llvm-project/commit/61705818e19b6a2e35a4a65f1104d26ce0c1929a.diff LOG:

[llvm-branch-commits] [RISCV][NFC] Use bitmasks generated by TableGen (PR #135600)

llvmbot wrote: @llvm/pr-subscribers-backend-risc-v Author: Pengcheng Wang (wangpc-pp) Changes So that we don't need to sync-up the table manually. --- Full diff: https://github.com/llvm/llvm-project/pull/135600.diff 3 Files Affected: - (modified) llvm/include/llvm/TargetParser/RISCVTa

[llvm-branch-commits] [llvm] release/20.x: [LLVM][MemCpyOpt] Unify alias tags if we optimize allocas (#129537) (PR #135615)

llvmbot wrote: @llvm/pr-subscribers-llvm-transforms Author: Nikita Popov (nikic) Changes Backport of 716b02d8c575afde7af1af13df145019659abca2, with conflicts in the test resolved. --- Full diff: https://github.com/llvm/llvm-project/pull/135615.diff 3 Files Affected: - (modified) llvm/

[llvm-branch-commits] [clang] [llvm] release/20.x: [X86][AVX10] Remove VAES and VPCLMULQDQ feature from AVX10.1 (#135489) (PR #135577)

https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/135577 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] release/20.x: [clang][AST] Handle implicit first argument in CallExpr::getBeginLoc() (PR #135927)

llvmbot wrote: @llvm/pr-subscribers-clang Author: Nathan Ridge (HighCommander4) Changes Backport https://github.com/llvm/llvm-project/commit/289baf1f42c8b5773271b611cd235d4ab94bb4e8 Fixes https://github.com/llvm/llvm-project/issues/135922 --- Full diff: https://github.com/llvm/llvm-proj

[llvm-branch-commits] [MTE] do not tag zero sized globals (PR #136020)

llvmbot wrote: @llvm/pr-subscribers-clang Author: Florian Mayer (fmayer) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/136020.diff 2 Files Affected: - (modified) clang/test/CodeGen/memtag-globals-asm.cpp (+6) - (modified) llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp

[llvm-branch-commits] [SPARC] Use native bitcast instructions when we have VIS3 (PR #135716)

https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135716 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] 24b0bd6 - Revert "[LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter (#135882)"

Author: Rahul Joshi Date: 2025-04-16T13:15:51-07:00 New Revision: 24b0bd6a97ed115c7530f0538eed9b9ef2b581f9 URL: https://github.com/llvm/llvm-project/commit/24b0bd6a97ed115c7530f0538eed9b9ef2b581f9 DIFF: https://github.com/llvm/llvm-project/commit/24b0bd6a97ed115c7530f0538eed9b9ef2b581f9.diff L

[llvm-branch-commits] [clang] 9d2bc67 - Revert "[NFC][CFI] Dump test output to debug llvm-clang-win-x-aarch64 failure…"

Author: Vitaly Buka Date: 2025-04-16T13:54:29-07:00 New Revision: 9d2bc671fe2c22f84d736820e3c63617139ef2e3 URL: https://github.com/llvm/llvm-project/commit/9d2bc671fe2c22f84d736820e3c63617139ef2e3 DIFF: https://github.com/llvm/llvm-project/commit/9d2bc671fe2c22f84d736820e3c63617139ef2e3.diff L

[llvm-branch-commits] [clang] b315dee - Revert "[NFC][CFI] Avoid clang error in CFI tests (#135981)"

Author: Vitaly Buka Date: 2025-04-16T13:55:22-07:00 New Revision: b315dee6cd4f67532a53a850cd8f6d461d95ad4d URL: https://github.com/llvm/llvm-project/commit/b315dee6cd4f67532a53a850cd8f6d461d95ad4d DIFF: https://github.com/llvm/llvm-project/commit/b315dee6cd4f67532a53a850cd8f6d461d95ad4d.diff L

[llvm-branch-commits] [SPARC] Use op-then-halve instructions when we have VIS3 (PR #135718)

https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135718 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [SPARC] Use op-then-neg instructions when we have VIS3 (PR #135717)

https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135717 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)

https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135715 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [SPARC] Use op-then-halve instructions when we have VIS3 (PR #135718)

https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135718 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [HLSL] Adding support for Root Constants in LLVM Metadata (PR #135085)

@@ -94,10 +144,56 @@ static bool parse(LLVMContext *Ctx, mcdxbc::RootSignatureDesc &RSD, static bool verifyRootFlag(uint32_t Flags) { return (Flags & ~0xfff) == 0; } +static bool verifyShaderVisibility(dxbc::ShaderVisibility Flags) { + switch (Flags) { + + case dxbc::Shade

[llvm-branch-commits] [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)

@@ -303,4 +303,10 @@ def : Pat<(i64 (mulhs i64:$lhs, i64:$rhs)), (SUBrr (UMULXHI $lhs, $rhs), (ADDrr (ANDrr (SRAXri $lhs, 63), $rhs), (ANDrr (SRAXri $rhs, 63), $lhs)))>; + +def : Pat<(i64 (ctlz i64:$src)), (LZCNT $src)>; +// 32-bit LZCNT.

[llvm-branch-commits] [llvm] [HLSL] Adding support for Root Constants in LLVM Metadata (PR #135085)

https://github.com/joaosaffran updated https://github.com/llvm/llvm-project/pull/135085 >From 9b59d0108f6b23c039e2c417247216862073cd4b Mon Sep 17 00:00:00 2001 From: joaosaffran Date: Wed, 9 Apr 2025 21:05:58 + Subject: [PATCH 01/13] adding support for root constants in metadata generation

[llvm-branch-commits] [SPARC] Use native bitcast instructions when we have VIS3 (PR #135716)

https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135716 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [flang] [flang][OpenMP] Update `do concurrent` mapping pass to use `fir.do_concurrent` op (PR #138489)

llvmbot wrote: @llvm/pr-subscribers-flang-fir-hlfir Author: Kareem Ergawy (ergawy) Changes This PR updates the `do concurrent` to OpenMP mapping pass to use the newly added `fir.do_concurrent` ops that were recently added upstream instead of handling nests of `fir.do_loop ... unordered`

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Complete optimized regalloc pipeline (PR #138491)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Akshat Oke (optimisan) Changes Also fill in some other passes. --- Full diff: https://github.com/llvm/llvm-project/pull/138491.diff 4 Files Affected: - (modified) llvm/include/llvm/Passes/CodeGenPassBuilder.h (+1-1) - (modifie

[llvm-branch-commits] [llvm] [SelectionDAG] Split vector types for atomic load (PR #120640)

@@ -1421,6 +1424,40 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) { SetSplitVector(SDValue(N, ResNo), Lo, Hi); } +void DAGTypeLegalizer::SplitVecRes_ATOMIC_LOAD(AtomicSDNode *LD, SDValue &Lo, + SDValue

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120716 >From d600ac360ed1e19693cc99f7785fd3f4cef579da Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 20 Dec 2024 06:14:28 -0500 Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector AtomicExpan

[llvm-branch-commits] [llvm] [SelectionDAG] Split vector types for atomic load (PR #120640)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120640 >From 28f6bf33268da6361d71070d5bf75f93a85b03eb Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 16:25:55 -0500 Subject: [PATCH] [SelectionDAG] Split vector types for atomic load Vector types that aren'

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/125432 >From 6897d31ad46d5be2a46ef5c852d82675ddd65cd2 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 31 Jan 2025 13:12:56 -0500 Subject: [PATCH] [SelectionDAG][X86] Remove unused elements from atomic vector. After spl

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120716 >From d600ac360ed1e19693cc99f7785fd3f4cef579da Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 20 Dec 2024 06:14:28 -0500 Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector AtomicExpan

[llvm-branch-commits] [llvm] [SelectionDAG] Split vector types for atomic load (PR #120640)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120640 >From 28f6bf33268da6361d71070d5bf75f93a85b03eb Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 16:25:55 -0500 Subject: [PATCH] [SelectionDAG] Split vector types for atomic load Vector types that aren'

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/125432 >From 6897d31ad46d5be2a46ef5c852d82675ddd65cd2 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 31 Jan 2025 13:12:56 -0500 Subject: [PATCH] [SelectionDAG][X86] Remove unused elements from atomic vector. After spl

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/125432 >From 6897d31ad46d5be2a46ef5c852d82675ddd65cd2 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 31 Jan 2025 13:12:56 -0500 Subject: [PATCH] [SelectionDAG][X86] Remove unused elements from atomic vector. After spl

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120716 >From d600ac360ed1e19693cc99f7785fd3f4cef579da Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 20 Dec 2024 06:14:28 -0500 Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector AtomicExpan

[llvm-branch-commits] [llvm] [SelectionDAG] Split vector types for atomic load (PR #120640)

@@ -1421,6 +1424,40 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) { SetSplitVector(SDValue(N, ResNo), Lo, Hi); } +void DAGTypeLegalizer::SplitVecRes_ATOMIC_LOAD(AtomicSDNode *LD, SDValue &Lo, + SDValue

[llvm-branch-commits] [llvm] IR: Reorder ConstantData enum values (PR #138638)

llvmbot wrote: @llvm/pr-subscribers-llvm-ir Author: Matt Arsenault (arsenm) Changes This sorts ConstantData to the low values, so we can perform a hasUseList check in a single compare instead of requiring 2 compares plus an and for the range check. --- Full diff: https://github.com/llvm/l

[llvm-branch-commits] [llvm] release/20.x: [OpenMP] Add pre sm_70 load hack back in (#138589) (PR #138626)

llvmbot wrote: @shiltian What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/138626 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/list

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