Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.396 - 1.397
X86ISelLowering.h updated: 1.99 - 1.100
---
Log message:
Support for the special case of a vector with the canonical form:
vector_shuffle v1, v2, 2, 6, 3, 7
I.e.
vector_shuffle v, undef, 2,
Implemented correct stack probing on mingw/cygwin for dynamic
alloca's.
Also, fixed static case in presence of eax livin. This fixes PR331:
http://llvm.org/PR331
Cool :)
+SDOperand X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDOperand Op,
+
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.386 - 1.387
X86ISelLowering.h updated: 1.95 - 1.96
---
Log message:
remove some dead target hooks, subsumed by isLegalAddressingMode
---
Diffs of the changes: (+0 -28)
X86ISelLowering.cpp | 16
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.387 - 1.388
X86ISelLowering.h updated: 1.96 - 1.97
---
Log message:
remove some dead hooks
---
Diffs of the changes: (+0 -49)
X86ISelLowering.cpp | 35 ---
X86ISelLowering.h | 14
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.382 - 1.383
X86ISelLowering.h updated: 1.94 - 1.95
---
Log message:
implement the new addressing mode description hook.
---
Diffs of the changes: (+49 -0)
X86ISelLowering.cpp | 45
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.376 - 1.377
X86ISelLowering.h updated: 1.93 - 1.94
---
Log message:
switch TargetLowering::getConstraintType to take the entire constraint,
not just the first letter. No functionality change.
---
Diffs of the changes:
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.367 - 1.368
X86ISelLowering.h updated: 1.91 - 1.92
---
Log message:
More flexible TargetLowering LSR hooks for testing whether an immediate is
a legal target address immediate or scale.
---
Diffs of the changes: (+33
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.359 - 1.360
X86ISelLowering.h updated: 1.90 - 1.91
---
Log message:
X86-64 VACOPY needs custom expansion. va_list is a struct { i32, i32, i8*, i8*
}.
---
Diffs of the changes: (+34 -3)
X86ISelLowering.cpp | 36
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.349 - 1.350
X86ISelLowering.h updated: 1.89 - 1.90
---
Log message:
remove fastcc (not fastcall) support
---
Diffs of the changes: (+26 -58)
X86ISelLowering.cpp | 65
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.327 - 1.328
X86ISelLowering.h updated: 1.85 - 1.86
---
Log message:
simplify result value lowering by splitting the selection of *where* to return
registers out from the logic of *how* to return them.
This changes X86-64
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.329 - 1.330
X86ISelLowering.h updated: 1.86 - 1.87
---
Log message:
factor a bunch of code out of LowerallTo into a new LowerCallResult
function. This function now uses GetRetValueLocs to determine *where*
the result
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.330 - 1.331
X86ISelLowering.h updated: 1.87 - 1.88
---
Log message:
pass the calling convention into Lower*CallTo, instead of using ad-hoc flags.
---
Diffs of the changes: (+19 -23)
X86ISelLowering.cpp | 34
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.312 - 1.313
X86ISelLowering.h updated: 1.82 - 1.83
X86InstrSSE.td updated: 1.175 - 1.176
---
Log message:
- FCOPYSIGN custom lowering bug. Clear the sign bit of operand 0 first before
or'ing in the sign bit of operand
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.310 - 1.311
X86ISelLowering.h updated: 1.81 - 1.82
X86InstrSSE.td updated: 1.174 - 1.175
---
Log message:
With SSE2, expand FCOPYSIGN to a series of SSE bitwise operations.
---
Diffs of the changes: (+93 -8)
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.289 - 1.290
X86ISelLowering.h updated: 1.79 - 1.80
X86InstrSSE.td updated: 1.170 - 1.171
---
Log message:
Don't dag combine floating point select to max and min intrinsics. Those
take v4f32 / v2f64 operands and may end up
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.287 - 1.288
X86ISelLowering.h updated: 1.78 - 1.79
X86InstrSSE.td updated: 1.169 - 1.170
---
Log message:
Fixed a bug which causes x86 be to incorrectly match
shuffle v, undef, 2, ?, 3, ?
to movhlps
It should match to
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.285 - 1.286
X86ISelLowering.h updated: 1.77 - 1.78
---
Log message:
allow the address of a global to be used with the i constraint when in
-static mode. This implements PR882: http://llvm.org/PR882 .
---
Diffs of the
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.280 - 1.281
X86ISelLowering.h updated: 1.76 - 1.77
X86InstrSSE.td updated: 1.166 - 1.167
---
Log message:
Fixed a significant bug where unpcklpd is incorrectly used to extract element 1
from a v2f64 value.
---
Diffs of
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.276 - 1.277
X86ISelLowering.h updated: 1.75 - 1.76
X86InstrInfo.cpp updated: 1.63 - 1.64
X86InstrInfo.h updated: 1.56 - 1.57
---
Log message:
Implement branch analysis/xform hooks required by the branch folding pass.
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.240 - 1.241
X86ISelLowering.h updated: 1.69 - 1.70
---
Log message:
Fix PR850: http://llvm.org/PR850 and CodeGen/X86/2006-07-31-SingleRegClass.ll.
The CFE refers to all single-register constraints (like A) by their
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.235 - 1.236
X86ISelLowering.h updated: 1.68 - 1.69
---
Log message:
Implement the inline asm 'A' constraint. This implements PR825:
http://llvm.org/PR825 and
CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll
---
Diffs
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.230 - 1.231
X86ISelLowering.h updated: 1.66 - 1.67
X86JITInfo.cpp updated: 1.20 - 1.21
---
Log message:
Simplify X86CompilationCallback: always align to 16-byte boundary; don't save
EAX/EDX if unnecessary.
---
Diffs of
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.211 - 1.212
X86ISelLowering.h updated: 1.65 - 1.66
---
Log message:
Switch X86 over to a call-selection model where the lowering code creates
the copyto/fromregs instead of making the X86ISD::CALL selection code create
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.207 - 1.208
X86ISelLowering.h updated: 1.62 - 1.63
---
Log message:
Implement an annoying part of the Darwin/X86 abi: the callee of a struct
return argument pops the hidden struct pointer if present, not the caller.
For
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.208 - 1.209
X86ISelLowering.h updated: 1.63 - 1.64
---
Log message:
Remove PreprocessCCCArguments and PreprocessFastCCArguments now that
FORMAL_ARGUMENTS nodes include a token operand.
---
Diffs of the changes: (+124
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.205 - 1.206
X86ISelLowering.h updated: 1.61 - 1.62
---
Log message:
Should pass by reference.
---
Diffs of the changes: (+4 -4)
X86ISelLowering.cpp |4 ++--
X86ISelLowering.h |4 ++--
2 files changed, 4
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.189 - 1.190
X86ISelLowering.h updated: 1.60 - 1.61
---
Log message:
- Clean up formal argument lowering code. Prepare for vector pass by value work.
- Fixed vararg support.
---
Diffs of the changes: (+237 -215)
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.187 - 1.188
X86ISelLowering.h updated: 1.59 - 1.60
---
Log message:
Switching over FORMAL_ARGUMENTS mechanism to lower call arguments.
---
Diffs of the changes: (+177 -80)
X86ISelLowering.cpp | 245
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.177 - 1.178
X86ISelLowering.h updated: 1.56 - 1.57
---
Log message:
- Added support to turn vector clear elements, e.g. pand V, -1, -1, 0, -1
to a vector shuffle.
- VECTOR_SHUFFLE lowering change in preparation for more
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.178 - 1.179
X86ISelLowering.h updated: 1.57 - 1.58
X86InstrSSE.td updated: 1.109 - 1.110
---
Log message:
Now generating perfect (I think) code for vector set with a single non-zero
scalar value.
e.g.
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.173 - 1.174
X86ISelLowering.h updated: 1.55 - 1.56
---
Log message:
Commute vector_shuffle to match more movlhps, movlp{s|d} cases.
---
Diffs of the changes: (+59 -63)
X86ISelLowering.cpp | 115
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.161 - 1.162
X86ISelLowering.h updated: 1.53 - 1.54
X86InstrSSE.td updated: 1.72 - 1.73
---
Log message:
Added support for _mm_move_ss and _mm_move_sd.
---
Diffs of the changes: (+46 -2)
X86ISelLowering.cpp | 29
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.158 - 1.159
X86ISelLowering.h updated: 1.52 - 1.53
X86InstrSSE.td updated: 1.64 - 1.65
---
Log message:
- movlp{s|d} and movhp{s|d} support.
- Normalize shuffle nodes so result vector lower half elements come from the
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.156 - 1.157
X86ISelLowering.h updated: 1.50 - 1.51
X86InstrSSE.td updated: 1.61 - 1.62
---
Log message:
Handle canonical form of e.g.
vector_shuffle v1, v1, 0, 4, 1, 5, 2, 6, 3, 7
This is turned into
vector_shuffle v1,
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.157 - 1.158
X86ISelLowering.h updated: 1.51 - 1.52
X86InstrSSE.td updated: 1.62 - 1.63
---
Log message:
Support for comi / ucomi intrinsics.
---
Diffs of the changes: (+158 -10)
X86ISelLowering.cpp | 133
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.149 - 1.150
X86ISelLowering.h updated: 1.48 - 1.49
X86InstrSSE.td updated: 1.50 - 1.51
---
Log message:
Add support to use pextrw and pinsrw to extract and insert a word element
from a 128-bit vector.
---
Diffs of the
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.150 - 1.151
X86ISelLowering.h updated: 1.49 - 1.50
X86InstrSSE.td updated: 1.52 - 1.53
---
Log message:
Use a X86 target specific node X86ISD::PINSRW instead of a mal-formed
INSERT_VECTOR_ELT to insert a 16-bit value in
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.144 - 1.145
X86ISelLowering.h updated: 1.47 - 1.48
X86InstrSSE.td updated: 1.44 - 1.45
---
Log message:
- Added some SSE2 128-bit packed integer ops.
- Added SSE2 128-bit integer pack with signed saturation ops.
- Added
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.137 - 1.138
X86ISelLowering.h updated: 1.46 - 1.47
X86InstrSSE.td updated: 1.36 - 1.37
---
Log message:
* Prefer using operation of matching types. e.g unpcklpd rather than movlhps.
* Bug fixes.
---
Diffs of the
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.132 - 1.133
X86ISelLowering.h updated: 1.43 - 1.44
X86InstrSSE.td updated: 1.31 - 1.32
---
Log message:
Remove X86:isZeroVector, use ISD::isBuildVectorAllZeros instead; some fixes /
cleanups
---
Diffs of the changes:
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.131 - 1.132
X86ISelLowering.h updated: 1.42 - 1.43
X86InstrSSE.td updated: 1.30 - 1.31
---
Log message:
Build arbitrary vector with more than 2 distinct scalar elements with a
series of unpack and interleave ops.
---
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.129 - 1.130
X86ISelLowering.h updated: 1.41 - 1.42
X86InstrInfo.cpp updated: 1.46 - 1.47
X86InstrSSE.td updated: 1.26 - 1.27
---
Log message:
Support for scalar to vector with zero extension.
---
Diffs of the changes:
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.125 - 1.126
X86ISelLowering.h updated: 1.39 - 1.40
X86InstrSSE.td updated: 1.22 - 1.23
---
Log message:
More efficient v2f64 shuffle using movlhps, movhlps, unpckhpd, and unpcklpd.
---
Diffs of the changes: (+128 -12)
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.128 - 1.129
X86ISelLowering.h updated: 1.40 - 1.41
X86InstrFPStack.td updated: 1.5 - 1.6
X86InstrSSE.td updated: 1.23 - 1.24
---
Log message:
Handle BUILD_VECTOR with all zero elements.
---
Diffs of the changes: (+73
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.117 - 1.118
X86ISelLowering.h updated: 1.35 - 1.36
X86InstrSSE.td updated: 1.14 - 1.15
---
Log message:
- VECTOR_SHUFFLE of v4i32 / v4f32 with undef second vector always matches
PSHUFD. We can make permutes entries
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.118 - 1.119
X86ISelLowering.h updated: 1.36 - 1.37
X86InstrSSE.td updated: 1.15 - 1.16
---
Log message:
- Implement X86ISelLowering::isShuffleMaskLegal(). We currently only support
splat and PSHUFD cases.
- Clean up
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.121 - 1.122
X86ISelLowering.h updated: 1.37 - 1.38
---
Log message:
Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not do
64-bit vector shuffle.
---
Diffs of the changes: (+5 -2)
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.114 - 1.115
X86ISelLowering.h updated: 1.33 - 1.34
X86InstrMMX.td updated: 1.5 - 1.6
X86InstrSSE.td updated: 1.11 - 1.12
---
Log message:
- Use movaps to store 128-bit vector integers.
- Each scalar to vector v8i16 and
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.90 - 1.91
X86ISelLowering.h updated: 1.28 - 1.29
---
Log message:
Updates to match change of getRegForInlineAsmConstraint prototype
---
Diffs of the changes: (+5 -3)
X86ISelLowering.cpp |5 +++--
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.91 - 1.92
X86ISelLowering.h updated: 1.29 - 1.30
---
Log message:
split register class handling from explicit physreg handling.
---
Diffs of the changes: (+5 -6)
X86ISelLowering.cpp |7 +++
X86ISelLowering.h
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.83 - 1.84
X86ISelLowering.h updated: 1.25 - 1.26
---
Log message:
Rework the SelectionDAG-based implementations of SimplifyDemandedBits
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.85 - 1.86
X86ISelLowering.h updated: 1.26 - 1.27
X86InstrInfo.td updated: 1.236 - 1.237
---
Log message:
kill ADD_PARTS SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC
and SUBE nodes that actually expose
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.66 - 1.67
X86ISelLowering.h updated: 1.20 - 1.21
X86InstrInfo.td updated: 1.222 - 1.223
---
Log message:
Always use FP stack instructions to perform i64 to f64 as well as f64 to i64
conversions. SSE does not have
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.64 - 1.65
X86ISelLowering.h updated: 1.18 - 1.19
---
Log message:
adjust prototype
---
Diffs of the changes: (+4 -2)
X86ISelLowering.cpp |3 ++-
X86ISelLowering.h |3 ++-
2 files changed, 4 insertions(+), 2
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.65 - 1.66
X86ISelLowering.h updated: 1.19 - 1.20
---
Log message:
Move MaskedValueIsZero from the DAGCombiner to the TargetLowering
interface,making isMaskedValueZeroForTargetNode simpler, and useable from other
partsof
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.59 - 1.60
X86ISelLowering.h updated: 1.17 - 1.18
---
Log message:
Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
the same functionality. This addresses another piece of bug 680:
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.56 - 1.57
X86ISelLowering.h updated: 1.15 - 1.16
---
Log message:
First part of bug 680: http://llvm.cs.uiuc.edu/PR680 :
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.26 - 1.27
X86ISelLowering.h updated: 1.12 - 1.13
X86InstrInfo.td updated: 1.194 - 1.195
---
Log message:
SSE cmov support.
---
Diffs of the changes: (+121 -17)
X86ISelLowering.cpp | 109
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.22 - 1.23
X86ISelLowering.h updated: 1.11 - 1.12
X86InstrInfo.td updated: 1.190 - 1.191
X86RegisterInfo.cpp updated: 1.116 - 1.117
---
Log message:
Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS.
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.12 - 1.13
X86ISelLowering.h updated: 1.6 - 1.7
X86InstrInfo.td updated: 1.179 - 1.180
---
Log message:
* Added support for X86 RET with an additional operand to specify number of
bytes to pop off stack.
* Added support
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.9 - 1.10
X86ISelLowering.h updated: 1.3 - 1.4
X86InstrInfo.td updated: 1.172 - 1.173
---
Log message:
X86 conditional branch support.
---
Diffs of the changes: (+53 -14)
X86ISelLowering.cpp | 21
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.10 - 1.11
X86ISelLowering.h updated: 1.4 - 1.5
---
Log message:
Added a hook to print out names of target specific DAG nodes.
---
Diffs of the changes: (+21 -0)
X86ISelLowering.cpp | 17 +
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