On 26/05/16 09:46, Timothy Arceri wrote:
> On Thu, 2016-05-26 at 17:44 +1000, Timothy Arceri wrote:
>> On Thu, 2016-05-26 at 07:56 +0200, Samuel Iglesias Gonsálvez wrote:
>>>
>>> Hello,
>>>
>>> Timothy found that tests with unpacked double vector input varyings
>>> were failing in i965 driver. Fo
From: Dave Airlie
The CTS test:
GL45-CTS.shader_image_load_store.multiple-uniforms
regressed recently with the new offchip support.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/radeonsi/si_state_draw.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/gal
On 05/26/2016 05:16 PM, Emil Velikov wrote:
Hi all,
On 29 February 2016 at 07:14, Tapani Pälli wrote:
On 02/22/2016 10:16 PM, Ian Romanick wrote:
There are 17 total occurrences of
grep -r '[(]!gc[)]' src/glx/
and
grep -r 'gc[[:space:]]*==[[:space:]]*NULL' src/glx/
None of th
https://bugs.freedesktop.org/show_bug.cgi?id=96236
Bug ID: 96236
Summary: dri_interface.h:404: error: redefinition of typedef
‘mesa_glinterop_device_info’
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
From: Dave Airlie
These all show up as unused warnings here, so drop them for now.
Signed-off-by: Dave Airlie
---
src/mesa/main/get.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index e3a0a11..9f70749 100644
--- a/src/mesa/main/get.c
+++ b/sr
From: Dave Airlie
This seems to make sense, the image is bound to a subset of the buffer
so the image size should be from the bound size not the underlying
object.
This fixes:
GL44-CTS.shader_image_size.advanced-nonMS-fs-int
v2: get mininum of the two values, same as we write to the hw.
Signed
https://bugs.freedesktop.org/show_bug.cgi?id=96235
Bug ID: 96235
Summary: st_nir.h:34: error: redefinition of typedef
‘nir_shader’
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
From: Dave Airlie
This seems to make sense, the image is bound to a subset of the buffer
so the image size should be from the bound size not the underlying
object.
This fixes:
GL44-CTS.shader_image_size.advanced-nonMS-fs-int
Signed-off-by: Dave Airlie
---
src/mesa/drivers/dri/i965/brw_wm_surf
From: Dave Airlie
This fixes one subtest of:
GL44-CTS.shader_image_size.advanced-nonMS-fs-int
I've no idea why this wouldn't be scaled up here,
and I've no idea what else will break, but I might
as well open for discussion.
Signed-off-by: Dave Airlie
---
src/mesa/drivers/dri/i965/intel_tex_im
On Wed, May 25, 2016 at 1:53 PM, Jason Ekstrand wrote:
> ---
> src/compiler/nir/nir_inline_functions.c | 26 --
> 1 file changed, 20 insertions(+), 6 deletions(-)
>
> diff --git a/src/compiler/nir/nir_inline_functions.c
> b/src/compiler/nir/nir_inline_functions.c
> index
On May 26, 2016 9:32 PM, "Connor Abbott" wrote:
>
> On Wed, May 25, 2016 at 1:53 PM, Jason Ekstrand
wrote:
> > Now that we have the better nir_foreach_block macro, there's no reason
to
> > use the archaic block version for everything.
> > ---
> > src/compiler/nir/nir_inline_functions.c | 53
On Wed, May 25, 2016 at 1:53 PM, Jason Ekstrand wrote:
> Now that we have the better nir_foreach_block macro, there's no reason to
> use the archaic block version for everything.
> ---
> src/compiler/nir/nir_inline_functions.c | 53
> -
> 1 file changed, 25 insert
https://bugs.freedesktop.org/show_bug.cgi?id=95180
Vinson Lee changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
https://bugs.freedesktop.org/show_bug.cgi?id=95211
Vinson Lee changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
The conditional mod of these instructions determines the semantics of
the comparison itself (rather than being evaluated based on the result
of the instruction as is usually the case for most other instructions
that allow conditional mods), so it's in general not legal to
propagate a conditional mo
The Gen5+ sampler message payload construction code steps through the
coordinate and derivative components by induction like 'coordinate =
offset(coordinate, bld, 1)', the problem is that while doing that it
may step one past the end of the coordinate vector causing an
assertion failure in offset()
This should have the side effect of enabling the ARB_compute_shader
extension on Gen8+ hardware and all Gen7 platforms that didn't
previously expose it (VLV and IVB GT1) due to the number of hardware
threads per subslice being insufficient in SIMD16 mode.
---
src/mesa/drivers/dri/i965/brw_context.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs_cmod_propagation.cpp| 10 +-
src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 6 +++---
src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp | 6 +++---
src/mesa/drive
This replaces the current fs_visitor::no16() interface with
fs_visitor::limit_dispatch_width(), which takes an additional
parameter allowing the caller to specify the maximum dispatch width a
shader can be compiled with.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 26 ++-
This doesn't actually handle the FS case, just add an assertion for
the moment so I don't forget to update it later on for SIMD32 fragment
shader dispatch.
---
src/mesa/drivers/dri/i965/brw_fs_builder.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i96
The do32 INTEL_DEBUG option causes the back-end to try to generate a
SIMD32 program when compiling a compute shader regardless of the
specified compute shader workgroup size, which will be useful for
testing SIMD32 code generation in the most common case in which the
workgroup size doesn't exceed t
We'll hit these in some cases during SIMD lowering in 32-wide
programs.
---
src/mesa/drivers/dri/i965/brw_ir_fs.h | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h
b/src/mesa/drivers/dri/i965/brw_ir_fs.h
index 7c9c933..c604c9
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index d284d4e..f49a7fe 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_n
---
src/mesa/drivers/dri/i965/brw_compiler.h | 2 +-
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 13 +++--
3 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h
b
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 54 +--
src/mesa/drivers/dri/i965/brw_ir_fs.h | 25 ++--
2 files changed, 68 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 32fa8
This is more fallout from cf375ae54a01462f192202d609436e5fbec8.
It's possible for multiple ACP entries to interfere with a given VGRF
write, so we need to continue iterating even if an overlapping entry
has already been found.
Cc: Samuel Iglesias Gonsálvez
---
src/mesa/drivers/dri/i965/brw_f
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 621577b..d284d4e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/dri
The current estimate is incorrect for non-32b types.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 844b4f0..31ebbe3 100644
--- a/src/mesa/drivers/dr
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 26 ++
1 file changed, 26 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 1f3b23b..7002346 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/
Prevents an assertion failure in the following commit.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 6d541bf..844b4f0 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
The pass is disabled in SIMD16 dispatch mode for the same reason, it
cannot handle instructions that write multiple MRF registers at once.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/d
This was trying to save some one-time init on pre-Gen7 hardware under
the assumption that one would only ever need 1, 2, 4 and 8-wide
registers on those platforms. However nothing guarantees that those
will be the only VGRF sizes used after lowering and optimization. In
some cases we may end up w
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 40 ++--
1 file changed, 18 insertions(+), 22 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index f49a7fe..6fd2c56 100644
--- a/src/mesa/drivers/dri/i965/brw
These are completely ignored by the conversion to brw_reg, so they
better be zero.
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 914ec9b
horiz_offset() is able to deal with a superset of the register files
currently special-cased in half(). Just call horiz_offset() in all
cases.
---
src/mesa/drivers/dri/i965/brw_ir_fs.h | 25 -
1 file changed, 4 insertions(+), 21 deletions(-)
diff --git a/src/mesa/drivers/
This is required for correctness in presence of multiple 8-wide flag
writes (e.g. 8-wide instructions with a conditional mod set) which
update a different portion of the same 16-bit flag subregister. Right
now we keep track of flag dataflow with 16-bit granularity and
consider flag writes to have
This prevents false dependencies from being created between
instructions that write disjoint 8-bit portions of the flag register
and OTOH should make sure that the scheduler considers dependencies
between instructions that write or read multiple flag subregisters
at once (e.g. 32-wide predication o
brw_null_vec() cannot handle widths over 16 but it doesn't really
matter what width we specify for null registers because destination
regions have no width field at the hardware level.
---
src/mesa/drivers/dri/i965/brw_fs_builder.h | 12
1 file changed, 4 insertions(+), 8 deletions(-)
Even though my plan was to send the remaining changes for SIMD32 as a
single last series, I'm feeling too sleep-deprived to finish cleaning
up the rest of the series today so I'll send them in another series
tomorrow.
The patches I've left out for part 4 are not strictly necessary for
correctness
On Tuesday, May 24, 2016 1:37:47 AM PDT Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/compiler/glsl/builtin_variables.cpp | 13 +++--
> src/compiler/glsl/glsl_parser_extras.cpp | 8
> src/mesa/drivers/dri/i965/brw_compiler.c | 2 ++
> src/mesa/main/mtypes.h
From: Dave Airlie
The old code called this on the prelinked shader list,
but at this point we have the linked shader, so we should
call the interface on that alone.
This fixes a regression in:
dEQP-GLES31.functional.ssbo.layout.random.all_per_block_buffers.13
introduced in
5b2675093e863a52b610f1
On May 26, 2016 7:06 PM, "Ian Romanick" wrote:
>
> On 05/26/2016 06:30 PM, Jason Ekstrand wrote:
> > This shrinks the .text section of nir_opt_algebraic.o by 30.5 KB:
> >
> >text data bss dec hex filename
> > 48703645920 1132951ba8f nir_opt_algebraic.o
Signed-off-by: Ilia Mirkin
---
src/mesa/state_tracker/st_extensions.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_extensions.c
index 68e6601..d35e19f 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mes
On May 26, 2016 7:14 PM, "Ian Romanick" wrote:
>
> On 05/26/2016 06:30 PM, Jason Ekstrand wrote:
> > The deduplication helps a lot for variables and constants where we have
a
> > *lot* of duplicates. The compact expressions are also a *lot* smaller.
> > This cuts about 56K from nir_search_algebra
https://bugs.freedesktop.org/show_bug.cgi?id=18508
Alex Deucher changed:
What|Removed |Added
URL|http://www.topcomfort.com.u |
|a
On 05/26/2016 06:30 PM, Jason Ekstrand wrote:
> The deduplication helps a lot for variables and constants where we have a
> *lot* of duplicates. The compact expressions are also a *lot* smaller.
> This cuts about 56K from nir_search_algebraic.o (mostly from .data):
>
>text data bss
I'd have swapped the order of this patch and the next. Then the first 3
patches stand on their own, and the last 4 patches stand on their own.
*shrug*
On 05/26/2016 06:30 PM, Jason Ekstrand wrote:
> ---
> src/compiler/nir/nir_algebraic.py | 4 ++--
> src/compiler/nir/nir_search.c | 12 +
On 05/26/2016 06:30 PM, Jason Ekstrand wrote:
> This shrinks the .text section of nir_opt_algebraic.o by 30.5 KB:
>
>text data bss dec hex filename
> 48703645920 1132951ba8f nir_opt_algebraic.o
> 179516458408253514267 nir_opt_alge
The deduplication helps a lot for variables and constants where we have a
*lot* of duplicates. The compact expressions are also a *lot* smaller.
This cuts about 56K from nir_search_algebraic.o (mostly from .data):
text data bss dec hex filename
17951645840
---
src/compiler/nir/nir_algebraic.py | 4 ++--
src/compiler/nir/nir_search.c | 12
src/compiler/nir/nir_search.h | 2 +-
3 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/src/compiler/nir/nir_algebraic.py
b/src/compiler/nir/nir_algebraic.py
index 285f853..b4d
This cuts the .data section of nir_opcodes.o by about 30%
text data bss dec hex filename
165010304011954 2eb2 nir_opcodes.o
1650 73600 9010 2332 nir_opcodes.o
---
src/compiler/nir/nir.h | 6 +++---
1 file changed, 3 insertions
This cuts the .data section of nir_intrinsics.o by 60%:
text data bss dec hex filename
1845 8400010245 2805 nir_intrinsics.o
1845 33600 5205 1455 nir_intrinsics.o
---
src/compiler/nir/nir.h | 12 ++--
1 file changed, 6
---
src/compiler/nir/nir_algebraic.py | 50 +++
1 file changed, 50 insertions(+)
diff --git a/src/compiler/nir/nir_algebraic.py
b/src/compiler/nir/nir_algebraic.py
index 9b89828..0d1ed3a 100644
--- a/src/compiler/nir/nir_algebraic.py
+++ b/src/compiler/nir/nir
This form of expressions takes less space by replacing the potentially
64-bit pointers with 16-bit indices into an array of a union type.
---
src/compiler/nir/nir_algebraic.py | 2 +-
src/compiler/nir/nir_search.c | 70 +++
src/compiler/nir/nir_search.h
I was poking around with build sizes yesterday and realized that NIR, even
when built with -Os, is over 1 MB. That seemed a bit insane (libLLVM.so
is only 37 MB on my system) so I went digging for places where we may be
able to save a few KB. The first two patches just shrink some datatypes so
th
This shrinks the .text section of nir_opt_algebraic.o by 30.5 KB:
text data bss dec hex filename
48703645920 1132951ba8f nir_opt_algebraic.o
179516458408253514267 nir_opt_algebraic.o
---
src/compiler/nir/nir_search.h | 12 ++--
Looks good.
Reviewed-by: Charmaine Lee
From: Brian Paul
Sent: Thursday, May 26, 2016 5:59 PM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee
Subject: [PATCH 2/2] svga: remove unneeded casts in get_query_result_vgpu9()
calls
---
src/gallium/driver
---
src/gallium/drivers/svga/svga_draw.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_draw.c
b/src/gallium/drivers/svga/svga_draw.c
index 0b9ea88..f314d55 100644
--- a/src/gallium/drivers/svga/svga_draw.c
+++ b/src/gallium/drivers/s
---
src/gallium/drivers/svga/svga_pipe_query.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/svga/svga_pipe_query.c
b/src/gallium/drivers/svga/svga_pipe_query.c
index c1bd8ec..4febf9b 100644
--- a/src/gallium/drivers/svga/svga_pipe_query.c
+++ b/src/g
https://bugs.freedesktop.org/show_bug.cgi?id=18508
Topcomfort changed:
What|Removed |Added
URL||http://www.topcomfort.com.u
On 05/26/2016 05:22 PM, Roland Scheidegger wrote:
Am 26.05.2016 um 23:14 schrieb Brian Paul:
---
src/gallium/auxiliary/util/u_prim.h | 30 --
1 file changed, 16 insertions(+), 14 deletions(-)
Reviewed-by: Roland Scheidegger
Thanks again, Roland.
BTW, if any
Am 26.05.2016 um 23:14 schrieb Brian Paul:
> ---
> src/gallium/auxiliary/util/u_prim.h | 30 --
> 1 file changed, 16 insertions(+), 14 deletions(-)
>
> diff --git a/src/gallium/auxiliary/util/u_prim.h
> b/src/gallium/auxiliary/util/u_prim.h
> index a09c315..fb9290d 10
On Thu, May 26, 2016 at 7:09 PM, Ian Romanick wrote:
> On 05/26/2016 03:39 PM, Ilia Mirkin wrote:
>> On Thu, May 26, 2016 at 6:26 PM, Ian Romanick wrote:
>>> On 05/26/2016 03:03 PM, Ilia Mirkin wrote:
This will cause st/mesa to break, no? Right now validate_io iterates
over the shader i
On Thu, 2016-05-26 at 14:59 -0700, Ian Romanick wrote:
> From: Ian Romanick
>
> Signed-off-by: Ian Romanick
> Suggested-by: Timothy Arceri
> Cc: Timothy Arceri
Looks good to me.
Reviewed-by: Timothy Arceri
___
mesa-dev mailing list
mesa-dev@lists
On 05/26/2016 03:39 PM, Ilia Mirkin wrote:
> On Thu, May 26, 2016 at 6:26 PM, Ian Romanick wrote:
>> On 05/26/2016 03:03 PM, Ilia Mirkin wrote:
>>> This will cause st/mesa to break, no? Right now validate_io iterates
>>> over the shader ir, which st/mesa frees after linking.
>>
>> Only as much as
https://bugs.freedesktop.org/show_bug.cgi?id=96221
Jason Ekstrand changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
On Thu, May 26, 2016 at 3:59 PM, Vinson Lee wrote:
> On Thu, May 26, 2016 at 3:40 PM, Jason Ekstrand
> wrote:
> > There's no good reason for it to be a struct of an anonymous union.
> >
> > Cc: Vinson Lee
> > ---
> > src/compiler/nir/nir.h | 16 +++-
> > src/c
On Thu, May 26, 2016 at 3:40 PM, Jason Ekstrand wrote:
> There's no good reason for it to be a struct of an anonymous union.
>
> Cc: Vinson Lee
> ---
> src/compiler/nir/nir.h | 16 +++-
> src/compiler/nir/nir_constant_expressions.py | 2 +-
> 2 files changed, 8
There's no good reason for it to be a struct of an anonymous union.
Cc: Vinson Lee
---
src/compiler/nir/nir.h | 16 +++-
src/compiler/nir/nir_constant_expressions.py | 2 +-
2 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/src/compiler/nir/nir.h
Reviewed-by: Ilia Mirkin
On Thu, May 26, 2016 at 6:30 PM, Samuel Pitoiset
wrote:
> Constant buffers are aliased between 3D and CP on Fermi, but we should
> only invalidate them when a compute shader actually uses CBs and not
> all the time after a lauching grid.
>
> Signed-off-by: Samuel Pitoise
On Thu, May 26, 2016 at 3:20 PM, Vinson Lee wrote:
> CC nir/nir_lower_tex.lo
> nir/nir_lower_tex.c: In function ‘convert_yuv_to_rgb’:
> nir/nir_lower_tex.c:202: error: unknown field ‘f32’ specified in
> initializer
> nir/nir_lower_tex.c:202: warning: missing braces around initializer
> nir/
On Thu, May 26, 2016 at 6:26 PM, Ian Romanick wrote:
> On 05/26/2016 03:03 PM, Ilia Mirkin wrote:
>> This will cause st/mesa to break, no? Right now validate_io iterates
>> over the shader ir, which st/mesa frees after linking.
>
> Only as much as it is already broken. :) Any desktop OpenGL applic
Constant buffers are aliased between 3D and CP on Fermi, but we should
only invalidate them when a compute shader actually uses CBs and not
all the time after a lauching grid.
Signed-off-by: Samuel Pitoiset
---
src/gallium/drivers/nouveau/nvc0/nvc0_compute.c | 25 +
1 fil
Switches to using truncf in micro_trunc.
Fixes the following piglit tests (for softpipe):
/spec/glsl-1.30/execution/built-in-functions/...
fs-trunc-float
fs-trunc-vec2
fs-trunc-vec3
fs-trunc-vec4
vs-trunc-float
vs-trunc-vec2
vs-trunc-vec3
vs-trunc-vec4
/spec/glsl-1.50/execution/built-in-function
On 05/26/2016 03:03 PM, Ilia Mirkin wrote:
> This will cause st/mesa to break, no? Right now validate_io iterates
> over the shader ir, which st/mesa frees after linking.
Only as much as it is already broken. :) Any desktop OpenGL application
using GLSL ES shaders would already have that problem.
CC nir/nir_lower_tex.lo
nir/nir_lower_tex.c: In function ‘convert_yuv_to_rgb’:
nir/nir_lower_tex.c:202: error: unknown field ‘f32’ specified in initializer
nir/nir_lower_tex.c:202: warning: missing braces around initializer
nir/nir_lower_tex.c:202: warning: (near initialization for
‘m[0]..f3
On Fri, May 27, 2016 at 12:13 AM, Alex Deucher wrote:
> On Thu, May 26, 2016 at 5:51 PM, Marek Olšák wrote:
>> From: Marek Olšák
>>
>> SDMA submission somehow interacts with the skipping CE preamble logic.
>> This is a workaround for current kernels which have the bug.
>>
>> Sadly, I can't see w
On Thu, May 26, 2016 at 5:51 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> SDMA submission somehow interacts with the skipping CE preamble logic.
> This is a workaround for current kernels which have the bug.
>
> Sadly, I can't see what's wrong with the kernel driver. The CE preamble
> handling
Hi,
Changes since v2:
addressed following comments from Emil in 3/3
- added debug error print in intel_winsys_import_handle
- replace assert with if statement and debug print
- added r300 hunk and print for unsupported offset
version 2 can be found at
https://lists.freedesktop.org/archives/me
This helps to import dmabuf buffers from DRM_FORMAT_R8 and
DRM_FORMAT_GR88 used for example by GStreamer for YUV to RGB
conversion using shaders.
Signed-off-by: Stanimir Varbanov
---
src/gallium/state_trackers/dri/dri2.c | 20
1 file changed, 20 insertions(+)
diff --git a/s
Push offset down to drivers when importing dmabuf. This is needed
to more fully support EGL_EXT_image_dma_buf_import when a non-zero
offset is specified.
Signed-off-by: Stanimir Varbanov
---
Tesing has been done for freedreno, and compile tested following
gallium drivers:
nouveau,svga,virgl,r600
Signed-off-by: Stanimir Varbanov
---
src/gallium/state_trackers/dri/dri2.c | 81 +++
1 file changed, 44 insertions(+), 37 deletions(-)
diff --git a/src/gallium/state_trackers/dri/dri2.c
b/src/gallium/state_trackers/dri/dri2.c
index 3f2d622f45c6..182d4e6b3e2e 1006
This will cause st/mesa to break, no? Right now validate_io iterates
over the shader ir, which st/mesa frees after linking.
-ilia
On Thu, May 26, 2016 at 5:59 PM, Ian Romanick wrote:
> From: Ian Romanick
>
> Signed-off-by: Ian Romanick
> Suggested-by: Timothy Arceri
> Cc: Timothy Arceri
>
On Thu, May 26, 2016 at 5:51 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> It's not needed since it was fixed in the kernel.
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/radeonsi/si_hw_context.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/src/galliu
From: Ian Romanick
Signed-off-by: Ian Romanick
Suggested-by: Timothy Arceri
Cc: Timothy Arceri
---
src/mesa/main/pipelineobj.c| 18 --
src/mesa/main/shader_query.cpp | 12
2 files changed, 20 insertions(+), 10 deletions(-)
diff --git a/src/mesa/main/pipelineo
From: Marek Olšák
SDMA submission somehow interacts with the skipping CE preamble logic.
This is a workaround for current kernels which have the bug.
Sadly, I can't see what's wrong with the kernel driver. The CE preamble
handling there looks good to me.
Bugzilla: https://bugs.freedesktop.org/s
From: Marek Olšák
It's not needed since it was fixed in the kernel.
---
src/gallium/drivers/radeonsi/si_hw_context.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c
b/src/gallium/drivers/radeonsi/si_hw_context.c
index dcf206d
On Thu, May 26, 2016 at 11:59 AM, Ben Widawsky
wrote:
> Fixes:
> isl.c:62:22: warning: self-comparison always evaluates to true
> [-Wtautological-compare]
> assert(ISL_DEV_GEN(dev) == dev->info->gen);
> ^~
> isl.c:63:33: warning: self-comparison always evaluates to true
On Tuesday, May 24, 2016 1:37:47 AM PDT Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/compiler/glsl/builtin_variables.cpp | 13 +++--
> src/compiler/glsl/glsl_parser_extras.cpp | 8
> src/mesa/drivers/dri/i965/brw_compiler.c | 2 ++
> src/mesa/main/mtypes.h
On Thursday, May 26, 2016 3:39:50 PM PDT Emil Velikov wrote:
> Seems like I forgot to press 'send' a while back.
>
> The function itself is missing in 11.2 branch and from a quick look
> there isn't a quick backport. Can anyone prep one or it doesn't make
> sense to have one at all in -stable ?
>
---
src/gallium/auxiliary/util/u_prim.h | 30 --
1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_prim.h
b/src/gallium/auxiliary/util/u_prim.h
index a09c315..fb9290d 100644
--- a/src/gallium/auxiliary/util/u_prim.h
+++ b/src/
On Thu, May 26, 2016 at 12:37 PM, Ian Romanick wrote:
> On 05/26/2016 11:28 AM, Matt Turner wrote:
>> ---
>> src/util/rounding.h | 14 ++
>> 1 file changed, 14 insertions(+)
>>
>> diff --git a/src/util/rounding.h b/src/util/rounding.h
>> index afb38fb..8a3e630 100644
>> --- a/src/util
On 05/26/2016 12:28 PM, Matt Turner wrote:
IROUND is replaces with lroundf.
IROUNDD is replaces with lround.
IROUND64 is replaced with llroundf.
---
This is a resend of a patch from last year.
Roland suggested using rint instead of round since it's cheaper, but it
actually causes test failure
Reviewed-by: Roland Scheidegger
Am 26.05.2016 um 20:18 schrieb Brian Paul:
> Spotted by Roland.
> ---
> src/gallium/auxiliary/indices/u_indices.c | 33
> ---
> 1 file changed, 4 insertions(+), 29 deletions(-)
>
> diff --git a/src/gallium/auxiliary/indices/u_indices.
Am 26.05.2016 um 20:28 schrieb Matt Turner:
> IROUND is replaces with lroundf.
> IROUNDD is replaces with lround.
> IROUND64 is replaced with llroundf.
> ---
> This is a resend of a patch from last year.
>
> Roland suggested using rint instead of round since it's cheaper, but it
> actually caus
v2: style code, add avx512 to cpu dump
---
src/gallium/auxiliary/util/u_cpu_detect.c | 26 ++
src/gallium/auxiliary/util/u_cpu_detect.h | 10 ++
2 files changed, 36 insertions(+)
diff --git a/src/gallium/auxiliary/util/u_cpu_detect.c
b/src/gallium/auxiliary/util/u
On 05/26/2016 11:28 AM, Matt Turner wrote:
> IROUND is replaces with lroundf.
> IROUNDD is replaces with lround.
^ d on both of the above
> IROUND64 is replaced with llroundf.
> ---
> This is a resend of a patch from last year.
>
> Roland suggested using rint instead of ro
There has been some confusion about this code because our piglit tests
were actually incorrect. I have a 3rd fix coming in this area. I will
put together a concise set of fixes for stable once all the dust
settles. Sorry for all the churn. :(
On 05/26/2016 07:41 AM, Emil Velikov wrote:
> Hi all
On 05/26/2016 11:28 AM, Matt Turner wrote:
> ---
> src/util/rounding.h | 14 ++
> 1 file changed, 14 insertions(+)
>
> diff --git a/src/util/rounding.h b/src/util/rounding.h
> index afb38fb..8a3e630 100644
> --- a/src/util/rounding.h
> +++ b/src/util/rounding.h
> @@ -112,6 +112,20 @@
On Thu, May 26, 2016 at 11:42 AM, Rob Clark wrote:
> On Thu, May 26, 2016 at 11:33 AM, Brian Paul wrote:
>> On 05/26/2016 09:25 AM, Rob Clark wrote:
>>>
>>> From: Rob Clark
>>>
>>> CID 1271532 (#1 of 1): Out-of-bounds read (OVERRUN)34. overrun-local:
>>> Overrunning array of 2 16-byte elements a
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