Pushed both patches! :-)
Sam
On Thu, 2018-10-25 at 09:45 -0700, Sagar Ghuge wrote:
> Thank you for reviewing the patch.
>
> On 10/25/18 12:40 AM, Samuel Iglesias Gonsálvez wrote:
> > Reviewed-by: Samuel Iglesias Gonsálvez
> >
> > Do you need somebody to push it to the repo? I can do it
Pushed. Thanks again!
Ccing stable in case the Fixes tag isnt enough for this to get picked up
(since the previous cache fix this fixes was also backported)
On 24/10/18 11:51 am, David McFarland wrote:
After discussion with Timothy Arceri. disk_cache_get_function_identifier
was using only
On 26/10/18 10:21 am, Tom Stellard wrote:
On 09/27/2018 10:01 PM, Timothy Arceri wrote:
On 28/9/18 2:53 am, Tom Stellard wrote:
On 09/24/2018 11:51 PM, Samuel Pitoiset wrote:
On 9/25/18 6:46 AM, Timothy Arceri wrote:
On 25/9/18 10:35 am, Marek Olšák wrote:
Do you know what's broken in
On Wed, Oct 17, 2018 at 02:37:25PM +0200, Daniel Vetter wrote:
> On Wed, Oct 17, 2018 at 2:05 PM Daniel Stone wrote:
> >
> > On Tue, 16 Oct 2018 at 08:17, Peter Hutterer
> > wrote:
> > > On Mon, Oct 15, 2018 at 10:49:24AM -0400, Harry Wentland wrote:
> > > > + \item Support free and open
Looks ok to me.
Reviewed-by: Timothy Arceri
On 23/10/18 9:13 am, Jason Ekstrand wrote:
Instead of doing our own constant folding, we just emit instructions and
let constant folding happen. This is substantially simpler and lets us
use the nir_imm_bool helper instead of dealing with the
From: Nanley Chery
Follow the restriction of making sure the clear value is between the min
and max values defined in CC_VIEWPORT. Avoids a simulator warning for
some piglit tests, one of them being:
./bin/depthstencil-render-miplevels 146 d=z32f_s8
Jason found this to make a GPU hang go away
This is much nicer.
Reviewed-by: Timothy Arceri
On 25/10/18 8:16 pm, Kenneth Graunke wrote:
In the non-SSO case, where multiple shader stages are linked together,
we were recording garbage pipe_stream_output_info structures for all
but the last enabled geometry-processing stage.
On 09/27/2018 10:01 PM, Timothy Arceri wrote:
> On 28/9/18 2:53 am, Tom Stellard wrote:
>> On 09/24/2018 11:51 PM, Samuel Pitoiset wrote:
>>>
>>>
>>> On 9/25/18 6:46 AM, Timothy Arceri wrote:
On 25/9/18 10:35 am, Marek Olšák wrote:
> Do you know what's broken in LLVM? Or is it a problem
Ian Romanick writes:
> On 10/25/2018 05:13 AM, Eric Engestrom wrote:
>> On Thursday, 2018-10-25 17:54:16 +1100, Timothy Arceri wrote:
>>> On 25/10/18 7:42 am, Ian Romanick wrote:
On 10/23/2018 04:15 AM, Eric Engestrom wrote:
> Suggested-by: Timothy Arceri
>>>
>>> Um no :P I suggested
From: Marek Olšák
Only radeonsi uses them, so adjust them to match its needs.
---
src/gallium/auxiliary/renderonly/renderonly.c | 2 +-
src/gallium/auxiliary/vl/vl_winsys_dri.c | 2 +-
src/gallium/auxiliary/vl/vl_winsys_dri3.c | 4 ++--
Reviewed-by: Lionel Landwerlin
On 25/10/2018 18:14, Anuj Phogat wrote:
The default setting of this bit is not the desirable behavior.
WA_1406697149
Signed-off-by: Anuj Phogat
---
src/intel/genxml/gen11.xml | 1 +
src/intel/vulkan/genX_cmd_buffer.c | 7 +++
2 files changed, 8
Reviewed-by: Lionel Landwerlin
On 25/10/2018 18:13, Anuj Phogat wrote:
The default setting of this bit is not the desirable behavior.
WA_1406697149
Signed-off-by: Anuj Phogat
---
src/mesa/drivers/dri/i965/brw_defines.h | 1 +
src/mesa/drivers/dri/i965/brw_state_upload.c | 7 +++
This is a little cleaner than just looking at sys.argv, but it's also
going to allow us to handle the differences in the way meson and
autotools handle translations more cleanly.
---
src/util/xmlpool/gen_xmlpool.py | 20 +---
1 file changed, 9 insertions(+), 11 deletions(-)
diff
I'm going to try to review this more thoroughly for content later. For
now, I'm going to send a bunch of notes about formatting / Mesa coding
conventions.
On 10/08/2018 04:04 AM, Daniel Schürmann wrote:
> ---
> src/compiler/nir/meson.build | 1 +
> src/compiler/nir/nir.h
This simplifies our deref handling by emitting the actual NIR deref
instructions on-the-fly instead of of building up a deref chain and then
emitting them at the last moment. In order for this to work with the
parts of the compiler that assume they can chase deref chains, we have
to run
On 10/25/2018 05:13 AM, Eric Engestrom wrote:
> On Thursday, 2018-10-25 17:54:16 +1100, Timothy Arceri wrote:
>> On 25/10/18 7:42 am, Ian Romanick wrote:
>>> On 10/23/2018 04:15 AM, Eric Engestrom wrote:
Suggested-by: Timothy Arceri
>>
>> Um no :P I suggested you fix the formatting in your
This patch is
Reviewed-by: Ian Romanick
On 10/23/2018 03:56 PM, Dylan Baker wrote:
> CC: Ian Romanick
> CC: Marek Olšák
> Fixes: b3c17330e631695b5e5dc209ba9ea1a528618c97
>("mesa: expose AMD_gpu_shader_int64")
> ---
> src/mapi/glapi/gen/Makefile.am | 1 +
>
This patch is
Reviewed-by: Ian Romanick
On 10/23/2018 03:56 PM, Dylan Baker wrote:
> Which is also required to put it in the tarball, a requirement for
> building with meson from the tarball.
>
> CC: Ian Romanick
> CC: Marek Olšák
> Fixes: 263c962cfdee6b43578ee5f28601309ea77d1434
>
On October 25, 2018 5:12:30 PM UTC, Bas Nieuwenhuizen
wrote:
> How did you notice that?
Just saw the commit and knew the behaviour of the macro because
I was the one who changed it a couple months ago ^^
> Anyway, can confirm,
>
> Reviewed-by: Bas Nieuwenhuizen
Cheers; I'll probably push
https://bugs.freedesktop.org/show_bug.cgi?id=108508
Ahmed Elsayed changed:
What|Removed |Added
Summary|Graphic glitches with |Graphic glitches with
I would put the vk_errorf within the anv_device_set_lost and make it
return VkResult so that you can cull a bunch of lines, but that can be
done in another commit.
Reviewed-by: Lionel Landwerlin
On 25/10/2018 17:46, Jason Ekstrand wrote:
---
src/intel/vulkan/anv_device.c | 28
The default setting of this bit is not the desirable behavior.
WA_1406697149
Signed-off-by: Anuj Phogat
---
src/intel/genxml/gen11.xml | 1 +
src/intel/vulkan/genX_cmd_buffer.c | 7 +++
2 files changed, 8 insertions(+)
diff --git a/src/intel/genxml/gen11.xml
The default setting of this bit is not the desirable behavior.
WA_1406697149
Signed-off-by: Anuj Phogat
---
src/mesa/drivers/dri/i965/brw_defines.h | 1 +
src/mesa/drivers/dri/i965/brw_state_upload.c | 7 +++
2 files changed, 8 insertions(+)
diff --git
Reviewed-by: Lionel Landwerlin
On 25/10/2018 17:46, Jason Ekstrand wrote:
---
src/intel/vulkan/anv_device.c | 11 +++
src/intel/vulkan/anv_util.c | 4
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/src/intel/vulkan/anv_device.c
Reviewed-by: Lionel Landwerlin
On 25/10/2018 17:46, Jason Ekstrand wrote:
---
src/intel/vulkan/anv_device.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index c009176dcc6..8e4436ec960 100644
---
On Wed, Oct 17, 2018 at 1:29 PM Alex Smith wrote:
>
> This patch never landed in git, is that intentional?
It turned out the CTS version we did our conformance submission in was
rejected for some reason in the CTS test for this ext so had to make
some adjustments. It is upstream now.
>
> On Mon,
https://bugs.freedesktop.org/show_bug.cgi?id=108508
Ahmed Elsayed changed:
What|Removed |Added
Summary|Graphic glitches with |Graphic glitches with
https://bugs.freedesktop.org/show_bug.cgi?id=108508
Ahmed Elsayed changed:
What|Removed |Added
Summary|Graphic glitches with |Graphic glitches with
How did you notice that? Anyway, can confirm,
Reviewed-by: Bas Nieuwenhuizen
On Thu, Oct 25, 2018 at 6:40 PM Eric Engestrom wrote:
>
> MESA_GIT_SHA1 resolves to either an empty "" string if not build from git,
> or " (git-DEADBEEF)" if it is. No need to wrap it in additional "()".
>
> Fixes:
Dear all,
I'm currently working on getting EXT_texture_sRGB_R8 into mesa. I'm at
the point where it is working for r600, i.e.
dEQP-GLES31.functional.texture.filtering.cube_array.formats.sr8*
all pass, so I assume that the mesa/core, Gallium, and r600 patches are
more or less correct. However,
Maybe we should just roll the depthTestEnable check in with the ds_aspects
& VK_IMAGE_ASPECT_DEPTH_BIT check right below it. In either case,
Reviewed-by: Jason Ekstrand
On Thu, Oct 25, 2018 at 5:25 AM Alex Smith
wrote:
> When depth testing is disabled, we shouldn't pay attention to the
>
---
src/intel/vulkan/anv_device.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index c009176dcc6..8e4436ec960 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -3096,7 +3096,8 @@
On 10/25/18 12:55 AM, Samuel Iglesias Gonsálvez wrote:
> On Thursday, 25 October 2018 1:25:53 (CEST) Sagar Ghuge wrote:
>> While disassembling send(c) instruction print message descriptor as
>> immediate source operand along with message descriptor. This allows
>> assembler to read immediate
---
src/intel/vulkan/anv_device.c | 28 +---
src/intel/vulkan/anv_private.h | 11 ++-
src/intel/vulkan/anv_queue.c | 14 +++---
src/intel/vulkan/genX_query.c | 4 ++--
4 files changed, 36 insertions(+), 21 deletions(-)
diff --git
---
src/intel/vulkan/anv_device.c | 11 +++
src/intel/vulkan/anv_util.c | 4
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 79d3f052113..d62bdde078c 100644
--- a/src/intel/vulkan/anv_device.c
+++
Thank you for reviewing the patch.
On 10/25/18 12:40 AM, Samuel Iglesias Gonsálvez wrote:
> Reviewed-by: Samuel Iglesias Gonsálvez
>
> Do you need somebody to push it to the repo? I can do it tomorrow.
>
Yes, I don't have commit access. I really appreciate it.
> Sam
>
> On Wednesday, 24
On Tuesday, 2018-10-02 13:44:07 -0700, Dylan Baker wrote:
> Quoting Eric Engestrom (2018-10-02 07:09:03)
> > Cc: mesa-sta...@lists.freedesktop.org
> > Signed-off-by: Eric Engestrom
> > ---
> > src/mesa/meson.build | 3 +--
> > src/meson.build | 13 -
> > 2 files changed, 9
MESA_GIT_SHA1 resolves to either an empty "" string if not build from git,
or " (git-DEADBEEF)" if it is. No need to wrap it in additional "()".
Fixes: 9d40ec2cf6ec6d3d9d78 "radv: Add support for VK_KHR_driver_properties."
Signed-off-by: Eric Engestrom
---
src/amd/vulkan/radv_device.c | 2 +-
1
This allows vc4 to initialize on the Adafruit PiTFT 3.5" touchscreen with
the new tinydrm driver I just submitted. If this series extending the
pl111/kmsro driver is accepted, then I'll extend kmsro with the other
tinydrm drivers as well.
---
src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c |
The vc4 driver can do prime sharing to many different KMS-only devices,
such as the various tinydrm drivers for SPI-attached displays. Rename the
driver away from "pl111" to represent what it will actually support:
various sorts of KMS displays with the renderonly layer used to attach a
GPU.
---
On Thu, 2018-10-25 at 14:48 +0200, Olivier Fourdan wrote:
> After commit a9fb331ea ("wayland/egl: update surface size on window
> resize"), the surface size is updated as soon as the resize is done, and
> `update_buffers()` would resize only if the surface size differs from
> the attached size.
>
Reviewed-by: Jason Ekstrand
On Thu, Oct 25, 2018 at 5:17 AM Eric Engestrom
wrote:
> Signed-off-by: Eric Engestrom
> ---
> src/amd/vulkan/radv_wsi_x11.c | 2 --
> src/intel/vulkan/anv_wsi_x11.c | 2 --
> src/vulkan/wsi/wsi_common_x11.c | 5 -
> src/vulkan/wsi/wsi_common_x11.h | 1 -
>
Please confirm that this passes the piglit tests you sent to the list
when run with ES2 forced, i.e. not ES3.
(MESA_GLES_VERSION_OVERRIDE=2.0 iirc.) I'm concerned that the extra
logic was only added to _mesa_es3_error_check_bla and not the es2
paths.
On Thu, Oct 25, 2018 at 6:59 AM Erik Faye-Lund
https://bugs.freedesktop.org/show_bug.cgi?id=108524
Bas Nieuwenhuizen changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
On Thu, Oct 25, 2018 at 5:22 AM Kenneth Graunke wrote:
>
> ARB programs won't have one of these, and we don't use it anyway.
Reviewed-by: Rob Clark
> ---
> src/mesa/state_tracker/st_glsl_to_nir.cpp | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git
On Thu, Oct 25, 2018 at 5:22 AM Kenneth Graunke wrote:
>
> This will let me use it in the ARB program code as well.
lgtm,
Reviewed-by: Rob Clark
> ---
> src/mesa/state_tracker/st_glsl_to_nir.cpp | 66 +--
> src/mesa/state_tracker/st_nir.h | 4 ++
> 2 files
Reviewed-by: Bas Nieuwenhuizen
for the series.
On Wed, Oct 24, 2018 at 8:48 AM Samuel Pitoiset
wrote:
>
> This should address the remaining failures in Batman Arkhman City.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107765
> Signed-off-by: Samuel Pitoiset
> ---
>
After commit a9fb331ea ("wayland/egl: update surface size on window
resize"), the surface size is updated as soon as the resize is done, and
`update_buffers()` would resize only if the surface size differs from
the attached size.
However, in the case of swrast, there is no resize callback and the
Oops got the mesa-dev address wrong...
On Thu, Oct 25, 2018 at 2:40 PM Olivier Fourdan wrote:
>
> After commit a9fb331ea ("wayland/egl: update surface size on window
> resize"), the surface size is updated as soon as the resize is done, and
> `update_buffers()` would resize only if the surface
On Thursday, 2018-10-25 17:54:16 +1100, Timothy Arceri wrote:
> On 25/10/18 7:42 am, Ian Romanick wrote:
> > On 10/23/2018 04:15 AM, Eric Engestrom wrote:
> > > Suggested-by: Timothy Arceri
>
> Um no :P I suggested you fix the formatting in your patch to match the Mesa
> style.
Right, sorry,
On Wednesday, 2018-10-24 11:26:56 -0700, Dylan Baker wrote:
> Quoting Emil Velikov (2018-10-24 10:57:00)
> > Seemingly that at some point clang started accepting _any_ flags,
> > whereas previously it would error out.
> >
> > These days, you can give it -Whamsandwich and it will succeed, while
>
On 21/10/18 20:54, Liviu Prodea wrote:
1. When using Meson 0.48.x both -Dc_args -Dcpp_args and -Db_vscrt
methods of selecting the CRT are ineffective on changing the CRT from MD
to MT resulting in build failure if LLVM is built with MT CRT. This
issue persists from last time I tested this WIP
From: Marek Olšák
The spec was modified to support GLES.
Tested-by: Erik Faye-Lund
---
This replaces this patch:
https://patchwork.freedesktop.org/patch/257423/
docs/relnotes/18.3.0.html| 1 +
src/mesa/main/extensions_table.h | 2 +-
src/mesa/main/glformats.c| 11
When depth testing is disabled, we shouldn't pay attention to the
specified depthCompareOp, and just treat it as always passing. Before,
if the depth test is disabled, but depthCompareOp is VK_COMPARE_OP_NEVER
(e.g. from the app having zero-initialized the structure), then
sanitize_stencil_face()
On Thu, Oct 25, 2018 at 12:05 PM Olivier Fourdan wrote:
>
> Hi,
>
> On Tue, Aug 7, 2018 at 5:50 PM Juan A. Suarez Romero
> wrote:
> >
> > When creating a windows surface with eglCreateWindowSurface(), the
> > width and height returned by eglQuerySurface(EGL_{WIDTH,HEIGHT}) is
> > invalid until
Signed-off-by: Eric Engestrom
---
src/amd/vulkan/radv_wsi_x11.c | 2 --
src/intel/vulkan/anv_wsi_x11.c | 2 --
src/vulkan/wsi/wsi_common_x11.c | 5 -
src/vulkan/wsi/wsi_common_x11.h | 1 -
4 files changed, 10 deletions(-)
diff --git a/src/amd/vulkan/radv_wsi_x11.c
Hi,
On Tue, Aug 7, 2018 at 5:50 PM Juan A. Suarez Romero
wrote:
>
> When creating a windows surface with eglCreateWindowSurface(), the
> width and height returned by eglQuerySurface(EGL_{WIDTH,HEIGHT}) is
> invalid until buffers are updated (like calling glClear()).
>
> But according to EGL 1.5
On Tuesday, 2018-10-23 10:49:26 -0400, mesa-dev-boun...@lists.freedesktop.org
wrote:
> In the pursuit of lowering driver overhead, it became clear that some
> amount of redesign of how libdrm_freedreno constructs the submit ioctl
> would be needed. In particular, as the gallium driver is
ARB programs won't have one of these, and we don't use it anyway.
---
src/mesa/state_tracker/st_glsl_to_nir.cpp | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp
b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index
This will let me use it in the ARB program code as well.
---
src/mesa/state_tracker/st_glsl_to_nir.cpp | 66 +--
src/mesa/state_tracker/st_nir.h | 4 ++
2 files changed, 41 insertions(+), 29 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp
In the non-SSO case, where multiple shader stages are linked together,
we were recording garbage pipe_stream_output_info structures for all
but the last enabled geometry-processing stage.
Specifically, we were using the gl_transform_feedback_info from
shader_program->last_vert_prog (the stage
To avoid wrong result when identifying the type of register.
Ie. If the reg is an array, it might be identified as address or
predicate register.
---
src/gallium/drivers/freedreno/ir3/ir3.h | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git
On Thursday, 25 October 2018 1:25:53 (CEST) Sagar Ghuge wrote:
> While disassembling send(c) instruction print message descriptor as
> immediate source operand along with message descriptor. This allows
> assembler to read immediate source operand and set bits accordingly.
>
> Signed-off-by:
Reviewed-by: Samuel Iglesias Gonsálvez
Do you need somebody to push it to the repo? I can do it tomorrow.
Sam
On Wednesday, 24 October 2018 22:27:27 (CEST) Sagar Ghuge wrote:
> While encoding the immediate floating point values in instruction we use
> values upto precision 9, but while
On Tue, 2018-10-23 at 09:19 -0700, Dylan Baker wrote:
> Hi List,
>
> It's that time again, release time! We're a little late getting started, but
> here's the plan:
>
> Branch point/RC1: 10/31
> RC2: 11/7
> RC3: 11/14
> RC4/final release: 11/21
>
> With point releases following the normal two
https://bugs.freedesktop.org/show_bug.cgi?id=107455
Juan A. Suarez changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
On Wed, 2018-10-24 at 18:32 +0100, Emil Velikov wrote:
> From: Dylan Baker
>
> Emil will be helping out with 18.3, while Juan finalises 18.2
>
> v2: add Emil for 18.3, fix typos
Reviewed-by: Juan A. Suarez
J.A.
>
> CC: Emil Velikov
> CC: Juan A. Romero Suarez
> Cc: Dylan Baker
On 10/24/18 11:05 PM, Rob Clark wrote:
On Tue, Oct 23, 2018 at 9:57 PM Hyunjun Ko wrote:
Since ir3_register struct has union, it could return true even
if it's an array register accidentally when checking whether it
is address/predicate register.
Fixes:
On 25/10/18 7:42 am, Ian Romanick wrote:
On 10/23/2018 04:15 AM, Eric Engestrom wrote:
Suggested-by: Timothy Arceri
Um no :P I suggested you fix the formatting in your patch to match the
Mesa style.
Signed-off-by: Eric Engestrom
---
Timothy, I opted to remove them all instead of adding
On 10/24/18 11:05 PM, Rob Clark wrote:
On Tue, Oct 23, 2018 at 9:57 PM Hyunjun Ko wrote:
Since ir3_register struct has union, it could return true even
if it's an array register accidentally when checking whether it
is address/predicate register.
Fixes:
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