Wouldn't it be much better if we do all the layers in a single draw instead?
On Tue, Jul 2, 2019 at 2:47 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_decompress.c | 137 ++
> 1 file changed, 74 insertions(+), 63 deletions(
r-b for the series
On Mon, Jul 1, 2019 at 4:27 PM Samuel Pitoiset
wrote:
>
> It's currently only enabled if dcc_slice_size is equal to
> dcc_slice_fast_clear_size because the driver assumes that
> portions of multiple layers are contiguous but it's not
> always true.
>
> Still not supported on GF
On Mon, Jul 1, 2019 at 2:15 PM Samuel Pitoiset
wrote:
>
>
> On 7/1/19 2:13 PM, Bas Nieuwenhuizen wrote:
> > On Thu, Jun 27, 2019 at 3:02 PM Samuel Pitoiset
> > wrote:
> >> This will help for clearing DCC arrays because we need to know
> >> the subresour
On Thu, Jun 27, 2019 at 3:02 PM Samuel Pitoiset
wrote:
>
> This will help for clearing DCC arrays because we need to know
> the subresource range.
How will it help? I don't think we use it in the next commit in the series?
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_clea
r-b
On Thu, Jun 27, 2019 at 3:02 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_fast_clear.c | 8 +++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/src/amd/vulkan/radv_meta_fast_clear.c
> b/src/amd/vulkan/radv_meta_fast_cl
r-b
On Thu, Jun 27, 2019 at 3:02 PM Samuel Pitoiset
wrote:
>
> Found while working on DCC for arrays.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 22 ++
> src/amd/vulkan/radv_meta.h | 3 ---
> src/amd/vulkan/radv_meta_clear.c | 10 +++
r-b for the series
On Wed, Jun 26, 2019 at 3:07 PM Samuel Pitoiset
wrote:
>
> Just a cleanup, it shouldn't change anything.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_nir_to_llvm.c | 22
> src/amd/vulkan/radv_shader.c | 34 ++
On Fri, Jun 28, 2019 at 9:19 AM Samuel Pitoiset
wrote:
>
> Addrlib doesn't provide this info. Because DCC is linear, at least
> on GFX8, it's easy to compute the size one slice.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_surface.c | 6 ++
> src/amd/common/ac_surface.h | 1 +
R-b
On Wed, Jun 26, 2019, 9:20 AM Samuel Pitoiset
wrote:
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 34 +++-
> 1 file changed, 25 insertions(+), 9 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_cmd_buffer.c
> b/src/amd/vulkan/radv
R-b
On Wed, Jun 26, 2019, 4:32 PM Samuel Pitoiset
wrote:
> The only exception is the GS copy shader which emits them
> unconditionally.
>
> Totals from affected shaders:
> SGPRS: 71320 -> 71008 (-0.44 %)
> VGPRS: 54372 -> 54240 (-0.24 %)
> Code Size: 2952628 -> 2941368 (-0.38 %) bytes
> Max Wave
R-b
On Wed, Jun 26, 2019, 4:20 PM Samuel Pitoiset
wrote:
> This doesn't fix anything known, but it's likely going to
> break if layerCount is ~0U.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_fmask_expand.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff
r-b
On Tue, Jun 25, 2019 at 5:54 PM Samuel Pitoiset
wrote:
>
> SMEM and VMEM caches are L0 on gfx10. Ported from RadeonSI.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c| 16 -
> src/amd/vulkan/radv_device.c| 12 +++
> src/amd/vulkan/
r-b
On Tue, Jun 25, 2019 at 4:13 PM Samuel Pitoiset
wrote:
>
> Ported from RadeonSI, will be emitted for GFX10 too.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 5 -
> src/amd/vulkan/radv_device.c | 2 ++
> src/amd/vulkan/radv_private.h| 3 +++
> 3 f
n 21, 2019 at 7:03 PM Bas Nieuwenhuizen
> wrote:
>>
>> Doesn't this cause assertions in si_shader_ps() for monolithic
>> shaders? Some of these assertions check that at least one bit in a
>> group is set and I think we end up with input_ena = 0 for monolithic
>&g
r-b for this patch only.
On Mon, Jun 24, 2019 at 5:00 PM Samuel Pitoiset
wrote:
>
> This fixes a rendering issue with RoTR/DXVK.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 32 +++-
> 1 file changed, 15 insertions(+), 17 deletions(-)
why?
We should be regulating enabling it with S_028C70_DCC_ENABLE.
On Mon, Jun 24, 2019 at 5:00 PM Samuel Pitoiset
wrote:
>
> CB_DCC_BASE should be 0 if no DCC.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_device.c | 15 ---
> 1 file changed, 8 insertions(+), 7 de
r-b
On Mon, Jun 24, 2019 at 12:14 PM Samuel Pitoiset
wrote:
>
> This reduces the size of fill operations needed to clear FMASK
> for layered color textures.
>
> GFX9 unsupported for now.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_surface.c | 1 +
> src/amd/common/
r-b
On Mon, Jun 24, 2019 at 6:37 PM Samuel Pitoiset
wrote:
>
> This reduces the size of fill operations needed to clear CMASK
> for layered color textures.
>
> GFX9 unsupported for now.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_surface.c | 3 ++-
> src/amd/common/ac_sur
R-b
On Fri, Jun 21, 2019, 4:14 PM Samuel Pitoiset
wrote:
> This simple extension might be useful for debugging purposes.
> GAPID has support for it.
>
> Signed-off-by: Samuel Pitoiset
> ---
>
> A simple crucible test:
> https://gitlab.freedesktop.org/mesa/crucible/merge_requests/47
>
> src/amd
Doesn't this cause assertions in si_shader_ps() for monolithic
shaders? Some of these assertions check that at least one bit in a
group is set and I think we end up with input_ena = 0 for monolithic
shaders now?
On Thu, Jun 20, 2019 at 6:20 AM Marek Olšák wrote:
>
> From: Marek Olšák
>
> The dri
Marek, I thought you also r-b'd this?
Either way r-b.
On Thu, Jun 20, 2019 at 6:20 AM Marek Olšák wrote:
>
> From: Nicolai Hähnle
>
> The initial prototype used a processor-specific symbol type, but
> feedback suggests that an approach using processor-specific section
> name that encodes the al
We only need this if the HTILE is not tc-compat?
Otherwise the read side is independent of compute/fragment shader.
On Wed, Jun 12, 2019 at 11:44 AM Samuel Pitoiset
wrote:
>
> It's required to decompress HTILE before resolving with the
> compute path.
>
> v2: - do proper layout transitions
>
r-b
On Wed, Jun 12, 2019 at 11:44 AM Samuel Pitoiset
wrote:
>
> The driver might need to clear one aspect of the depth/stencil
> resolve attachment before performing the resolve itself.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_clear.c | 73
r-b
On Thu, Jun 20, 2019 at 6:20 AM Marek Olšák wrote:
>
> From: Marek Olšák
>
> ---
> .../drivers/radeonsi/si_state_binning.c| 18 --
> 1 file changed, 4 insertions(+), 14 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_state_binning.c
> b/src/gallium/dri
r-b
On Thu, Jun 20, 2019 at 6:19 AM Marek Olšák wrote:
>
> From: Marek Olšák
>
> otherwise the behavior is undefined
> ---
> src/amd/common/ac_llvm_build.c | 8
> src/amd/common/ac_llvm_build.h | 3 +++
> src/gallium/drivers/radeonsi/si_c
R-b
On Wed, Jun 12, 2019, 11:44 AM Samuel Pitoiset
wrote:
> Only supported with vkCreateRenderPass2().
>
> v2: - do not set has_resolve (now has_color_resolve) for ds resolves
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_pass.c| 27 ++-
> src/amd/v
Please fix the title to use the correct variable name. Otherwise r-b
On Wed, Jun 12, 2019, 11:44 AM Samuel Pitoiset
wrote:
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_resolve.c | 2 +-
> src/amd/vulkan/radv_pass.c | 4 ++--
> src/amd/vulkan/radv_private.h | 4
R-b for the series
On Thu, Jun 20, 2019, 9:14 AM Samuel Pitoiset
wrote:
> v2: use a different path for GFX9
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 49 +++-
> 1 file changed, 48 insertions(+), 1 deletion(-)
>
> diff --git a/src/
R-b
On Tue, Jun 18, 2019, 6:55 PM Samuel Pitoiset
wrote:
> This fixes new CTS dEQP-VK.pipeline.depth_range_unrestricted.*.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_pipeline.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_pi
R-b
On Tue, Jun 18, 2019, 4:12 PM Samuel Pitoiset
wrote:
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 40 +++-
> 1 file changed, 39 insertions(+), 1 deletion(-)
>
> diff --git a/src/amd/vulkan/radv_cmd_buffer.c
> b/src/amd/vulkan/radv_
Actually, retract r-b, please fix the legacy accesses on gfx9+ too.
On Wed, Jun 19, 2019, 11:02 AM Bas Nieuwenhuizen
wrote:
> R-b
>
> On Tue, Jun 18, 2019, 4:12 PM Samuel Pitoiset
> wrote:
>
>> Signed-off-by: Samuel Pitoiset
>> ---
>> src/
Oops. No, r-b
On Wed, Jun 19, 2019, 9:48 AM Samuel Pitoiset
wrote:
>
> On 6/17/19 12:24 PM, Bas Nieuwenhuizen wrote:
>
>
>
>
> On Thu, Jun 13, 2019, 3:42 PM Samuel Pitoiset
> wrote:
>
>> This allows us to disable the FMASK decompress pass when
>> trans
On Tue, Jun 18, 2019 at 4:12 PM Samuel Pitoiset
wrote:
>
> And fallback to slow color clears.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_clear.c | 14 ++
> 1 file changed, 14 insertions(+)
>
> diff --git a/src/amd/vulkan/radv_meta_clear.c
> b/src/amd/vulkan/
r-b
On Tue, Jun 18, 2019 at 4:12 PM Samuel Pitoiset
wrote:
>
> It's tricky on GFX9, so only GFX8 for now.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_image.c | 9 +++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_image.c b/src/am
r-b
On Tue, Jun 18, 2019 at 4:12 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_clear.c | 12 +++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/src/amd/vulkan/radv_meta_clear.c
> b/src/amd/vulkan/radv_meta_clear.c
> i
On Tue, Jun 18, 2019 at 4:12 PM Samuel Pitoiset
wrote:
>
> For clearing only one level.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta.h | 3 +++
> src/amd/vulkan/radv_meta_clear.c | 23 ---
> 2 files changed, 23 insertions(+), 3 deletions(-)
>
> d
r-b
On Tue, Jun 18, 2019 at 4:12 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_fast_clear.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_meta_fast_clear.c
> b/src/amd/vulkan/radv_meta_fast_cle
r-b
Fixes tag?
On Tue, Jun 18, 2019 at 4:07 PM Samuel Pitoiset
wrote:
>
> Found while working on DCC for MSAA.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_fmask_expand.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/amd/vulkan/radv_meta_
Reviewed-by: Bas Nieuwenhuizen
On Tue, Jun 18, 2019 at 11:20 PM Dave Airlie wrote:
>
> From: Dave Airlie
>
> Pointed out by coverity
> ---
> src/gallium/drivers/radeonsi/si_perfcounter.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/s
Reviewed-by: Bas Nieuwenhuizen
On Tue, Jun 18, 2019 at 11:48 AM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_device.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/
Reviewed-by: Bas Nieuwenhuizen
On Tue, Jun 18, 2019 at 11:58 AM Samuel Pitoiset
wrote:
>
> Only skip levels without DCC when it's a DCC decompression.
> Whoops.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_fast_clear.c | 3 ++-
> 1 fil
R-b for the series
On Tue, Jun 18, 2019, 10:27 AM Samuel Pitoiset
wrote:
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_fast_clear.c | 35 +++
> 1 file changed, 20 insertions(+), 15 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_meta_fast_clear.c
>
On Mon, Jun 17, 2019 at 10:06 PM Samuel Pitoiset
wrote:
>
>
> On 6/17/19 10:01 PM, Bas Nieuwenhuizen wrote:
> > On Mon, Jun 17, 2019 at 12:41 PM Samuel Pitoiset
> > wrote:
> >> And some cleanups.
> >>
> >> Signed-off-by: Samuel Pitoiset
>
with that fixed, r-b
On Mon, Jun 17, 2019 at 12:51 PM Samuel Pitoiset
wrote:
>
>
> On 6/17/19 12:50 PM, Bas Nieuwenhuizen wrote:
> > On Mon, Jun 17, 2019 at 12:40 PM Samuel Pitoiset
> > wrote:
> >> Signed-off-by: Samuel Pitoiset
> >> ---
> >> s
r-b
On Mon, Jun 17, 2019 at 12:41 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_fast_clear.c | 106 +-
> 1 file changed, 54 insertions(+), 52 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_meta_fast_clear.c
> b/src/amd/
On Mon, Jun 17, 2019 at 12:41 PM Samuel Pitoiset
wrote:
>
> And some cleanups.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_fast_clear.c | 228 +++---
> 1 file changed, 129 insertions(+), 99 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_meta_fast_cl
On Mon, Jun 17, 2019 at 9:19 PM Marek Olšák wrote:
>
> On Sat, Jun 15, 2019 at 5:51 PM Bas Nieuwenhuizen
> wrote:
>>
>> I'm not quite sure why the dimension changes are needed for radeonsi,
>> but for both polarisd and vega the compressed texture CTS tests p
Support got removed in the new addrlib update.
---
src/amd/vulkan/radv_formats.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/amd/vulkan/radv_formats.c b/src/amd/vulkan/radv_formats.c
index e61d793e7f2..e8470a1622e 100644
--- a/src/amd/vulkan/radv_formats.c
+++ b/src/amd/vulkan/radv_
r-b
On Mon, Jun 17, 2019 at 12:41 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_fast_clear.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/src/amd/vulkan/radv_meta_fast_clear.c
> b/src/amd/vulkan/radv_meta_fast_clear.c
> index 8fba2a
r-b
On Mon, Jun 17, 2019 at 12:41 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 41 ++-
> src/amd/vulkan/radv_meta.h| 3 +-
> src/amd/vulkan/radv_meta_clear.c | 8 --
> src/amd/vulkan/r
r-b
On Mon, Jun 17, 2019 at 12:41 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_cmd_buffer.c
> b/src/amd/vulkan/radv_cmd_buffer.c
>
r-b
On Mon, Jun 17, 2019 at 12:41 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 19 ---
> src/amd/vulkan/radv_meta_clear.c | 9 -
> src/amd/vulkan/radv_meta_fast_clear.c | 2 +-
> src/amd/vulkan/radv_p
r-b
On Mon, Jun 17, 2019 at 12:41 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 38 +++-
> src/amd/vulkan/radv_meta_clear.c | 2 +-
> src/amd/vulkan/radv_private.h| 12 +-
> 3 files changed, 39 in
On Mon, Jun 17, 2019 at 12:40 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_image.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
> index 909145e1e75..d3bbc9e67
On Thu, Jun 13, 2019, 3:42 PM Samuel Pitoiset
wrote:
> This allows us to disable the FMASK decompress pass when
> transitioning from CB writes to shader reads.
>
> This will likely be improved and enabled by default in the future.
>
> No CTS regressions on GFX8 but a few number of multisample CTS
R-b
On Thu, Jun 13, 2019, 12:40 PM Samuel Pitoiset
wrote:
> This fixes a segfault when forcing DCC decompressions on compute
> because internal meta objects are not created since the on-demand
> stuff.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_fast_clear.c | 8 +++
Can we fix the title?(inherit)
On Thu, Jun 13, 2019, 1:53 PM Samuel Pitoiset
wrote:
> Otherwise fast color/depth clears can't work because they depend
> on the framebuffer.
>
> This fixes the following CTS (when the small hint is disabled):
> - dEQP-VK.geometry.layered.1d_array.secondary_cmd_buf
R-b for the series
On Thu, Jun 13, 2019, 5:14 PM Samuel Pitoiset
wrote:
> Instead of re-computing in the driver. The 3d and cube flags
> are correctly set, so the same values should returned by
> ac_compute_surface().
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_image.c | 45
I'm not quite sure why the dimension changes are needed for radeonsi,
but for both polarisd and vega the compressed texture CTS tests pass
on RADV.
Acked-by: Bas Nieuwenhuizen
Tested-by: Bas Nieuwenhuizen
On Sat, Jun 15, 2019 at 12:47 AM Marek Olšák wrote:
>
> From:
Reviewed-by: Bas Nieuwenhuizen
On Sat, Jun 15, 2019 at 1:00 AM Marek Olšák wrote:
>
> From: Nicolai Hähnle
>
> This fixes piglit spec@glsl-1.50@gs-max-output.
> ---
> src/gallium/drivers/radeonsi/si_get.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
&g
r-b
On Fri, Jun 14, 2019 at 11:57 AM Samuel Pitoiset
wrote:
>
> LLVM r363339 changed llvm.amdgcn.icmp.i* to llvm.amdgcn.icmp.i64.i*.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/common/ac_llvm_build.c | 7 ---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/src/amd/
Add DB while we are at it?
Otherwise, r-b
On Thu, Jun 13, 2019 at 10:51 AM Samuel Pitoiset
wrote:
>
> We have to emit a CACHE_FLUSH_AND_INV_TS_EVENT to be sure all
> prior GPU work is done.
>
> This fixes the following CTS (when the small hint is disabled):
> dEQP-VK.query_pool.statistics_query.
r-b with the vega m ref changed in the commit message.
On Wed, Jun 12, 2019 at 11:18 AM Samuel Pitoiset
wrote:
>
>
> On 6/12/19 9:58 AM, Michel Dänzer wrote:
> > On 2019-06-11 5:03 p.m., Samuel Pitoiset wrote:
> >> On 6/11/19 4:56 PM, Alex Deucher wrote:
> >>> On Tue, Jun 11, 2019 at 10:43 AM Sam
So can we rephrase this entire thing based on
physical_devices->mem_type_indices, instead of opencoding ordering &
detection?
On Tue, Jun 11, 2019 at 4:43 PM Samuel Pitoiset
wrote:
>
> On VegaM, the visible VRAM size is equal to the VRAM size, which
> means only two heaps are exposed.
>
> This fi
So allowing disabled render backends without pre-setting them in the
reset procedure will break the OCCLUSION_QUERY packet. Luckily we
don't seem to use it for radv (yet?). Maybe find a way to comment that
somewhere?
Otherwise, r-b
On Tue, Jun 11, 2019 at 4:43 PM Samuel Pitoiset
wrote:
>
> The n
r-b
On Mon, Jun 10, 2019 at 5:42 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_resolve_fs.c | 41 +++
> 1 file changed, 29 insertions(+), 12 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_meta_resolve_fs.c
> b/src/amd/v
r-b
On Mon, Jun 10, 2019 at 5:42 PM Samuel Pitoiset
wrote:
>
> When decompressing resolve source images, we should rely on the
> framebuffer layer count instead of resolving all images layers.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_resolve.c | 12 +---
> 1 f
r-b
On Mon, Jun 10, 2019 at 5:42 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_resolve.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/amd/vulkan/radv_meta_resolve.c
> b/src/amd/vulkan/radv_meta_resolve.c
> index 817182e17d9..0a7af
r-b
On Mon, Jun 10, 2019 at 5:42 PM Samuel Pitoiset
wrote:
>
> When resolving inside a subpass, we should rely on the framebuffer
> layer count instead of resolving all images layers. This should
> improve performance of layered resolves a bit.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd
r-b
On Mon, Jun 10, 2019 at 5:42 PM Samuel Pitoiset
wrote:
>
> Use an explicit pipeline barrier for doing layout transitions
> instead of duplicating some code.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_resolve.c | 38 +++---
> 1 file changed, 1
On Sat, Jun 8, 2019 at 3:36 PM Alex Smith wrote:
>
> On Mon, 3 Jun 2019 at 13:27, Koenig, Christian
> wrote:
>>
>> Am 03.06.19 um 14:21 schrieb Alex Smith:
>>
>> On Mon, 3 Jun 2019 at 11:57, Koenig, Christian
>> wrote:
>>>
>>> Am 02.06.19 um 12:32 schrieb Alex Smith:
>>> > Put the uncached GTT
r-b
On Thu, Jun 6, 2019 at 4:27 PM Samuel Pitoiset
wrote:
>
> When alphaToCoverage is enabled, we should always write the alpha
> channel of MRT0 if it's unused. This now matches RadeonSI.
>
> This fixes the new CTS:
> dEQP-VK.pipeline.multisample.alpha_to_coverage_unused_attachment.samples_*.alp
On Thu, Jun 6, 2019, 10:07 AM Samuel Pitoiset
wrote:
>
> On 6/6/19 3:41 AM, Bas Nieuwenhuizen wrote:
> > On Wed, Jun 5, 2019 at 12:04 PM Samuel Pitoiset
> > wrote:
> >>
> >> On 6/5/19 2:51 AM, Bas Nieuwenhuizen wrote:
> >>> On Thu, May
On Wed, Jun 5, 2019 at 12:04 PM Samuel Pitoiset
wrote:
>
>
> On 6/5/19 2:51 AM, Bas Nieuwenhuizen wrote:
> > On Thu, May 30, 2019 at 4:02 PM Samuel Pitoiset
> > wrote:
> >> From the Vulkan spec 1.1.109:
> >>
> >> "Some implementations ma
r-b
On Mon, Jun 3, 2019 at 3:45 PM Bas Nieuwenhuizen
wrote:
>
> While it is not wrong, I don't think this is the right fix, as the
> current_layout is not necessarily accurate.
>
> Will try to get something better.
>
> On Thu, May 30, 2019 at 3:10 PM Samuel Pitoiset
&g
r-b
On Wed, Jun 5, 2019 at 12:02 PM Samuel Pitoiset
wrote:
>
> For some reasons, this actually introduced rendering issues with
> Far Cry 3 (and probably Far Cry 4). I'm reverting it for now
> until I figure out the right fix.
>
> See the following link for reference:
> https://github.com/ValveSo
Most of the series looks reasonable to me besides the few comments added.
That said looking back at the patch you committed I don't think we
revert to the default locations the right way.
We return early from radv_update_multisample_state if the old pipeline
has the same number of samples, which
On Thu, May 30, 2019 at 4:02 PM Samuel Pitoiset
wrote:
>
> From the Vulkan spec 1.1.109:
>
>"Some implementations may need to evaluate depth image values
> while performing image layout transitions. To accommodate this,
> instances of the VkSampleLocationsInfoEXT structure can be
>
On Thu, May 30, 2019 at 4:02 PM Samuel Pitoiset
wrote:
>
> This will be used for the depth decompress pass that might need
> to emit variable sample locations during layout transitions.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta.c | 20
> src/amd/vul
r-b
On Mon, Jun 3, 2019 at 5:49 PM Samuel Pitoiset
wrote:
>
> The driver should only fast depth clears with the graphics path
> when the view covers all image layers, otherwise this might
> corrupt layers when HTILE is enabled.
>
> Cc: 19.0 19.1 mesa-sta...@lists.freedesktop.org
> Signed-off-by:
While it is not wrong, I don't think this is the right fix, as the
current_layout is not necessarily accurate.
Will try to get something better.
On Thu, May 30, 2019 at 3:10 PM Samuel Pitoiset
wrote:
>
> This might fix initial subpass transitions when multiview is used.
> Noticed while implement
r-b
On Fri, May 24, 2019 at 10:06 AM Samuel Pitoiset
wrote:
>
> From the Vulkan spec 1.1.108:
>"vkCmdCopyQueryPoolResults is guaranteed to see the effect of
> previous uses of vkCmdResetQueryPool in the same queue, without any
> additional synchronization."
>
> Signed-off-by: Samuel P
On Sun, Jun 2, 2019 at 12:41 PM James Harvey wrote:
>
> On Sat, Jun 1, 2019 at 10:56 PM Jan Vesely wrote:
> > On Sat, 2019-06-01 at 18:21 -0400, James Harvey wrote:
> > > On Sat, Jun 1, 2019 at 6:19 PM James Harvey
> > > wrote:
> > > > On Tue, Feb 19, 2019 at 7:52 PM james harvey
> > > > wrot
applications pushing out driver internal stuff
(descriptor sets etc.) from "VRAM", posssibly hitting perf elsewhere.
That said,
Reviewed-by: Bas Nieuwenhuizen
> ---
> src/amd/vulkan/radv_device.c | 18 +++---
> 1 file changed, 15 insertions(+), 3 deletions(-)
>
Reviewed-by: Bas Nieuwenhuizen
Thanks!
On Fri, May 31, 2019 at 10:08 PM Marek Olšák wrote:
>
> From: Marek Olšák
>
> ---
> src/amd/common/ac_llvm_util.c| 10 ++
> src/amd/common/ac_llvm_util.h| 1 +
> src/amd/vulkan/radv_nir_
On Fri, May 31, 2019, 12:49 AM Marek Olšák wrote:
>
>
> On Thu, May 30, 2019, 6:44 PM Bas Nieuwenhuizen
> wrote:
>
>>
>>
>> On Thu, May 30, 2019, 11:45 PM Marek Olšák wrote:
>>
>>>
>>>
>>> On Thu, May 30, 2019, 3:54 PM Rhys
he intrinsic is marked as convergent
>>
>> Cc:
>> Signed-off-by: Rhys Perry
>> Reviewed-By: Bas Nieuwenhuizen
>> ---
>> src/amd/common/ac_nir_to_llvm.c | 12
>> 1 file changed, 12 insertions(+)
>>
>> diff --git a/src/amd/common/ac_n
On Thu, May 30, 2019 at 6:50 PM Rhys Perry wrote:
>
> Otherwise LLVM can sink them and their texture coordinate calculations
> into divergent branches.
>
> Cc:
> Signed-off-by: Rhys Perry
> ---
> src/amd/common/ac_nir_to_llvm.c | 29 +
> 1 file changed, 29 insertions
Or even better, cast it to uint32_t explicitly.
On Thu, May 30, 2019 at 8:23 PM Bas Nieuwenhuizen
wrote:
>
> maybe use UINT32_MAX?
>
> otherwise r-b
>
> On Thu, May 30, 2019 at 6:50 PM Rhys Perry wrote:
> >
> > Fixes -Woverflow warnings with GCC 9.1.1
>
maybe use UINT32_MAX?
otherwise r-b
On Thu, May 30, 2019 at 6:50 PM Rhys Perry wrote:
>
> Fixes -Woverflow warnings with GCC 9.1.1
>
> Signed-off-by: Rhys Perry
> ---
> src/amd/vulkan/si_cmd_buffer.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/src/amd/vulk
r-b for both if you fix the DRITY in the title of this one.
On Thu, May 30, 2019 at 12:26 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_meta.c b/src
r-b
On Thu, May 30, 2019 at 10:05 AM Samuel Pitoiset
wrote:
>
> The driver should already support this without any changes.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_device.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/amd/vulkan/radv_device
pression.
>
> Marek
>
> On Tue, May 21, 2019 at 8:17 PM Bas Nieuwenhuizen
> wrote:
>
>> So this does not seem to use the sample locations during layout
>> transitions?
>>
>> AFAIK those are needed for e.g. HTILE decompression as it is based on
>&g
On Mon, May 27, 2019 at 5:38 PM Samuel Pitoiset
wrote:
>
> It's required to decompress HTILE before resolving with the
> compute path.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_resolve.c | 26 ++
> 1 file changed, 26 insertions(+)
>
> diff --git
That seems OK.
On Tue, May 28, 2019 at 8:25 AM Samuel Pitoiset
wrote:
>
>
> On 5/27/19 6:48 PM, Bas Nieuwenhuizen wrote:
> > On Mon, May 27, 2019 at 5:38 PM Samuel Pitoiset
> > wrote:
> >> Only supported with vkCreateRenderPass2().
> >>
> >> Sig
r-b
On Tue, May 28, 2019 at 11:05 AM Samuel Pitoiset
wrote:
>
> Make sure to sync all previous work if the given command buffer
> has pending active queries. Otherwise the GPU might write queries
> data after the reset operation.
>
> This fixes a bunch of new dEQP-VK.query_pool.* CTS failures.
>
Don't you also need to change it in the pipeline selection? (e.g. your
newly added radv_get_resolve_pipeline())
Otherwise r-b for the eries.
On Tue, May 28, 2019 at 11:02 AM Samuel Pitoiset
wrote:
>
> It makes sense to use the image view formats when resolving
> inside subpasses, while we have t
r-b
On Tue, May 28, 2019 at 12:54 PM Samuel Pitoiset
wrote:
>
> If the driver waits for CP DMA to be idle and emit an EOP event
> we need more space.
>
> This fixes a crash with Quake Champions.
>
> Cc:
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 2 +-
> 1 file
r-b for the series
On Mon, May 27, 2019 at 5:39 PM Samuel Pitoiset
wrote:
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_resolve_cs.c | 56 +--
> 1 file changed, 36 insertions(+), 20 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c
Reviewed-by: Bas Nieuwenhuizen
On Mon, May 27, 2019 at 10:10 PM Marek Olšák wrote:
>
> From: Marek Olšák
>
> ---
> src/gallium/drivers/radeonsi/si_fence.c | 8 +---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_
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