Re: [Mesa-dev] [PATCH] mesa/math: Allocate memory for GLmatrix elements and its inverse contiguously

Hi, and thanks for the patch =) Have you done any performance testing on this to verify it gives us a speedup of any kind? I'm asking because it seems like this might be something that a decent compiler should be able to do. Performance related patches, at least in core mesa, usually have some

Re: [Mesa-dev] [Mesa-stable] [PATCH] ac/nir: Make the GFX9 buffer size fix apply to image loads/atomics too.

On Mon, Apr 16, 2018 at 1:17 PM, Juan A. Suarez Romero wrote: > On Mon, 2018-04-16 at 00:09 +0200, Bas Nieuwenhuizen wrote: >> No clue how I missed those ... >> >> Fixes: 4503ff760c "ac/nir: Add workaround for GFX9 buffer views." >> CC: >>

Re: [Mesa-dev] [PATCH 1/2] mesa: GL_EXT_texture_norm16 extension plumbing

On 17.04.2018 02:42, Ilia Mirkin wrote: On Mon, Apr 16, 2018 at 7:36 PM, Tapani Pälli wrote: Hi; On 16.04.2018 18:19, Ilia Mirkin wrote: You never check EXT_texture_norm16 anywhere... is that right? Should probably respect that in the _mesa_is_es3_* helpers. Also

Re: [Mesa-dev] [PATCH 07/10] nir: return early when lowering a return at the end of a function

On Mon, Apr 9, 2018 at 9:34 PM, Timothy Arceri wrote: > Otherwise we create unused conditional return flags and things > get unnecessarily ugly fast when lowering nested functions. > --- > src/compiler/nir/nir_lower_returns.c | 8 > 1 file changed, 8

Re: [Mesa-dev] [PATCH 07/10] nir: return early when lowering a return at the end of a function

Reviewed-by: Jason Ekstrand On Mon, Apr 9, 2018 at 9:34 PM, Timothy Arceri wrote: > Otherwise we create unused conditional return flags and things > get unnecessarily ugly fast when lowering nested functions. > --- >

Re: [Mesa-dev] [PATCH] fix gcc 8 parenthesis warning

Pushed. Thanks! On 23/03/18 21:01, Marc Dietrich wrote: fixes warnings like this: [184/1137] Compiling C++ object 'src/compiler/glsl/glsl@sta/lower_jumps.cpp.o'. In file included from ../src/mesa/main/mtypes.h:48, from ../src/compiler/glsl_types.h:149, from

Re: [Mesa-dev] [PATCH 1/9] radeonsi: add struct si_compiler containing LLVMTargetMachineRef

Series: Reviewed-by: Timothy Arceri ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 7/9] radeonsi: avoid a crash in gallivm_dispose_target_library_info

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 09b9f588a6f..490a090da87 100644 ---

[Mesa-dev] [PATCH 8/9] Revert "radeonsi: fix potential use-after-free of debug callbacks"

From: Marek Olšák This reverts commit b650fc09c3a35ca624aad5fe4b5c34867708f116. There is a 100%-reproducible deadlock if I increase the number of compiler queues. Also: Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105379 Cc: 18.0

[Mesa-dev] [PATCH 2/9] radeonsi: add triple into si_compiler

From: Marek Olšák --- src/amd/common/ac_llvm_util.c | 6 +- src/amd/common/ac_llvm_util.h | 4 +++- src/amd/vulkan/radv_shader.c| 2 +- src/gallium/drivers/radeonsi/si_pipe.c | 3 ++-

[Mesa-dev] [PATCH 9/9] radeonsi: increase the number of compiler threads depending on the CPU

From: Marek Olšák The compiler queue was limited to 3 threads, so shader-db running on a 16-thread CPU would have a bottleneck on the 3-thread queue. --- src/gallium/drivers/radeonsi/si_pipe.c | 39 +- src/gallium/drivers/radeonsi/si_pipe.h | 6 ++--

[Mesa-dev] [PATCH 5/9] radeonsi: move passmgr into si_compiler

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.c| 30 src/gallium/drivers/radeonsi/si_pipe.h| 7 src/gallium/drivers/radeonsi/si_shader.h | 1 + .../drivers/radeonsi/si_shader_tgsi_setup.c | 34 +--

[Mesa-dev] [PATCH 6/9] radeonsi: move data_layout into si_compiler

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.c | 9 + src/gallium/drivers/radeonsi/si_shader.h| 1 + src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 7 +-- 3 files changed, 11 insertions(+), 6 deletions(-) diff --git

[Mesa-dev] [PATCH 1/9] radeonsi: add struct si_compiler containing LLVMTargetMachineRef

From: Marek Olšák It will contain more variables. --- src/gallium/drivers/radeonsi/si_compute.c | 8 +-- src/gallium/drivers/radeonsi/si_pipe.c| 52 --- src/gallium/drivers/radeonsi/si_pipe.h| 6 +- src/gallium/drivers/radeonsi/si_shader.c

[Mesa-dev] [PATCH 4/9] radeonsi: move target_library_info into si_compiler

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.c | 10 ++ src/gallium/drivers/radeonsi/si_shader.h| 1 + src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 7 ++- 3 files changed, 13 insertions(+), 5 deletions(-) diff

[Mesa-dev] [PATCH 0/9] RadeonSI LLVM crash workaround for Ubuntu 18.04

Hi, This cleanup is motivated by a Mesa/LLVM crash on Ubuntu 18.04. It happens inside gallivm_dispose_target_library_info and only LLVM 5.0 and 6.0 seem to be affected. The workaround is to move target_library_info into the context (1 instance) and the screen (1 instance per compiler thread) to

[Mesa-dev] [PATCH 3/9] radeonsi: use si_compiler::triple in si_llvm_optimize_module

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c index

Re: [Mesa-dev] [PATCH] clover: Fix host access validation for sub-buffer creation

Aaron Watry writes: > On Mon, Apr 16, 2018, 5:24 PM Francisco Jerez wrote: > >> Aaron Watry writes: >> >> > From CL 1.2 Section 5.2.1: >> > CL_INVALID_VALUE if buffer was created with CL_MEM_HOST_WRITE_ONLY >> and >> > flags

[Mesa-dev] [PATCH 3/9] radeonsi: don't use an indirect table for state atoms

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_blit.c| 12 +-- src/gallium/drivers/radeonsi/si_clear.c | 14 +-- src/gallium/drivers/radeonsi/si_compute.c | 8 +- src/gallium/drivers/radeonsi/si_cp_dma.c | 2 +-

[Mesa-dev] [PATCH 4/9] radeonsi: remove si_atom::id

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.h | 21 ++-- src/gallium/drivers/radeonsi/si_state.c | 14 - src/gallium/drivers/radeonsi/si_state.h | 6 +++--- src/gallium/drivers/radeonsi/si_state_draw.c | 2 +- 4

[Mesa-dev] [PATCH 9/9] radeonsi: rename r600_texture::resource to buffer

From: Marek Olšák r600_resource could be renamed to si_buffer. --- src/gallium/drivers/radeon/radeon_vcn_dec.c | 2 +- src/gallium/drivers/radeonsi/cik_sdma.c | 22 +-- src/gallium/drivers/radeonsi/si_blit.c| 50 +++---

[Mesa-dev] [PATCH 8/9] radeonsi: use r600_resource() typecast helper

From: Marek Olšák --- src/gallium/drivers/radeon/radeon_vcn_dec.c | 4 ++-- src/gallium/drivers/radeon/radeon_video.c | 5 ++-- src/gallium/drivers/radeonsi/si_buffer.c | 20 ++-- src/gallium/drivers/radeonsi/si_clear.c | 2 +-

[Mesa-dev] [PATCH 7/9] radeonsi: remove unused atom parameter from si_atom::emit

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_compute.c | 3 +-- src/gallium/drivers/radeonsi/si_descriptors.c | 3 +-- src/gallium/drivers/radeonsi/si_query.c | 3 +-- src/gallium/drivers/radeonsi/si_state.c | 21 +--

[Mesa-dev] [PATCH 7/7] radeonsi/gfx9: workaround for INTERP with indirect indexing

From: Marek Olšák and clean up the conditions. We might just simplify this because the only stage that can return 0 or 1 is VS. --- src/gallium/drivers/radeonsi/si_get.c | 19 +-- 1 file changed, 13 insertions(+), 6 deletions(-) diff --git

[Mesa-dev] [PATCH 6/7] radeonsi: rewrite DCC format compatibility checking code

From: Marek Olšák It might be better to use a slow compressed clear when clearing to 1. --- src/gallium/drivers/radeonsi/si_texture.c | 98 ++- 1 file changed, 42 insertions(+), 56 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_texture.c

[Mesa-dev] [PATCH 2/9] radeonsi: rename r600_atom -> si_atom

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_descriptors.c | 2 +- src/gallium/drivers/radeonsi/si_pipe.h| 40 ++--- src/gallium/drivers/radeonsi/si_query.c | 4 +- src/gallium/drivers/radeonsi/si_state.c | 30 +-

[Mesa-dev] [PATCH 5/9] radeonsi: remove function si_init_atom

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_descriptors.c | 3 +- src/gallium/drivers/radeonsi/si_state.c | 29 +++ src/gallium/drivers/radeonsi/si_state.h | 4 --- .../drivers/radeonsi/si_state_shaders.c | 5 ++-- 4 files

[Mesa-dev] [PATCH 1/9] radeonsi: remove r600_pipe_common.h

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.h | 330 -- .../drivers/radeon/radeon_vce_40_2_2.c| 2 +- src/gallium/drivers/radeon/radeon_vce_50.c| 2 +- .../drivers/radeon/radeon_vcn_enc_1_2.c | 2 +-

[Mesa-dev] [PATCH 6/9] radeonsi: inline 2 trivial state structures

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_blit.c | 2 +- src/gallium/drivers/radeonsi/si_gfx_cs.c | 4 ++-- src/gallium/drivers/radeonsi/si_pipe.c | 2 +- src/gallium/drivers/radeonsi/si_pipe.h | 12 ++-- src/gallium/drivers/radeonsi/si_state.c

[Mesa-dev] [PATCH 1/7] ac/surface: handle DCC subresource fast clear restriction on VI

From: Marek Olšák --- src/amd/common/ac_surface.c | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index 7558dd91e34..c209b209da2 100644 --- a/src/amd/common/ac_surface.c +++

[Mesa-dev] [PATCH 5/7] radeonsi: implement DCC fast clear swizzle constraints more accurately

From: Marek Olšák Reduce swizzle constraints to the ALPHA_IS_ON_MSB constraint and the clear value of 1. This significantly changes the DCC fast clear code, and fixes fast clear for RGB formats without alpha. --- src/gallium/drivers/radeonsi/si_clear.c | 94

[Mesa-dev] [PATCH 3/7] radeonsi: fully enable 2x DCC MSAA for array and non-array textures

From: Marek Olšák The clear code is exactly the same as for 1 sample buffers - just clear the whole thing. --- src/gallium/drivers/radeonsi/si_clear.c | 13 +++-- src/gallium/drivers/radeonsi/si_pipe.c| 5 + src/gallium/drivers/radeonsi/si_pipe.h| 1

[Mesa-dev] [PATCH 2/7] radeonsi: enable fast color clear for level 0 of mipmapped textures on <= VI

From: Marek Olšák GFX9 is more complicated and needs a compute shader that we should just copy from amdvlk. --- src/gallium/drivers/radeonsi/si_clear.c | 17 - src/gallium/drivers/radeonsi/si_state.c | 16 2 files changed, 24 insertions(+),

[Mesa-dev] [PATCH 4/7] radeonsi: rename variables and document stuff around DCC fast clear

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_clear.c | 83 + 1 file changed, 42 insertions(+), 41 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c index f2df9483c12..7a8fdf59797

Re: [Mesa-dev] [PATCH] clover: Fix host access validation for sub-buffer creation

On Mon, Apr 16, 2018, 5:24 PM Francisco Jerez wrote: > Aaron Watry writes: > > > From CL 1.2 Section 5.2.1: > > CL_INVALID_VALUE if buffer was created with CL_MEM_HOST_WRITE_ONLY > and > > flags specify CL_MEM_HOST_READ_ONLY , or if buffer was

[Mesa-dev] [PATCH 5/7] meson: fix builds against LLVM built without rtti

Building without rtti is a frought with peril, but it's something that autotools supports so we need to support it too. Since we've moved to version 0.44 as a whole we can use the meson functionality for accessing random llvm-config options we can check for rtti and add -fno-rtti to all C++ code

[Mesa-dev] [PATCH 2/7] meson: remove workaround for custom target creating .h and .c files

In more modern versions of meson a custom_target returns an index-able object. This allows us to create accurate dependency models for targets that rely only on the header and not on the code from anv_entrypoints. Signed-off-by: Dylan Baker ---

[Mesa-dev] [PATCH 1/7] meson: raise required version to 0.44.1

We have already required 0.44 for building clover and swr, so it was already partially required. This just makes it required across the board instead of just for clover and swr. There is a bug in 0.44 which makes it impossible to build mesa in some configurations, so require 0.44.1 which fixes

[Mesa-dev] [PATCH 3/7] meson: allow empty sources when using link_whole

meson used to get grumpy if the sources list was empty, even when using --whole-archive (link_whole). In more recent versions that's not true, so remove the workaround. Signed-off-by: Dylan Baker --- src/glx/meson.build | 9 + 1 file changed, 1 insertion(+), 8

[Mesa-dev] [PATCH 6/7] meson: use array type options

This option type is nice since it involves less converting strings into lists, and because it validates the values that are provided. Signed-off-by: Dylan Baker --- meson.build | 113 +++--- meson_options.txt | 48

[Mesa-dev] [PATCH 7/7] meson: use new warning function

Instead of emulating it with message. Signed-off-by: Dylan Baker --- meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meson.build b/meson.build index b0e2bc1f625..d3480ee5c8c 100644 --- a/meson.build +++ b/meson.build @@ -58,7 +58,7 @@ if

[Mesa-dev] [PATCH 4/7] meson: remove dummy_cpp

meson has gotten pretty smart about tracking C and C++ dependencies (internal and external), and using the right linker. This wasn't always the case and we created empty c++ files to force the use of the c++ linker. We don't need that any more. Signed-off-by: Dylan Baker

Re: [Mesa-dev] [PATCH 1/2] mesa: GL_EXT_texture_norm16 extension plumbing

On Mon, Apr 16, 2018 at 7:36 PM, Tapani Pälli wrote: > Hi; > > On 16.04.2018 18:19, Ilia Mirkin wrote: >> >> You never check EXT_texture_norm16 anywhere... is that right? Should >> probably respect that in the _mesa_is_es3_* helpers. Also what about > > > Oops that is very

Re: [Mesa-dev] [PATCH 1/2] mesa: GL_EXT_texture_norm16 extension plumbing

Hi; On 16.04.2018 18:19, Ilia Mirkin wrote: You never check EXT_texture_norm16 anywhere... is that right? Should probably respect that in the _mesa_is_es3_* helpers. Also what about Oops that is very correct, will add the checks. shader support? I see no mention in the spec that these

[Mesa-dev] [PATCH] mesa/math: Allocate memory for GLmatrix elements and its inverse contiguously

When GLmatrix elements and its inverse are stored contiguously in memory it is possible to allocate, free and copy these fields with 1 function call instead of 2. --- src/mesa/math/m_matrix.c | 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) diff --git

Re: [Mesa-dev] [PATCH 1/2] dri: Add __DRI_IMAGE_FORMAT_SABGR8

On Monday, March 19, 2018 4:41:44 AM PDT Tapani Pälli wrote: > Add format definition and required plumbing to create images. > Note that there is no match to drm_fourcc definition, just like > with existing _DRI_IMAGE_FOURCC_SARGB. > > Signed-off-by: Tapani Pälli >

Re: [Mesa-dev] [PATCH] clover: Fix host access validation for sub-buffer creation

Aaron Watry writes: > From CL 1.2 Section 5.2.1: > CL_INVALID_VALUE if buffer was created with CL_MEM_HOST_WRITE_ONLY and > flags specify CL_MEM_HOST_READ_ONLY , or if buffer was created with > CL_MEM_HOST_READ_ONLY and flags specify CL_MEM_HOST_WRITE_ONLY , or if

Re: [Mesa-dev] [PATCH 1/2] bin/install_megadrivers: fix DESTDIR and -D*-path

Quoting Dylan Baker (2018-04-13 08:46:46) > Quoting Dylan Baker (2018-04-09 14:02:51) > > This fixes -Ddri-drivers-path, -Dvdpau-libs-path, etc. with DESTDIR when > > those paths are absolute. Currently due to the way python's os.path.join > > handles absolute paths these will ignore DESTDIR,

Re: [Mesa-dev] [PATCH 2/2] anv, radv: Drop XML workarounds for VK_ANDROID_native_buffer

Quoting Jason Ekstrand (2018-04-16 07:38:53) > --- > src/amd/vulkan/radv_extensions.py | 7 +-- > src/intel/vulkan/anv_extensions_gen.py | 7 +-- > 2 files changed, 2 insertions(+), 12 deletions(-) > > diff --git a/src/amd/vulkan/radv_extensions.py >

Re: [Mesa-dev] [PATCH 3/3] meson: Version libMesaOpenCL like autotools does

Quoting Jan Alexander Steffens (heftig) (2018-04-14 10:23:22) > This is for parity with autotools. It names the library > libMesaOpenCL.so.1.0.0 and points mesa.icd to the .1 symlink. > > opencl_version now matches configure.ac's OPENCL_VERSION. > > Signed-off-by: Jan Alexander Steffens (heftig)

Re: [Mesa-dev] [PATCH 2/3] meson: Add library versions to swr drivers

Quoting Jan Alexander Steffens (heftig) (2018-04-14 10:23:21) > This is for parity with autotools. > > Signed-off-by: Jan Alexander Steffens (heftig) > --- > src/gallium/drivers/swr/meson.build | 4 > 1 file changed, 4 insertions(+) > > diff --git

Re: [Mesa-dev] [PATCH 1/3] meson: Define NDEBUG for non-debug-builds

Quoting Jan Alexander Steffens (heftig) (2018-04-14 10:23:20) > This is for parity with autotools. We were suddenly getting assertion > failures after switching to meson, see [1]. > > [1]: https://bugs.archlinux.org/task/58218 > > Signed-off-by: Jan Alexander Steffens (heftig)

Re: [Mesa-dev] [PATCH 3/3] radeonsi: don't emit partial flushes for internal CS flushes only

On 16.04.2018 20:44, Marek Olšák wrote: On Sun, Apr 15, 2018 at 2:47 PM, Nicolai Hähnle > wrote: How much testing have you done with the radeon drm? It may be safer to just skip that part of the changes. Piglit on CIK. Probably good

[Mesa-dev] [PATCH] glsl_to_tgsi: try harder to lower unsupported ir_binop_vector_extract

From: Marek Olšák Cc: 18.0 --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 5 + 1 file changed, 5 insertions(+) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index

[Mesa-dev] [PATCH] nv50: Extract needed value bits without shifting them before calling bitcount

This can save one instruction since bitcount doesn't care about specific bits' positions. --- src/gallium/drivers/nouveau/nv50/nv50_screen.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c

[Mesa-dev] [PATCH v2 0/3] nvc0: Various improvements to nvc0_hw_get_query_result_resource

This patch set applies improvements related to the query buffer object functionality of the nvc0 driver. Changes in v2: - Increase space requirement in patch 3 to ensure there is room for fence emission. Rhys Perry (3): nvc0: set current bufctx to nvc0->bufctx at the end of nvc0_draw_vbo()

[Mesa-dev] [PATCH v2 3/3] nvc0: use a macro to write query result availability to a buffer

Both the availability and result paths shared a bit of code so they were marged. Signed-off-by: Rhys Perry --- src/gallium/drivers/nouveau/nvc0/mme/com9097.mme | 45 src/gallium/drivers/nouveau/nvc0/mme/com9097.mme.h | 34 ++

Re: [Mesa-dev] [PATCH v2] virgl: disable virgl when no 3D for virtio gpu.

On Thu, Apr 5, 2018 at 12:38 PM, Lepton Wu wrote: > If users are running mesa under old version of qemu or have turned off > GL at runtime, virtio gpu driver actually doesn't work. Adds a detection > here so mesa can fall back to software rendering. > > v2: > - move

Re: [Mesa-dev] [PATCH] nir: fix ir_binop_gequal glsl_to_nir conversion

Pushed. Thanks and welcome to Mesa! On April 14, 2018 12:26:18 Jason Ekstrand wrote: Reviewed-by: Jason Ekstrand What driver is hitting this path? The !supports_ints path isn't used to my knowledge so if some driver has started using it, they're

[Mesa-dev] [Bug 106090] Compiling compute shader crashes RADV

https://bugs.freedesktop.org/show_bug.cgi?id=106090 Bug ID: 106090 Summary: Compiling compute shader crashes RADV Product: Mesa Version: 18.0 Hardware: Other OS: All Status: NEW Severity: normal

Re: [Mesa-dev] [PATCH 3/3] radeonsi: don't emit partial flushes for internal CS flushes only

On Sun, Apr 15, 2018 at 2:47 PM, Nicolai Hähnle wrote: > How much testing have you done with the radeon drm? It may be safer to > just skip that part of the changes. > Piglit on CIK. Marek ___ mesa-dev mailing list

Re: [Mesa-dev] [PATCH] swr: Remove unnecessary memset call

Reviewed-By: George Kyriazis > On Apr 12, 2018, at 8:49 PM, Vlad Golovkin > wrote: Zeroing memory after calloc is not necessary. This also allows to avoid possible

Re: [Mesa-dev] [PATCH 1/2] intel/compiler: grf127 can not be dest when src and dest overlap in send

On 15/04/18 08:55, Matt Turner wrote: > On Wed, Apr 11, 2018 at 7:30 PM, Jose Maria Casanova Crespo > wrote: >> Implement at brw_eu_validate the restriction from Intel Broadwell PRM, vol >> 07, >> section "Instruction Set Reference", subsection "EUISA Instructions", Send

[Mesa-dev] [Bug 106074] radv: si_scissor_from_viewport returns incorrect result when using half-pixel viewport offset

https://bugs.freedesktop.org/show_bug.cgi?id=106074 gloriouseggr...@gmail.com changed: What|Removed |Added CC||gloriouseggr...@gmail.com

Re: [Mesa-dev] [PATCH 1/2] mesa: GL_EXT_texture_norm16 extension plumbing

You never check EXT_texture_norm16 anywhere... is that right? Should probably respect that in the _mesa_is_es3_* helpers. Also what about shader support? I see no mention in the spec that these should be usable as images, except with NV_image_formats is enabled. You're just exposing them no matter

Re: [Mesa-dev] [PATCH 3/3] meson: Version libMesaOpenCL like autotools does

Yes, please. Fixes clover platform and device detection when installed in /usr/local/ using ocl-icd for me when building with meson. I think that was the last thing blocking me from switching over from autotools on the rest of my machines. Not familiar enough with the versioning/linking in

[Mesa-dev] [PATCH 2/2] i965: enable EXT_texture_norm16 for i965

Signed-off-by: Tapani Pälli --- src/mesa/drivers/dri/i965/intel_extensions.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index 73a6c73f53..88a66e9e26 100644 ---

[Mesa-dev] [PATCH 1/2] mesa: GL_EXT_texture_norm16 extension plumbing

Patch enables use of short and unsigned short data for texture uploads, rendering and reading of framebuffers within the restrictions specified in GL_EXT_texture_norm16 spec. Patch also enables those 16bit format layout qualifiers listed in GL_NV_image_formats that depend on EXT_texture_norm16.

Re: [Mesa-dev] [PATCH] nir: fix ir_binop_gequal glsl_to_nir conversion

On Mon, Apr 16, 2018 at 6:45 AM, Erico Nunes wrote: > On Sun, Apr 15, 2018 at 2:30 AM, Jason Ekstrand > wrote: > > On April 14, 2018 12:43:35 Connor Abbott wrote: > > I think that it's probably impractical to use this path, and

[Mesa-dev] [Bug 106074] radv: si_scissor_from_viewport returns incorrect result when using half-pixel viewport offset

https://bugs.freedesktop.org/show_bug.cgi?id=106074 --- Comment #1 from Philip Rebohle --- Created attachment 138867 --> https://bugs.freedesktop.org/attachment.cgi?id=138867=edit Proposed patch The attached patch fixes the issue in FF XIV. I'm not sure if that

Re: [Mesa-dev] [PATCH 1/3] radeonsi: implement mechanism for IBs without partial flushes at the end (v6)

On Mon, Apr 16, 2018, 4:52 AM Christian König < ckoenig.leichtzumer...@gmail.com> wrote: > Am 15.04.2018 um 20:46 schrieb Nicolai Hähnle: > > On 07.04.2018 04:31, Marek Olšák wrote: > >> From: Marek Olšák > >> > >> (This patch doesn't enable the behavior. It will be enabled

Re: [Mesa-dev] [PATCH v2] anv: fix number of planes for depth & stencil

Thanks a lot Juan, it looks all good to me :) On 16/04/18 04:09, Juan A. Suarez Romero wrote: On Thu, 2018-04-12 at 14:54 -0700, Lionel Landwerlin wrote: We're not counting correctly with depth & stencil images. Additionally we need to move an assert that is meant just for color attachments.

Re: [Mesa-dev] [PATCH 2/2] anv, radv: Drop XML workarounds for VK_ANDROID_native_buffer

Reviewed-by: Samuel Pitoiset On 04/16/2018 04:38 PM, Jason Ekstrand wrote: --- src/amd/vulkan/radv_extensions.py | 7 +-- src/intel/vulkan/anv_extensions_gen.py | 7 +-- 2 files changed, 2 insertions(+), 12 deletions(-) diff --git

Re: [Mesa-dev] [PATCH 1/2] vulkan: Update the XML and headers to 1.1.73

Acked-by: Samuel Pitoiset On 04/16/2018 04:38 PM, Jason Ekstrand wrote: --- include/vulkan/vulkan_core.h | 2 +- src/vulkan/registry/vk.xml | 10 +- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/include/vulkan/vulkan_core.h

[Mesa-dev] [PATCH 2/2] anv, radv: Drop XML workarounds for VK_ANDROID_native_buffer

--- src/amd/vulkan/radv_extensions.py | 7 +-- src/intel/vulkan/anv_extensions_gen.py | 7 +-- 2 files changed, 2 insertions(+), 12 deletions(-) diff --git a/src/amd/vulkan/radv_extensions.py b/src/amd/vulkan/radv_extensions.py index db37d61..099cae7 100644 ---

[Mesa-dev] [PATCH 1/2] vulkan: Update the XML and headers to 1.1.73

--- include/vulkan/vulkan_core.h | 2 +- src/vulkan/registry/vk.xml | 10 +- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/include/vulkan/vulkan_core.h b/include/vulkan/vulkan_core.h index ed0d596..2cafcdd 100644 --- a/include/vulkan/vulkan_core.h +++

Re: [Mesa-dev] [PATCH] nir: fix ir_binop_gequal glsl_to_nir conversion

On Sun, Apr 15, 2018 at 2:30 AM, Jason Ekstrand wrote: > On April 14, 2018 12:43:35 Connor Abbott wrote: > I think that it's probably impractical to use this path, and we should > probably delete it. There are just too many optimizations, e.g. in >

[Mesa-dev] [PATCH v7 30/35] nvir/nir: implement nir_intrinsic_load_ubo

v4: use loadFrom helper Signed-off-by: Karol Herbst --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 14 ++ 1 file changed, 14 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v7 33/35] nvir/nir: add memory barriers

v5: add more barrier intrinsics Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 19 +++ 1 file changed, 19 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v7 17/35] nvir/nir: add skeleton for nir_intrinsic_instr

Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp| 17 + 1 file changed, 17 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v7 28/35] nvir/nir: implement variable indexing

we store those arrays in local memory and reserve some space for each of the arrays. The arrays are stored in a packed format, because we know quite easily the context of each index. We don't do that in TGSI so far. This causes various issues to come up in the MemoryOpt pass, because ld/st with

[Mesa-dev] [PATCH v7 29/35] nvir/nir: implement geometry shader nir_intrinsics

v4: use smarter getIndirect helper use new getSlotAddress helper use loadFrom helper Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 27 ++ 1 file changed, 27 insertions(+) diff --git

[Mesa-dev] [PATCH v7 24/35] nvir/nir: implement nir_ssa_undef_instr

v2: use mkOp Signed-off-by: Karol Herbst --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 13 + 1 file changed, 13 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v7 27/35] nvir/nir: implement vote and ballot

v2: add vote_eq support use the new subop intrinsic helper add ballot v3: add read_(first_)invocation Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 42 ++ 1 file changed, 42 insertions(+) diff --git

[Mesa-dev] [PATCH v7 20/35] nvir/nir: implement nir_intrinsic_store_(per_vertex_)output

v3: add workaround for RA issues indirects have to be multiplied by 0x10 fix indirect access v4: use smarter getIndirect helper use storeTo helper v5: don't use const_offset directly Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v7 26/35] nvir/nir: add getOperation for intrinsics

v7: don't assert in default case Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 22 ++ 1 file changed, 22 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v7 18/35] nvir/nir: implement nir_alu_instr handling

v2: user bitfield_insert instead of bfi rework switch helper macros remove some lowering code (LoweringHelper is now used for this) v3: add pack_half_2x16_split add unpack_half_2x16_split_x/y v5: replace first argument with nullptr in loadImm calls prefer getSSA over getScratch

[Mesa-dev] [PATCH v7 35/35] nvir/nir: implement intrinsic shader_clock

Signed-off-by: Karol Herbst --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 8 1 file changed, 8 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp index

[Mesa-dev] [PATCH v7 32/35] nvir/nir: implement images

v3: fix compiler warnings v4: use loadFrom helper v5: fix signed min/max v6: set tex mask add support for indirect image access set cache mode v7: make compatible with 884d27bcf688d36c3bbe01bceca525595add3b33 rework the whole deref thing to prepare for bindless Signed-off-by: Karol

[Mesa-dev] [PATCH v7 34/35] nvir/nir: implement load_per_vertex_output

v4: use smarter getIndirect helper use new getSlotAddress helper v5: use loadFrom helper Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 23 ++ 1 file changed, 23 insertions(+) diff --git

[Mesa-dev] [PATCH v7 23/35] nvir/nir: implement loading system values

v2: support more sys values fixed a bug where for multi component reads all values ended up in x v3: add load_patch_vertices_in v4: add subgroup stuff v5: add helper invocation v6: fix loading 64 bit system values Signed-off-by: Karol Herbst ---

[Mesa-dev] [PATCH v7 31/35] nvir/nir: implement ssbo intrinsics

v4: use loadFrom helper v5: support indirect buffer access Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 90 ++ 1 file changed, 90 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v7 19/35] nvir/nir: implement nir_intrinsic_load_uniform

v2: use new getIndirect helper fixes symbols for 64 bit types v4: use smarter getIndirect helper simplify address calculation use loadFrom helper Signed-off-by: Karol Herbst --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 10 ++ 1 file

[Mesa-dev] [PATCH v7 22/35] nvir/nir: implement intrinsic_discard(_if)

Signed-off-by: Karol Herbst --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 14 ++ 1 file changed, 14 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp

[Mesa-dev] [PATCH v7 25/35] nvir/nir: implement nir_instr_type_tex

a lot of those fields are not valid for a lot of tex ops. Not quite sure if it's worth the effort to check for those or just keep it like that. It seems to kind of work. v2: reworked offset handling add tex support with indirect R/S arguments handle GLSL_SAMPLER_DIM_EXTERNAL drop

[Mesa-dev] [PATCH v7 09/35] nvir/nir: run some passes to make the conversion easier

v2: add constant_folding v6: print non final NIR only for verbose debugging Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 39 ++ 1 file changed, 39 insertions(+) diff --git

[Mesa-dev] [PATCH v7 21/35] nvir/nir: implement load_(interpolated_)input/output

v3: and load_output v4: use smarter getIndirect helper use new getSlotAddress helper v5: don't use const_offset directly fix for indirects v6: add support for interpolateAt v7: fix compiler warnings add load_barycentric_sample handle load_output for fragment shaders Signed-off-by:

[Mesa-dev] [PATCH v7 14/35] nvir/nir: parse NIR shader info

v2: parse a few more fields v3: add special handling for GL_ISOLINES Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 60 ++ 1 file changed, 60 insertions(+) diff --git

[Mesa-dev] [PATCH v7 12/35] nvir/nir: run assignSlots

v2: add support for geometry shaders set idx add some missing mappings fix for 64bit inputs/outputs fix up some FP color output index messup parse centroid flag v3: fix arrays in outputs as well fix input/ouput size calculation for tessellation shaders v4: add

[Mesa-dev] [PATCH v7 15/35] nvir/nir: implement CFG handling

v6: fix loops with blocks at the end nothing points to skip blocks with no instructions and no predecessors Signed-off-by: Karol Herbst --- .../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 270 - 1 file changed, 268 insertions(+), 2 deletions(-)

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