From: Marek Olšák
---
src/amd/common/sid.h | 4
src/gallium/drivers/radeonsi/si_dma_cs.c | 29
src/gallium/drivers/radeonsi/si_pipe.h | 2 ++
src/gallium/drivers/radeonsi/si_query.c | 21 +++--
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_compute.c | 8
src/gallium/drivers/radeonsi/si_pipe.h| 1 +
2 files changed, 9 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_compute.c
b/src/gallium/drivers/radeonsi/si_compute.c
index c5d3d5fcf02..e0c6902fec4
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_compute.c| 16 +---
src/gallium/drivers/radeonsi/si_compute.h| 1 +
src/gallium/drivers/radeonsi/si_pipe.h | 1 +
src/gallium/drivers/radeonsi/si_shader.c | 11 +++
From: Marek Olšák
---
src/gallium/drivers/radeonsi/Makefile.sources | 2 +-
src/gallium/drivers/radeonsi/meson.build | 2 +-
src/gallium/drivers/radeonsi/si_blit.c| 2 +-
src/gallium/drivers/radeonsi/si_cp_dma.c | 8 +-
src/gallium/drivers/radeonsi/si_pipe.c|
From: Marek Olšák
---
src/amd/common/sid.h | 2 ++
src/gallium/drivers/radeonsi/si_cp_dma.c | 16 ++--
src/gallium/drivers/radeonsi/si_pipe.h | 1 +
3 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h
From: Marek Olšák
DMA on SI doesn't support the timestamp packet, so it's emulated.
---
src/gallium/drivers/radeonsi/si_query.c | 19 +++
src/gallium/drivers/radeonsi/si_query.h | 1 +
2 files changed, 20 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_query.c
From: Marek Olšák
For internal radeonsi shaders.
---
src/gallium/auxiliary/tgsi/tgsi_strings.c | 3 ++-
src/gallium/auxiliary/tgsi/tgsi_strings.h | 2 +-
src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 3 +++
src/gallium/include/pipe/p_shader_tokens.h| 8 ++--
4
https://bugs.freedesktop.org/show_bug.cgi?id=106590
--- Comment #7 from Zhaowei Yuan ---
(In reply to Kenneth Graunke from comment #6)
> (In reply to Mark Janes from comment #5)
> > This seems like a duplicate of
> >
> > https://bugs.freedesktop.org/show_bug.cgi?id=106807
> >
> > My faint
https://bugs.freedesktop.org/show_bug.cgi?id=107610
--- Comment #2 from Christopher Snowhill ---
Would that depend on the GPU installed? I kind of pulled that one out after a
6GB memtestCL caused the whole GPU to lock up. I also experienced a Spotify
rendering glitch:
On Mon, Aug 13, 2018 at 1:42 PM Ian Romanick wrote:
>
> On 08/07/2018 10:42 PM, Marek Olšák wrote:
> > From: Chris Forbes
> >
> > ---
> > src/compiler/glsl/builtin_types.cpp | 32 ++
> > src/compiler/glsl/glsl_lexer.ll | 50 ++---
> > 2 files changed,
From: Marek Olšák
---
src/mesa/main/extensions_table.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index af5edb35051..9f9038f97c6 100644
--- a/src/mesa/main/extensions_table.h
+++
From: Marek Olšák
This is needed for exposing the samplerBuffer functions under
EXT_gpu_shader4.
v2: - expose it in the compat profile only
- make it an alias of EXT_gpu_shader4
Reviewed-by: Timothy Arceri (v1)
---
docs/relnotes/18.3.0.html| 1 +
src/mesa/main/extensions_table.h
Thanks for your review, Lionel.
With the help from Clayton Craft to run the CI, this patch can pass CI:
http://otc-mesa-ci.jf.intel.com/job/Richard_Yunchao/1/
Regards
Yunchao
-Original Message-
From: Landwerlin, Lionel G
Sent: Monday, August 20, 2018 11:11 AM
To: He, Yunchao ;
On Mon, Aug 13, 2018 at 12:58 PM Ian Romanick wrote:
>
> On 08/10/2018 08:14 PM, Marek Olšák wrote:
> > On Fri, Aug 10, 2018 at 9:04 PM, Ian Romanick wrote:
> >> On 08/07/2018 10:42 PM, Marek Olšák wrote:
> >>> From: Marek Olšák
> >>>
> >>> This is needed for exposing the samplerBuffer
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 354c05e3d9d..81c825db1e4 100644
---
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader_internal.h | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h
b/src/gallium/drivers/radeonsi/si_shader_internal.h
index ac7784f7d46..6cc503690da 100644
---
From: Marek Olšák
needed to change the input type to si_shader_context
---
src/gallium/drivers/radeonsi/si_shader.c | 32 +++-
1 file changed, 14 insertions(+), 18 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
From: Marek Olšák
---
src/amd/common/ac_llvm_build.c | 3 +--
src/amd/common/ac_nir_to_llvm.c | 7 ++-
src/gallium/drivers/radeonsi/si_shader.c | 17 +
3 files changed, 8 insertions(+), 19 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader.c | 54 ++-
.../drivers/radeonsi/si_shader_tgsi_mem.c | 18 +++
.../drivers/radeonsi/si_shader_tgsi_setup.c | 14 ++---
3 files changed, 29 insertions(+), 57 deletions(-)
diff --git
From: Marek Olšák
it causes corruption on several different GPU generations.
Cc: 18.2
---
src/amd/common/ac_llvm_util.c | 7 ++-
src/amd/common/ac_llvm_util.h | 1 -
src/gallium/drivers/radeonsi/si_pipe.c | 1 -
3 files changed, 2 insertions(+), 7 deletions(-)
diff
From: Marek Olšák
---
src/amd/common/ac_llvm_build.c | 14 ++
src/amd/common/ac_llvm_build.h | 4
2 files changed, 18 insertions(+)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index c89bdf49faf..6d5bfb1a1be 100644
---
From: Marek Olšák
---
src/amd/common/ac_nir_to_llvm.c | 14 +++
src/gallium/drivers/radeonsi/si_shader.c | 8 +++---
.../drivers/radeonsi/si_shader_tgsi_mem.c | 25 +++
.../drivers/radeonsi/si_shader_tgsi_setup.c | 17 -
4 files
From: Marek Olšák
---
src/amd/common/ac_llvm_build.c | 6 ++
src/amd/common/ac_llvm_build.h | 1 +
src/amd/common/ac_nir_to_llvm.c | 3 +--
src/gallium/drivers/radeonsi/si_shader.c | 4 +---
4 files changed, 9 insertions(+), 5 deletions(-)
diff --git
From: Marek Olšák
GL_STENCIL_INDEX uses GL_INTENSITY for the border color, which is nicer
to hardware that doesn't read the stencil border value from the X channel.
This fixes a bunch of dEQP tests on Vega & Raven.
Cc: 18.1 18.2
---
src/mesa/state_tracker/st_atom_sampler.c | 3 +++
1 file
From: Marek Olšák
---
src/gallium/state_trackers/vdpau/decode.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/state_trackers/vdpau/decode.c
b/src/gallium/state_trackers/vdpau/decode.c
index 66d52257717..48dfb0e0003 100644
---
From: Marek Olšák
It only contains GLSL changes.
v2: allow the layout qualifier on GLSL <= 1.30
---
src/compiler/glsl/glsl_lexer.ll | 1 +
src/mesa/main/extensions_table.h | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/compiler/glsl/glsl_lexer.ll
On Wed, Aug 15, 2018 at 3:10 PM Ian Romanick wrote:
>
> On 08/08/2018 07:12 PM, Marek Olšák wrote:
> > From: Marek Olšák
> >
> > because the closed driver exposes it.
>
> Aside from AMD_texture_texture4 being really, really under-specified,
> there is one big difference between the two
On Wed, Aug 15, 2018 at 2:25 PM Ian Romanick wrote:
>
> On 08/08/2018 07:12 PM, Marek Olšák wrote:
> > From: Marek Olšák
> >
> > because the closed driver exposes it.
> >
> > It's equivalent to ARB_gpu_shader_int64.
> > In this patch, I did everything the same as we do for ARB_gpu_shader_int64.
https://bugs.freedesktop.org/show_bug.cgi?id=104843
Timothy Arceri changed:
What|Removed |Added
Status|NEW |NEEDINFO
--- Comment #1 from Timothy
https://bugs.freedesktop.org/show_bug.cgi?id=103385
Timothy Arceri changed:
What|Removed |Added
Resolution|--- |WONTFIX
Status|NEW
https://bugs.freedesktop.org/show_bug.cgi?id=99014
Timothy Arceri changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
On 08/20/2018 04:02 PM, Marek Olšák wrote:
> I wouldn't add _DepthClamp. Having just DepthClampNear and
> DepthClampFar should be enough. Drivers not supporting the extension
> can use either variable, because they will be equal.
>
> The glGet query can be handled as LOC_CUSTOM.
Yeah, that works
On 20/08/18 23:31, vadym.shovkoplias wrote:
From Section 4.3.4 (Inputs) of the GLSL 1.50 spec:
"Only the input variables that are actually read need to be written
by the previous stage; it is allowed to have superfluous
declarations of input variables."
Fixes:
*
https://bugs.freedesktop.org/show_bug.cgi?id=107224
--- Comment #11 from Timothy Arceri ---
(In reply to Alex Smith from comment #10)
> We've just released a game data update that should fix this issue for both
> AMD and Intel, as well as a shader compilation failure on 18.2. It should be
>
Kenneth Graunke writes:
> This will be used by u_transfer_helper.c shortly, in order to split
> packed depth-stencil into separate resources.
> ---
> src/gallium/auxiliary/util/u_format.h | 21 +
> 1 file changed, 21 insertions(+)
>
> diff --git
On Sat, Jul 28, 2018 at 10:44:38PM -0700, Jason Ekstrand wrote:
> Shader-db results on Kaby Lake:
>
> total instructions in shared programs: 15177605 -> 15177605 (0.00%)
> instructions in affected programs: 0 -> 0
> helped: 0
> HURT: 0
>
> This is unsurprising because
On Mon, Jul 30, 2018 at 09:16:42AM -0700, Jason Ekstrand wrote:
> This pass looks for array variables where at least one level of the
> array is never indirected and splits it into multiple smaller variables.
>
> This pass doesn't really do much now because nir_lower_vars_to_ssa can
> already see
Kenneth Graunke writes:
> u_transfer_helper already had code to handle treating packed Z32_S8
> as separate Z32_FLOAT and S8_UINT resources, since some drivers can't
> handle that interleaved format natively.
>
> Other hardware needs depth and stencil as separate resources for all
> formats.
Kenneth Graunke writes:
> This new function takes separate Z24 depth and S8 stencil sources,
> and packs them into a single combined Z24S8 buffer.
> ---
> src/gallium/auxiliary/util/u_format_zs.c | 20
> src/gallium/auxiliary/util/u_format_zs.h | 2 ++
> 2 files changed,
I've sent comments on patches 3 & 4. With those addressed, patches 1-5 are:
Reviewed-by: Marek Olšák
On Sat, Aug 18, 2018 at 7:16 AM Kai Wasserbäch
wrote:
>
> Only used, when asserts are enabled.
>
> Fixes an unused-but-set-variable warning with GCC 8:
>
On Sat, Aug 18, 2018 at 7:16 AM Kai Wasserbäch
wrote:
>
> Only used, when asserts are enabled.
>
> Fixes an unused-variable warning with GCC 8:
> ../../../src/amd/addrlib/gfx9/gfx9addrlib.cpp: In member function
> 'ADDR_E_RETURNCODE Addr::V2::Gfx9Lib::ComputeStereoInfo(const
>
On Sat, Aug 18, 2018 at 7:16 AM Kai Wasserbäch
wrote:
>
> Only used, when asserts are enabled.
>
> Fixes an unused-variable warning with GCC 8:
> ../../../src/amd/addrlib/r800/egbaddrlib.cpp: In member function 'int
> Addr::V1::EgBasedLib::SanityCheckMacroTiled(ADDR_TILEINFO*) const':
>
You are lucky that WAVES_PER_SH was not 3. Such a low limit could
decrease compute shader performance to ~2%.
Marek
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Thank you for volunteering to test my branch. But before I point you to the
branch,
I will rework patches according to your comment on patch 3.
Again thanks a lot for your and Ian's input.
- Sagar
On 08/20/2018 04:21 PM, Marek Olšák wrote:
> I can try to test the extension with the radeonsi
Reviewed-by: Marek Olšák
Marek
On Mon, Aug 20, 2018 at 9:32 AM vadym.shovkoplias
wrote:
>
> From Section 4.3.4 (Inputs) of the GLSL 1.50 spec:
>
> "Only the input variables that are actually read need to be written
> by the previous stage; it is allowed to have superfluous
>
Reviewed-by: Marek Olšák
Marek
On Fri, Aug 17, 2018 at 10:41 AM Kai Wasserbäch
wrote:
>
> Only used, when asserts are enabled.
>
> Fixes an unused-but-set-variable warning with GCC 8:
> ../../../src/amd/addrlib/addrinterface.cpp: In function 'int
> ElemGetExportNorm(ADDR_HANDLE, const
Reviewed-by: Marek Olšák
Marek
On Fri, Aug 17, 2018 at 10:41 AM Kai Wasserbäch
wrote:
>
> Only used, when asserts are enabled.
>
> Fixes an unused-variable warning with gcc-8:
> ../../../src/util/half_float.c: In function '_mesa_half_to_unorm8':
> ../../../src/util/half_float.c:189:14:
On Sat, Jul 28, 2018 at 10:44:36PM -0700, Jason Ekstrand wrote:
> This pass doesn't really do much now because nir_lower_vars_to_ssa can
> already see through structures and considers them to be "split". This
> pass exists to help other passes more easily see through structure
> variables. If a
On Mon, Aug 20, 2018 at 7:20 PM Marek Olšák wrote:
>
> On Mon, Aug 20, 2018 at 7:06 PM Rob Clark wrote:
> >
> > On Mon, Aug 20, 2018 at 6:54 PM Bas Nieuwenhuizen
> > wrote:
> > >
> > > On Tue, Aug 21, 2018 at 12:38 AM, Marek Olšák wrote:
> > > > On Fri, Aug 10, 2018 at 9:26 AM Rob Clark
I can try to test the extension with the radeonsi driver. Do you have
a Mesa branch with the final patches?
Marek
On Mon, Aug 13, 2018 at 5:35 PM Sagar Ghuge wrote:
>
> Hi everyone,
>
> I am kind of stuck on this part actually. I don't have
> latest AMD graphics card to test following behavior
On Mon, Aug 20, 2018 at 7:06 PM Rob Clark wrote:
>
> On Mon, Aug 20, 2018 at 6:54 PM Bas Nieuwenhuizen
> wrote:
> >
> > On Tue, Aug 21, 2018 at 12:38 AM, Marek Olšák wrote:
> > > On Fri, Aug 10, 2018 at 9:26 AM Rob Clark wrote:
> > >>
> > >> Used internally in freedreno/ir3 for the vec2 value
Am 20.08.2018 um 23:31 schrieb Grazvydas Ignotas:
> The bsr instruction modifies flags, so that needs to be indicated to the
> compiler. No effect on generated code, but still needed for correctness.
> ---
> src/gallium/drivers/llvmpipe/lp_setup_tri.c | 3 ++-
> 1 file changed, 2 insertions(+), 1
On Mon, Aug 20, 2018 at 6:54 PM Bas Nieuwenhuizen
wrote:
>
> On Tue, Aug 21, 2018 at 12:38 AM, Marek Olšák wrote:
> > On Fri, Aug 10, 2018 at 9:26 AM Rob Clark wrote:
> >>
> >> Used internally in freedreno/ir3 for the vec2 value that hw passes to
> >> shader to use as coordinate for bary.f
I wouldn't add _DepthClamp. Having just DepthClampNear and
DepthClampFar should be enough. Drivers not supporting the extension
can use either variable, because they will be equal.
The glGet query can be handled as LOC_CUSTOM.
Marek
On Sun, Aug 19, 2018 at 6:43 PM Sagar Ghuge wrote:
>
>
>
> On
Reviewed-by: Marek Olšák
Marek
On Mon, Aug 13, 2018 at 1:13 AM Kenneth Graunke wrote:
>
> Some hardware can do PIPE_TEX_WRAP_MIRROR_REPEAT but not
> PIPE_TEX_WRAP_MIRROR_CLAMP and PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER.
>
> Drivers for such hardware would like to advertise support for
>
On Tue, Aug 21, 2018 at 12:38 AM, Marek Olšák wrote:
> On Fri, Aug 10, 2018 at 9:26 AM Rob Clark wrote:
>>
>> Used internally in freedreno/ir3 for the vec2 value that hw passes to
>> shader to use as coordinate for bary.f (varying fetch) instruction.
>> This is not the same as
Danylo, should we also include this in the stable queues ?
On Mon, 2018-06-18 at 15:50 +0300, Danylo Piliaiev wrote:
> We use floating-points for viewport bounds so VIEWPORT_SUBPIXEL_BITS
> should reflect this.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105975
>
>
> > Question: why some builtins care about "supported" while other care
> > about the extension being "enabled"?
>
> There are actually two different things happening. In the cases where
> we only care about the extension being supported, we're creating a
> hidden intrinsic function. These are
On Fri, Aug 10, 2018 at 9:26 AM Rob Clark wrote:
>
> Used internally in freedreno/ir3 for the vec2 value that hw passes to
> shader to use as coordinate for bary.f (varying fetch) instruction.
> This is not the same as SYSTEM_VALUE_FRAG_COORD.
>
> Signed-off-by: Rob Clark
> ---
> Up until now,
On 08/20/2018 12:10 PM, Caio Marcelo de Oliveira Filho wrote:
> Hi,
>
>> @@ -1133,6 +1159,9 @@ builtin_builder::create_intrinsics()
>> _atomic_intrinsic2(buffer_atomics_supported,
>> glsl_type::int_type,
>>
Adds a new i965 instruction disassemble tool
v2: 1) fix a few nits (Matt Turner)
2) Remove i965_disasm header (Matt Turner)
Signed-off-by: Sagar Ghuge
---
src/intel/Makefile.tools.am | 14 +++
src/intel/tools/i965_disasm.c | 199 ++
On Mon, Aug 20, 2018 at 11:32 PM, Grazvydas Ignotas wrote:
> Thanks to reproducible builds, binary file timestamps may be identical
> for both 32bit and 64bit packages when built from the same source.
> This means radv will use the same cache for both 32 and 64 bit
> processes, which leads to
On Mon, Aug 20, 2018 at 11:32 PM, Grazvydas Ignotas wrote:
> Currently if 64bit and 32bit programs are used interchangeably, radv
> will keep overwriting the cache. Use separate cache files to avoid
> that.
I probably should also split this out per GPU for people who have
different GPUs ...
For
Reviewed-by: Bas Nieuwenhuizen
Did you have access to push?
On Mon, Aug 20, 2018 at 11:40 PM, Grazvydas Ignotas wrote:
> For 32bit build. Trivial.
> ---
> src/vulkan/wsi/wsi_common_display.c | 4 ++--
> src/vulkan/wsi/wsi_common_x11.c | 2 +-
> 2 files changed, 3 insertions(+), 3
Alright, I guess it's ok then.
In theory the u_cpu_detect bits could be used in different places, for
instance the translate code emits its own sse code, and as long as a
feature was detected properly it may make sense to disable it only for
some users. Albeit llvm setup and the gallivm code need
Thanks for reviewing the patch. I will make changes and send v2 accordingly.
On 08/20/2018 11:34 AM, Matt Turner wrote:
> On Thu, Aug 16, 2018 at 1:51 PM Sagar Ghuge wrote:
>>
>> Adds a new i965 instruction disassemble tool
>
> This looks very good. A few comments about the structure inline.
For 32bit build. Trivial.
---
src/vulkan/wsi/wsi_common_display.c | 4 ++--
src/vulkan/wsi/wsi_common_x11.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/vulkan/wsi/wsi_common_display.c
b/src/vulkan/wsi/wsi_common_display.c
index e6cba188dfa..1e90bba460c 100644
Currently if 64bit and 32bit programs are used interchangeably, radv
will keep overwriting the cache. Use separate cache files to avoid
that.
---
src/amd/vulkan/radv_meta.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/src/amd/vulkan/radv_meta.c
Thanks to reproducible builds, binary file timestamps may be identical
for both 32bit and 64bit packages when built from the same source.
This means radv will use the same cache for both 32 and 64 bit
processes, which leads to crashes.
Conveniently there is a spare byte in cache_uuid, let's place
The bsr instruction modifies flags, so that needs to be indicated to the
compiler. No effect on generated code, but still needed for correctness.
---
src/gallium/drivers/llvmpipe/lp_setup_tri.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
On Monday, August 20, 2018 10:26:29 AM PDT Anuj Phogat wrote:
> On Mon, Aug 20, 2018 at 12:18 AM Kenneth Graunke wrote:
[snip]
> > I don't know if people are trying to enable pre-emption during GPGPU
> > work on pre-Gen11. If so, that probably will not work, and we'd either
> > need to avoid
Check the destination's row pitch against the BLT engine's row pitch
limitation as well.
Fixes: 0288fe8d0417730bdd5b3477130dd1dc32bdbcd3
("i965/miptree: Use the correct BLT pitch")
v2: Fix the Fixes tag (Dylan).
Check the destination row pitch (Chris).
Cc:
Reported-by: Dylan Baker
---
I
Fix rendering issues on BDW and SKL.
Fixes: 0288fe8d0417730bdd5b3477130dd1dc32bdbcd3
("i965/miptree: Use the correct BLT pitch")
Fixes the following regressions seen
exclusively on SKL:
* KHR-GL46.texture_barrier_ARB.disjoint-texels
* KHR-GL46.texture_barrier_ARB.overlapping-texels
*
This struct contains all the data of interest. can_blit_slice() will use
it in the next patch to calculate the correct pitch.
Suggested-by: Chris Wilson
Cc:
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git
On 08/20/2018 11:06 AM, Matt Turner wrote:
> Cool. This looks pretty good to me. A few comments inline.
>
> On Wed, Aug 15, 2018 at 2:00 PM Sagar Ghuge wrote:
>>
>> INTEL_DEBUG=hex prints 32 bit hex value
>> and due to endianness of CPU byte order is
>> reversed. In order to disassemble binary
> The code is here:
>
>
> https://cgit.freedesktop.org/~idr/mesa/log/?h=INTEL_shader_atomic_float_minmax
The series is
Reviewed-by: Caio Marcelo de Oliveira Filho
I'd consider adding some clarification about not quietizing sNaN
and/or relaxing the definition in the spec (patch 3).
>
On Monday, 2018-08-20 14:23:28 +, Juan A. Suarez Romero wrote:
> This fixes `make distcheck`.
>
> Fixes: 471f708ed6 ("git_sha1: simplify logic")
> CC: Eric Engestrom
> ---
> src/Makefile.am | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/Makefile.am
INTEL_DEBUG=hex prints 32 bit hex value and due to endianness of CPU
byte order is reversed. In order to disassemble binary files, print
each byte instead of 32 bit hex value.
v2: Print blank spaces in order to vertically align output of compacted
instructions hex value with uncompacted
I was mostly following what was done earlier in the file for Altivec. I
can move it but then ideally the Alitvec check should also be moved.
Vicki
On 08/20/2018 08:53 AM, Roland Scheidegger wrote:
u_cpu_detect should detect what's really available, not what is used
(though indeed we
https://bugs.freedesktop.org/show_bug.cgi?id=107629
--- Comment #1 from Rob Clark ---
this seems like you are somehow ending up with old versions of some of the
generated headers?
At one point, nir_intrinsics.h was not autogenerated.. maybe you have an old
copy of it lying around?
Do you get
Hi,
> @@ -1133,6 +1159,9 @@ builtin_builder::create_intrinsics()
> _atomic_intrinsic2(buffer_atomics_supported,
> glsl_type::int_type,
> ir_intrinsic_generic_atomic_add),
> +
https://bugs.freedesktop.org/show_bug.cgi?id=107629
Hi-Angel changed:
What|Removed |Added
CC||robcl...@freedesktop.org
--
You are
ping
On Sun, Jul 29, 2018 at 12:44 AM Jason Ekstrand
wrote:
> This is the second version of my optimization series for variables. The
> first version, including the very descriptive cover letter can be found
> here:
>
> https://patchwork.freedesktop.org/series/47295/
>
> This second version
https://bugs.freedesktop.org/show_bug.cgi?id=107629
Bug ID: 107629
Summary: [regression][bisected] Build fails with
nir_load_sample_id_no_per_sample being undefined
Product: Mesa
Version: git
Hardware: Other
On Mon, Aug 20, 2018 at 2:42 AM Kenneth Graunke
wrote:
> On Friday, August 17, 2018 1:06:12 PM PDT Jason Ekstrand wrote:
> > ---
> > src/compiler/nir/nir_format_convert.h | 35 +--
> > 1 file changed, 27 insertions(+), 8 deletions(-)
> >
> > diff --git
On 08/17/2018 05:06 PM, Caio Marcelo de Oliveira Filho wrote:
> On Fri, Jun 22, 2018 at 10:03:54PM -0700, Ian Romanick wrote:
>> From: Ian Romanick
>>
>> Signed-off-by: Ian Romanick
>> ---
>> src/compiler/glsl/glsl_to_nir.cpp| 32
>> ++--
>>
On 08/16/2018 06:02 PM, Caio Marcelo de Oliveira Filho wrote:
> Hello,
>
>> +(add a new row after the exiting "atomicMax" table row, p. 179)
>> +
>> +float atomicMax(inout float mem, float data)
>> +
>> +Computes a new value by taking the maximum of the value of data and
>> +
On Thu, Aug 16, 2018 at 1:51 PM Sagar Ghuge wrote:
>
> Adds a new i965 instruction disassemble tool
This looks very good. A few comments about the structure inline.
> Signed-off-by: Sagar Ghuge
> ---
> src/intel/Makefile.tools.am | 15 +++
> src/intel/tools/i965_disasm.c | 202
On 20/08/2018 17:20, asimiklit.w...@gmail.com wrote:
From: Andrii Simiklit
The "gen_group_get_length" function can return a negative value
and it can lead to the out of bounds group_iter.
v2: printing of "unknown command type" was added
v3: just the asserts are added
Signed-off-by: Andrii
On 20/08/2018 17:29, Yunchao He wrote:
This extension can be supported on SKL+. With this patch,
all corresponding tests (6K+) in CTS can pass. No test fails.
I verified CTS with the command below:
deqp-vk --deqp-case=dEQP-VK.pipeline.sampler.view_type.*reduce*
v2: 1) support all depth
Cool. This looks pretty good to me. A few comments inline.
On Wed, Aug 15, 2018 at 2:00 PM Sagar Ghuge wrote:
>
> INTEL_DEBUG=hex prints 32 bit hex value
> and due to endianness of CPU byte order is
> reversed. In order to disassemble binary
> files, print each byte instead of 32 bit hex
>
This extension can be supported on SKL+. With this patch,
all corresponding tests (6K+) in CTS can pass. No test fails.
I verified CTS with the command below:
deqp-vk --deqp-case=dEQP-VK.pipeline.sampler.view_type.*reduce*
v2: 1) support all depth formats, not depth-only formats, 2) fix
a wrong
On Mon, Aug 20, 2018 at 12:18 AM Kenneth Graunke wrote:
>
> On Friday, August 17, 2018 5:13:25 PM PDT Anuj Phogat wrote:
> > It fixes simulator warnings in piglit tests complaining about missing
> > support for headerless sampler messages for pre-emptable contexts.
> > Bit 5 in SAMPLER MODE
On 20 August 2018 at 15:47, Juan A. Suarez Romero wrote:
> On Mon, 2018-08-20 at 12:06 +0200, Juan A. Suarez Romero wrote:
>> On Tue, 2018-08-14 at 11:00 +0100, Emil Velikov wrote:
>> > On 8 August 2018 at 15:36, Juan A. Suarez Romero
>> > wrote:
>> > > Like in the autotools target, make the
Looks good to me.
Reviewed-by: Roland Scheidegger
Am 20.08.2018 um 13:21 schrieb Jose Fonseca:
> The git core.autocrlf setting defaults to true (ie, all text files get
> checked out as CRLF on Windows), except on Appveyor where's set to
> "input" (ie, all text files get checked out with the
From: Andrii Simiklit
The "gen_group_get_length" function can return a negative value
and it can lead to the out of bounds group_iter.
v2: printing of "unknown command type" was added
v3: just the asserts are added
Signed-off-by: Andrii Simiklit
---
src/intel/common/gen_decoder.c | 5 -
Quoting Lionel Landwerlin (2018-08-20 08:59:38)
> From: Jason Ekstrand
>
> Because lower_ycbcr gets called before apply_pipeline_layout, the
> indices are all logical and the binding layout HW size is actually too
> big for the bounds check. We should just use the regular logical array
> size
From: Jason Ekstrand
Because lower_ycbcr gets called before apply_pipeline_layout, the
indices are all logical and the binding layout HW size is actually too
big for the bounds check. We should just use the regular logical array
size instead.
Fixes: f3e91e78a33 "anv: add nir lowering pass for
https://bugs.freedesktop.org/show_bug.cgi?id=105371
--- Comment #15 from amonpaike ---
(In reply to Gert Wollny from comment #14)
> If by ESM error you refer to the overgright light blue artifact in the SPACE
> RACESHIP scene, then is is a driver problem. If you run
>
> R600_DEBUG=nosb
Reviewed-by: Dylan Baker
Quoting Juan A. Suarez Romero (2018-08-20 07:22:35)
> This fixes `make distcheck`.
>
> Fixes: 471f708ed6 ("git_sha1: simplify logic")
> CC: Eric Engestrom
> ---
> src/Makefile.am | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/Makefile.am
1 - 100 of 180 matches
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