[Mesa-dev] [PATCH 06/24] i965/cnl: Add gen10 specific function declarations

These declarations will help the code start compiling once we wire up the makefiles for gen10. Later patches will start using these functions for gen10. Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/intel/isl/isl_priv.h | 12 src/mesa/drivers/dr

[Mesa-dev] [PATCH 10/24] i965/cnl: Wire up android Mesa build files for gen10

Note: This patch is untested. Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/intel/Android.genxml.mk | 5 + src/intel/Android.isl.mk | 20 src/intel/Android.vulkan.mk | 21 + src/mesa/drivers/dr

[Mesa-dev] [PATCH 05/24] i965/cnl: Include gen10_pack.h

Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/intel/genxml/genX_pack.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/intel/genxml/genX_pack.h b/src/intel/genxml/genX_pack.h index 2ec2226..187e75c 100644 --- a/src/intel/genxml/genX_pack.h +++ b/src/intel/genxml/genX_

[Mesa-dev] [PATCH 01/24] i965: Make feature macros gen8 based

intel.com> Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/intel/common/gen_device_info.c | 13 + 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/src/intel/common/gen_device_info.c b/src/intel/common/gen_device_info.c index 209b293..47aed9d 1

[Mesa-dev] [PATCH 03/24] i965/cnl: Add gen10.xml

fields to match gen9.xml Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/intel/genxml/gen10.xml | 3563 1 file changed, 3563 insertions(+) create mode 100644 src/intel/genxml/gen10.xml diff --git a/src/intel/genxml/gen10.xml b/src/intel/genx

[Mesa-dev] [PATCH 02/24] i965/cnl: Add a preliminary device for Cannonlake

From: Ben Widawsky <benjamin.widaw...@intel.com> v2 (Anuj): Rebased on master and updated pci ids Remove redundant initialization of max_wm_threads to 64 * 12. For gen9+ max_wm_threads are initialized in gen_get_device_info(). Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> Signed

[Mesa-dev] [PATCH V2 00/24] Add Cannonlake support

patches, dropped few and created new patches. What's remaining: - Add missing gen10 bits in Vulkan driver. - Fix failing piglit, cts tests for GL and Vulkan. You can also find this series at: https://github.com/aphogat/mesa.git branch: reviews Anuj Phogat (18): i965/cnl: Define genX(x) and GENX

[Mesa-dev] [PATCH 14/24] i965/cnl: Handle gen10 in switch cases across the driver

We are still using some gen9 functions for gen10 in this patch. They will be replaced by gen10 functions in later patches. Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/intel/common/gen_l3_config.c| 1 + src/intel/compiler/brw_eu.c | 2 ++ src

Re: [Mesa-dev] [PATCH 11/12] i965/cnl: Properly handle l3 configuration

but I'm > admittedly stumbling my way through some of the l3 programming. > > Anuj Phogat <anuj.pho...@gmail.com> writes: >> >> From: Ben Widawsky <benjamin.widaw...@intel.com> >>> >>> V2: Squash the changes in one patch and rebased on master (Anuj)

Re: [Mesa-dev] [PATCH 07/12] i965/cnl: Restore lossless compression for sRGB formats

On Mon, Apr 24, 2017 at 10:57 PM, Ben Widawsky <b...@bwidawsk.net> wrote: > On 17-04-15 18:27:33, Jason Ekstrand wrote: > >> On April 14, 2017 5:37:55 PM Anuj Phogat <anuj.pho...@gmail.com> wrote: >> >> From: Ben Widawsky <b...@bwidawsk.net> >>&

Re: [Mesa-dev] [PATCH 11/12] i965/cnl: Properly handle l3 configuration

but I'm > admittedly stumbling my way through some of the l3 programming. ​Yes, unrelated changes are due to bad rebase. I'll fix them in V2.​ > > > Anuj Phogat <anuj.pho...@gmail.com> writes: >> >> From: Ben Widawsky <benjamin.widaw...@intel.com> >>> &

Re: [Mesa-dev] [PATCH 02/12] i965/cnl: Add gen10.xml

On Thu, Apr 20, 2017 at 9:55 AM, Emil Velikov <emil.l.veli...@gmail.com> wrote: > Hi Anuj, > > On 15 April 2017 at 01:35, Anuj Phogat <anuj.pho...@gmail.com> wrote: >> From: Jason Ekstrand <jason.ekstr...@intel.com> >> >> Signed-off-by: Anuj Phogat

Re: [Mesa-dev] [PATCH 02/12] i965/cnl: Add gen10.xml

On Sun, Apr 16, 2017 at 8:32 PM, Jason Ekstrand <ja...@jlekstrand.net> wrote: > On Fri, Apr 14, 2017 at 5:35 PM, Anuj Phogat <anuj.pho...@gmail.com> wrote: >> >> From: Jason Ekstrand <jason.ekstr...@intel.com> >> >> Signed-off-by: Anuj Phogat

[Mesa-dev] [PATCH 06/12] i965/cnl: Modify thread count shift for VS

From: Ben Widawsky Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_defines.h | 1 + src/mesa/drivers/dri/i965/gen8_vs_state.c | 6 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH 11/12] i965/cnl: Properly handle l3 configuration

From: Ben Widawsky <benjamin.widaw...@intel.com> V2: Squash the changes in one patch and rebased on master (Anuj). Signed-off-by: Ben Widawsky <b...@bwidawsk.net> Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/intel/common/ge

[Mesa-dev] [PATCH 10/12] i965/cnl: Update memory barrier assert

Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/mesa/drivers/dri/i965/brw_program.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index e1f9896..ab719ad 100644 --- a/sr

[Mesa-dev] [PATCH 12/12] i965/cnl: Add CNL MOCS defines

Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/mesa/drivers/dri/i965/brw_blorp.c| 7 ++- src/mesa/drivers/dri/i965/brw_defines.h | 8 src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 ++ 3 files changed, 16 insertions(+), 1 deletion(-) diff

[Mesa-dev] [PATCH 09/12] i965/cnl: URB {VS, GS, HS, DS} sizes cannot be a multiple of 3

v1: By Ben Widawsky <benjamin.widaw...@intel.com> v2: Add the restriction for GS, HS and DS and make sure the allocated sizes are not multiple of 3. Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> Cc: Ben Widawsky <benjamin.widaw...@intel.com> --- src/mesa/drivers/dri/i9

[Mesa-dev] [PATCH 05/12] i965/cnl: Implement depth count workaround

From: Ben Widawsky Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_queryobj.c | 8 1 file changed, 8 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c

[Mesa-dev] [PATCH 07/12] i965/cnl: Restore lossless compression for sRGB formats

From: Ben Widawsky This support was removed on gen9 (it worked before then) and was brought back for gen10. Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

[Mesa-dev] [PATCH 08/12] i965/cnl: Add a preliminary device for CNL

ed-off-by: Ben Widawsky <benjamin.widaw...@intel.com> Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- include/pci_ids/i965_pci_ids.h | 12 ++ src/intel/common/gen_device_info.c | 59 + src/intel/common/gen_device_info.h

[Mesa-dev] [PATCH 03/12] i965/cnl: Update the script generating genX_bits.h

Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/intel/genxml/gen_bits_header.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/intel/genxml/gen_bits_header.py b/src/intel/genxml/gen_bits_header.py index 808e6cf..77cd966 100644 --- a/src/intel/

[Mesa-dev] [PATCH 00/12] Add Cannonlake support

This series adds a preliminary support for Cannonlake. We still end up using gen9 paths in many cases. My upcoming patches will change it by creating new functions, headers for gen10. You can also find this series at: https://github.com/aphogat/mesa.git branch: reviews Anuj Phogat (4): i965

[Mesa-dev] [PATCH 04/12] i965/cnl: Implement new pipe control workaround

From: Ben Widawsky GEN10 requires flushing all previous pipe controls before issuing a render target cache flush. The docs seem to fairly explicitly say this is gen10 only. v2: Rebased on commit 04f74d66293222d5e1905cfb930bfa083e30463c Author: Francisco Jerez

[Mesa-dev] [PATCH 01/12] i965: Make feature macros gen8 based

intel.com> Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/intel/common/gen_device_info.c | 13 + 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/src/intel/common/gen_device_info.c b/src/intel/common/gen_device_info.c index 209b293..47aed9d 1

Re: [Mesa-dev] [PATCH] mesa/main: simplify _mesa_IsRenderbuffer()

NULL && rb != > } > > > -- > 2.12.2 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [Mesa-stable] [PATCH] i965/fs: Always provide a default LOD of 0 for TXS and TXL

&& > + srcs[TEX_LOGICAL_SRC_LOD].file == BAD_FILE) { > + srcs[TEX_LOGICAL_SRC_LOD] = brw_imm_ud(0u); > + } > + > if (instr->op == nir_texop_tg4) { >if (instr->component == 1 && >key_tex->gather_channel_quirk_mask & (1 << te

Re: [Mesa-dev] Need to know which branch

Hi, The default branch is 'master' when you clone the Mesa git repository and that's what we use for development. Branches other than master are for stable releases, proof of concept and developer's choice. -Anuj On Wed, Mar 22, 2017 at 10:44 AM, swapnil wrote: > Hi, > > I

[Mesa-dev] [PATCH 2/2] i965: Delete tile resource mode code

Yf/Ys tiling never got used in i965 due to not delivering the expected performance benefits. So, this patch is deleting this dead code in favor of adding it later in ISL when we actually find it useful. ISL can then share this code between vulkan and GL. Signed-off-by: Anuj Phogat <anuj.

[Mesa-dev] [PATCH 1/2] i965: Delete fast copy blit code

"start pixel for Fast Copy blit should be on an OWord boundary". This restriction causes many blit operations to skip fast copy blit and use legacy blits. So, this patch is deleting this dead code in favor of adding it later when we actually find it useful. Signed-off-by: Anuj Phogat

Re: [Mesa-dev] [Mesa-stable] [PATCH] intel: Correct the BDW surface state size

rn surf; > } > > -- > 2.12.0 > > _______ > mesa-stable mailing list > mesa-sta...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-stable Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 0/6] isl: Fix requests for exact row pitch

__ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev LGTM. Series is: Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] i965: Rename brw_format_for_mesa_format() to brw_isl_format_for_mesa_format()

Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/mesa/drivers/dri/i965/brw_blorp.c| 2 +- src/mesa/drivers/dri/i965/brw_context.c | 2 +- src/mesa/drivers/dri/i965/brw_meta_util.c| 2 +- src/mesa/drivers/dri/i965/brw_state.h| 2 +- sr

Re: [Mesa-dev] [PATCH] i965: Clamp texture buffer size to GL_MAX_TEXTURE_BUFFER_SIZE.

if (brw_format == 0 && format != MESA_FORMAT_RGBA_FLOAT32) { >_mesa_problem(NULL, "bad format %s for texture buffer\n", > _mesa_get_format_name(format)); > -- > 2.11.1 > > ___ > mesa-dev ma

Re: [Mesa-dev] [PATCH v1] mesa: Avoid read of uninitialized variable

char *caller) > { > const struct gl_renderbuffer_attachment *att; > - bool is_color_attachment; > + bool is_color_attachment = false; > GLenum err; > > /* The error code for an attachment type of GL_NONE differs between APIs. > -- > 2.11.0.453.g787f75f05 > Review

Re: [Mesa-dev] [PATCH 01/24] i965: Move a couple of #defines from brw_context to brw_compiler

ENTRY_READ_OFFSET 1 > - > - > struct brw_clip_prog_data { > GLuint curb_read_length;/* user planes? */ > GLuint clip_mode; > -- > 2.5.0.400.gff86faf > > ___ > mesa-dev mailing list &g

Re: [Mesa-dev] [PATCH 05/24] i965: Move assign_common_binding_table_offsets to brw_program

On Tue, Feb 28, 2017 at 9:03 PM, Jason Ekstrand wrote: > This isn't used by Vulkan and is specific to the way the GL driver > works. There's no reason to have it in common compiler code. Also, it > relies on BRW_MAX_* defines which are defined in brw_context.h > --- >

Re: [Mesa-dev] [PATCH] i965: Move intel_debug.h to intel/common/gen_debug.h

p > +++ b/src/mesa/drivers/dri/i965/brw_vec4_tes.cpp > @@ -29,7 +29,7 @@ > > #include "brw_vec4_tes.h" > #include "brw_cfg.h" > -#include "intel_debug.h" > +#include "common/gen_debug.h" > > namespace brw { > > diff --git a

Re: [Mesa-dev] [PATCH] glsl: add has_shader_image_load_store()

0); > + } > + > void process_version_directive(YYLTYPE *locp, int version, > const char *ident); > > -- > 2.11.1 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org &

Re: [Mesa-dev] [PATCH] mesa: Use _mesa_has_OES_geometry_shader() when validating draws

ed(ctx)) { >_mesa_error(ctx, GL_INVALID_OPERATION, >"%s(transform feedback active)", caller); > -- > 2.11.0.483.g087da7b7c-goog > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freed

[Mesa-dev] [PATCH V2] mesa: Add EXT_frag_depth bits and enable it on all drivers

Passes the newly added piglit test for this extension on i965. V2: Fix comments by Ilia. Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/compiler/glsl/builtin_variables.cpp | 3 +++ src/compiler/glsl/glsl_parser_extras.cpp | 1 + src/compiler/glsl/glsl_parser_extras.h | 2 +

Re: [Mesa-dev] [PATCH] mesa: Add EXT_frag_depth bits and enable it on all drivers

On Fri, Feb 10, 2017 at 1:38 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: > On Fri, Feb 10, 2017 at 4:36 PM, Anuj Phogat <anuj.pho...@gmail.com> wrote: >> On Fri, Feb 10, 2017 at 1:21 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: >>> On Fri, Feb 10, 20

Re: [Mesa-dev] [PATCH] mesa: Add EXT_frag_depth bits and enable it on all drivers

On Fri, Feb 10, 2017 at 1:21 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: > On Fri, Feb 10, 2017 at 4:15 PM, Anuj Phogat <anuj.pho...@gmail.com> wrote: >> Passes the newly added piglit test for this extension on i965. >> >> Signed-off-by: Anuj Phogat <anuj.pho.

[Mesa-dev] [PATCH] mesa: Add EXT_frag_depth bits and enable it on all drivers

Passes the newly added piglit test for this extension on i965. Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- A quick look at other drivers didn't show any issues with this new extension. Let me know if you think it won't work for any driver. --- docs/featur

Re: [Mesa-dev] [PATCH] util/disk_cache: stop using ralloc_asprintf() unnecessarily

goto fail; > } > > - ralloc_free(filename); > + free(filename); > close(fd); > > if (size) > @@ -776,7 +775,7 @@ disk_cache_get(struct disk_cache *cache, cache_key key, > size_t *size) > if (data) >free(dat

Re: [Mesa-dev] [PATCH 01/40] st/mesa/i965: create link status enum

> > _mesa_clear_shader_program_data(ctx, prog); > > - prog->data->LinkStatus = GL_TRUE; > + prog->data->LinkStatus = linking_success; > > for (i = 0; i < prog->NumShaders; i++) { >if (!prog->Shaders[i]->CompileStatus) { > @@ -3110,7 +3110,7 @@ _mesa_glsl_link_shader(struct gl_context *ctx, struct > gl_shader_program *prog) > > if (prog->data->LinkStatus) { >if (!ctx->Driver.LinkShader(ctx, prog)) { > - prog->data->LinkStatus = GL_FALSE; > + prog->data->LinkStatus = linking_failure; >} > } > > diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp > b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp > index 77a51d5..5a65f32 100644 > --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp > +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp > @@ -588,7 +588,7 @@ fail_link(struct gl_shader_program *prog, const char > *fmt, ...) > ralloc_vasprintf_append(>data->InfoLog, fmt, args); > va_end(args); > > - prog->data->LinkStatus = GL_FALSE; > + prog->data->LinkStatus = linking_failure; > } > > static int > -- > 2.9.3 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Patches 1-4 are: Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 05/40] glsl: add initial implementation of shader cache

On Mon, Feb 6, 2017 at 7:42 PM, Timothy Arceri wrote: > From: Timothy Arceri > > This uses disk_cache.c to write out a serialization of various > state that's required in order to successfully load and use a > binary written out by a drivers

Re: [Mesa-dev] [PATCH 10/40] glsl: add basic support for resource list to shader cache

On Mon, Feb 6, 2017 at 7:42 PM, Timothy Arceri wrote: > From: Timothy Arceri > > This initially adds support for simple uniforms and varyings. > --- > src/compiler/glsl/shader_cache.cpp | 121 > + > 1 file

Re: [Mesa-dev] [PATCH 08/40] glsl: Serialize three additional hash tables with program metadata

On Mon, Feb 6, 2017 at 7:42 PM, Timothy Arceri wrote: > From: Carl Worth > > The three additional tables are AttributeBindings, FragDataBindings, > and FragDataIndexBindings. > > The first table (AttributeBindings) was identified as missing by > trying

Re: [Mesa-dev] [PATCH 05/40] glsl: add initial implementation of shader cache

On Mon, Feb 6, 2017 at 7:42 PM, Timothy Arceri wrote: > From: Timothy Arceri > > This uses disk_cache.c to write out a serialization of various > state that's required in order to successfully load and use a > binary written out by a drivers

Re: [Mesa-dev] [PATCH 1/3] main/framebuffer: refactor _mesa_get_color_read_format/type

T_MATRIX_STACK_DEPTH_ARB: > diff --git a/src/mesa/main/readpix.c b/src/mesa/main/readpix.c > index 1cb06c7..2582323 100644 > --- a/src/mesa/main/readpix.c > +++ b/src/mesa/main/readpix.c > @@ -1033,8 +1033,8 @@ _mesa_ReadnPixelsARB( GLint x, GLint y, GLsizei width, > GLsizei height,

Re: [Mesa-dev] [PATCH] glsl: correct compute shader checks for memoryBarrier functions

_memory_barrier("__intrinsic_memory_barrier_shared", > -- > 2.9.3 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Cross checked the GLSL 4.5 spec. Please add: Cc: 17.0 <mesa-sta...@lists.freedesktop.org> Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] intel/isl: Add a better comment for format_supports_ccs_e

On Thu, Feb 2, 2017 at 9:52 AM, Jason Ekstrand <ja...@jlekstrand.net> wrote: > Cc: Anuj Phogat <anuj.pho...@gmail.com> > --- > src/intel/isl/isl_format.c | 6 ++ > 1 file changed, 6 insertions(+) > > diff --git a/src/intel/isl/isl_format.c b/src/intel/isl/isl_for

Re: [Mesa-dev] [PATCH 5/5] anv: Remove the finishme for CCS_E with storage images

GE_CCS_E; > } > } >} > -- > 2.5.0.400.gff86faf > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev [Patch v2 3/5] and rest of the series is: Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/5] intel/isl: Add a supports_ccs_d helper

On Thu, Feb 2, 2017 at 9:03 AM, Jason Ekstrand <ja...@jlekstrand.net> wrote: > On Wed, Feb 1, 2017 at 4:07 PM, Anuj Phogat <anuj.pho...@gmail.com> wrote: >> >> On Wed, Feb 1, 2017 at 2:40 PM, Jason Ekstrand <ja...@jlekstrand.net> >> wrote: >> > N

Re: [Mesa-dev] [PATCH 2/5] intel/isl: Add a supports_ccs_d helper

On Wed, Feb 1, 2017 at 2:40 PM, Jason Ekstrand wrote: > Nothing uses this yet but it serves as a nice bit of documentation > that's relatively easy to find. > --- > src/intel/isl/isl.h| 2 ++ > src/intel/isl/isl_format.c | 15 +++ > 2 files changed, 17

Re: [Mesa-dev] [PATCH] anv: Don't use bogus alpha swizzles

docs. While > we haven't been getting hangs or anything, we should probably obey the > docs. This commit just sanitizes all render swizzles so that the alpha > channel maps to ALPHA. > > Cc: Anuj Phogat <anuj.pho...@gmail.com> > --- > src/intel/vulkan/anv_blo

Re: [Mesa-dev] [PATCH] isl: Add assertions for render target swizzle restrictions

get, this field MUST be programmed to > + *value = SCS_ALPHA." > + */ > + assert(info->view->swizzle.a == ISL_CHANNEL_SELECT_ALPHA); > + } > s.ShaderChannelSelectRed = info->view->swizzle.r; > s.ShaderChannelSelectGreen = info-&

Re: [Mesa-dev] [PATCH 7/7] anv: enable VK_KHR_shader_draw_parameters

;.tessellation = true, > + .draw_parameters = true, > }; > > nir_function *entry_point = > -- > 2.11.0 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Series is doing wha

Re: [Mesa-dev] [PATCH] glsl: Allow compatibility shaders with MESA_GL_VERSION_OVERRIDE=...

ab5..66a954f 100644 > --- a/src/compiler/glsl/glsl_parser_extras.h > +++ b/src/compiler/glsl/glsl_parser_extras.h > @@ -348,6 +348,7 @@ struct _mesa_glsl_parse_state { > } supported_versions[16]; > > bool es_shader; > + bool compat_shader; > unsigned language_version; > unsigned forced_language_version; > bool zero_init; > -- > 2.10.2 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev LGTM. Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v2] i965: Prevent coverity warning

t struct gen_device_info > *devinfo, > return 0; >} > } else { > + assert(desc->nsrc < 4); >return desc->nsrc; > } > > -- > 2.11.0.453.g787f75f05 > > ___ > mesa-dev mailing

Re: [Mesa-dev] [PATCH] i965: Fix fast depth clears for surfaces with a dimension of 16384.

t get here."); > -- > 2.11.0 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Verified the restriction from PRM. Patch looks good to me. Reviewed-by: Anu

Re: [Mesa-dev] [PATCH] spirv: handle gl_SampleMask

; > + } >break; > case SpvBuiltInFragDepth: >*location = FRAG_RESULT_DEPTH; > -- > 2.7.4 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/l

Re: [Mesa-dev] [PATCH v2] main/buffers: update error handling on DrawBuffers for 4.5

invalid buffer %s)", > + caller, _mesa_enum_to_string(buffers[output])); > +return; > + } >} > >/* Section 4.2 (Whole Framebuffer Operations) of the OpenGL ES 3.0 > -- > 2.9.3 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev With above comments fixed, both patches are: Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/3] i965: Fix indentation in brw_miptree_layout_2d()

Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index bf8c338..2f4837e

[Mesa-dev] [PATCH 1/3] i965: Fix comment to include 3d textures

Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index 768f8a8..bf8c338 100644 ---

[Mesa-dev] [PATCH 3/3] i965: Remove unnecessary mt->compressed checks

It's harmless to use ALIGN_NPOT() for uncompressed formats because they have block width/height = 1. Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 16 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/sr

Re: [Mesa-dev] [PATCH] i965: Properly flush in hsw_pause_transform_feedback().

__ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Looks reasonable to me. Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 6/9] i965: Add support for tex upload using gpu

On Mon, Jan 2, 2017 at 12:45 AM, Pohjolainen, Topi <topi.pohjolai...@gmail.com> wrote: > On Thu, Dec 29, 2016 at 11:55:37AM -0800, Anuj Phogat wrote: >> On Tue, Dec 20, 2016 at 6:45 AM, Topi Pohjolainen >> <topi.pohjolai...@gmail.com> wrote: >> > Signed-off

Re: [Mesa-dev] [PATCH] mesa: Make CopyImage check against BaseLevel, not 0, for mipmapping.

n false; > -- > 2.11.0 > > _______ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 6/9] i965: Add support for tex upload using gpu

On Tue, Dec 20, 2016 at 6:45 AM, Topi Pohjolainen wrote: > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/intel_tex.h | 8 + > src/mesa/drivers/dri/i965/intel_tex_subimage.c | 194 > +

Re: [Mesa-dev] [PATCH] anv: Handle vkGetPhysicalDeviceQueueFamilyProperties with count == 0

eFamilyProperties = (VkQueueFamilyProperties) { >.queueFlags = VK_QUEUE_GRAPHICS_BIT | > -- > 2.11.0 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-

Re: [Mesa-dev] [PATCH 5/9] meta: Refactor texture format translation

xt *ctx, > + GLenum gl_format, GLenum type); > + > extern bool > _mesa_is_es3_color_renderable(GLenum internal_format); > > -- > 2.5.5 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 3/9] intel/blorp/dbg: Name blit shaders for easy recognition in dumps

wm_prog_key(_key); > wm_key.tex.compressed_multisample_layout_mask = > -- > 2.5.5 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Patches 1-3 are: Reviewed-by: Anuj Phogat <anuj.pho...

Re: [Mesa-dev] [PATCH 9/9] i965: Drop _mesa_meta_pbo_TexSubImage() even for gen < 6

On Tue, Dec 20, 2016 at 6:45 AM, Topi Pohjolainen wrote: > > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/intel_tex_image.c| 24 +++- > src/mesa/drivers/dri/i965/intel_tex_subimage.c | 19

Re: [Mesa-dev] [PATCH] glsl: Drop bogus is_vertex_input from add_shader_variable().

return true; > } > -- > 2.10.2 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [Mesa-stable] [PATCH 1/2] i965/mt: Disable aux surfaces after making miptree shareable

} > > > -- > 2.11.0.rc2 > > ___ > mesa-stable mailing list > mesa-sta...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-stable For both patches: Reviewed-by: Anuj Phogat <anuj.pho...@gmail.co

Re: [Mesa-dev] [PATCH] i965/blit: Remove Yf/Ys tiled check under a FIXME at can_fast_copy_blit

On Wed, Dec 7, 2016 at 3:38 AM, Alejandro Piñeiro <apinhe...@igalia.com> wrote: > > > On 07/12/16 09:36, Alejandro Piñeiro wrote: >> On 06/12/16 22:26, Anuj Phogat wrote: >>> On Tue, Dec 6, 2016 at 10:58 AM, Alejandro Piñeiro <apinhe...@igalia.com> >>>

Re: [Mesa-dev] [PATCH] i965/blit: Remove Yf/Ys tiled check under a FIXME at can_fast_copy_blit

On Tue, Dec 6, 2016 at 4:26 PM, Anuj Phogat <anuj.pho...@gmail.com> wrote: > On Tue, Dec 6, 2016 at 10:58 AM, Alejandro Piñeiro <apinhe...@igalia.com> > wrote: >> The FIXME suggest that the check should be removed. >> > Only if we see any performance or feature

Re: [Mesa-dev] [PATCH] i965/blit: Remove Yf/Ys tiled check under a FIXME at can_fast_copy_blit

On Tue, Dec 6, 2016 at 10:58 AM, Alejandro Piñeiro wrote: > The FIXME suggest that the check should be removed. > Only if we see any performance or feature benefits in doing that. Last I checked I didn't see any performance benefits on Skylake. I also couldn't figure out the

Re: [Mesa-dev] [PATCH] i965: Allocate at least some URB space even when max_vertices = 0.

nsigned max_output_size_bytes = GEN7_MAX_GS_URB_ENTRY_SIZE_BYTES; > if (compiler->devinfo->gen == 6) >max_output_size_bytes = GEN6_MAX_GS_URB_ENTRY_SIZE_BYTES; > -- > 2.10.2 > > ___ > mesa-dev mailing list &g

Re: [Mesa-dev] [PATCH 3/3] i965: Delete the meta-base CopyImageSubData implementation

a_end(ctx); > - > -cleanup: > - _mesa_DeleteTextures(1, _view_texture); > - > - /* If we got a renderbuffer source, delete the temporary texture */ > - if (src_renderbuffer && src_tex_image) > - ctx->Driver.DeleteTexture(ctx, src_tex_image->TexObject); > - > - return success; > -} > diff --git a/src/mesa/drivers/dri/i965/intel_copy_image.c > b/src/mesa/drivers/dri/i965/intel_copy_image.c > index 56eaed6..85585c7 100644 > --- a/src/mesa/drivers/dri/i965/intel_copy_image.c > +++ b/src/mesa/drivers/dri/i965/intel_copy_image.c > @@ -183,16 +183,6 @@ intel_copy_image_sub_data(struct gl_context *ctx, > struct intel_mipmap_tree *src_mt, *dst_mt; > unsigned src_level, dst_level; > > - if (brw->gen < 6 && > - _mesa_meta_CopyImageSubData_uncompressed(ctx, > -src_image, src_renderbuffer, > -src_x, src_y, src_z, > -dst_image, dst_renderbuffer, > -dst_x, dst_y, dst_z, > -src_width, src_height)) { > - return; > - } > - > if (src_image) { >src_mt = intel_texture_image(src_image)->mt; >src_level = src_image->Level + src_image->TexObject->MinLevel; > -- > 2.5.0.400.gff86faf > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Series is: Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [Mesa-stable] [PATCH] i965: Fix compute shader crash.

> ctx->_Shader->CurrentProgram[MESA_SHADER_COMPUTE], > cp, ); >(void) success; >assert(success); > -- > 2.10.2 > > ___ > mesa-stable mailing list > mesa-sta.

Re: [Mesa-dev] [PATCH] i965: Disable depth writes when depth test is GL_EQUAL.

tencil.c > index e49103c..9a6c9e0 100644 > --- a/src/mesa/drivers/dri/i965/gen8_wm_depth_stencil.c > +++ b/src/mesa/drivers/dri/i965/gen8_wm_depth_stencil.c > @@ -90,7 +90,7 @@ gen8_upload_wm_depth_stencil(struct brw_context *brw) > GEN8_WM_DS_DEPTH_TEST_ENABLE | > FUNC(ctx->Depth.Func) << GEN8_WM_DS_DEPTH_FUNC_SHIFT; > > - if (ctx->Depth.Mask) > + if (brw_depth_writes_enabled(brw)) > dw1 |= GEN8_WM_DS_DEPTH_BUFFER_WRITE_ENABLE; > } > > -- > 2.10.2 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Awesome. The changes look good to me. Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 3/3] i965: Fix KBL typo in string

tel(R) HD Graphics 620 (Kabylake GT2)") > > >> CHIPSET(0x591A, kbl_gt2, "Intel(R) Kabylake GT2") >> CHIPSET(0x591B, kbl_gt2, "Intel(R) Kabylake GT2") >> CHIPSET(0x591D, kbl_gt2, "Intel(R) Kabylake GT2") >> -- >> 2.10.2 >> >

Re: [Mesa-dev] [Intel-gfx] [PATCH] intel: Add Geminilake PCI IDs

(dev) || \ > -- > 2.10.2 > > ___ > Intel-gfx mailing list > intel-...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx IDs cross checked in graphics specs. Reviewed-by: Anuj Phogat <anuj.pho...@gmai

Re: [Mesa-dev] [PATCH 2/2] i965/compiler: Disable trig workarounds on KBL+

On Tue, Nov 8, 2016 at 1:21 PM, Jason Ekstrand wrote: > The precision of our trig instructions instructions appears to have been > ​s/​instructions instructions/instructions > fixed on Kaby Lake. Neither Ben nor I can find any documentation for this. > However, the dEQP

Re: [Mesa-dev] [PATCH 2/2] i965: Advertise 8 subpixel bits always.

S; i++) { >struct gl_program_constants *prog = >Const.Program[i]; > -- > 2.10.2 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev ​Both patches are: ​ Revi

Re: [Mesa-dev] [Mesa-stable] [PATCH] nir: Flip gl_SamplePosition in nir_lower_wpos_ytransform().

pped vertically > with respect to the value expected by the GL, so we need to give it > the same treatment as gl_FragCoord. Fixes the following CTS tests on > i965: Makes sense. Reviewed-by: Anuj Phogat <anuj.pho.

Re: [Mesa-dev] [PATCH] anv/device: Return DEVICE_LOST if execbuf2 fails

buf2 failed: %m"); > + return vk_errorf(VK_ERROR_DEVICE_LOST, "execbuf2 failed: %m"); >} > } > > -- > 2.5.0.400.gff86faf > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/3] intel: aubinator: don't print out blocks twice

p.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Series is: Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] i965: Move gen8_disable_stages to brw_upload_initial_gpu_state

CH(0); > - OUT_BATCH(0); > - OUT_BATCH(0); > - OUT_BATCH(0); > - ADVANCE_BATCH(); > - > - BEGIN_BATCH(2); > - OUT_BATCH(_3DSTATE_WM_CHROMAKEY << 16 | (2 - 2)); > - OUT_BATCH(0); > - ADVANCE_BATCH(); > -} > - > -const struct brw_tracked_state gen8_disable_stages = { > -

Re: [Mesa-dev] [PATCH 1/2] i965: Program 3DSTATE_AA_LINE_PARAMETERS in upload_invariant_state

@@ static const struct brw_tracked_state > *gen7_render_atoms[] = > _polygon_stipple_offset, > > _line_stipple, > - _aa_line_parameters, > > _drawing_rect, > > @@ -360,7 +357,6 @@ static const struct brw_tracked_state > *gen8_render_atoms[] = >

Re: [Mesa-dev] [PATCH v2 4/6] i965/blit: Break blits into chunks in set_alpha_to_one

+ } > + OUT_BATCH(0x); /* white, but only alpha gets written */ > + ADVANCE_BATCH_TILED(dst_y_tiled, false); > + } > } > - OUT_BATCH(0x); /* white, but only alpha gets written */ > - ADVANCE_BATCH_TILED(dst_y_tiled, false); > > brw_emit_mi_flush(brw); > } > -- > 2.5.0.400.gff86faf > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev Series is: Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 4/4] mesa: rename gl_client_array -> gl_vertex_array

ray->Size * _mesa_sizeof_type(array->Type); > } > @@ -140,7 +140,7 @@ check_flush( struct copy_context *copy ) > */ > static void > dump_draw_info(struct gl_context *ctx, > - const struct gl_client_array **arrays, > +

Re: [Mesa-dev] [PATCH 4/4] i965: Fix alpha-to-coverage and alpha test enabled checks

On Tue, Oct 25, 2016 at 4:36 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: > On Tue, Oct 25, 2016 at 7:09 PM, Anuj Phogat <anuj.pho...@gmail.com> wrote: >> Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> >> --- >> src/mesa/drivers/dri/i965/brw_wm.c

Re: [Mesa-dev] [PATCH 2/4] mesa: Add helper function _mesa_is_alpha_test_enabled()

On Tue, Oct 25, 2016 at 5:14 PM, Brian Paul <bri...@vmware.com> wrote: > On 10/25/2016 04:09 PM, Anuj Phogat wrote: >> >> Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> >> --- >> src/mesa/main/framebuffer.c | 7 +++ >> src/mesa/main/f

[Mesa-dev] [PATCH 3/4] mesa: Add helper function _mesa_is_alpha_to_coverage_enabled()

Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/mesa/main/framebuffer.c | 9 + src/mesa/main/framebuffer.h | 3 +++ 2 files changed, 12 insertions(+) diff --git a/src/mesa/main/framebuffer.c b/src/mesa/main/framebuffer.c index f19f3af..3aff102 100644 --- a/src/mes

[Mesa-dev] [PATCH 2/4] mesa: Add helper function _mesa_is_alpha_test_enabled()

Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/mesa/main/framebuffer.c | 7 +++ src/mesa/main/framebuffer.h | 3 +++ 2 files changed, 10 insertions(+) diff --git a/src/mesa/main/framebuffer.c b/src/mesa/main/framebuffer.c index e1505fa..f19f3af 100644 --- a/src/mes

[Mesa-dev] [PATCH 4/4] i965: Fix alpha-to-coverage and alpha test enabled checks

Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com> --- src/mesa/drivers/dri/i965/brw_wm.c | 4 ++-- src/mesa/drivers/dri/i965/gen6_wm_state.c| 5 +++-- src/mesa/drivers/dri/i965/gen7_wm_state.c| 5 +++-- src/mesa/drivers/dri/i965/gen8_depth_state.c | 4 ++-- 4 files chang

<    1   2   3   4   5   6   7   8   9   10   >