Re: [Mesa-dev] [PATCH 8/8] r600/radeonsi: enable glsl/tgsi on-disk cache

On Tue, Feb 21, 2017 at 7:45 PM, Timothy Arceri wrote: > For gpu generations that use LLVM we create a timestamp string > containing both the LLVM and Mesa build times, otherwise we just > use the Mesa build time. Why not use the build id for Mesa?

Re: [Mesa-dev] [PATCH] glsl: enable early_fragment_tests implicitly with post_depth_coverage

On Wed, Feb 22, 2017 at 12:06 AM, Iago Toral Quiroga wrote: > From: Iago Toral Quiroga Oops :) ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org

Re: [Mesa-dev] [PATCH mesa 8/8] eglapi: replace linear entrypoint search with binary search

On Sun, Feb 19, 2017 at 3:23 PM, Eric Engestrom wrote: > Tested with dEQP-EGL.functional.get_proc_address.* > > Signed-off-by: Eric Engestrom > --- > src/egl/main/eglapi.c | 37 - > 1 file changed, 24 insertions(+), 13

Re: [Mesa-dev] [PATCH] vulkan/wsi: Improve the DRI3 error message

On Sat, Feb 18, 2017 at 1:31 PM, Jacob Lifshay wrote: > This commit improves the message by telling them that they could probably > enable DRI3. More importantly, it includes a little heuristic to check > to see if we're running on AMD or NVIDIA's proprietary X11

Re: [Mesa-dev] mesa3d.org is now synced to docs/

On Fri, Feb 17, 2017 at 4:59 PM, Eric Engestrom wrote: > Hey all, > > I (finally) set up the git hook, which means that the website [1] is now > automagically updated whenever a change in docs/* on master is pushed. > > There might be bugs, and I'll be doing some other git hook

Re: [Mesa-dev] [PATCH v2 2/2] vulkan: Combine wsi and util makefiles

Nice, thanks. Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] vulkan/util: Add generator for enum_to_str functions

NG BUT NOT LIMITED TO THE WARRANTIES OF > MERCHANTABILITY, > +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT > SHALL THE > +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER > +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, &g

Re: [Mesa-dev] [PATCH 7/7] i965: Enable ARB_transform_feedback2 on Sandybridge.

On Fri, Feb 17, 2017 at 1:56 AM, Kenneth Graunke wrote: > The only feature over and above ES 3.0 is DrawTransformFeedback(). > > We already have to do the whole SOL_NUM_PRIMS_WRITTEN counter dance in > order to compute the SVBI value for ResumeTransformFeedback(), at which

Re: [Mesa-dev] [PATCH shader-db 4/4] add special script to run on intel hardware

On Thu, Feb 16, 2017 at 4:29 AM, Lionel Landwerlin wrote: > Intel produces fairly beefy Xeon servers on which it would be nice to be > able to run shader-db to get some results pretty fast. Unfortunately those > don't ship with any intel graphics IP (only ancient

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

an Gray <j...@jsg.id.au> wrote: >>> > On Wed, Feb 15, 2017 at 11:11:50AM -0800, Matt Turner wrote: >>> >> Provides the ability to read the .note.gnu.build-id section of ELF >>> >> binaries, which is inserted by the --build-id=... flag to ld. >>> >>

Re: [Mesa-dev] [PATCH 1/2] i965: Add an OUT_BATCH64() macro.

On Tue, Feb 14, 2017 at 1:45 PM, Kenneth Graunke wrote: > diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h > b/src/mesa/drivers/dri/i965/intel_batchbuffer.h > index bf7cadfc4d6..da8f7e561f4 100644 > --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h > +++

Re: [Mesa-dev] Automated fuzzy testing of shader compilers - contacts in Mesa?

On Thu, Feb 16, 2017 at 9:11 AM, Hugues Evrard wrote: > Hi all, > > I'm a researcher at Imperial College London, my group is working on a > testing framework for graphics drivers, in particular shader compilers, > and we would like to get in touch with Mesa shader

Re: [Mesa-dev] [PATCH] i965/fs: fix 32-bit data type to int64 conversion on BSW/BXT

ion doesn't say this. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660 > No newline here. > Signed-off-by: Samuel Iglesias Gonsálvez <sigles...@igalia.com> > Tested-by: Mark Janes <mark.a.ja...@intel.com> Reviewed-by: Matt Turner <matts...@gmail.com>

Re: [Mesa-dev] [PATCH shader-db 1/4] run: add -j option to select number of threads

On Thu, Feb 16, 2017 at 4:29 AM, Lionel Landwerlin wrote: > Signed-off-by: Lionel Landwerlin > --- > run.c | 7 +-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/run.c b/run.c > index 2654bff..d2ec8c6 100644

[Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

Provides the ability to read the .note.gnu.build-id section of ELF binaries, which is inserted by the --build-id=... flag to ld. Reviewed-by: Emil Velikov --- configure.ac | 6 +++ src/util/Makefile.sources | 2 + src/util/build_id.c | 109

[Mesa-dev] [PATCH 2/2] anv: Use build-id for pipeline cache UUID.

The --build-id=... ld flag has been present since binutils-2.18, released 28 Aug 2007. --- src/intel/vulkan/Makefile.am | 1 + src/intel/vulkan/anv_device.c | 28 +++- 2 files changed, 8 insertions(+), 21 deletions(-) diff --git a/src/intel/vulkan/Makefile.am

Re: [Mesa-dev] [PATCH 2/2] anv: Use build-id for pipeline cache UUID.

On Wed, Feb 15, 2017 at 6:05 AM, Emil Velikov <emil.l.veli...@gmail.com> wrote: > Hi Matt, > > On 14 February 2017 at 23:58, Matt Turner <matts...@gmail.com> wrote: >> The --build-id=... ld flag has been present since binutils-2.18, >> released 28 Aug 2007. >&g

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

ot;GNU\0" strcmp is > applicable and not another string ? Worth adding a note/comment ? It's generated by GNU ld in all cases I'm aware of, so I think it's the same. > On 14 February 2017 at 23:58, Matt Turner <matts...@gmail.com> wrote: >> Provides the ability to read t

Re: [Mesa-dev] [PATCH] i965: define default allow_higher_compat_version value

Reviewed-by: Matt Turner <matts...@gmail.com> Please commit ASAP. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] anv: Rework the pipeline cache UUID

On Tue, Feb 14, 2017 at 3:52 PM, Jason Ekstrand wrote: > The new version does a SHA1 sum of the timestamp together with the > device PCI ID. This fixes a theoretical bug where, if you moved a drive > between machines, you could end up trying to use a pipeline cache from >

[Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

Provides the ability to read the .note.gnu.build-id section of ELF binaries, which is inserted by the --build-id=... flag to ld. --- configure.ac | 2 + src/util/Makefile.sources | 2 + src/util/build_id.c | 110 ++

[Mesa-dev] [PATCH 2/2] anv: Use build-id for pipeline cache UUID.

The --build-id=... ld flag has been present since binutils-2.18, released 28 Aug 2007. --- src/intel/vulkan/Makefile.am | 1 + src/intel/vulkan/anv_device.c | 28 +++- 2 files changed, 8 insertions(+), 21 deletions(-) diff --git a/src/intel/vulkan/Makefile.am

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

On Tue, Feb 14, 2017 at 12:43 PM, Nicholas Miell <nmi...@gmail.com> wrote: > On 02/14/2017 12:30 PM, Chad Versace wrote: >> >> On Tue 14 Feb 2017, Matt Turner wrote: >>> >>> Provides the ability to read the .note.gnu.build-id section of ELF >>&g

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

On Tue, Feb 14, 2017 at 11:39 AM, Kristian H. Kristensen <k...@bitplanet.net> wrote: > Matt Turner <matts...@gmail.com> writes: >> diff --git a/src/util/build_id.c b/src/util/build_id.c >> new file mode 100644 >> index 000..a2e21b7 >> --- /dev/null

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

On Tue, Feb 14, 2017 at 11:21 AM, Matt Turner <matts...@gmail.com> wrote: > On Tue, Feb 14, 2017 at 11:18 AM, Matt Turner <matts...@gmail.com> wrote: >> On Tue, Feb 14, 2017 at 10:59 AM, Jason Ekstrand <ja...@jlekstrand.net> >> wrote: >>> I'm not s

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

On Tue, Feb 14, 2017 at 11:18 AM, Matt Turner <matts...@gmail.com> wrote: > On Tue, Feb 14, 2017 at 10:59 AM, Jason Ekstrand <ja...@jlekstrand.net> wrote: >> I'm not sure how I feel about the silent fall-backs. At least in the Vulkan >> driver, we should fail to compi

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

On Tue, Feb 14, 2017 at 10:59 AM, Jason Ekstrand wrote: > I'm not sure how I feel about the silent fall-backs. At least in the Vulkan > driver, we should fail to compile if we can't get build-id. Otherwise, > you'll end up compiling a driver that will always fail device

Re: [Mesa-dev] GLSL IR & TGSI on-disk shader cache

On Tue, Feb 7, 2017 at 3:31 PM, Timothy Arceri <t_arc...@yahoo.com.au> wrote: > On Tue, 2017-02-07 at 23:58 +0100, Matt Turner wrote: >> On Tue, Feb 7, 2017 at 4:42 AM, Timothy Arceri <tarc...@itsqueeze.com >> > wrote: >> > This series adds support for

[Mesa-dev] [PATCH 2/2] anv: Use build-id for pipeline cache UUID.

The --build-id=... ld flag has been present since binutils-2.18, released 28 Aug 2007. --- src/intel/vulkan/Makefile.am | 1 + src/intel/vulkan/anv_device.c | 31 --- 2 files changed, 13 insertions(+), 19 deletions(-) diff --git a/src/intel/vulkan/Makefile.am

[Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

Provides the ability to read the .note.gnu.build-id section of ELF binaries, which is inserted by the --build-id=... flag to ld. --- configure.ac | 2 + src/util/Makefile.sources | 2 + src/util/build_id.c | 109 ++

Re: [Mesa-dev] Query with respect to support of x32

On Tue, Feb 14, 2017 at 7:35 AM, Grazvydas Ignotas wrote: > On Tue, Feb 14, 2017 at 3:12 PM, Haridasan, Sujith > wrote: >> I am using mesa 12.0.1 from yocto project >>

Re: [Mesa-dev] [PATCH] mesa: lower severity for GLSL compiler warnings

ors;" Reviewed-by: Matt Turner <matts...@gmail.com> I'll give it a day or so before I commit it, so others have an opportunity to comment. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 3/3] Changed shader disassembler number formatting to use integers when the "disasm" debug flag is used. Register types and regions are also now formatted more like in the archit

On Mon, Feb 13, 2017 at 3:25 AM, Lonnberg, Toni wrote: > --- We need a summary message that gives an overview of what's going on. I see at least the following changes: - Colon before the register type - Semi-colon instead of comma after VertStride - Printing

Re: [Mesa-dev] [PATCH 2/3] Added support for disassembling SENDS and SENDSC.

On Mon, Feb 13, 2017 at 3:25 AM, Lonnberg, Toni wrote: > --- > src/mesa/drivers/dri/i965/brw_disasm.c | 109 > +++-- > src/mesa/drivers/dri/i965/brw_inst.h | 31 +- > 2 files changed, 135 insertions(+), 5 deletions(-) > > diff

Re: [Mesa-dev] [PATCH 1/3] Added label support for shader disassembly. SEND and SENDC formatting now also includes the SFID information.

Patches' titles should have a prefix. These should likely be "i965: " Also, I don't know what you mean by a label. The target of an unstructured jump? The commit message should explain and provide some background information. On Mon, Feb 13, 2017 at 3:25 AM, Lonnberg, Toni

Re: [Mesa-dev] [PATCH 26/26] gallium: implement the backend of threaded GL dispatch

On Wed, Feb 8, 2017 at 6:03 PM, Marek Olšák wrote: > From: Marek Olšák > > --- > src/gallium/include/state_tracker/st_api.h | 19 +++ > src/gallium/state_trackers/dri/dri_context.c| 10 ++ >

Re: [Mesa-dev] Time to merge threaded GL dispatch? (aka glthread)

On Thu, Feb 9, 2017 at 3:03 PM, Marek Olšák <mar...@gmail.com> wrote: > On Thu, Feb 9, 2017 at 1:52 PM, Ian Romanick <i...@freedesktop.org> wrote: >> On 02/08/2017 10:26 AM, Nicolai Hähnle wrote: >>> On 07.02.2017 23:54, Matt Turner wrote: >>>> On Tue,

Re: [Mesa-dev] [PATCH 01/10] glx: remove always true ifdef guards

On Thu, Feb 9, 2017 at 3:22 PM, Matt Turner <matts...@gmail.com> wrote: > On Thu, Feb 9, 2017 at 1:35 PM, Emil Velikov <emil.l.veli...@gmail.com> wrote: >> From: Emil Velikov <emil.veli...@collabora.com> >> >> The two symbols referenced were introduced with v

Re: [Mesa-dev] [PATCH 05/10] glx: remove DRI2DriverPrimeShift compile guards

On Thu, Feb 9, 2017 at 1:35 PM, Emil Velikov wrote: > From: Emil Velikov > > Macro will always be defined as of earlier commit. Same comment as 04/10. ___ mesa-dev mailing list

Re: [Mesa-dev] [PATCH 04/10] vl: remove DRI2DriverPrimeShift compile guards

On Thu, Feb 9, 2017 at 1:35 PM, Emil Velikov wrote: > From: Emil Velikov > > Macro will always be defined as of earlier commit. How about something like DRI2DriverPrimeShift was added in dri2proto-2.8, which we now require as of the

Re: [Mesa-dev] [PATCH 01/10] glx: remove always true ifdef guards

On Thu, Feb 9, 2017 at 1:35 PM, Emil Velikov <emil.l.veli...@gmail.com> wrote: > From: Emil Velikov <emil.veli...@collabora.com> > > The two symbols referenced were introduced with v2.2 and 2.3 of > the dri2proto package. ... and we require dri2proto >= 2.6. Revi

Re: [Mesa-dev] [PATCH 09/26] glapi: Generate GL API marshalling code from the XML.

On Wed, Feb 8, 2017 at 6:03 PM, Marek Olšák wrote: > From: Paul Berry > > This is not yet used in the build, just generated. > > v2: Add missing build dependencies. > v3: Avoid mixing declarations and code, remove logic for avoiding emitting > code

Re: [Mesa-dev] GLSL IR & TGSI on-disk shader cache

On Wed, Feb 8, 2017 at 11:38 AM, Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> wrote: > On Wed, Feb 8, 2017, at 11:25, Matt Turner wrote: >> On Wed, Feb 8, 2017 at 12:31 AM, Timothy Arceri <t_arc...@yahoo.com.au> >> wrote: >> > On Tue, 2017-02-07 at 23:58 +0100,

Re: [Mesa-dev] GLSL IR & TGSI on-disk shader cache

On Wed, Feb 8, 2017 at 12:31 AM, Timothy Arceri <t_arc...@yahoo.com.au> wrote: > On Tue, 2017-02-07 at 23:58 +0100, Matt Turner wrote: >> On Tue, Feb 7, 2017 at 4:42 AM, Timothy Arceri <tarc...@itsqueeze.com >> > wrote: >> > This series adds support for

Re: [Mesa-dev] GLSL IR & TGSI on-disk shader cache

On Tue, Feb 7, 2017 at 4:42 AM, Timothy Arceri wrote: > This series adds support for a GLSL IR level and TGSI (OpenGL/st) > level caches. > > There are a few small bug fixes and a little bit of restructuring > to the GLSL IR patches to make things work for Gallium drivers

Re: [Mesa-dev] Time to merge threaded GL dispatch? (aka glthread)

On Tue, Feb 7, 2017 at 10:56 AM, Marek Olšák wrote: > On Tue, Feb 7, 2017 at 2:57 AM, Kenneth Graunke wrote: >> On Monday, February 6, 2017 8:54:40 PM PST Marek Olšák wrote: >>> On Mon, Feb 6, 2017 at 8:20 PM, Ernst Sjöstrand wrote: >>>

Re: [Mesa-dev] [Mesa-announce] [ANNOUNCE] mesa 17.0.0-rc3

On Mon, Feb 6, 2017 at 3:02 PM, Emil Velikov wrote: > The third release candidate for Mesa 17.0.0 is now available. > > Note that we have a couple of issues that I'd like to see fixed. > If those are be not sorted by this Friday the final release will be > out,

Re: [Mesa-dev] [PATCH v2 2/2] anv: Implement the Sky Lake stencil PMA optimization

On Fri, Feb 3, 2017 at 5:37 PM, Jason Ekstrand wrote: > On Thu, Feb 2, 2017 at 11:18 PM, Ben Widawsky wrote: >> s/Sky Lake/Skylake/g > > > I can never figure out which it's supposed to be. The PRM says "Skylake" > but I thought ARC said "Sky Lake" but,

[Mesa-dev] [PATCH] glsl: Allow compatibility shaders with MESA_GL_VERSION_OVERRIDE=...

Previously if you used MESA_GL_VERSION_OVERRIDE=3.3COMPAT, Mesa exposed an OpenGL 3.3 compatibility profile context (with various unimplemented features and bugs), but still refused to compile shaders with #version 330 compatibility This patch simply adds a small bit of plumbing to let that

Re: [Mesa-dev] [PATCH] Revert "i915: Always enable GL 2.0 support."

On Sun, Jan 29, 2017 at 8:29 PM, Kenneth Graunke <kenn...@whitecape.org> wrote: > On Sunday, January 29, 2017 6:20:10 PM PST Matt Turner wrote: >> This partially reverts commit 97217a40f97cdeae0304798b607f704deb0c3558. >> It leaves ES 2.0 support in place per Ian's sugge

[Mesa-dev] [PATCH] Revert "i915: Always enable GL 2.0 support."

This partially reverts commit 97217a40f97cdeae0304798b607f704deb0c3558. It leaves ES 2.0 support in place per Ian's suggestion, because ES 2.0 is designed to work on hardware like i915. The piglit results look like: name: before-revert-i915 after-revert-i915

Re: [Mesa-dev] [PATCH 2/2] isl/formats: Only advertise sampling for A4B4G4R4 on Broadwell

On Fri, Jan 27, 2017 at 2:18 PM, Jason Ekstrand wrote: > This causes hangs on Broadwell if you try to render to it. I have no > idea how we managed to not hit this earlier. > > Cc: "13.0 17.0" > --- > src/intel/isl/isl_format.c | 5 +++--

Re: [Mesa-dev] [PATCH 0/8] LLVM requirement for drivers using draw

On Thu, Jan 26, 2017 at 10:27 AM, Emil Velikov wrote: > With this in mind we can drop the LLVM requirement, which some > builders/distros explicitly patch out. Like who? I'm not sure why binary distros would do such a thing. Gentoo used to have a patch that removed the

Re: [Mesa-dev] [PATCH] radv: automake: Don't install vk_platform.h or vulkan.h.

Cc: Dave Airlie <airl...@redhat.com> > Cc: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> > Cc: Matt Turner <matts...@gmail.com> > Cc: 17.0 <mesa-sta...@lists.freedesktop.org> > Signed-off-by: Emil Velikov <emil.veli...@collabora.com> > --- > Fixing ANV a

[Mesa-dev] Build failure of Gallium OSMesa without LLVM

Reported against 17.0.0-rc2 [1], but occurs on master as well Reproduce with ./configure --with-dri-drivers= --with-gallium-drivers=swrast --disable-gallium-llvm --enable-gallium-osmesa Fails linking Gallium OSMesa with undefined references to draw_llvm_destroy.

Re: [Mesa-dev] [PATCH] configure.ac: move require_dri_shared_libs_and_glapi() before its users

I ran into this with mesa-17.0.0_rc2. This patch should go into the 17.0 branch. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH mesa] docs/repository: fix name of main branch

On Thu, Jan 26, 2017 at 10:11 AM, Eric Engestrom <eric.engest...@imgtec.com> wrote: > This is git, not svn :P > > Signed-off-by: Eric Engestrom <eric.engest...@imgtec.com> Reviewed-by: Matt Turner <matts...@gmail.com> > --- > I also noticed some differe

Re: [Mesa-dev] [PATCH 1/8] nir: silence implicit conversion to 64bit

On Thu, Jan 26, 2017 at 10:22 AM, Jason Ekstrand wrote: > Ugh... windows defines long to be 32-bit on 32-bit platforms Yeah. long is 32-bit on 32-bit x86/Linux too... I think you mean they define long to be 32-bits on 64-bit platforms.

Re: [Mesa-dev] [PATCH] vulkan: Don't install vk_platform.h or vulkan.h.

On Mon, Jan 23, 2017 at 4:54 PM, Matt Turner <matts...@gmail.com> wrote: > These files belong to the vulkan loader. I forgot to add the tag, but this (commit 045f38a5075) should go to the 17.0 branch. Emil, can you see to that? ___ mesa-dev mai

[Mesa-dev] Can we support llvm-4.0 with mesa-13.0.x?

To make distributions lives easier, can we please support llvm-4.0 in the mesa-13.0 branch? It currently fails to compile: https://bugs.gentoo.org/show_bug.cgi?id=606608 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org

Re: [Mesa-dev] [PATCH] i965: Use a UW source type for CS_OPCODE_CS_TERMINATE.

On Tue, Jan 24, 2017 at 2:18 PM, Kenneth Graunke wrote: > SIMD16 compute shaders use a send(16) with mlen 1 for the EOT message, > using a source of g127 for the single register. With a UD type, this > supposedly could read g128, which doesn't exist, causing the simulator

Re: [Mesa-dev] [PATCH] vulkan: Don't install vk_platform.h or vulkan.h.

On Tue, Jan 24, 2017 at 8:41 AM, Emil Velikov <emil.l.veli...@gmail.com> wrote: > On 24 January 2017 at 00:54, Matt Turner <matts...@gmail.com> wrote: >> These files belong to the vulkan loader. > Fully agreed, patch is > Reviewed-by: Emil Velikov <emil.veli...@coll

[Mesa-dev] [PATCH] vulkan: Don't install vk_platform.h or vulkan.h.

These files belong to the vulkan loader. --- src/intel/vulkan/Makefile.am | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/intel/vulkan/Makefile.am b/src/intel/vulkan/Makefile.am index fba3d66..95f276e 100644 --- a/src/intel/vulkan/Makefile.am +++

Re: [Mesa-dev] [PATCH 3/3] i965: Use correct VertStride on align16 instructions.

On Mon, Jan 23, 2017 at 2:59 AM, Samuel Iglesias Gonsálvez <sigles...@igalia.com> wrote: > On Fri, 2017-01-20 at 14:25 -0800, Francisco Jerez wrote: >> Matt Turner <matts...@gmail.com> writes: >> >> > In commit c35fa7a, we changed the "width"

Re: [Mesa-dev] [PATCH 0/3] i965: IVB/BYT fp64 fixes

Thanks Sam! ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] nir/search: Use the correct bit size for integer comparisons

On Thu, Jan 19, 2017 at 9:47 PM, Jason Ekstrand wrote: > This gets the UE4 bitfield_extract optimization working again. It had > stopped working due to the constant 0xff00ff00 getting sign-extended > when it shouldn't have. Wait, what? When did it get broken?

Re: [Mesa-dev] [PATCH] glsl: Rename [u]int64_t tokens.

Elsewhere we use _TOK. Not sure if you want to move to _TOKEN everywhere. Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/2] i965: Select DF type for 64-bit integers on Gen < 8.

Gen8 adds Q/UQ types. We attempted to change the types back to DF in the generator (commit c95380c40), but an assertion added in the FP64 series (commit e481dcc3) triggers before that code has a chance to execute. In fact, using Q/UQ in the IR and then changing to DF in the generator would not

[Mesa-dev] [PATCH 2/2] Revert "i965: Really don't emit Q or UQ moves on Gen < 8"

This reverts commit c95380c4044237d73fb537511667c3c8f658fcee. --- src/mesa/drivers/dri/i965/brw_eu_emit.c | 8 1 file changed, 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index 4b557d9..de6a1d9 100644 ---

Re: [Mesa-dev] [PATCH v2 09/20] i965/fs: indirect addressing with doubles is not supported in IVB/BYT

On Tue, Jan 17, 2017 at 1:49 AM, Samuel Iglesias Gonsálvez wrote: > It is tested empirically that IVB/BYT don't support indirect addressing > with doubles but it is not documented in the PRM. > > This patch applies the same solution than for Cherryview/Broxton and > takes

[Mesa-dev] [PATCH 2/3] i965/vec4: Fix exec size for MOVs SET_{HIGH, LOW}_32BIT.

Otherwise for a pack_double_2x32_split opcode, we emit: vec1 64 ssa_135 = pack_double_2x32_split ssa_133, ssa_134 mov(8) g5<1>UD g5<4>.xUD { align16 1Q compacted }; mov(8) g7<2>UD g5<4,4,1>UD { align1 1Q };

[Mesa-dev] [PATCH 1/3] i965: Handle IVB DF differences in the validator.

On IVB/BYT, region parameters and execution size for DF are in terms of 32-bit elements, so they are doubled. For evaluating the validity of an instruction, we halve them. --- src/mesa/drivers/dri/i965/brw_eu_validate.c | 12 1 file changed, 12 insertions(+) diff --git

[Mesa-dev] [PATCH 0/3] i965: IVB/BYT fp64 fixes

I committed my EU validator earlier today. It's caught three bugs in the IVB fp64 series. Patches 2 and 3 fix two of them. I'll respond directly to the patch in Igalia's series that introduces the other bug. These should go in with Igalia's series, before the extension is turned on.

[Mesa-dev] [PATCH 3/3] i965: Use correct VertStride on align16 instructions.

In commit c35fa7a, we changed the "width" of DF source registers to 2, which is conceptually fine. Unfortunately a VertStride of 2 is not allowed by align16 instructions on IVB/BYT, and the regular VertStride of 4 works fine in any case. See

Re: [Mesa-dev] [PATCH v2 06/20] i965/fs: fix dst stride in IVB/BYT type conversions

On Thu, Jan 19, 2017 at 4:50 AM, Samuel Iglesias Gonsálvez wrote: > As we are blocking the release and there more patches for review, > another possibility is to land this patch [2] (replacing this patch) > and then fix it later to not block Mesa 17.0 release more than

Re: [Mesa-dev] [PATCH v2 05/20] i965: Use <0, 2, 1> region for scalar DF sources on IVB/BYT.

On Wed, Jan 18, 2017 at 2:45 AM, Samuel Iglesias Gonsálvez <sigles...@igalia.com> wrote: > On Tue, 2017-01-17 at 13:33 -0800, Francisco Jerez wrote: >> Samuel Iglesias Gonsálvez <sigles...@igalia.com> writes: >> >> > From: Matt Turner <matts...@gmail.com>

Re: [Mesa-dev] [PATCH v2 05/20] i965: Use <0, 2, 1> region for scalar DF sources on IVB/BYT.

On Tue, Jan 17, 2017 at 1:33 PM, Francisco Jerez <curroje...@riseup.net> wrote: > Samuel Iglesias Gonsálvez <sigles...@igalia.com> writes: > >> From: Matt Turner <matts...@gmail.com> >> >> On HSW+, scalar DF sources can be accessed using the normal <0,

Re: [Mesa-dev] [PATCH 2/2] i965: Make DCE set null destinations on messages with side effects.

On Tue, Jan 17, 2017 at 2:38 PM, Francisco Jerez <curroje...@riseup.net> wrote: > Matt Turner <matts...@gmail.com> writes: > >> On Tue, Jan 17, 2017 at 11:40 AM, Francisco Jerez <curroje...@riseup.net> >> wrote: >>> Kenneth Graunke <kenn...@whit

Re: [Mesa-dev] [PATCH] nir: bump loop max unroll limit

On Tue, Jan 17, 2017 at 1:01 PM, Timothy Arceri wrote: > This number was chosen in an attempt to match the limits applied to > GLSL IR. > > A recent attempt to disable the GLSL IR optimisation loop in the i965 > backend resulted in 4 loops from The Talos Principle

Re: [Mesa-dev] [PATCH 2/2] i965: Make DCE set null destinations on messages with side effects.

On Tue, Jan 17, 2017 at 11:40 AM, Francisco Jerez <curroje...@riseup.net> wrote: > Kenneth Graunke <kenn...@whitecape.org> writes: > >> (Co-authored by Matt Turner.) >> >> Image atomics, for example, return a value - but the shader may not >> want to use i

Re: [Mesa-dev] [PATCH 19/22] i965/vec4: fix SIMD-with lowering for CMP/MOV instructions with conditional modifiers

On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez wrote: > From: "Juan A. Suarez Romero" > > When splitting a CMP/MOV instruction with NULL dest, DF sources, and > conditional modifier; we can't use directly the flag registers, as they will >

Re: [Mesa-dev] [PATCH] i965: Enable OpenGL 4.5 on Haswell.

we've reached the top of the mountain. Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 17/22] i965/vec4: fix register_coalesce() for partial writes

On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez wrote: > From: "Juan A. Suarez Romero" > > When lowering double_to_single() we added a final mov() that puts 32-bit I can't confirm that this patch is necessary in the current

Re: [Mesa-dev] [PATCH 15/22] i965/vec4: fix SIMD-width lowering for double_to_single operation in IVB/VLV

On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez wrote: > From: "Juan A. Suarez Romero" > > When spliting double_to_single() in Ivybridge/Valleyview, the second > part should use a temporal register, and then move the values to the > second

Re: [Mesa-dev] [PATCH 14/22] i965/vec4: fix double_to_single() for IVB/VLV

On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez wrote: > From: "Juan A. Suarez Romero" > > In the generator we must generate slightly different code for > Ivybridge/Valleview, because of the way the stride works in > this hardware. > --- >

Re: [Mesa-dev] [PATCH 09/22] i965/fs: add lowering x2d step for IVB/VLV

ide effect of this is that we can simplify VEC4_OPCODE_TO_DOUBLE. From 5637d035982c89415d47be119ad6a1c9d2e14e42 Mon Sep 17 00:00:00 2001 From: Matt Turner <matts...@gmail.com> Date: Thu, 12 Jan 2017 18:05:58 -0800 Subject: [PATCH] i965: Use source region <1,2,0> when converting to DF. Doing so allows us to u

Re: [Mesa-dev] [PATCH] util: import sha1 implementation from OpenBSD

On Fri, Jan 13, 2017 at 1:01 PM, Vladislav Egorov wrote: > 2017-01-13 22:43 GMT+03:00 Emil Velikov : >> >> On 13 January 2017 at 19:22, Vladislav Egorov wrote: >> > 13.01.2017 19:51, Emil Velikov пишет: >> >> >> >> From: Emil

Re: [Mesa-dev] [PATCH] util: import sha1 implementation from OpenBSD

I am generally in favor of this for all the reasons you've described. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 3/3] gallivm: Reenable PPC VSX

On Fri, Jan 13, 2017 at 12:39 PM, Ben Crocker wrote: > Reenable the PPC64LE Vector-Scalar Extension for LLVM versions >= 3.8.1, > now that LLVM bug 26775 and its corollary, 25503, are fixed. > > Signed-off-by: Ben Crocker > --- >

Re: [Mesa-dev] [PATCH] util: import sha1 implementation from OpenBSD

On Fri, Jan 13, 2017 at 11:51 AM, Dylan Baker wrote: > Quoting Emil Velikov (2017-01-13 08:51:31) >> From: Emil Velikov >> >> At the moment we support 5+ different implementations each with varying >> amount of bugs - from thread safely problems

Re: [Mesa-dev] [PATCH] shader-db: Update the README

On Fri, Jan 13, 2017 at 10:04 AM, Elie Tournier wrote: > Use the binary to run shader-db instead of run.py > > Signed-off-by: Elie Tournier > --- > README | 18 -- > 1 file changed, 16 insertions(+), 2 deletions(-) > > diff --git

Re: [Mesa-dev] NaN behavior in GLSL (was Re: [PATCH] glsl: always do sqrt(abs()) and inversesqrt(abs()))

On Thu, Jan 12, 2017 at 4:56 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: > On Thu, Jan 12, 2017 at 7:46 PM, Matt Turner <matts...@gmail.com> wrote: >> On Thu, Jan 12, 2017 at 3:20 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: >>> On Thu, Jan 12, 20

Re: [Mesa-dev] NaN behavior in GLSL (was Re: [PATCH] glsl: always do sqrt(abs()) and inversesqrt(abs()))

On Thu, Jan 12, 2017 at 3:20 PM, Ilia Mirkin wrote: > On Thu, Jan 12, 2017 at 6:04 PM, Nicolai Hähnle wrote: >> On 12.01.2017 23:46, Ilia Mirkin wrote: >>> >>> On Thu, Jan 12, 2017 at 4:03 PM, Matteo Bruni >>> wrote:

Re: [Mesa-dev] [PATCH 12/22] i965/vec4: split DF instructions and later duplicate its execsize in IVB/VLV

On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez wrote: > We need to split DF instructions in two on IVB/VLV as it needs an > execsize 8 to process 4 DF values (one GRF in total). > > Signed-off-by: Samuel Iglesias Gonsálvez > --- >

Re: [Mesa-dev] [PATCH 08/22] i965/fs: fix lower SIMD width for IVB/VLV's MOVE_INDIRECT

On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez wrote: > From: "Juan A. Suarez Romero" > s/MOVE_INDIRECT/MOV_INDIRECT/ in the subject > Previous to Broadwell, we have 8 registers for MOV_INDIRECT. But if > IVB/VLV deal with DFs, we will

Re: [Mesa-dev] [PATCH 07/22] i965/fs: fix dst stride in IVB/VLV type conversions

On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez wrote: > From: "Juan A. Suarez Romero" > > When converting a DF to F, we set dst stride to 2, to fulfil alignment > restrictions. > > But in IVB/VLV, this is not necessary, as each DF conversion

Re: [Mesa-dev] [PATCH 02/22] i965/fs: add helper to retrieve instruction data size

On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez wrote: > From: "Juan A. Suarez Romero" > > The execution data size is the biggest type size of any instruction > operand. > > We will use it to know if the instruction deals with DF, because in

Re: [Mesa-dev] [PATCH] nir/gcm: Rework the schedule late loop

depth < >state->blocks[best->index].loop_depth) > - best = lca; > - lca = lca->imm_dom; > + best = block; > + > + if (block == def->parent_instr->block) > + break; > } I had to come up wit

Re: [Mesa-dev] [PATCH] nir: optimise min/max fadd combos

Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] nir/i965: assert first is always less than 64

On Thu, Jan 12, 2017 at 3:24 AM, Juan A. Suarez Romero wrote: > This fixes a defect detected by Coverity Scan. > --- > src/mesa/drivers/dri/i965/brw_draw_upload.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c >

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