On Fri, Mar 23, 2018 at 8:51 PM, Marek Olšák wrote:
> diff --git a/src/gallium/include/pipe/p_state.h
> b/src/gallium/include/pipe/p_state.h
>>
>> index 4dce399f84..913a79faee 100644
>> --- a/src/gallium/include/pipe/p_state.h
>> +++ b/src/gallium/include/pipe/p_state.h
>> @@
diff --git a/src/gallium/include/pipe/p_state.h
b/src/gallium/include/pipe/p_state.h
> index 4dce399f84..913a79faee 100644
> --- a/src/gallium/include/pipe/p_state.h
> +++ b/src/gallium/include/pipe/p_state.h
> @@ -113,6 +113,7 @@ struct pipe_rasterizer_state
> unsigned line_smooth:1;
>
With optin '-b', shader-db now generates a shader program binary file
using GetProgramBinary(). This shader program binary can be loaded via
ProgramBinary() to be executed by an application later.
v2: 1. define MAX_LOG_LEN and use it as the size of gl log
2. define MAX_PROG_SIZE and use it as
I realized this model won't work with parellel execution.
I will fix it and post another version shortly.
On Wed, Mar 14, 2018 at 03:15:20PM -0700, Kenneth Graunke wrote:
> On Friday, March 9, 2018 2:28:36 PM PDT Dongwon Kim wrote:
> > Optional binding of variables can be processed before linking
On Fri, Mar 23, 2018 at 8:54 PM, Ilia Mirkin wrote:
> On Fri, Mar 23, 2018 at 8:51 PM, Marek Olšák wrote:
> > diff --git a/src/gallium/include/pipe/p_state.h
> > b/src/gallium/include/pipe/p_state.h
> >>
> >> index 4dce399f84..913a79faee 100644
> >> ---
On 22/03/18 19:05, Ian Romanick wrote:
> On 03/22/2018 01:12 AM, Alejandro Piñeiro wrote:
>> Any reason to not add tests on test_vec4_cmod_propagation as the fs
>> equivalent did?
> Laziness. :)
Ok, I guess that those could be added later on a different patch,
independently of this one.
>> Also,
On 03/23/2018 07:54 AM, Lin, Johnson wrote:
So the solution will be query if EXT_color_buffer_half_float is supported?
I think I found a proof that we don't actually need anything. Spec for
EXT_color_buffer_float adds following text:
--- 8< ---
An INVALID_OPERATION error is generated ...
Hi,
I have the following situation:
A PowerPC (T2080) big endian CPU with an AMD E8860 (little endian) PCIe
graphics card.
I have modified the radeonsi gallium driver to allow execution on big
endian (there was a
union with bitfields and an uint32_t index where the index was out of range
because
On 22/03/18 19:08, Ian Romanick wrote:
> On 03/22/2018 01:12 AM, Alejandro Piñeiro wrote:
>> Looks good in general, just a comment below.
>>
>>
>> On 22/03/18 01:58, Ian Romanick wrote:
>>> From: Ian Romanick
>>>
>>> This method is similar to the existing ::equals
On 03/21/2018 08:55 PM, Eric Engestrom wrote:
On March 21, 2018 6:47:48 PM UTC, Dylan Baker wrote:
Quoting Emil Velikov (2018-03-21 10:53:08)
On 21 March 2018 at 17:09, Eric Engestrom
wrote:
Cc: Maxin B. John
Cc:
Denormalized texture coordinates are required for text rendering in
GALLIUM_HUD.
Signed-off-by: Wladimir J. van der Laan
Reviewed-by: Ilia Mirkin
---
src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 3 ++-
src/gallium/drivers/freedreno/a2xx/ir-a2xx.c
Use DOT2ADDv instruction with 0.0f constant add.
Signed-off-by: Wladimir J. van der Laan
Reviewed-by: Ilia Mirkin
---
src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 21 +
1 file changed, 21 insertions(+)
Change since v2:
Add support for:
- PIPE_FORMAT_ETC1_RGB8
- PIPE_FORMAT_DXT1_RGB
- PIPE_FORMAT_DXT1_RGBA
- PIPE_FORMAT_DXT3_RGBA
- PIPE_FORMAT_DXT5_RGBA
Signed-off-by: Wladimir J. van der Laan
Reviewed-by: Ilia Mirkin
---
src/gallium/drivers/freedreno/a2xx/fd2_util.c |
Change use of BLEND_ to BLEND2_,
BLEND_* a3xx_rb_blend_opcode
BLEND2_* is a2xx_rb_blend_opcode
This makes no effective difference as the used enumerant has the same
value (0), but the other enumerants do not match 1-to-1 so this will
avoid future problems.
Signed-off-by: Wladimir J. van
While working on a205 support for i.MX51/53, I've also written some patches
that are not specific to a20x but should apply to the whole a2xx range.
As I'm figuring out how to handle backward compatibility to other a2xx, I
think it makes sense to send these upstream already to reduce the patch
Extend translate_sge_slt to emit these, in analogous fashion
but using CNDEv.
Signed-off-by: Wladimir J. van der Laan
Reviewed-by: Ilia Mirkin
---
src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 23 ---
1 file changed, 20
Textures will sometimes be updated if texture view state was
un-set, without this change that causes an assertion crash or
segfault.
Signed-off-by: Wladimir J. van der Laan
Reviewed-by: Ilia Mirkin
---
src/gallium/drivers/freedreno/a2xx/fd2_emit.c | 13
The format enumeration comes comes from the yamoto
register headers that are part of the amd-gpu kernel driver.
(see freedreno envytools commit 1b32c444f82cd7144d71602106462f59f146c1d0)
Signed-off-by: Wladimir J. van der Laan
Reviewed-by: Ilia Mirkin
---
ping Jason ..
On 22.03.2018 13:30, vadym.shovkoplias wrote:
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105440
Fixes: 2458ea95c56 "nir/lower_vec_to_movs: Coalesce movs on-the-fly when
possible"
Signed-off-by: Andriy Khulap
Signed-off-by: Vadym
fixes warnings like this:
[184/1137] Compiling C++ object 'src/compiler/glsl/glsl@sta/lower_jumps.cpp.o'.
In file included from ../src/mesa/main/mtypes.h:48,
from ../src/compiler/glsl_types.h:149,
from ../src/compiler/glsl/lower_jumps.cpp:59:
On 23/03/18 09:58, Tapani Pälli wrote:
>
> On 03/23/2018 07:54 AM, Lin, Johnson wrote:
>> So the solution will be query if EXT_color_buffer_half_float is
>> supported?
>
> I think I found a proof that we don't actually need anything. Spec for
> EXT_color_buffer_float adds following text:
>
> ---
On 23 March 2018 at 10:01, Marc Dietrich wrote:
> fixes warnings like this:
> [184/1137] Compiling C++ object
> 'src/compiler/glsl/glsl@sta/lower_jumps.cpp.o'.
> In file included from ../src/mesa/main/mtypes.h:48,
> from ../src/compiler/glsl_types.h:149,
>
I don't think it actually fixes anything, but that's nice not to have valgrind
warnings.
It manifests itself when running the piglit test : glsl-fs-raytrace-bug27060
==2058== Uninitialised byte(s) found during client check request
==2058==at 0xC5BB040: blob_write_bytes (blob.c:152)
==2058==
On Friday, 2018-03-23 11:01:23 +0100, Marc Dietrich wrote:
> fixes warnings like this:
> [184/1137] Compiling C++ object
> 'src/compiler/glsl/glsl@sta/lower_jumps.cpp.o'.
> In file included from ../src/mesa/main/mtypes.h:48,
> from ../src/compiler/glsl_types.h:149,
>
On Friday, 2018-03-23 09:33:39 +, Eric Engestrom wrote:
>
>
> On March 23, 2018 9:21:25 AM UTC, "Tapani Pälli"
> wrote:
> >
> >
> > On 03/21/2018 08:55 PM, Eric Engestrom wrote:
> > >
> > >
> > > On March 21, 2018 6:47:48 PM UTC, Dylan Baker
On 23.03.2018 12:18, Alejandro Piñeiro wrote:
On 23/03/18 09:58, Tapani Pälli wrote:
On 03/23/2018 07:54 AM, Lin, Johnson wrote:
So the solution will be query if EXT_color_buffer_half_float is
supported?
I think I found a proof that we don't actually need anything. Spec for
On Fri, Mar 23, 2018 at 8:52 PM, Robert Foss wrote:
> Hey Chih-Wei,
>
>
> On 03/23/2018 03:43 AM, Chih-Wei Huang wrote:
>>
>> 2018-03-22 16:23 GMT+08:00 Tomasz Figa :
>>>
>>> Hi Chih-Wei,
>>>
>>> On Thu, Feb 22, 2018 at 2:53 PM, Chih-Wei Huang
On March 23, 2018 9:21:25 AM UTC, "Tapani Pälli" wrote:
>
>
> On 03/21/2018 08:55 PM, Eric Engestrom wrote:
> >
> >
> > On March 21, 2018 6:47:48 PM UTC, Dylan Baker
> wrote:
> >> Quoting Emil Velikov (2018-03-21 10:53:08)
> >>> On 21 March 2018
Hey Chih-Wei,
On 03/23/2018 03:43 AM, Chih-Wei Huang wrote:
2018-03-22 16:23 GMT+08:00 Tomasz Figa :
Hi Chih-Wei,
On Thu, Feb 22, 2018 at 2:53 PM, Chih-Wei Huang wrote:
2018-02-21 3:03 GMT+08:00 Rob Herring :
Perhaps worth
Compose swizzles using util_format_compose_swizzles instead
of the custom code (which somehow had a bug).
This makes the GL_ALPHA internal format work.
Signed-off-by: Wladimir J. van der Laan
Reviewed-by: Ilia Mirkin
---
On Friday, 2018-03-23 12:15:42 +0100, Marc Dietrich wrote:
> Mostly false warnings, however AVX detection could have been problematic.
Thanks, but could you split this into one patch per logical change?
(In this case, that's one patch per file you changed)
>
> Signed-off-by: Marc Dietrich
Mostly false warnings, however AVX detection could have been problematic.
Signed-off-by: Marc Dietrich
---
src/compiler/spirv/vtn_subgroup.c| 2 ++
src/gallium/auxiliary/util/u_cpu_detect.c| 35 ++--
src/gallium/auxiliary/vl/vl_vlc.h
No good to have random data in serialized nir;
Reviewed-by: Tapani Pälli
On 23.03.2018 12:48, Lionel Landwerlin wrote:
I don't think it actually fixes anything, but that's nice not to have valgrind
warnings.
It manifests itself when running the piglit test :
On Thursday, March 8, 2018 7:42:53 AM PDT Lionel Landwerlin wrote:
> This register contains the frequency of the GT, it's one of the value
> GPA would like to have as part of their queries.
>
> Signed-off-by: Lionel Landwerlin
> ---
>
After giving it some thought, I don't think this patch is quite strong
enough to fix the real bug. The problem isn't that we're reswizzling a
register. The problem is that we're trying to coalesce something like
ssa_1 = fadd r1, r2
/* Some stuff */
r3 = vec4(ssa_1, ssa_1.y, ...)
coalescing
On 23 March 2018 at 17:51, Eric Engestrom wrote:
> before: Checking if "endian.h works" compiles: YES
> after: Checking if "endian.h" compiles: YES
>
> Signed-off-by: Eric Engestrom
Reviewed-by: Emil Velikov
On Wed, Mar 21, 2018 at 5:58 PM, Ian Romanick wrote:
> From: Ian Romanick
>
> This method is similar to the existing ::equals methods. Instead of
> testing that two src_regs are equal to each other, it tests that one is
> the negation of the
Would be really good to extend the vec4 tests too.
Reviewed-by: Matt Turner
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before: Checking if "endian.h works" compiles: YES
after: Checking if "endian.h" compiles: YES
Signed-off-by: Eric Engestrom
---
meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/meson.build b/meson.build
index
Otherwise we may end up trying to coalesce in a case such as
ssa_1 = fadd r1, r2
r3.x = fneg(r2);
r3 = vec4(ssa_1, ssa_1.y, ...)
and that would cause us to move the writes to r3 from the vec to the
fadd which would re-order them with respect to the write from the fneg.
In order to solve this, we
We need this for OpenCL kernels because we have to apply C rules for alignment
and padding inside structs and for this we also have to know if a struct is
packed or not.
Signed-off-by: Karol Herbst
---
src/compiler/glsl_types.cpp | 17 +++--
From: Rob Clark
Lightly edited to be valid 'C' code.
Is there a bug open to fix this upstream?
Signed-off-by: Rob Clark
Signed-off-by: Karol Herbst
---
src/compiler/spirv/OpenCL.std.h | 211
From: Rob Clark
An attempt to add physical pointer support to vtn. I'm not totally
happy about the handling of logical pointers vs physical pointers.
So this is really more of an RFS (request for suggestions)
v2: treat vec3 types as vec4 when dereferencing
Signed-off-by:
With OpenCL the size of some system value depends on the Physical model
choosen, so we need a way to load any system value as 32 or 64 bit.
Signed-off-by: Karol Herbst
---
src/compiler/nir/nir_builder.h | 10 +---
src/compiler/nir/nir_lower_alpha_test.c
With SPIR-V it is perfectly fine to declare builtins as constants and have no
constant initializer on them.
This change seems to be able to break Vulkan shaders, so please check if this
is the correct thing here.
Signed-off-by: Karol Herbst
---
From: Rob Clark
Signed-off-by: Rob Clark
Signed-off-by: Karol Herbst
---
src/compiler/spirv/spirv_to_nir.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/compiler/spirv/spirv_to_nir.c
From: Rob Clark
Signed-off-by: Karol Herbst
---
src/compiler/spirv/spirv_to_nir.c | 1 +
src/compiler/spirv/vtn_variables.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
Signed-off-by: Karol Herbst
---
src/compiler/spirv/vtn_variables.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/compiler/spirv/vtn_variables.c
b/src/compiler/spirv/vtn_variables.c
index 80fca6e8a32..51f73b3cf8c 100644
---
From: Marek Olšák
We'll need it for FBFETCH in both TGSI and NIR paths.
---
src/amd/common/ac_llvm_build.c| 56 +
src/amd/common/ac_llvm_build.h| 3 +
src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 74
On Friday, 2018-03-23 17:44:21 +, Emil Velikov wrote:
> From: Emil Velikov
>
> The currently we use the singular CHECK_HEADER combined with explicit
> append to the DEFINES variable. That is a legacy misnomer, since it
> requires us to add $DEFINES to every
On Wed, Mar 21, 2018 at 5:58 PM, Ian Romanick wrote:
> From: Ian Romanick
>
> Now that i965 recognizes that a-b generates the same conditions as 'a <
> b', there is no reason to condition this transformation on 'is not used
> by conditional.'
>
>
From: Mathias Fröhlich
Signed-off-by: Mathias Fröhlich
---
src/mesa/main/attrib.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/main/attrib.c b/src/mesa/main/attrib.c
index 9d3aa728a1..9c632ffb51 100644
---
From: Mathias Fröhlich
Signed-off-by: Mathias Fröhlich
---
src/mesa/vbo/vbo_exec_draw.c | 5 -
src/mesa/vbo/vbo_save_api.c | 2 ++
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/mesa/vbo/vbo_exec_draw.c
On 23/03/18 19:27, Matt Turner wrote:
> On Wed, Mar 21, 2018 at 5:58 PM, Ian Romanick wrote:
>> From: Ian Romanick
>>
>> This method is similar to the existing ::equals methods. Instead of
>> testing that two src_regs are equal to each other, it
v2: fix cl_size for arrays_of_arrays
Signed-off-by: Karol Herbst
---
src/compiler/glsl_types.cpp | 48 +
src/compiler/glsl_types.h | 10 ++
src/compiler/nir_types.cpp | 12
src/compiler/nir_types.h| 4
Signed-off-by: Karol Herbst
---
src/compiler/glsl_types.h | 34 ++
src/compiler/nir_types.h | 30 +-
2 files changed, 35 insertions(+), 29 deletions(-)
diff --git a/src/compiler/glsl_types.h
OpenCL kernels have raw pointers to global memory, so we need
instructions to load/store in order to dereference these pointers.
In some ways similar to other load/store intrinsics, but rather
than taking an offset as a src argument, they take a raw pointer
value (which can be 32b or 64b depending
Signed-off-by: Karol Herbst
---
src/compiler/spirv/spirv_to_nir.c | 3 +++
src/compiler/spirv/vtn_private.h | 2 ++
2 files changed, 5 insertions(+)
diff --git a/src/compiler/spirv/spirv_to_nir.c
b/src/compiler/spirv/spirv_to_nir.c
index 7ce7e9ba62e..edf02db584b 100644
---
second series here:
https://lists.freedesktop.org/archives/mesa-dev/2018-March/188218.html
Main difference to the last series is, that I tried to focus on the real core
pars we need to get basic OpenCL support in spirv_to_nir, so that we can run
more or less complex examples.
There are some
From: Marek Olšák
MSAA is supported using sample shading. Layered rendering and all texture
targets are also supported.
---
docs/features.txt | 2 +-
docs/relnotes/18.1.0.html | 1 +
From: Marek Olšák
For testing.
---
src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
src/gallium/drivers/radeon/r600_texture.c | 13 +++--
src/gallium/drivers/radeonsi/si_pipe.c| 1 +
src/gallium/drivers/radeonsi/si_pipe.h| 1 +
Signed-off-by: Karol Herbst
---
src/compiler/spirv/vtn_private.h | 5 +++--
src/compiler/spirv/vtn_variables.c | 14 +++---
2 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/src/compiler/spirv/vtn_private.h b/src/compiler/spirv/vtn_private.h
index
Signed-off-by: Karol Herbst
---
src/compiler/spirv/vtn_opencl.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/compiler/spirv/vtn_opencl.c b/src/compiler/spirv/vtn_opencl.c
index 3c5ecd22452..723a7edf9c2 100644
--- a/src/compiler/spirv/vtn_opencl.c
+++
OpenCL kernels have parameters (see pipe_grid_info::input), and so we
need a way to access them.
The offset source is the offset of the parameter to load in the kernel input
buffer.
v2: improve commit message
remove BASE
split lower_io changes into separate commit
Signed-off-by: Karol
From: Rob Clark
If local_size is not known at compile time, which is the case with
clover, use the load_local_group_size intrinsic instead.
Signed-off-by: Karol Herbst
---
src/compiler/nir/nir_lower_system_values.c | 25 +
1
From: Rob Clark
Not complete, mostly just adding things as I encounter them in CTS. But
not getting far enough yet to hit most of the OpenCL.std instructions.
v2: update hadd definition (Karol Herbst )
Signed-off-by: Rob Clark
From: Rob Clark
This assert is not valid for OpenCL kernels.
TODO can we somehow conditionally assert based on glsl vs cl??
Signed-off-by: Rob Clark
Signed-off-by: Karol Herbst
---
src/compiler/nir/nir.h | 1 -
1 file changed, 1
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader.c | 54 +++
src/gallium/drivers/radeonsi/si_shader_internal.h | 4 ++
2 files changed, 31 insertions(+), 27 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
Hi,
This is the second and fianl version, and it adds MSAA support and FBFETCH
tests into Gallium.
Please review.
Thanks,
Marek
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For OpenCL kernels we have an input buffer where most of the parameters are
stored. For this we have to keep track of alignment and padding rules to
correctly identify the offset of each parameter inside that buffer.
For this we can just rely on the new cl_size and cl_alignment glsl_type
From: Marek Olšák
---
src/gallium/auxiliary/util/u_tests.c | 168 ++-
1 file changed, 128 insertions(+), 40 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_tests.c
b/src/gallium/auxiliary/util/u_tests.c
index 86eee6e68b1..293a4580a9f
On Thursday, 22 March 2018 16:23:41 CET Brian Paul wrote:
> And improve the unreachable() error message.
Sure:
Reviewed-by: Mathias Fröhlich
best
Mathias
> ---
> src/mesa/state_tracker/st_glsl_types.cpp | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
>
Reviewed-by: Matt Turner
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Really nice, and thanks a lot for extending the unit tests. I've been
very happy with them, and they make me feel a lot more confident about
the code.
Reviewed-by: Matt Turner
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From: Mathias Fröhlich
Hi,
Following one fix and a set of asserts in the VAO area.
The changes already passed intels CI system.
Please review
Thanks and best
Mathias
Mathias Fröhlich (3):
mesa: When copying a VAO also copy the vertex attribute mode.
mesa: Flag
From: Mathias Fröhlich
Signed-off-by: Mathias Fröhlich
---
src/mesa/main/varray.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
index 69a08a646f..5df38a14f0 100644
---
On 03/23/2018 12:39 PM, mathias.froehl...@gmx.net wrote:
From: Mathias Fröhlich
Hi,
Following one fix and a set of asserts in the VAO area.
The changes already passed intels CI system.
Please review
Thanks and best
Mathias
Mathias Fröhlich (3):
mesa: When
Good call.
Reviewed-by: Matt Turner
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https://bugs.freedesktop.org/show_bug.cgi?id=105699
--- Comment #2 from Mark Janes ---
Agreed. I was hoping it was weird enough to pique your interest.
--
You are receiving this mail because:
You are the assignee for the bug.
You are the QA Contact for the
On Fri, Mar 23, 2018 at 9:15 PM, Jason Ekstrand wrote:
> On Fri, Mar 23, 2018 at 12:33 PM, Karol Herbst wrote:
>>
>> With OpenCL the size of some system value depends on the Physical model
>> choosen, so we need a way to load any system value as 32 or 64
From: Ian Romanick
A recent commit (see below) triggered some cases where conditional
modifier propagation and dead code elimination would cause a MAD
instruction like the following to be generated:
mad.l.f0 null, ...
Matt pointed out that
On 03/23/2018 12:17 PM, Chema Casanova wrote:
>
>
> On 23/03/18 19:27, Matt Turner wrote:
>> On Wed, Mar 21, 2018 at 5:58 PM, Ian Romanick wrote:
>>> From: Ian Romanick
>>>
>>> This method is similar to the existing ::equals methods. Instead of
Push constants have been a weird edge-case for a while in that they have
explitic offsets but we've been internally building access chains for
them. This mostly works but it means that passing pointers to push
constants through as function arguments is broken. The easy thing to do
for now is to
Now that push constants are using on-the-fly offsets, we no longer need
to handle access chains in vtn_pointer_to_offset.
---
src/compiler/spirv/spirv_to_nir.c | 2 +-
src/compiler/spirv/vtn_private.h | 2 +-
src/compiler/spirv/vtn_variables.c | 89 ++
3
---
.../nir/nir_lower_clip_cull_distance_arrays.c | 69 --
1 file changed, 65 insertions(+), 4 deletions(-)
diff --git a/src/compiler/nir/nir_lower_clip_cull_distance_arrays.c
b/src/compiler/nir/nir_lower_clip_cull_distance_arrays.c
index 95eda82..69b31d5 100644
---
---
src/intel/vulkan/anv_nir_lower_input_attachments.c | 31 +++---
src/intel/vulkan/anv_pipeline.c| 6 ++---
2 files changed, 19 insertions(+), 18 deletions(-)
diff --git a/src/intel/vulkan/anv_nir_lower_input_attachments.c
On Fri, Mar 23, 2018 at 2:42 PM, Jason Ekstrand
wrote:
> This is something that Connor and I have been talking about for some time
> now. The basic idea is to replace the current singly linked nir_deref list
> with deref instructions. This is similar to what LLVM does and
---
src/mesa/state_tracker/st_glsl_to_nir.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp
b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index 7d111d6..f62135a 100644
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++
The only thing still using old-school drefs are function calls.
---
src/compiler/spirv/spirv_to_nir.c | 119 +++--
src/compiler/spirv/vtn_cfg.c | 8 +-
src/compiler/spirv/vtn_glsl450.c | 19 ++--
src/compiler/spirv/vtn_private.h | 13 ++-
Since we had to rewrite the deref walking loop anyway, I took the
opportunity to make it a bit clearer and more efficient. In particular,
in the AoA case, we will now emit one minmax instead of one per array
level.
---
src/intel/compiler/brw_fs.h | 2 +-
src/intel/compiler/brw_fs_nir.cpp
---
src/compiler/nir/nir_lower_wpos_ytransform.c | 51 +++-
1 file changed, 42 insertions(+), 9 deletions(-)
diff --git a/src/compiler/nir/nir_lower_wpos_ytransform.c
b/src/compiler/nir/nir_lower_wpos_ytransform.c
index 62166e7..6212702 100644
---
---
src/intel/vulkan/anv_nir_lower_ycbcr_textures.c | 34 ++---
src/intel/vulkan/anv_pipeline.c | 6 ++---
2 files changed, 22 insertions(+), 18 deletions(-)
diff --git a/src/intel/vulkan/anv_nir_lower_ycbcr_textures.c
On Fri, Mar 23, 2018 at 12:33 PM, Karol Herbst wrote:
> From: Rob Clark
>
> If local_size is not known at compile time, which is the case with
> clover, use the load_local_group_size intrinsic instead.
>
> Signed-off-by: Karol Herbst
+list
On Fri, Mar 23, 2018 at 1:45 PM, Karol Herbst wrote:
> On Fri, Mar 23, 2018 at 9:30 PM, Jason Ekstrand
> wrote:
> > As I've been rewriting core NIR deref handling, I've been thinking about
> > this problem quite a bit. One objective I have is to
On Fri, Mar 23, 2018 at 2:15 PM, Karol Herbst wrote:
> On Fri, Mar 23, 2018 at 10:07 PM, Jason Ekstrand
> wrote:
> > +list
> >
> > On Fri, Mar 23, 2018 at 1:45 PM, Karol Herbst
> wrote:
> >>
> >> On Fri, Mar 23, 2018 at 9:30 PM,
Because nir_instr_remove is an inline wrapper around nir_instr_remove_v,
the compiler should be able to tell that the return value is unused and
not emit the extra code in most cases.
---
src/compiler/nir/nir.c| 2 +-
src/compiler/nir/nir.h| 16
Otherwise, any indirect push constant access results in an assertion
failure when we start digging through the channel_sizes array. This
fixes dEQP-VK.pipeline.push_constant.graphics_pipeline.dynamic_index_vert
on Haswell. It should be a harmless no-op for GL since indirect push
constants aren't
Cc: mesa-sta...@lists.freedesktop.org
---
src/compiler/nir/nir_lower_vars_to_ssa.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/nir/nir_lower_vars_to_ssa.c
b/src/compiler/nir/nir_lower_vars_to_ssa.c
index e8cfe30..0cc6514 100644
---
This fixes the fs-interpolateAtCentroid-block-array piglit test on i965.
Cc: mesa-sta...@lists.freedesktop.org
---
src/compiler/nir/nir_lower_indirect_derefs.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/src/compiler/nir/nir_lower_indirect_derefs.c
This commit adds a new instruction type to NIR for handling derefs.
Nothing uses it yet but this adds the data structure as well as all of
the code to validate, print, clone, and [de]serialize them.
---
src/compiler/nir/nir.c| 50 +++
src/compiler/nir/nir.h
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