This is an automated email from Gerrit.
Mathias Küster (kes...@freenet.de) just uploaded a new patch set to Gerrit,
which you can find at http://openocd.zylin.com/509
-- gerrit
commit f0a95f790f29fb92c910390970ef700d27d3f4f9
Author: Mathias K
Date: Fri Mar 9 09:41:45 2012 +0100
flash: F
Could someone with appropriate privileges please reset/delele my Gerrit
account as I can no longer log in (I deleted the google account I used
for sign in).
Thanks,
Tomas
--
Virtualization & Cloud Management Using Capaci
On 9 March 2012 09:32, Tomas Frydrych wrote:
> Could someone with appropriate privileges please reset/delele my Gerrit
> account as I can no longer log in (I deleted the google account I used
> for sign in).
>
This is not so straight forward as deleting the user is not the norm in gerrit.
I am as
On Fri, Mar 09, 2012 at 10:55:22AM +, Spencer Oliver wrote:
> On 9 March 2012 09:32, Tomas Frydrych wrote:
> > Could someone with appropriate privileges please reset/delele my Gerrit
> > account as I can no longer log in (I deleted the google account I used
> > for sign in).
> >
>
> This is n
On 9 March 2012 11:44, John wrote:
> On Fri, Mar 09, 2012 at 10:55:22AM +, Spencer Oliver wrote:
>> On 9 March 2012 09:32, Tomas Frydrych wrote:
>> > Could someone with appropriate privileges please reset/delele my Gerrit
>> > account as I can no longer log in (I deleted the google account I
Is it usual that a CPU manufacturer disable JTAG?
I read about that and now I have a device that
reports all zeros
like this
Info : clock speed 500 kHz
Error: JTAG scan chain interrogation failed: all zeroes
Error: Check JTAG interface, timings, target power, etc.
I tried 2 pcs of the same devi
This is an automated email from Gerrit.
Chris Morgan (chmor...@gmail.com) just uploaded a new patch set to Gerrit,
which you can find at http://openocd.zylin.com/510
-- gerrit
commit ccab45671855a33d201b2e6c4f6ec4eaf9333709
Author: Chris Morgan
Date: Thu Mar 8 14:58:41 2012 -0500
Create
> I read about that and now I have a device that
> reports all zeros
> like this
Try to add external pull-up resistors (10K ohms) up to VCC on ALL of the
JTAG pins.
Stian Skjelstad
--
Virtualization & Cloud Management
I am working with an ARM Cortex 3MF2 dev board and an Olimex
ARM-USB-OCD adaptor. I got OpenOCD and GDB to work just fine for some
time until I managed to crash OpenOCD. Now each time I try to talk to
my board through the commands:
arm-none-eagi-gdb
target remote localhost:
monitor reset
I ge
Hi everyone,
I have some problem with openocd and stlink under linux. I have tried solve
it with forum, but noone could help my beacouse there are not a lot linux
users.
I know that this kind of problem was under windows and depends of drivers.
Ok, there is a problem:
I cant connect openocd wit
Thank you for your reply.
I noticed that the CPU has also
EJTAG_CE0 and EJTAG_CE1 pins.
These pins are used to select between JTAG and
EJTAG functions.
There 3 working modes
1.
Normal EJTAG operation - default
2.
Internal test only
The default one.
On 09.03.2012 19:51, jana1...@centrum.cz wrote:
> Thank you for your reply.
> I noticed that the CPU has also
> EJTAG_CE0 and EJTAG_CE1 pins.
> These pins are used to select between JTAG and
> EJTAG functions.
>
> There 3 working modes
>
> 1.
> Normal EJTAG operation - default
> Debug: 165 52 stlink_usb.c:1068 stlink_usb_open(): transport: 1 vid: 0483
> pid: 3744
> Debug: 166 53 stlink_usb.c:1078 stlink_usb_open(): claim interface failed
> Debug: 167 53 stlink_layout.c:50 stlink_layout_open(): failed
> Debug: 168 53 command.c:630 run_command(): Command failed with erro
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