[OpenWrt-Devel] [PATCH] target/ramips: NixCore X1 Board Support
from: Andrew Gaylo <ad...@clisystems.com>
This submission is for support of the NixCore X1 board at
http://nixcores.com. This board uses the RT5350 Ralink processor
already supported by a number of boards in the OpenWRT repository.
Signed-off-by: Andrew Gaylo <ad...@clisystems.com>
---
diff -uprN
openwrt_vanilla/target/linux/ramips/base-files/etc/board.d/02_network
openwrt_submit/target/linux/ramips/base-files/etc/board.d/02_network
---
openwrt_vanilla/target/linux/ramips/base-files/etc/board.d/02_network 2015-10-13
11:10:15.784957130 -0600
+++
openwrt_submit/target/linux/ramips/base-files/etc/board.d/02_network 2015-10-15
08:35:48.341341581 -0600
@@ -217,7 +217,7 @@ ramips_setup_interfaces()
ucidef_add_switch_vlan "switch0" "1" "0t 1 2 3 4"
ucidef_add_switch_vlan "switch0" "2" "0t 5"
;;
-
+nixcorex1 |\
vocore)
ucidef_set_interface_lan "eth0.1"
ucidef_add_switch "switch0" "1" "1"
diff -uprN openwrt_vanilla/target/linux/ramips/base-files/lib/ramips.sh
openwrt_submit/target/linux/ramips/base-files/lib/ramips.sh
---
openwrt_vanilla/target/linux/ramips/base-files/lib/ramips.sh 2015-10-13
11:10:15.784957130 -0600
+++
openwrt_submit/target/linux/ramips/base-files/lib/ramips.sh 2015-10-15
08:36:21.021340613 -0600
@@ -232,6 +232,9 @@ ramips_board_detect() {
*"Nexx WT3020")
name="wt3020"
;;
+*"NixcoreX1")
+ name="nixcorex1"
+ ;;
*"NW718")
name="nw718"
;;
diff -uprN
openwrt_vanilla/target/linux/ramips/base-files/lib/upgrade/platform.sh
openwrt_submit/target/linux/ramips/base-files/lib/upgrade/platform.sh
---
openwrt_vanilla/target/linux/ramips/base-files/lib/upgrade/platform.sh 2015-10-13
11:10:15.784957130 -0600
+++
openwrt_submit/target/linux/ramips/base-files/lib/upgrade/platform.sh 2015-10-15
08:37:00.029339459 -0600
@@ -72,6 +72,7 @@ platform_check_image() {
mr-102n | \
mzk-w300nh2 | \
nbg-419n | \
+nixcorex1 | \
nw718 | \
omni-emb | \
omni-emb-hpm | \
diff -uprN openwrt_vanilla/target/linux/ramips/image/Makefile
openwrt_submit/target/linux/ramips/image/Makefile
--- openwrt_vanilla/target/linux/ramips/image/Makefile 2015-10-13
11:10:15.788957130 -0600
+++ openwrt_submit/target/linux/ramips/image/Makefile 2015-10-15
08:37:25.885338693 -0600
@@ -569,6 +569,8 @@ Image/Build/Profile/MZKW300NH2=$(call Bu
Image/Build/Profile/NCS601W=$(call
BuildFirmware/Default8M/$(1),$(1),ncs601W,NCS601W)
+Image/Build/Profile/NIXCORE-X1=$(call
BuildFirmware/Default8M/$(1),$(1),nixcorex1,NIXCORE-X1)
+
nw718_mtd_size=3801088
Image/Build/Profile/NW718=$(call
BuildFirmware/CustomFlashFactory/$(1),$(1),nw718m,NW718,$(nw718_mtd_size),ARA1B4NCRNW718;1,factory)
@@ -741,6 +743,7 @@ define Image/Build/Profile/Default
$(call Image/Build/Profile/MZKW300NH2,$(1))
$(call Image/Build/Profile/NBG-419N,$(1))
$(call Image/Build/Profile/NCS601W,$(1))
+ $(call Image/Build/Profile/NIXCORE-X1,$(1))
$(call Image/Build/Profile/NW718,$(1))
$(call Image/Build/Profile/OMNI-EMB,$(1))
$(call Image/Build/Profile/OMNI-PLUG,$(1))
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Re: [OpenWrt-Devel] [PATCH] target/ramips: NixCore X1 Board Support
The DTS and the MK files were in an earlier patch. My first submission
to OpenWRT, still getting the hang of the process.
https://lists.openwrt.org/pipermail/openwrt-devel/2015-October/036563.html
Drew
On 2015-10-15 09:53, John Crispin wrote:
On 15/10/2015 17:49, Andrew Gaylo wrote:
from: Andrew Gaylo <ad...@clisystems.com>
This submission is for support of the NixCore X1 board at
http://nixcores.com. This board uses the RT5350 Ralink processor
already supported by a number of boards in the OpenWRT repository.
Signed-off-by: Andrew Gaylo <ad...@clisystems.com>
i think the dts file is missing
---
diff -uprN
openwrt_vanilla/target/linux/ramips/base-files/etc/board.d/02_network
openwrt_submit/target/linux/ramips/base-files/etc/board.d/02_network
---
openwrt_vanilla/target/linux/ramips/base-files/etc/board.d/02_network
2015-10-13 11:10:15.784957130 -0600
+++
openwrt_submit/target/linux/ramips/base-files/etc/board.d/02_network
2015-10-15 08:35:48.341341581 -0600
@@ -217,7 +217,7 @@ ramips_setup_interfaces()
ucidef_add_switch_vlan "switch0" "1" "0t 1 2 3 4"
ucidef_add_switch_vlan "switch0" "2" "0t 5"
;;
-
+nixcorex1 |\
vocore)
ucidef_set_interface_lan "eth0.1"
ucidef_add_switch "switch0" "1" "1"
diff -uprN
openwrt_vanilla/target/linux/ramips/base-files/lib/ramips.sh
openwrt_submit/target/linux/ramips/base-files/lib/ramips.sh
--- openwrt_vanilla/target/linux/ramips/base-files/lib/ramips.sh
2015-10-13 11:10:15.784957130 -0600
+++ openwrt_submit/target/linux/ramips/base-files/lib/ramips.sh
2015-10-15 08:36:21.021340613 -0600
@@ -232,6 +232,9 @@ ramips_board_detect() {
*"Nexx WT3020")
name="wt3020"
;;
+*"NixcoreX1")
+name="nixcorex1"
+;;
*"NW718")
name="nw718"
;;
diff -uprN
openwrt_vanilla/target/linux/ramips/base-files/lib/upgrade/platform.sh
openwrt_submit/target/linux/ramips/base-files/lib/upgrade/platform.sh
---
openwrt_vanilla/target/linux/ramips/base-files/lib/upgrade/platform.sh
2015-10-13
11:10:15.784957130 -0600
+++
openwrt_submit/target/linux/ramips/base-files/lib/upgrade/platform.sh
2015-10-15 08:37:00.029339459 -0600
@@ -72,6 +72,7 @@ platform_check_image() {
mr-102n | \
mzk-w300nh2 | \
nbg-419n | \
+nixcorex1 | \
nw718 | \
omni-emb | \
omni-emb-hpm | \
diff -uprN openwrt_vanilla/target/linux/ramips/image/Makefile
openwrt_submit/target/linux/ramips/image/Makefile
--- openwrt_vanilla/target/linux/ramips/image/Makefile2015-10-13
11:10:15.788957130 -0600
+++ openwrt_submit/target/linux/ramips/image/Makefile2015-10-15
08:37:25.885338693 -0600
@@ -569,6 +569,8 @@ Image/Build/Profile/MZKW300NH2=$(call Bu
Image/Build/Profile/NCS601W=$(call
BuildFirmware/Default8M/$(1),$(1),ncs601W,NCS601W)
+Image/Build/Profile/NIXCORE-X1=$(call
BuildFirmware/Default8M/$(1),$(1),nixcorex1,NIXCORE-X1)
+
nw718_mtd_size=3801088
Image/Build/Profile/NW718=$(call
BuildFirmware/CustomFlashFactory/$(1),$(1),nw718m,NW718,$(nw718_mtd_size),ARA1B4NCRNW718;1,factory)
@@ -741,6 +743,7 @@ define Image/Build/Profile/Default
$(call Image/Build/Profile/MZKW300NH2,$(1))
$(call Image/Build/Profile/NBG-419N,$(1))
$(call Image/Build/Profile/NCS601W,$(1))
+$(call Image/Build/Profile/NIXCORE-X1,$(1))
$(call Image/Build/Profile/NW718,$(1))
$(call Image/Build/Profile/OMNI-EMB,$(1))
$(call Image/Build/Profile/OMNI-PLUG,$(1))
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[OpenWrt-Devel] [PATCH] ramips: NixCore X1 Board Support unified patch
from: Andrew Gaylo <ad...@clisystems.com>
Submission for support of the NixCore X1 board (http://nixcores.com.)
This board uses the RT5350 Ralink processor already supported by a
number of board in the OpenWRT repository. This is a unified patch from
two earlier patches
Signed-off-by: Andrew Gaylo <ad...@clisystems.com>
---
diff -uprN openwrt_vanilla/target/linux/ramips/dts/NIXCORE-X1.dts
openwrt_submit/target/linux/ramips/dts/NIXCORE-X1.dts
--- openwrt_vanilla/target/linux/ramips/dts/NIXCORE-X1.dts 1969-12-31
17:00:00.0 -0700
+++ openwrt_submit/target/linux/ramips/dts/NIXCORE-X1.dts 2015-10-13
11:04:19.636954204 -0600
@@ -0,0 +1,186 @@
+/dts-v1/;
+
+/include/ "rt5350.dtsi"
+
+/ {
+ compatible = "NixcoreX1", "ralink,rt5350-soc";
+ model = "NixcoreX1";
+
+ palmbus@1000 {
+/* Re-enable the gpio1 ports */
+ gpio1: gpio@660 {
+ status = "okay";
+ };
+
+ i2c@900 {
+ status = "okay";
+ };
+ uart@500 {
+ status = "okay";
+/* Mix of uart and gpio */
+reset-names = "gpio uartf";
+ };
+ spi@b00 {
+ status = "okay";
+
+ m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "s25fl064k";
+ reg = <0>;
+ linux,modalias = "m25p80", "s25fl064k";
+ spi-max-frequency = <1000>;
+
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0x3>;
+ read-only;
+ };
+
+ partition@3 {
+ label = "uboot-env";
+ reg = <0x3 0x1>;
+ read-only;
+ };
+
+ factory: partition@4 {
+ label = "factory";
+ reg = <0x4 0x1>;
+ read-only;
+ };
+
+ partition@5 {
+ label = "firmware";
+ reg = <0x5 0x7b>;
+ };
+ };
+
+ spidev@1 {
+ compatible = "linux,spidev";
+ spi-max-frequency = <1000>;
+ reg = <1>;
+ };
+ };
+ };
+
+ pinctrl {
+ state_default: pinctrl0 {
+ gpio {
+/* Associate the tjag, uartf and led groups with gpio
*/
+ ralink,group = "jtag", "led", "spi_cs1";
+/* How do we set individual pins? */
+ ralink,function = "gpio";
+ };
+ };
+ };
+
+ ethernet@1010 {
+ mtd-mac-address = < 0x4>;
+ };
+
+ esw@1011 {
+ ralink,portmap = <0x17>;
+ };
+
+ wmac@1018 {
+ ralink,mtd-eeprom = < 0>;
+ };
+
+ ehci@101c {
+ status = "okay";
+ };
+
+ ohci@101c1000 {
+ status = "okay";
+ };
+
+chosen {
+ bootargs = "console=ttyS1,57600";
+ };
+ gpio-export {
+ compatible = "gpio-export";
+ #size-cells = <0>;
+
+ gpio0 {
+ gpio-export,name = "gpio0";
+ gpio-export,direction_may_change = <1>;
+ gpios = < 0 0>;
+ };
+
+/* GPIOs 1-6 are I2C,SPI */
+
+/* GPIO 7-14 are uart1 */
+
+/* GPIOs 15 & 16 are uart2 */
+
+ /* JTAG */
+ gpio17 {
+ /* JTAG_TDO */
+ gpio-export,name = "gpio17";
+ gpio-export,direction_may_change = <1>;
+ gpios = < 17 0>;
+ };
+ gpio18 {
+ /* JTAG_TDI */
+
[OpenWrt-Devel] Subject: [PATCH] [target] Addition of NixCore X1 Board
from: Andrew Gaylo <ad...@clisystems.com>
This submission is for a the NixCore X1 board. This board uses the
RT5350 Ralink processor already supported by a number of board in the
OpenWRT repository. The DTS and profile MK provided is based on
existing boards included in the repo (VoCore).
Signed-off-by: Andrew Gaylo <ad...@clisystems.com>
---
diff -uprN openwrt_vanilla/target/linux/ramips/dts/NIXCORE-X1.dts
openwrt_submit/target/linux/ramips/dts/NIXCORE-X1.dts
--- openwrt_vanilla/target/linux/ramips/dts/NIXCORE-X1.dts 1969-12-31
17:00:00.0 -0700
+++ openwrt_submit/target/linux/ramips/dts/NIXCORE-X1.dts 2015-10-13
11:04:19.636954204 -0600
@@ -0,0 +1,186 @@
+/dts-v1/;
+
+/include/ "rt5350.dtsi"
+
+/ {
+ compatible = "NixcoreX1", "ralink,rt5350-soc";
+ model = "NixcoreX1";
+
+ palmbus@1000 {
+/* Re-enable the gpio1 ports */
+ gpio1: gpio@660 {
+ status = "okay";
+ };
+
+ i2c@900 {
+ status = "okay";
+ };
+ uart@500 {
+ status = "okay";
+/* Mix of uart and gpio */
+reset-names = "gpio uartf";
+ };
+ spi@b00 {
+ status = "okay";
+
+ m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "s25fl064k";
+ reg = <0>;
+ linux,modalias = "m25p80", "s25fl064k";
+ spi-max-frequency = <1000>;
+
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0x3>;
+ read-only;
+ };
+
+ partition@3 {
+ label = "uboot-env";
+ reg = <0x3 0x1>;
+ read-only;
+ };
+
+ factory: partition@4 {
+ label = "factory";
+ reg = <0x4 0x1>;
+ read-only;
+ };
+
+ partition@5 {
+ label = "firmware";
+ reg = <0x5 0x7b>;
+ };
+ };
+
+ spidev@1 {
+ compatible = "linux,spidev";
+ spi-max-frequency = <1000>;
+ reg = <1>;
+ };
+ };
+ };
+
+ pinctrl {
+ state_default: pinctrl0 {
+ gpio {
+/* Associate the tjag, uartf and led grps with gpio */
+ ralink,group = "jtag", "led", "spi_cs1";
+/* How do we set individual pins? */
+ ralink,function = "gpio";
+ };
+ };
+ };
+
+ ethernet@1010 {
+ mtd-mac-address = < 0x4>;
+ };
+
+ esw@1011 {
+ ralink,portmap = <0x17>;
+ };
+
+ wmac@1018 {
+ ralink,mtd-eeprom = < 0>;
+ };
+
+ ehci@101c {
+ status = "okay";
+ };
+
+ ohci@101c1000 {
+ status = "okay";
+ };
+
+chosen {
+ bootargs = "console=ttyS1,57600";
+ };
+ gpio-export {
+ compatible = "gpio-export";
+ #size-cells = <0>;
+
+ gpio0 {
+ gpio-export,name = "gpio0";
+ gpio-export,direction_may_change = <1>;
+ gpios = < 0 0>;
+ };
+
+/* GPIOs 1-6 are I2C,SPI */
+
+/* GPIO 7-14 are uart1 */
+
+/* GPIOs 15 & 16 are uart2 */
+
+ /* JTAG */
+ gpio17 {
+ /* JTAG_TDO */
+ gpio-export,name = "gpio17";
+ gpio-export,direction_may_change = <1>;
+ gpios = < 17 0>;
+ };
+ gpio18 {
+ /* JTAG_TDI */
+
