[perfmon2] CORE_0_SELECT Umask for L3 events on AMD F10h

2011-05-30 Thread J K Rai
Hello, I have tried perfmon2 with linux-2.6.30 (from git) /as well as with perf_events linux-2.6.39 and libpfm-4.1.0 on AMD Phenom9650. Part of /proc/cpuinfo shown below: cpu family : 16 model : 2 model name : AMD Phenom(tm) 9650 Quad-Core Processor Availability of event wi

[perfmon2] Error in compiling pfmon-3.9 on xeonX5550

2010-02-13 Thread J K Rai
Hi I could install the perfmon2 along with linux-2.6.30 and libpfm-3.9 on xeon x5550. But getting error while trying to compile pfmon-3.9. compiling pfmon for x86_64 architecture compiling pfmon as a shared binary make[1]: Entering directory `/home/jk/XeonX5550/linuxsrc/pfmon-3.9/pfmon' cc -g

Re: [perfmon2] Unable to get asynchronous overflow notification

2010-02-08 Thread J K Rai
> > I use perfmon2 with linux-2.6.30, libpfm-3.9 on intel > xeon x5482. > > > > I am trying to get asynchronous overflow notification > (instrn retired) in my controlling process, (for child > process ls) by doing fcntl on perfmon2 context fd. (sampling > period = 1000) > > > > I do standard signal

[perfmon2] Unable to get asynchronous overflow notification

2010-02-04 Thread J K Rai
Hi I use perfmon2 with linux-2.6.30, libpfm-3.9 on intel xeon x5482. I am trying to get asynchronous overflow notification (instrn retired) in my controlling process, (for child process ls) by doing fcntl on perfmon2 context fd. (sampling period = 1000) I do standard signal handler installatio

Re: [perfmon2] Strangeness

2009-04-20 Thread J K Rai
Hi Nagy You seem to compare two things which are not compatible. In first instance by using time you measured the time spent by the program in user and kernel mode. While in second instance you are doing sampling, that too in kernel mode only. Regards, JK --- On Sun, 19/4/09, Nagy Mostafa wr

Re: [perfmon2] Event info Problem

2009-03-11 Thread J K Rai
Hi Dennis, Both events are not exactly same. For more details look into intel manual available on net. Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3B: System Programming Guide, Part 2 Moreover the event LAST_LEVEL_CACHE_MISSES is an alias as shown by showeventinfo.

Re: [perfmon2] Difference in LAST_LEVEL_CACHE_MISSES and L2_LINES_IN:SELF values for kernel +user v/s user mode on xeon x5482

2009-02-23 Thread J K Rai
tel core microarch based machine. Thanks again, Regards, JK ________ From: Kristian Nielsen To: J K Rai Cc: perfmon2 Sent: Monday, 23 February, 2009 7:43:04 PM Subject: Re: [perfmon2] Difference in LAST_LEVEL_CACHE_MISSES and L2_LINES_IN:SELF values for kernel +user

[perfmon2] Difference in LAST_LEVEL_CACHE_MISSES and L2_LINES_IN:SELF values for kernel +user v/s user mode on xeon x5482

2009-02-21 Thread J K Rai
Hi All I get same values for the two events (i.e. LAST_LEVEL_CACHE_MISSES and L2_LINES_IN:SELF) in user mode while the two change when the same are collected for kernel+user mode. E.g. pfmon -u -eLAST_LEVEL_CACHE_MISSES,L2_LINES_IN:SELF /bin/ls cpu_2006_mix_lim_random_order_pfmon_t.sh pair_l

Re: [perfmon2] Thanks: Compilation error with 2.6.26 kernel patch on x86_64 (XeonX5482 )

2008-08-04 Thread J K Rai
Thanks a lot, I could compile successfully. regards, JK - Original Message From: stephane eranian <[EMAIL PROTECTED]> To: J K Rai <[EMAIL PROTECTED]> Cc: perfmon2 Sent: Saturday, August 2, 2008 12:48:15 PM Subject: Re: [perfmon2] Compilation error with 2.6.26 kernel pat

Re: [perfmon2] Compilation error with 2.6.26 kernel patch on x86_64 (XeonX5482 )

2008-07-31 Thread J K Rai
__NR_ia32_rt_sigreturn 173 #define __NR_ia32_pfm_create_context 327 #endif /* _ASM_X86_64_IA32_UNISTD_H_ */ JK - Original Message From: stephane eranian <[EMAIL PROTECTED]> To: J K Rai <[EMAIL PROTECTED]> Cc: perfmon2 Sent: Friday, August 1, 2008 10:56:41 AM Subject: Re: [perfmon2] Compi

Re: [perfmon2] Compilation error with 2.6.26 kernel patch on x86_64 (XeonX5482 )

2008-07-31 Thread J K Rai
r 2 make: *** [sub-make] Error 2 Regards JK - Original Message From: stephane eranian <[EMAIL PROTECTED]> To: J K Rai <[EMAIL PROTECTED]> Cc: perfmon2 Sent: Friday, August 1, 2008 6:32:06 AM Subject: Re: [perfmon2] Compilation error with 2.6.26 kernel patch on x86_64 (XeonX5482

[perfmon2] Compilation error with 2.6.26 kernel patch on x86_64 (XeonX5482 )

2008-07-31 Thread J K Rai
Hello I got following error while compiling linux 2.6.26 kernel on x86_64: In file included from /home/jk/linuxsrc/linux-2.6.26/include/linux/perfmon_kern.h:351, from /home/jk/linuxsrc/linux-2.6.26/arch/x86/kernel/process_64.c:39: include2/asm/perfmon_kern.h: In function ‘pfm_a

[perfmon2] Getting error with pfmon 3.4 on linux-2.6.25

2008-07-26 Thread J K Rai
Hello, I am using perfmon2 29042008 full release with linux 2.6.25. I could compile the kernel with perfmon2 patch as well as libpfm-3.4 and install these. After installing pfmon when I try to use it I get the following error:---> [EMAIL PROTECTED] pfmon-3.4]$ pfmon -v pfmon: error while loading

[perfmon2] Seeking direction to fix problem on Pentium4

2008-05-21 Thread J K Rai
Hello Long back I reported problem on Pentium4. I find same on perfmon2 release of 2.6.25 kernel also. May I get some direction on where to look into perfmon2 to fix it. Mentioning below again the problem encountered. Thanks & regards JK Problems encountered while using two events togethe

[perfmon2] Event for L1 data cache miss on Core2 duo

2008-05-09 Thread J K Rai
Hello Which event on Core2 Duo counts L1 data cache misses. I am using perfmon2 release of linux-2.6.24. Is it L1D_REPL ? Regards, JK - Be a better friend, newshound, and know-it-all with Yahoo! Mobile. Try it now.--

Re: [perfmon2] Seeking sampling option for pfmon

2008-04-03 Thread J K Rai
iod only instead of cumulative one. The first event is for deciding sampling period and rest of the events are additional, which I want to sample for the sampling period. Regards JK stephane eranian <[EMAIL PROTECTED]> wrote: JK, On Wed, Apr 2, 2008 at 3:23 PM, J K Rai wrote: > Hi all

[perfmon2] Seeking sampling option for pfmon

2008-04-02 Thread J K Rai
eranian <[EMAIL PROTECTED]> wrote: Hello, On Wed, Apr 2, 2008 at 1:04 PM, J K Rai wrote: > Thanks Dan And Stephen > > I want to sample no. of accesses on TLB (I+D) and L2 cache misses > simultaneously for a given process / thread. > > You said Pentium4 is complex. What&#

Re: [perfmon2] Problems encountered on Pentium 4

2008-04-02 Thread J K Rai
ht that the second counter assignment is probably messed up. Pentium4's a beast... - d > -Original Message- > From: [EMAIL PROTECTED] [mailto:perfmon2-devel- > [EMAIL PROTECTED] On Behalf Of stephane eranian > Sent: Tuesday, April 01, 2008 3:20 AM > To: J K Rai > Cc

[perfmon2] Problems encountered on Pentium 4

2008-03-27 Thread J K Rai
Hi all, Seeking help for the following problem on using perfmon2 on Pentium4. Thanks & regards JK Problems encountered while using two events together: **