On Tue, Jul 16, 2024 at 6:59 PM anlex N wrote:
> I have built libpfm4 in the [msys2](https://msys2.org) UCRT64 environment:
>
> ```shell
> me@DOOR UCRT64 /e/workspace/git.code.sf.net/p/perfmon2/libpfm4
> $ mingw32-make TOPDIR=/e/workspace/git.code.sf.net/p/perfmon2/libpfm4
> Compiling for x86_64
Hi William,
Thanks for the bug report. I have fixed the problem upstream now.
On Mon, Apr 15, 2024 at 11:59 AM William Cohen wrote:
>
> When attempting to compile the recent checkout out of libpfm as an rpm the
> compiler reported the following warning:
>
> gcc -O2 -flto=auto -ffat-lto-objects
Hi,
Thanks for reporting the problem. I have now fixed the issue in the git repo.
On Tue, Apr 9, 2024 at 5:26 PM laksono wrote:
>
> Hi
>
> I found that pfm_get_os_event_encoding() returns the same code for both
> spr::TOPDOWN:SLOTS and spr::TOPDOWN:BAD_SPEC_SLOTS counters.
>
> If I run the chec
Hi,
At this point. libpfm4 does not support AMD L3 PMU events. They should
be added shortly.
On Wed, Mar 6, 2024 at 3:40 PM Yunzhao Li via perfmon2-devel
wrote:
>
> Hello,
>
> I am encountering an issue where the pfm_get_os_event_encoding() API could
> not find l3_misses or l3_accesses perf eve
Hi Will,
If I recall, these extra ' are there to enable localization formatting of
the large numbers.
Please check that this is the proper way of doing localization in printf.
On Fri, Jun 30, 2023 at 11:17 AM William Cohen wrote:
> Looking through some static analysis of lipbfm I found minor i
Hi Will,
Patch applied.
Thanks.
On Fri, Jun 30, 2023 at 12:18 PM William Cohen wrote:
> Hi,
> I was looking through the static analysis results of libpfm and there were
> a number of printf statements that are not quite right. One has too many
> arguments and others are missing arguments. Atta
Hi,
Sorry for the late reply. I had a problem with the mailing list and did not
see your msg earlier.
How are you programming this event? Is this via perf stat or something else.
You seem to be running on Intel CascadeLakeX. It supports the event you
want.
However in libpfm4, right now, it is cal
Will,
Patch applied.
Thanks.
On Fri, Apr 14, 2023 at 1:33 PM William Cohen wrote:
> When trying to build the new libpfm-4.13.0 as an rpm for various
> architectures I found that the builds failed on some machines because the
> compiler found that p could be uninitialized in gen_tracepoint_tabl
Hi John,
Thanks a lot for submitting the patches. I will review them and send
you feedback.
At first glance, you first use N! table to then patch it to N2. Just
submit a patch with the final version of the table.
If the V1 table is identical to N2, then they can share the table.
I don't see any V
Hi Will.
Power10 patch applied.
Thanks for your contributions.
On Mon, Jul 18, 2022 at 9:00 AM William Cohen wrote:
>
> On 5/12/22 15:40, will schmidt wrote:
> > On Wed, 2022-05-11 at 14:37 -0400, William Cohen wrote:
> >> On 5/10/22 16:52, will schmidt wrote:
> >>> On Wed, 2022-05-04 at 10:51 -
Hi Will,
Please send me the patches directly and I will review them soon.
I also want to make sure that the Power 10 PMU doc supporting the
patches is available to the public.
Thanks.
On Mon, Jul 18, 2022 at 9:00 AM William Cohen wrote:
>
> On 5/12/22 15:40, will schmidt wrote:
> > On Wed, 202
Hi,
Could you try the attached patch?
There is no use after free in the code as far as I can tell.
But I modified the code to avoid triggering the gcc warning.
I don't have gcc-12 so let me know if this works for you.
On Tue, Jun 7, 2022 at 1:26 AM Stephane Eranian wrote:
>
> Hi,
>
> Thanks for
Hi,
Thanks for the report,
I will fix this in the coming days.
On Sat, Jun 4, 2022 at 10:08 AM Vitaly Chikunov wrote:
>
> Stephane,
>
> There is compile failure on GCC 12.1.1:
>
> pfmlib_perf_event_pmu.c: In function 'perf_table_alloc_event':
> pfmlib_perf_event_pmu.c:293:47: error: pointer
Hi Vince,
Confirmed and fixed.
Thanks for tracking it down.
On Mon, May 24, 2021 at 1:26 PM Vince Weaver
wrote:
>
> In PAPI we were having people with Zen2 machines being detected as Zen1.
>
> From what I can tell, Zen1 and Zen+ have model numbers less than 0x30
> and Zen2 is above 0x30. This
> > > On Tue, Sep 8, 2020 at 8:27 AM William Cohen <
> wco...@redhat.com <mailto:wco...@redhat.com> <mailto:wco...@redhat.com
> <mailto:wco...@redhat.com>> <mailto:wco...@redhat.com wco...@redhat.com> <mailto:wco...@redhat.com <mailto:wco...@red
On Thu, Sep 24, 2020 at 5:31 PM Andreas Beckmann wrote:
> On 9/24/20 11:10 PM, Stephane Eranian via perfmon2-devel wrote:
> > Will,
> >
> > Can you test that the current git tree has all the bugs you reported
> fixed?
> > Thanks.
>
> I have attached two m
t; > > On Tue, Sep 8, 2020 at 8:27 AM William Cohen <
>> wco...@redhat.com <mailto:wco...@redhat.com> <mailto:wco...@redhat.com
>> <mailto:wco...@redhat.com>> <mailto:wco...@redhat.com > wco...@redhat.com> <mailto:wco...@redhat.com <mailto:wco
> >
> > > >
> > > > On Tue, Sep 8, 2020 at 8:27 AM William Cohen <
> wco...@redhat.com <mailto:wco...@redhat.com> <mailto:wco...@redhat.com
> <mailto:wco...@redhat.com>> <mailto:wco...@redhat.com wco...@redh
gt; > >
> > >
> > > On Tue, Sep 8, 2020 at 8:27 AM William Cohen <mailto:wco...@redhat.com> <mailto:wco...@redhat.com wco...@redhat.com>>> wrote:
> > >
> > > On 9/7/20 6:03 PM, Stephane Eranian via perfmon2-devel w
On Wed, Sep 23, 2020 at 7:32 AM William Cohen wrote:
> On 9/10/20 7:32 PM, Stephane Eranian wrote:
> >
> >
> > On Tue, Sep 8, 2020 at 8:27 AM William Cohen wco...@redhat.com>> wrote:
> >
> > On 9/7/20 6:03 PM, Stephane Eranian vi
On Tue, Sep 8, 2020 at 8:27 AM William Cohen wrote:
> On 9/7/20 6:03 PM, Stephane Eranian via perfmon2-devel wrote:
> > Hello,
> >
> > After more than 2 years without a release, I decided it was way overdue!
> I am hoping to get back to a more regular release sched
Hello,
After more than 2 years without a release, I decided it was way overdue! I
am hoping to get back to a more regular release schedule past 2020. But the
development never actually stopped, so everything was already available in
the git repository.
Lots of new support in this release:
- Int
Hi,
On AMD Zen1 and Zen2 architectures, the event to count flops requires some
extra support as explained in the PPR.
But that extra support is needed in the kernel. AMD posted the patches
upstream and they are in 5.6 kernel.
The FLOPS event is one that can have large increments per cycle dependi
Shay,
Looked at your patch. Why are you not providing the full list of DMC events.
The documentation shows 4 DMC events, but you encode only two. I understand
they are the most useful, but I think you need all of them, especially the
one counting
cycles in the DMC domain.
Same remark for the CCI
Hi,
On Thu, Nov 21, 2019 at 10:50 AM Shay Gal-On wrote:
> Hello,
>
> Finally got the event list published on the Marvell website at
> https://www.marvell.com/documents/hrur6mybdvk5uki1w0z7/
> Moved uncore events to separate header file and requested merge.
> Please let me know if there are any o
Will,
On Fri, Nov 1, 2019 at 12:01 PM Will Cohen wrote:
> Hi Stephane,
>
> Would it be possible to get this patch for the Marvell ThunderX2 reviewed
> and merged into the upstream libpfm? -Will
>
> I can merge the patch if:
- the uncore events are moved into their own
lib/event/cavium_x2_unc_ev
Hi,
I made a new minor release to fix the build issues of 4.10 on ARM.
It contains the following changes:
- fix build issues with Cavium Thunder X2 on ARM 32 bit
- update Intel Skylake event table
You can get the new package from http://perfmon2.sf.net as usual.
Thanks.
---
Hello,
I have released version 4.10.0 of libpfm4.
This release contains support for new hardware as well has several bugs
fixes and improvements.
Highlights:
- Intel Skylake X uncore PMUs support (all PMU boxes)
- Cavium Thunder X2 support
- Intel Knights Mill support (core and uncore)
-
Hi,
On Tue, May 15, 2018 at 11:48 AM, laksono wrote:
> All,
>
>
> I want to profile using MEM_TRANS_RETIRED::LATENCY_ABOVE_THRESHOLD
> counter on Intel SandyBridge. Using libpfm4's examples/check_event, I can
> extract the perf_events config into *0x5301cd* and *0x3* :
>
>
> $ ./check_events sn
-
> ------------
>
>
>
>
--
>
>
> ----------------
> -
> ------------
>
> --
> > *From:* Vince Weaver
> > *Sent:* Tuesday, May 8, 2018 11:33 AM
> > *To:* eran...@gmail.com
> > *Cc:*
Hi Andreas,
On Mon, Apr 23, 2018 at 12:25 PM, Andreas Beckmann wrote:
> On 2018-04-23 19:26, Stephane Eranian via perfmon2-devel wrote:
> > I will make a new release of libpfm4 this week given the amount of
> changes
> > since January.
> > If you have more updates that
Hi,
I will make a new release of libpfm4 this week given the amount of changes
since January.
If you have more updates that you would like to submit, now is the time.
Thanks.
--
Check out the vibrant tech community on one
Hello,
Happy New Year.
I have release version 4.9.0 for libpfm4.
This release contains many updates and support for new hardware.
Highlights:
* Intel Broadwell EP uncore PMU (all boxes)
* IBM Power9 core PMU support
* Intel Skylake X core PMU support
* AMD Fam17h (Zen) core PMU
* AMD Fam16h
On Tue, Dec 5, 2017 at 8:30 AM, Will Schmidt
wrote:
> On Tue, 2017-12-05 at 10:00 -0500, William Cohen wrote:
> > On 12/05/2017 01:42 AM, Stephane Eranian wrote:
> > > Will,
> > >
> > > There is something I am missing here. You are creating _ALT version of
> events with the same event code.
> > >
Will,
There is something I am missing here. You are creating _ALT version of
events with the same event code.
What's the point of that?
There should not be duplicate event names in any event tables. The
validation checks verify this.
On PPC, I understand that the event code is manually crafted and
On Mon, Nov 13, 2017 at 6:36 PM, Stephane Eranian
wrote:
>
>
> On Mon, Nov 13, 2017 at 1:34 PM, Vince Weaver
> wrote:
>
>> On Mon, 13 Nov 2017, Stephane Eranian wrote:
>>
>>
>> > > The issue here is that check_events does not take a comma separated
>> list
>> > of events, it takes a white space
On Mon, Nov 13, 2017 at 1:34 PM, Vince Weaver
wrote:
> On Mon, 13 Nov 2017, Stephane Eranian wrote:
>
>
> > > The issue here is that check_events does not take a comma separated
> list
> > of events, it takes a white space speratated list
> > of arguments.
>
> yes. The bug is that we weren't try
Vince,
On Mon, Nov 13, 2017 at 12:02 PM, Vince Weaver
wrote:
> Hello
>
> My student noticed that when she accidentally cut and pasted an invalid
> event it was being accepted as valid by libpfm4/PAPI.
>
> The event in question is two events stuck together with a comma.
> I think the second event
On Wed, Jun 14, 2017 at 5:57 AM, William Cohen wrote:
> On 06/14/2017 08:47 AM, Stephane Eranian via perfmon2-devel wrote:
> >
> >
> > On Tue, Jun 6, 2017 at 9:09 AM, Will Schmidt <mailto:will_schm...@vnet.ibm.com>> wrote:
> >
> > Hi,
> >
&
On Tue, Jun 6, 2017 at 9:09 AM, Will Schmidt
wrote:
> Hi,
>
> Update the validate_power test to include power9 entries.
>
> Signed-off-by: Will Schmidt
>
Patch applied.
Thanks.
> --
>
> sniff-test run output:
> > ./validate
> Libpfm structure tests:
> libpfm ABI version : 0
>
Hi Will,
On Thu, Jun 1, 2017 at 7:16 AM, William Cohen wrote:
> On 06/01/2017 03:17 AM, Stephane Eranian wrote:
>> Hi,
>>
>> So if I understand, the problem is that you compile PAPI against a
>> libpfm which is different from the one actually installed on the
>> system. If the system has a more r
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