Mike
You are right. But does this Integrated library sound like a copy of Pads?
You know the all-in-one library, that cant be used.
Of course the Manager concept comes from Accel, oh yeah.
Sounds like a staight marketing scheme.
Bob Fearon
Mike Reagan wrote:
Great! They are also integrating
Hi Ray
I have had some success writing these (schematics) out as PDF's.
I have not tried to put them back into a word or text document.
I have also used various other paint programs to capture the schematics
to use as partials in rework drawings. It can be done.
Bob Fearon
Ray
Guts
Sorry to mislead, the additional cost came from routing the boards out of
the panels
and then plating. Mindful that edgr plating is not a linear or accurate as
standard
thru hole plating.
Bob Fearon
Brad Velander wrote:
My 2 cents worth, since we do this regularily
Brad
Now where have I heard that before?
Bob
Brad Velander wrote:
Rob,
try my quandry, 5 licenses and a bunch of rogue engineers who care
not about licenses, support or anything else as long as they can get a
design out the door. If they can't get the design out the door then
. This was a nightmare to
build and cost extra.
The same performance was achieved by placing a row of vias 100 mils
from the edge on a regular board, at a much lower cost.
Bob Fearon
Abd ul-Rahman Lomax wrote:
At 05:32 PM 11/8/01 -0500, Mike Reagan wrote:
you scare me man thinking that you
Sean
I have used Protel for Chip and Wire, but it was Ver 2.8.
If you can use that out date info, contact me off-forum.
Bob Fearon
Sean James wrote:
Has anybody attempted to do chip wire (hybrid layouts) with Protel?
Sean James
PCB Designer
Telecast Fiber Systems, Inc.
102 Grove
Hi
Just got the word, I have been set adrift again. ( enemployed)
If any one knows of a warm place, that needs a body, please
notify.
Thanks
Bob Fearon
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* To post a message: mailto
layers are planes connected to different screw
terminals, scrap the board.
I use this a lot on switch mode power supplies.
Bob Fearon
Brad Velander wrote:
Abd ul-Rahman or others,
if I read his description correctly he is trying to do a plated
mounting hole with additional vias
Tommy
Do you have any of your SMD pads set as multilayer?
I have only seen this message when I made that mistake.
Bob
Tommy kesson wrote:
Sometime then I do DRC I get an error message.
Broken-nets contraint
Net GND
Warning nets constain unpladet pads.
How do I find this unplated
They should show up on the screen as a different color ( multilayer
color) instead of top layer or bottom layer.
Tommy kesson wrote:
Okej, perhaps... But how do I find them?
Tommy
-Ursprungligt meddelande-
Fr n: Bob Fearon [mailto:[EMAIL PROTECTED]]
Skickat: den 13 augusti 2001
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