Guts
    Sorry to mislead, the additional cost came from routing the boards out of
the panels
    and then plating. Mindful that edgr plating is not a "linear" or accurate as
standard
    thru hole plating.
Bob Fearon


Brad Velander wrote:

> My 2 cents worth, since we do this regularily.
>
>         The edge plating will make a significant difference in board
> emmisions with GHz frequency signals depending on the board material used.
> It gets worse the higher your frequencies go. The problem is that the board
> material is a dielectric and thus will conduct high freq. signals between
> the copper of the other outer layers. It is essentially a waveguide. The
> vias will block some of the signal but the higher the frequency the closer
> you have to space the vias until you are almost hole to hole and your board
> has no structural strength along the line of vias.
>         The additional cost for the edge plating should be minimal. The only
> operation or labor is to route the board edges before doing the intitial
> electoless plating, instead of doing it after the board is processed. There
> is no additional work or effort unless there is also still unplated routing
> to do after the board is processed.
>
> Sincerely,
> Brad Velander.
>
> Lead PCB Designer
> Norsat International Inc.
> #300 - 4401 Still Creek Drive,
> Burnaby, B.C., Canada, V5C 6G9.
> Tel   (604) 292-9089 (direct line)
> Fax  (604) 292-9010
> Website: www.norsat.com
>
> -----Original Message-----
> From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]]
> Sent: Friday, November 09, 2001 12:22 PM
> To: Protel EDA Forum
> Subject: Re: [PEDA] keepoutlayer and planes ??
>
> At 09:44 AM 11/9/01 -0700, Bob Fearon wrote:
> >Abdul-Rahman
> >     Yes I have seen an inner plane layer come all the way out to an edge.
> >     The design was supposed to be "better for RF", but made no difference
> >     in board performance. The two outside layers were plated aound the
> edge
> >     and shorted ( on purpose ) to the inner layer. This was a nightmare to
> >     build and cost "extra".
> >     The same performance was achieved by placing a row of vias 100 mils
> >     from the edge on a "regular" board, at a much lower cost.
>
> This is not an example of what I asked for. Instead, this was a board
> deliberately fabricated without edge clearance. Yes, it was not a great
> idea from the start, as anyone who knows HF design would have anticipated,
> unless -- maybe -- one was trying to squeeze the last percent out of noise
> emissions *and* board space was very limited. I could see doing this with
> very small PCBs, where the via ring would take up an appreciable percentage
> of the board space.
>
> It should not have been much more expensive. In fact, as I recall,
> depending on the process, panel edges plate if you don't do something to
> prevent it!  (The same electroless copper used to plate the inside of holes
> also plates the panel edge, I'd think, I don't remember actually seeing
> this; however, that edge is normally routed away when all the processing is
> done, leaving the unplated edges that we normally see. So to accomplish
> this relatively inexpensively, one would route the boards as one routes a
> breakaway board *before* going to the electroless copper; this would leave
> some unplated tabs but one might hide the unplated tabs behind mounting
> holes....)
>
> Edge effect with regard to radiated noise is a controversial subject, but
> actually plating the board edge I have never before seen suggested.
> [EMAIL PROTECTED]
> Abdulrahman Lomax
> Easthampton, Massachusetts USA

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