1. I got many Problems with PLD when i used long Pathnames. This was an old
Problem of PLD which was not fixed for Years now. Just try to locate your
project in a short path like c:\pldtest1\myproj .
2. when using the very rare part 16V8 :-) PLD sometimes produces wrong
polarity fuse
3/10/02
Matt,
Thank you very much. I created sixteen different plds and wrote 560
lines of simulation
code to test them. With the exception of a few typos, everything moved
along without any
problems. In the past I have always used Palasm to prepare PLD files,
but with my new 2GHz
Peder,
Look under 'Save As'. I don't have Protel loaded right now, so couldn't
confirm this.
Gary
- Original Message -
From: Peder K. Hellegaard [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Sunday, March 10, 2002 10:58 AM
Subject: [PEDA] Exporting ASCII format
At 07:58 PM 3/10/2002 +0100, Peder K. Hellegaard wrote:
Anyone who knows how to export pcb and sch files in ASCII format in Protel
99SE ?
As Mr. Hylton indicated, it is File/SaveAs/Format/PCB ASCII file in PCB or
similar in Schematic.
This will write an ASCII version of the file in the active
snip
P99SE Sp6, Sp5, Sp4, Sp3, Sp2, Sp1, P99, P98 Sp4, Sp3, Sp2, Sp1... You get
the Idea.
Brian Guralnick
P98 Sp4? My impression had been that only *three* SPs had ever been released
for use with P98.
Regards,
Geoff Harland.
-
E-Mail Disclaimer
The Information in
The protel related advice is short. switch all routing layers except the
bottom layer off.
Make some parts for jumper wire. ( Not any size but a few ).
Add teardrops, use not less than pad - hole shoud be not less than 0.8mm.
Tracks should be not
smaller than 0.5mm. Holes should be very thight to
