Re: [PEDA] Re[2]: six or eight-layer (or more?) stackups - Capacitance

2003-06-06 Thread Rene Tschaggelar
Thanks for the in-depth story and link.

Rene

Ian Wilson wrote:
  
 The first resonance (at least) of a cap is series, so looks like a short
 circuit. By adding a number of different valued caps you can scatter a
 number of these nice AC shorts around your board and around your
 frequencies of interest.

 [ snip ]


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Re: [PEDA] Re[2]: six or eight-layer (or more?) stackups - Capacitance

2003-06-05 Thread Ian Wilson
On 07:14 PM 4/06/2003, John Sheahan said:
On Wed, Jun 04, 2003 at 09:34:18AM +0200, Norbert Hoppe wrote:
 When selecting parallel caps, it is important to remember that as the 
larger
 value capacitor goes inductive, the smaller value cap is still capacitive.
 At a particular frequency, a LC circuit is developed between the 2 caps.
 An infinite impedance could be generated with no decoupling benefit 
provided.
 When this occurs, single-capacitor decoupling is all that one can use
 for this application.

actually - if you look at ESL graphs for multilayer SMD caps - you will
see it depends much more on case size than on capacitance.
So the 100n tends to win.
This quote I think may be  older wisdom for thruhole components.
john
The first resonance (at least) of a cap is series, so looks like a short 
circuit. By adding a number of different valued caps you can scatter a 
number of these nice AC shorts around your board and around your 
frequencies of interest.

Above resonance the reactive impedance starts to rise as the impedance 
characteristic is now inductive.  In many cases this is not an issue, as 
the effective reactance is still low in the frequencies of interest.  In 
other situations, though, it is a critical issue and hence designers have 
used, and will continue to use, a variety of values in parallel - very 
common in RF environments.

However, big small caps, or is that small big caps, you know ... large 
capacitance in small volume, have pretty cruddy material, X7R if you are 
lucky or Z5U if capacitance is big.  These materials have pretty poor, and 
frequency dependent, ESR which decrease their value as decouplers.  Due 
largely to the effects of the lossy material, a Kemet, for example, X7R 
shows a sloppy self resonance and the following series impedance at 100 MHz:

Value   Size  Impedance
103  0603~1 ohm
103 0805~0.5 ohm
103 1206~0.3 ohm
104 0805~1 ohm
104 1206~1 ohm
So if you spec a 10nF 0603 you have a resistor, not a decoupler, at 100 
MHz.  According to Kemet, the 0603 only performs better than the other 
sizes at over the narrow freq range of about 10 to 30 MHz.  The lossy 
dielectric, and the need to use thinner metal in the large capacitances (to 
keep the pkg the same), is killing the performance.  Maybe that is an 
overstatement - but compare the self resonance curves of a COG/NPO material 
to that of a X7R, or worse Z5U,  you can see the dramatic effect the losses 
have on the resonance shape.  COG/NPO has dissipation factors in the order 
or 0.1% while the other materials are between about 2.5 to 5% or more.  (In 
fact, the lower Q of the high capaciatnce devices is partially a good 
thing.  Having high Q resonances around a board is a shocker when you find 
you fail EMC.)

Note also that the 100n 0805 has roughly *twice* the impedance @ 100 MHz 
than the cap *one tenth* the value in the same pkg!  In this case, if you 
are operating above 30 MHz the 1206 10n wins, followed closely by the 0805 
10n. 100n in any pkg and 10n in 0603 have about twice the impedance.

See figures 4, 5  6 of:
http://www.kemet.com/kemet/web/homepage/kechome.nsf/vapubfiles/F3102Gce/$file/F3102GCe.pdf
There is always progress in material science so the small-packaged, larger 
capacitance devices get better over time.

For modern high speed decoupling - I use lots of 10n devices, a few bulk 
devices and good (hopefully) layer stackup and split plane 
arrangement.  Specific devices operating at speed will have special 
treatment.  Currently, I side with the get to the plane fast crowd and have 
my supply via close to the power pads and then decoupling caps strung to 
these same vias with nice fat tracks.  I don't, usually, have a via, track, 
cap, then component pad arrangement - though my guess is, with the right 
sort of component selection either arrangement can be done well.

Ian Wilson



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Re: [PEDA] Re[2]: six or eight-layer (or more?) stackups - Capacitance

2003-06-05 Thread Bagotronix Tech Support
Ian:

Thanks for the refresher lesson in how real world parts you can actually
get your hands on perform as opposed to theoretically, a smaller case size
will always perform better.

Best regards,
Ivan Baggett
Bagotronix Inc.
website:  www.bagotronix.com


- Original Message -
From: Ian Wilson [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Wednesday, June 04, 2003 7:37 AM
Subject: Re: [PEDA] Re[2]: six or eight-layer (or more?) stackups -
Capacitance


 On 07:14 PM 4/06/2003, John Sheahan said:
 On Wed, Jun 04, 2003 at 09:34:18AM +0200, Norbert Hoppe wrote:
   When selecting parallel caps, it is important to remember that as the
  larger
   value capacitor goes inductive, the smaller value cap is still
capacitive.
   At a particular frequency, a LC circuit is developed between the 2
caps.
   An infinite impedance could be generated with no decoupling benefit
  provided.
   When this occurs, single-capacitor decoupling is all that one can use
   for this application.
 
 actually - if you look at ESL graphs for multilayer SMD caps - you will
 see it depends much more on case size than on capacitance.
 So the 100n tends to win.
 This quote I think may be  older wisdom for thruhole components.
 john

 The first resonance (at least) of a cap is series, so looks like a short
 circuit. By adding a number of different valued caps you can scatter a
 number of these nice AC shorts around your board and around your
 frequencies of interest.

 Above resonance the reactive impedance starts to rise as the impedance
 characteristic is now inductive.  In many cases this is not an issue, as
 the effective reactance is still low in the frequencies of interest.  In
 other situations, though, it is a critical issue and hence designers have
 used, and will continue to use, a variety of values in parallel - very
 common in RF environments.

 However, big small caps, or is that small big caps, you know ... large
 capacitance in small volume, have pretty cruddy material, X7R if you are
 lucky or Z5U if capacitance is big.  These materials have pretty poor, and
 frequency dependent, ESR which decrease their value as decouplers.  Due
 largely to the effects of the lossy material, a Kemet, for example, X7R
 shows a sloppy self resonance and the following series impedance at 100
MHz:

 Value   Size  Impedance
 103  0603~1 ohm
 103 0805~0.5 ohm
 103 1206~0.3 ohm
 104 0805~1 ohm
 104 1206~1 ohm

 So if you spec a 10nF 0603 you have a resistor, not a decoupler, at 100
 MHz.  According to Kemet, the 0603 only performs better than the other
 sizes at over the narrow freq range of about 10 to 30 MHz.  The lossy
 dielectric, and the need to use thinner metal in the large capacitances
(to
 keep the pkg the same), is killing the performance.  Maybe that is an
 overstatement - but compare the self resonance curves of a COG/NPO
material
 to that of a X7R, or worse Z5U,  you can see the dramatic effect the
losses
 have on the resonance shape.  COG/NPO has dissipation factors in the order
 or 0.1% while the other materials are between about 2.5 to 5% or more.
(In
 fact, the lower Q of the high capaciatnce devices is partially a good
 thing.  Having high Q resonances around a board is a shocker when you find
 you fail EMC.)

 Note also that the 100n 0805 has roughly *twice* the impedance @ 100 MHz
 than the cap *one tenth* the value in the same pkg!  In this case, if you
 are operating above 30 MHz the 1206 10n wins, followed closely by the 0805
 10n. 100n in any pkg and 10n in 0603 have about twice the impedance.

 See figures 4, 5  6 of:

http://www.kemet.com/kemet/web/homepage/kechome.nsf/vapubfiles/F3102Gce/$fil
e/F3102GCe.pdf

 There is always progress in material science so the small-packaged, larger
 capacitance devices get better over time.

 For modern high speed decoupling - I use lots of 10n devices, a few bulk
 devices and good (hopefully) layer stackup and split plane
 arrangement.  Specific devices operating at speed will have special
 treatment.  Currently, I side with the get to the plane fast crowd and
have
 my supply via close to the power pads and then decoupling caps strung to
 these same vias with nice fat tracks.  I don't, usually, have a via,
track,
 cap, then component pad arrangement - though my guess is, with the right
 sort of component selection either arrangement can be done well.

 Ian Wilson






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Re: [PEDA] Re[2]: six or eight-layer (or more?) stackups - Capacitance

2003-06-05 Thread John Sheahan
On Wed, Jun 04, 2003 at 09:37:19PM +1000, Ian Wilson wrote:

Thanks for the well reasoned response Ian. 
I went through this a few months ago, but needed 0402 package
(was a dense board) and a similar line of research showed 100n 
was the best choice there.  But it depends on the particular 
caps chosen. 

Sun publishes some of the best SI reports in this area I have 
found particularly covering the concept of (maesured) low plane 
impedance over frequency. see for example
http://groups.yahoo.com/group/si-list/files/Signal%20Integrity%20Documents/Published%20SI%20Papers%20from%20Sun/

Minor quibbles with some of the details inline 



 On 07:14 PM 4/06/2003, John Sheahan said:
 On Wed, Jun 04, 2003 at 09:34:18AM +0200, Norbert Hoppe wrote:
  When selecting parallel caps, it is important to remember that as the 
 larger
  value capacitor goes inductive, the smaller value cap is still 
 capacitive.
  At a particular frequency, a LC circuit is developed between the 2 caps.
  An infinite impedance could be generated with no decoupling benefit 
 provided.
  When this occurs, single-capacitor decoupling is all that one can use
  for this application.
 
 actually - if you look at ESL graphs for multilayer SMD caps - you will
 see it depends much more on case size than on capacitance.
 So the 100n tends to win.
 This quote I think may be  older wisdom for thruhole components.
 john
 
 The first resonance (at least) of a cap is series, so looks like a short 
 circuit. By adding a number of different valued caps you can scatter a 
 number of these nice AC shorts around your board and around your 
 frequencies of interest.

unfortunatley, these resonant circuits can sometimes clobber each other when 
there are different values involved.  But yes - that series resonance
helps a lot.

 
 Above resonance the reactive impedance starts to rise as the impedance 
 characteristic is now inductive.  In many cases this is not an issue, as 
 the effective reactance is still low in the frequencies of interest.  In 
 other situations, though, it is a critical issue and hence designers have 
 used, and will continue to use, a variety of values in parallel - very 
 common in RF environments.
 

sure, we want nice low ESL and ESR values here. 
The capacitance value (decoupler value) is really 
useful only below the series resonance point, which 
also may matter. And that is a big chunk of spectrun from the bulk cap
and maybe PSU up to say 100KHz region, thru to the 100M range.


 However, big small caps, or is that small big caps, you know ... large 
 capacitance in small volume, have pretty cruddy material, X7R if you are 
 lucky or Z5U if capacitance is big.  These materials have pretty poor, and 
 frequency dependent, ESR which decrease their value as decouplers.  Due 
 largely to the effects of the lossy material, a Kemet, for example, X7R 
 shows a sloppy self resonance and the following series impedance at 100 MHz:
 
 Value   Size  Impedance
 103  0603~1 ohm
 103 0805~0.5 ohm
 103 1206~0.3 ohm
 104 0805~1 ohm
 104 1206~1 ohm
 
 So if you spec a 10nF 0603 you have a resistor, not a decoupler, at 100 
 MHz. 

probably only a NPO lower than 1n and the interplane capacitance is
working here.  The 100n/10n argument is null as we are essentially
at/past series resonance.   Ovviously here we have an L or an R , not
a C. But we do have a low value L or R so we are still decoupling,
- the point of the dcoupler is to attenuate noise. C is just the way
we often tend to do this.
A sprinkling of 10-100pF value caps appeal to some in the 100Mhz range. 

 According to Kemet, the 0603 only performs better than the other 
 sizes at over the narrow freq range of about 10 to 30 MHz.  The lossy 
 dielectric, and the need to use thinner metal in the large capacitances (to 
 keep the pkg the same), is killing the performance.  Maybe that is an 
 overstatement - but compare the self resonance curves of a COG/NPO material 
 to that of a X7R, or worse Z5U,  you can see the dramatic effect the losses 
 have on the resonance shape.  COG/NPO has dissipation factors in the order 
 or 0.1% while the other materials are between about 2.5 to 5% or more.  (In 
 fact, the lower Q of the high capaciatnce devices is partially a good 
 thing.  Having high Q resonances around a board is a shocker when you find 
 you fail EMC.)
 

agree

 Note also that the 100n 0805 has roughly *twice* the impedance @ 100 MHz 
 than the cap *one tenth* the value in the same pkg!  In this case, if you 
 are operating above 30 MHz the 1206 10n wins, followed closely by the 0805 
 10n. 100n in any pkg and 10n in 0603 have about twice the impedance.


here you would do better with 1n NPO however..

 
 See figures 4, 5  6 of:
 http://www.kemet.com/kemet/web/homepage/kechome.nsf/vapubfiles/F3102Gce/$file/F3102GCe.pdf
 
 There is always progress in material science so the small-packaged, larger 
 capacitance devices get better over time.
 
 For 

Re: [PEDA] Re[2]: six or eight-layer (or more?) stackups - Capacitance

2003-06-05 Thread Ian Wilson
On 08:28 AM 5/06/2003, John Sheahan said:
 snip..
 Value   Size  Impedance
 103  0603~1 ohm
 103 0805~0.5 ohm
 103 1206~0.3 ohm
 104 0805~1 ohm
 104 1206~1 ohm

 So if you spec a 10nF 0603 you have a resistor, not a decoupler, at 100
 MHz.
probably only a NPO lower than 1n and the interplane capacitance is
working here.  The 100n/10n argument is null as we are essentially
at/past series resonance.   Ovviously here we have an L or an R , not
a C. But we do have a low value L or R so we are still decoupling,
- the point of the dcoupler is to attenuate noise. C is just the way
we often tend to do this.
A sprinkling of 10-100pF value caps appeal to some in the 100Mhz range.


I beg to disagree a little - the interplane cap maybe, but insofar as the 
bulk C's ... I am not looking at theoretical impedance (1/jwC) rather the 
published impedance curves from the manufacturer.  Operating past resonance 
is nothing special, and not necessarily a problem.  All you need to worry 
about is minimising the AC impedance between the power nets over a suitably 
broad range of frequencies and to an adequately low level - both 
application dependent.  Operating past resonance simply means the impedance 
is inductive and rising with freq - so what, as long as it is low enough, 
that is generally all you need to know.

(One big issue here is production spread of course - self resonance varies 
widely from device to device.  If your circuit relies on self resonance to 
null a specific noise spike, and you are using high-Q caps to do this, you 
may have problems in production.  I can imagine what the production team 
would think about trimmable decoupling caps. :-)

An NPO is only available in small cap values and so will be operating as a 
pretty good cap at low freqs and hence fairly ineffective. At 30 MHz the 
Kemet 1nF 1206 NPO is speced at typically 2 to 3 ohms.  Even if you had 1nF 
of high Q interplane capacitance (which you won't - see next para) you 
would still only have an AC impedance of 1.6 ohms.  0.2A switching current 
- 0.3 V ripple.  I would therefore look at the published impedance curves 
and find the most appropriate set of caps that supplement the plane 
capacitance at the dominant freqs of interest.  Forget the cap value - look 
at the impedance curve - for high speed decoupling situations this is all 
that matters.

1nF of *high-Q* interplane capacitance!  Not likely, even if the parallel 
plate capacitance equation gave that much in practice the resistance and 
inductance of the plane copper, and very uneven current distribution will 
mean that much of this theoretical capacitance is out-of-circuit for a 
particular component supply pin.  At higher frequencies you also have to 
consider the effects of propagation delay - some of the capacitance is too 
far away for the electrons to whizz over and smooth the voltage ripple due 
to the current spike - 1ns is about 180 cm assuming a 0.6 velocity factor 
(conservative as the Er is likely to be such that the velocity factor is 
lower (1/sqrt(Er)).  Even if I had superconducting power planes I would 
still have an effective area that is dependent on the speed of the 
transistions.

..snip..
 Note also that the 100n 0805 has roughly *twice* the impedance @ 100 MHz
 than the cap *one tenth* the value in the same pkg!  In this case, if you
 are operating above 30 MHz the 1206 10n wins, followed closely by the 0805
 10n. 100n in any pkg and 10n in 0603 have about twice the impedance.
here you would do better with 1n NPO however..
In a 1206 though, then you potentially get into the issue of longer tracks 
to the component pad so more inductance, and the 1206 1n NPO only performs 
better at 100MHz and a small range either side - due to the high Q the 
resonance is sharp.  So you have poor decoupling at 30 MHz - hence the need 
to parallel a big and sloppy with a sharp and quick.  Due to the series 
elements (look at the cap model) the interactions between caps is not all 
that much, when one is looking like a high impedance the other is becoming 
a low impedance - a high impedance in parallel with a low is a low..  Take 
the published cap models and do some SPICE sims - it is easy to see the 
results.  Better still use real caps and a spec-an/tracking generator or VNA.

The above is my, possibly flawed analysis...I suspect that is enough from 
me on this,
Hooroo,
Ian



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Re: [PEDA] Re[2]: six or eight-layer (or more?) stackups - Capacitance

2003-06-05 Thread John Sheahan
On Thu, Jun 05, 2003 at 10:29:29AM +1000, Ian Wilson wrote:

 about is minimising the AC impedance between the power nets over a suitably 
 broad range of frequencies and to an adequately low level - both 
 application dependent.  Operating past resonance simply means the impedance 
 is inductive and rising with freq - so what, as long as it is low enough, 
 that is generally all you need to know.

yes - just as long as we are not getting too near the parallel resonance. A Q
issue as you point out.

 may have problems in production.  I can imagine what the production team 
 would think about trimmable decoupling caps. :-)

select on test decouplers I have yet to resort to fortunately :)

 
 1nF of *high-Q* interplane capacitance!  Not likely, even if the parallel 

sorry if I was unclear. I did not mean to suggest the board planes 
were this good.
100p ~ 1N NPO may win in a brief band somewhere between 100M and 1G.
The plane cap helps a bit there and above.
100n or 10n is more useful at lower frequencies, - a NPO does not 
eliminate them - but sometimes can help the 10n/100n's a little 
further away to be useful.

 that much, when one is looking like a high impedance the other is becoming 
 a low impedance - a high impedance in parallel with a low is a low..  Take 
 the published cap models and do some SPICE sims - it is easy to see the 
 results.  Better still use real caps and a spec-an/tracking generator or 
 VNA.

I think the VNA is the tool of choice for designing this stuff.
A spec an can tell you how much noise you have got - but its tough to
be analytical when the noise injection model from a FPGA say is so
lacking.  
john

  


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[PEDA] Re[2]: six or eight-layer (or more?) stackups - Capacitance

2003-06-04 Thread Phillip Stevens


JH 2/ Use a spread of capacitor values so that you swap one or two deep
JH resonant nulls for a swag of shallower ones spread across the spectrum.

I found this to be interesting.  I've just about finished reading Digital
Design for Interference Specifications David l. Terrell, R.Kenneth
Keenan, 1997,  Published by NewNes ISBN 0-7506-7282-X.

The authors seem to take the opposite position that (bulk capacitance aside)
using the same value bypass caps lowers the overall ESR,  which (they
say) results in a lower overall spectrum.  And that mixing (for example)
.1uf and .01uf values is a bad idea.  In any case,  it was an interesting
read.

I'd be curious if anyone else has views on this subject,  one way or the other..

(The book also has some layer stackup advice.)



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Re: [PEDA] Re[2]: six or eight-layer (or more?) stackups - Capacitance

2003-06-04 Thread Norbert Hoppe

- Original Message - 
From: Phillip Stevens [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Wednesday, June 04, 2003 7:22 AM
Subject: [PEDA] Re[2]: six or eight-layer (or more?) stackups - Capacitance


 
 
 JH 2/ Use a spread of capacitor values so that you swap one or two deep
 JH resonant nulls for a swag of shallower ones spread across the spectrum.
 
 I found this to be interesting.  I've just about finished reading Digital
 Design for Interference Specifications David l. Terrell, R.Kenneth
 Keenan, 1997,  Published by NewNes ISBN 0-7506-7282-X.
 
 The authors seem to take the opposite position that (bulk capacitance aside)
 using the same value bypass caps lowers the overall ESR,  which (they
 say) results in a lower overall spectrum.  And that mixing (for example)
 .1uf and .01uf values is a bad idea.  In any case,  it was an interesting
 read.
 
 I'd be curious if anyone else has views on this subject,  one way or the other..

The same advice comes from the book
Montrose: Printed Circuit Board Design Techniques

quote
When selecting parallel caps, it is important to remember that as the larger
value capacitor goes inductive, the smaller value cap is still capacitive. 
At a particular frequency, a LC circuit is developed between the 2 caps.
An infinite impedance could be generated with no decoupling benefit provided.
When this occurs, single-capacitor decoupling is all that one can use 
for this application.
/quote
 
Regards, Norbert.





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